[tip:x86/cleanups] x86/cpu: Provide a config option to disable static_cpu_has

[tip-bot for Borislav Petkov]

Commit-ID:  6e1315fe82308cd29e7550eab967262e8bbc71a3
Gitweb: http://git.kernel.org/tip/6e1315fe82308cd29e7550eab967262e8bbc71a3
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:55 +0100

x86/cpu: Provide a config option to disable static_cpu_has

This brings .text savings of about ~1.6K when building a tinyconfig. It
is off by default so nothing changes for the default.

Kconfig help text from Josh.

Signed-off-by: Borislav Petkov 
Reviewed-by: Josh Triplett 
Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/Kconfig  | 11 +++
 arch/x86/include/asm/cpufeature.h |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index db3622f..a2abc2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -349,6 +349,17 @@ config X86_FEATURE_NAMES
 
  If in doubt, say Y.
 
+config X86_FAST_FEATURE_TESTS
+   bool "Fast CPU feature tests" if EMBEDDED
+   default y
+   ---help---
+ Some fast-paths in the kernel depend on the capabilities of the CPU.
+ Say Y here for the kernel to patch in the appropriate code at runtime
+ based on the capabilities of the CPU. The infrastructure for patching
+ code at runtime takes up some additional space; space-constrained
+ embedded systems may wish to say N here to produce smaller, slightly
+ slower code.
+
 config X86_X2APIC
bool "Support x2apic"
depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 144b042..43e1444 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4
+#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern void warn_pre_alternatives(void);
 extern bool __static_cpu_has_safe(u16 bit);
 
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[tip:x86/cleanups] x86/cpufeature: Cleanup get_cpu_cap()

[tip-bot for Borislav Petkov]

Commit-ID:  39c06df4dc10a41de5fe706f4378ee5f09beba73
Gitweb: http://git.kernel.org/tip/39c06df4dc10a41de5fe706f4378ee5f09beba73
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:54 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level 0x8001 */
-   xlvl = cpuid_eax(0x8000);
-   

[tip:x86/cleanups] x86/cpufeature: Move some of the scattered feature bits to x86_capability

[tip-bot for Borislav Petkov]

Commit-ID:  2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6
Gitweb: http://git.kernel.org/tip/2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:53 +0100

x86/cpufeature: Move some of the scattered feature bits to x86_capability

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 54 +++
 arch/x86/kernel/cpu/common.c  |  5 
 arch/x86/kernel/cpu/scattered.c   | 20 ---
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index e4f8010..13d78e0 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,7 +12,7 @@
 #include 
 #endif
 
-#define NCAPINTS   14  /* N 32-bit words worth of info */
+#define NCAPINTS   16  /* N 32-bit words worth of info */
 #define NBUGINTS   1   /* N 32-bit bug flags */
 
 /*
@@ -181,22 +181,17 @@
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
  */
-#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic 
Acceleration */
-#define X86_FEATURE_ARAT   ( 7*32+ 1) /* Always Running APIC Timer */
+
 #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance 
Boost */
 #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS 
support */
-#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit 
Notification */
-#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal 
Status */
-#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */
+
 #define X86_FEATURE_HW_PSTATE  ( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */
-#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */
-#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
-#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */
-#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+
 #define X86_FEATURE_INTEL_PT   ( 7*32+15) /* Intel Processor Trace */
 
 /* Virtualization flags: Linux defined, word 8 */
@@ -205,16 +200,7 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table 
support */
-#define X86_FEATURE_LBRV   ( 8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML   ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS  ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save 
*/
-#define X86_FEATURE_TSCRATEMSR  ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling 
support */
-#define X86_FEATURE_VMCBCLEAN   ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits 
support */
-#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */
+
 #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */
 
 
@@ -258,6 +244,30 @@
 /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */
 
+/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */
+#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic 
Acceleration */
+#define X86_FEATURE_ARAT   (14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit 
Notification */
+#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal 
Status */
+#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 0x800a (edx), word 15 */
+#define X86_FEATURE_NPT

[tip:x86/cpufeature] x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

[tip-bot for Borislav Petkov]

Commit-ID:  ae8348667c30175867f2c60e490097289135ac99
Gitweb: http://git.kernel.org/tip/ae8348667c30175867f2c60e490097289135ac99
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:41 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.

The remaining ones need more careful inspection before a conversion can
happen. On the TODO.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email...@alien8.de
Cc: David Sterba 
Cc: Herbert Xu 
Cc: Peter Zijlstra 
Cc: Matt Mackall 
Cc: Chris Mason 
Cc: Josef Bacik 
Signed-off-by: Thomas Gleixner 
---
 arch/x86/crypto/chacha20_glue.c |  2 +-
 arch/x86/crypto/crc32c-intel_glue.c |  2 +-
 arch/x86/include/asm/cmpxchg_32.h   |  2 +-
 arch/x86/include/asm/cmpxchg_64.h   |  2 +-
 arch/x86/include/asm/cpufeature.h   | 37 -
 arch/x86/include/asm/xor_32.h   |  2 +-
 arch/x86/kernel/cpu/amd.c   |  4 ++--
 arch/x86/kernel/cpu/common.c|  4 +++-
 arch/x86/kernel/cpu/intel.c |  3 ++-
 arch/x86/kernel/cpu/intel_cacheinfo.c   |  6 ++---
 arch/x86/kernel/cpu/mtrr/generic.c  |  2 +-
 arch/x86/kernel/cpu/mtrr/main.c |  2 +-
 arch/x86/kernel/cpu/perf_event_amd.c|  4 ++--
 arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +
 arch/x86/kernel/fpu/init.c  |  4 ++--
 arch/x86/kernel/hw_breakpoint.c |  6 +++--
 arch/x86/kernel/smpboot.c   |  2 +-
 arch/x86/kernel/vm86_32.c   |  4 +++-
 arch/x86/mm/setup_nx.c  |  4 ++--
 drivers/char/hw_random/via-rng.c|  5 ++--
 drivers/crypto/padlock-aes.c|  2 +-
 drivers/crypto/padlock-sha.c|  2 +-
 drivers/iommu/intel_irq_remapping.c |  2 +-
 fs/btrfs/disk-io.c  |  2 +-
 24 files changed, 48 insertions(+), 68 deletions(-)

diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bace..8baaff5 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
 
 static int __init chacha20_simd_mod_init(void)
 {
-   if (!cpu_has_ssse3)
+   if (!boot_cpu_has(X86_FEATURE_SSSE3))
return -ENODEV;
 
 #ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c 
b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d..0e98716 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
if (!x86_match_cpu(crc32c_cpu_id))
return -ENODEV;
 #ifdef CONFIG_X86_64
-   if (cpu_has_pclmulqdq) {
+   if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
alg.update = crc32c_pcl_intel_update;
alg.finup = crc32c_pcl_intel_finup;
alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h 
b/arch/x86/include/asm/cmpxchg_32.h
index f7e1429..e4959d0 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 
old, u64 new)
 
 #endif
 
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
 
 #endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h 
b/arch/x86/include/asm/cmpxchg_64.h
index 1af9469..caa23a3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
cmpxchg_local((ptr), (o), (n)); \
 })
 
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
 
 #endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 35401fe..144b042 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 } while (0)
 
 #define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
 #define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
 #define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
 #define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
 #define cpu_has_apic   boot_cpu_has(X86_FEATURE_APIC)
-#define cpu_has_sepboot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr   boot_cpu_has(X86_FEATURE_MTRR)
-#define cpu_has_mmx   

[tip:x86/cpufeature] x86/cpu: Provide a config option to disable static_cpu_has

[tip-bot for Borislav Petkov]

Commit-ID:  a4eb0afca79fd699b33e059f81d204e84f2b6760
Gitweb: http://git.kernel.org/tip/a4eb0afca79fd699b33e059f81d204e84f2b6760
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:01 +0100

x86/cpu: Provide a config option to disable static_cpu_has

This brings .text savings of about ~1.6K when building a tinyconfig. It
is off by default so nothing changes for the default.

Kconfig help text from Josh.

Signed-off-by: Borislav Petkov 
Reviewed-by: Josh Triplett 
Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/Kconfig  | 11 +++
 arch/x86/include/asm/cpufeature.h |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index db3622f..a2abc2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -349,6 +349,17 @@ config X86_FEATURE_NAMES
 
  If in doubt, say Y.
 
+config X86_FAST_FEATURE_TESTS
+   bool "Fast CPU feature tests" if EMBEDDED
+   default y
+   ---help---
+ Some fast-paths in the kernel depend on the capabilities of the CPU.
+ Say Y here for the kernel to patch in the appropriate code at runtime
+ based on the capabilities of the CPU. The infrastructure for patching
+ code at runtime takes up some additional space; space-constrained
+ embedded systems may wish to say N here to produce smaller, slightly
+ slower code.
+
 config X86_X2APIC
bool "Support x2apic"
depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 144b042..43e1444 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4
+#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern void warn_pre_alternatives(void);
 extern bool __static_cpu_has_safe(u16 bit);
 
--
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[tip:x86/cpufeature] x86/cpufeature: Move some of the scattered feature bits to x86_capability

[tip-bot for Borislav Petkov]

Commit-ID:  fde850b74a0167e06d5c057dc68cd1b35700f06d
Gitweb: http://git.kernel.org/tip/fde850b74a0167e06d5c057dc68cd1b35700f06d
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Move some of the scattered feature bits to x86_capability

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 54 +++
 arch/x86/kernel/cpu/common.c  |  5 
 arch/x86/kernel/cpu/scattered.c   | 20 ---
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index e4f8010..13d78e0 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,7 +12,7 @@
 #include 
 #endif
 
-#define NCAPINTS   14  /* N 32-bit words worth of info */
+#define NCAPINTS   16  /* N 32-bit words worth of info */
 #define NBUGINTS   1   /* N 32-bit bug flags */
 
 /*
@@ -181,22 +181,17 @@
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
  */
-#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic 
Acceleration */
-#define X86_FEATURE_ARAT   ( 7*32+ 1) /* Always Running APIC Timer */
+
 #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance 
Boost */
 #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS 
support */
-#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit 
Notification */
-#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal 
Status */
-#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */
+
 #define X86_FEATURE_HW_PSTATE  ( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */
-#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */
-#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
-#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */
-#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+
 #define X86_FEATURE_INTEL_PT   ( 7*32+15) /* Intel Processor Trace */
 
 /* Virtualization flags: Linux defined, word 8 */
@@ -205,16 +200,7 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table 
support */
-#define X86_FEATURE_LBRV   ( 8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML   ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS  ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save 
*/
-#define X86_FEATURE_TSCRATEMSR  ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling 
support */
-#define X86_FEATURE_VMCBCLEAN   ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits 
support */
-#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */
+
 #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */
 
 
@@ -258,6 +244,30 @@
 /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */
 
+/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */
+#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic 
Acceleration */
+#define X86_FEATURE_ARAT   (14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit 
Notification */
+#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal 
Status */
+#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 0x800a (edx), word 15 */
+#define X86_FEATURE_NPT

[tip:x86/cpufeature] x86/cpufeature: Cleanup get_cpu_cap()

[tip-bot for Borislav Petkov]

Commit-ID:  54ed92a012c82ad344e9e41193d3e5e83a5f73be
Gitweb: http://git.kernel.org/tip/54ed92a012c82ad344e9e41193d3e5e83a5f73be
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level 0x8001 */
-   xlvl = cpuid_eax(0x8000);
-   

[tip:x86/cpufeature] x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

[tip-bot for Borislav Petkov]

Commit-ID:  ae8348667c30175867f2c60e490097289135ac99
Gitweb: http://git.kernel.org/tip/ae8348667c30175867f2c60e490097289135ac99
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:41 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.

The remaining ones need more careful inspection before a conversion can
happen. On the TODO.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email...@alien8.de
Cc: David Sterba 
Cc: Herbert Xu 
Cc: Peter Zijlstra 
Cc: Matt Mackall 
Cc: Chris Mason 
Cc: Josef Bacik 
Signed-off-by: Thomas Gleixner 
---
 arch/x86/crypto/chacha20_glue.c |  2 +-
 arch/x86/crypto/crc32c-intel_glue.c |  2 +-
 arch/x86/include/asm/cmpxchg_32.h   |  2 +-
 arch/x86/include/asm/cmpxchg_64.h   |  2 +-
 arch/x86/include/asm/cpufeature.h   | 37 -
 arch/x86/include/asm/xor_32.h   |  2 +-
 arch/x86/kernel/cpu/amd.c   |  4 ++--
 arch/x86/kernel/cpu/common.c|  4 +++-
 arch/x86/kernel/cpu/intel.c |  3 ++-
 arch/x86/kernel/cpu/intel_cacheinfo.c   |  6 ++---
 arch/x86/kernel/cpu/mtrr/generic.c  |  2 +-
 arch/x86/kernel/cpu/mtrr/main.c |  2 +-
 arch/x86/kernel/cpu/perf_event_amd.c|  4 ++--
 arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +
 arch/x86/kernel/fpu/init.c  |  4 ++--
 arch/x86/kernel/hw_breakpoint.c |  6 +++--
 arch/x86/kernel/smpboot.c   |  2 +-
 arch/x86/kernel/vm86_32.c   |  4 +++-
 arch/x86/mm/setup_nx.c  |  4 ++--
 drivers/char/hw_random/via-rng.c|  5 ++--
 drivers/crypto/padlock-aes.c|  2 +-
 drivers/crypto/padlock-sha.c|  2 +-
 drivers/iommu/intel_irq_remapping.c |  2 +-
 fs/btrfs/disk-io.c  |  2 +-
 24 files changed, 48 insertions(+), 68 deletions(-)

diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bace..8baaff5 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
 
 static int __init chacha20_simd_mod_init(void)
 {
-   if (!cpu_has_ssse3)
+   if (!boot_cpu_has(X86_FEATURE_SSSE3))
return -ENODEV;
 
 #ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c 
b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d..0e98716 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
if (!x86_match_cpu(crc32c_cpu_id))
return -ENODEV;
 #ifdef CONFIG_X86_64
-   if (cpu_has_pclmulqdq) {
+   if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
alg.update = crc32c_pcl_intel_update;
alg.finup = crc32c_pcl_intel_finup;
alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h 
b/arch/x86/include/asm/cmpxchg_32.h
index f7e1429..e4959d0 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 
old, u64 new)
 
 #endif
 
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
 
 #endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h 
b/arch/x86/include/asm/cmpxchg_64.h
index 1af9469..caa23a3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
cmpxchg_local((ptr), (o), (n)); \
 })
 
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
 
 #endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 35401fe..144b042 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 } while (0)
 
 #define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
 #define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
 #define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
 #define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
 #define cpu_has_apic   

[tip:x86/cpufeature] x86/cpufeature: Cleanup get_cpu_cap()

[tip-bot for Borislav Petkov]

Commit-ID:  54ed92a012c82ad344e9e41193d3e5e83a5f73be
Gitweb: http://git.kernel.org/tip/54ed92a012c82ad344e9e41193d3e5e83a5f73be
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level 

[tip:x86/cpufeature] x86/cpufeature: Move some of the scattered feature bits to x86_capability

[tip-bot for Borislav Petkov]

Commit-ID:  fde850b74a0167e06d5c057dc68cd1b35700f06d
Gitweb: http://git.kernel.org/tip/fde850b74a0167e06d5c057dc68cd1b35700f06d
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:00 +0100

x86/cpufeature: Move some of the scattered feature bits to x86_capability

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 54 +++
 arch/x86/kernel/cpu/common.c  |  5 
 arch/x86/kernel/cpu/scattered.c   | 20 ---
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index e4f8010..13d78e0 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,7 +12,7 @@
 #include 
 #endif
 
-#define NCAPINTS   14  /* N 32-bit words worth of info */
+#define NCAPINTS   16  /* N 32-bit words worth of info */
 #define NBUGINTS   1   /* N 32-bit bug flags */
 
 /*
@@ -181,22 +181,17 @@
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
  */
-#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic 
Acceleration */
-#define X86_FEATURE_ARAT   ( 7*32+ 1) /* Always Running APIC Timer */
+
 #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance 
Boost */
 #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS 
support */
-#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit 
Notification */
-#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal 
Status */
-#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */
+
 #define X86_FEATURE_HW_PSTATE  ( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */
-#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */
-#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
-#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */
-#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+
 #define X86_FEATURE_INTEL_PT   ( 7*32+15) /* Intel Processor Trace */
 
 /* Virtualization flags: Linux defined, word 8 */
@@ -205,16 +200,7 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table 
support */
-#define X86_FEATURE_LBRV   ( 8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML   ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS  ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save 
*/
-#define X86_FEATURE_TSCRATEMSR  ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling 
support */
-#define X86_FEATURE_VMCBCLEAN   ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits 
support */
-#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */
+
 #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */
 
 
@@ -258,6 +244,30 @@
 /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */
 
+/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */
+#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic 
Acceleration */
+#define X86_FEATURE_ARAT   (14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit 
Notification */
+#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal 
Status */
+#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 

[tip:x86/cpufeature] x86/cpu: Provide a config option to disable static_cpu_has

[tip-bot for Borislav Petkov]

Commit-ID:  a4eb0afca79fd699b33e059f81d204e84f2b6760
Gitweb: http://git.kernel.org/tip/a4eb0afca79fd699b33e059f81d204e84f2b6760
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:14:01 +0100

x86/cpu: Provide a config option to disable static_cpu_has

This brings .text savings of about ~1.6K when building a tinyconfig. It
is off by default so nothing changes for the default.

Kconfig help text from Josh.

Signed-off-by: Borislav Petkov 
Reviewed-by: Josh Triplett 
Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/Kconfig  | 11 +++
 arch/x86/include/asm/cpufeature.h |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index db3622f..a2abc2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -349,6 +349,17 @@ config X86_FEATURE_NAMES
 
  If in doubt, say Y.
 
+config X86_FAST_FEATURE_TESTS
+   bool "Fast CPU feature tests" if EMBEDDED
+   default y
+   ---help---
+ Some fast-paths in the kernel depend on the capabilities of the CPU.
+ Say Y here for the kernel to patch in the appropriate code at runtime
+ based on the capabilities of the CPU. The infrastructure for patching
+ code at runtime takes up some additional space; space-constrained
+ embedded systems may wish to say N here to produce smaller, slightly
+ slower code.
+
 config X86_X2APIC
bool "Support x2apic"
depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 144b042..43e1444 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4
+#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern void warn_pre_alternatives(void);
 extern bool __static_cpu_has_safe(u16 bit);
 
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[tip:x86/cleanups] x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

[tip-bot for Borislav Petkov]

Commit-ID:  362f924b64ba0f4be2ee0cb697690c33d40be721
Gitweb: http://git.kernel.org/tip/362f924b64ba0f4be2ee0cb697690c33d40be721
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:41 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:55 +0100

x86/cpufeature: Remove unused and seldomly used cpu_has_xx macros

Those are stupid and code should use static_cpu_has_safe() or
boot_cpu_has() instead. Kill the least used and unused ones.

The remaining ones need more careful inspection before a conversion can
happen. On the TODO.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-4-git-send-email...@alien8.de
Cc: David Sterba 
Cc: Herbert Xu 
Cc: Peter Zijlstra 
Cc: Matt Mackall 
Cc: Chris Mason 
Cc: Josef Bacik 
Signed-off-by: Thomas Gleixner 
---
 arch/x86/crypto/chacha20_glue.c |  2 +-
 arch/x86/crypto/crc32c-intel_glue.c |  2 +-
 arch/x86/include/asm/cmpxchg_32.h   |  2 +-
 arch/x86/include/asm/cmpxchg_64.h   |  2 +-
 arch/x86/include/asm/cpufeature.h   | 37 -
 arch/x86/include/asm/xor_32.h   |  2 +-
 arch/x86/kernel/cpu/amd.c   |  4 ++--
 arch/x86/kernel/cpu/common.c|  4 +++-
 arch/x86/kernel/cpu/intel.c |  3 ++-
 arch/x86/kernel/cpu/intel_cacheinfo.c   |  6 ++---
 arch/x86/kernel/cpu/mtrr/generic.c  |  2 +-
 arch/x86/kernel/cpu/mtrr/main.c |  2 +-
 arch/x86/kernel/cpu/perf_event_amd.c|  4 ++--
 arch/x86/kernel/cpu/perf_event_amd_uncore.c | 11 +
 arch/x86/kernel/fpu/init.c  |  4 ++--
 arch/x86/kernel/hw_breakpoint.c |  6 +++--
 arch/x86/kernel/smpboot.c   |  2 +-
 arch/x86/kernel/vm86_32.c   |  4 +++-
 arch/x86/mm/setup_nx.c  |  4 ++--
 drivers/char/hw_random/via-rng.c|  5 ++--
 drivers/crypto/padlock-aes.c|  2 +-
 drivers/crypto/padlock-sha.c|  2 +-
 drivers/iommu/intel_irq_remapping.c |  2 +-
 fs/btrfs/disk-io.c  |  2 +-
 24 files changed, 48 insertions(+), 68 deletions(-)

diff --git a/arch/x86/crypto/chacha20_glue.c b/arch/x86/crypto/chacha20_glue.c
index 722bace..8baaff5 100644
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -125,7 +125,7 @@ static struct crypto_alg alg = {
 
 static int __init chacha20_simd_mod_init(void)
 {
-   if (!cpu_has_ssse3)
+   if (!boot_cpu_has(X86_FEATURE_SSSE3))
return -ENODEV;
 
 #ifdef CONFIG_AS_AVX2
diff --git a/arch/x86/crypto/crc32c-intel_glue.c 
b/arch/x86/crypto/crc32c-intel_glue.c
index 81a595d..0e98716 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -257,7 +257,7 @@ static int __init crc32c_intel_mod_init(void)
if (!x86_match_cpu(crc32c_cpu_id))
return -ENODEV;
 #ifdef CONFIG_X86_64
-   if (cpu_has_pclmulqdq) {
+   if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
alg.update = crc32c_pcl_intel_update;
alg.finup = crc32c_pcl_intel_finup;
alg.digest = crc32c_pcl_intel_digest;
diff --git a/arch/x86/include/asm/cmpxchg_32.h 
b/arch/x86/include/asm/cmpxchg_32.h
index f7e1429..e4959d0 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -109,6 +109,6 @@ static inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 
old, u64 new)
 
 #endif
 
-#define system_has_cmpxchg_double() cpu_has_cx8
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX8)
 
 #endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h 
b/arch/x86/include/asm/cmpxchg_64.h
index 1af9469..caa23a3 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -18,6 +18,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
cmpxchg_local((ptr), (o), (n)); \
 })
 
-#define system_has_cmpxchg_double() cpu_has_cx16
+#define system_has_cmpxchg_double() boot_cpu_has(X86_FEATURE_CX16)
 
 #endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 35401fe..144b042 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -385,58 +385,29 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
 } while (0)
 
 #define cpu_has_fpuboot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_de boot_cpu_has(X86_FEATURE_DE)
 #define cpu_has_pseboot_cpu_has(X86_FEATURE_PSE)
 #define cpu_has_tscboot_cpu_has(X86_FEATURE_TSC)
 #define cpu_has_pgeboot_cpu_has(X86_FEATURE_PGE)
 #define cpu_has_apic   

[tip:x86/cleanups] x86/cpufeature: Move some of the scattered feature bits to x86_capability

[tip-bot for Borislav Petkov]

Commit-ID:  2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6
Gitweb: http://git.kernel.org/tip/2ccd71f1b278d450a6f8c8c737c7fe237ca06dc6
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:39 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:53 +0100

x86/cpufeature: Move some of the scattered feature bits to x86_capability

Turn the CPUID leafs which are proper CPUID feature bit leafs into
separate ->x86_capability words.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-2-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 54 +++
 arch/x86/kernel/cpu/common.c  |  5 
 arch/x86/kernel/cpu/scattered.c   | 20 ---
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index e4f8010..13d78e0 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -12,7 +12,7 @@
 #include 
 #endif
 
-#define NCAPINTS   14  /* N 32-bit words worth of info */
+#define NCAPINTS   16  /* N 32-bit words worth of info */
 #define NBUGINTS   1   /* N 32-bit bug flags */
 
 /*
@@ -181,22 +181,17 @@
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
+ * CPUID levels like 0x6, 0xA etc, word 7.
+ *
+ * Reuse free bits when adding new feature flags!
  */
-#define X86_FEATURE_IDA( 7*32+ 0) /* Intel Dynamic 
Acceleration */
-#define X86_FEATURE_ARAT   ( 7*32+ 1) /* Always Running APIC Timer */
+
 #define X86_FEATURE_CPB( 7*32+ 2) /* AMD Core Performance 
Boost */
 #define X86_FEATURE_EPB( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS 
support */
-#define X86_FEATURE_PLN( 7*32+ 5) /* Intel Power Limit 
Notification */
-#define X86_FEATURE_PTS( 7*32+ 6) /* Intel Package Thermal 
Status */
-#define X86_FEATURE_DTHERM ( 7*32+ 7) /* Digital Thermal Sensor */
+
 #define X86_FEATURE_HW_PSTATE  ( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */
-#define X86_FEATURE_HWP( 7*32+ 10) /* "hwp" Intel HWP */
-#define X86_FEATURE_HWP_NOTIFY ( 7*32+ 11) /* Intel HWP_NOTIFY */
-#define X86_FEATURE_HWP_ACT_WINDOW ( 7*32+ 12) /* Intel HWP_ACT_WINDOW */
-#define X86_FEATURE_HWP_EPP( 7*32+13) /* Intel HWP_EPP */
-#define X86_FEATURE_HWP_PKG_REQ ( 7*32+14) /* Intel HWP_PKG_REQ */
+
 #define X86_FEATURE_INTEL_PT   ( 7*32+15) /* Intel Processor Trace */
 
 /* Virtualization flags: Linux defined, word 8 */
@@ -205,16 +200,7 @@
 #define X86_FEATURE_FLEXPRIORITY ( 8*32+ 2) /* Intel FlexPriority */
 #define X86_FEATURE_EPT ( 8*32+ 3) /* Intel Extended Page Table */
 #define X86_FEATURE_VPID( 8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT( 8*32+ 5) /* AMD Nested Page Table 
support */
-#define X86_FEATURE_LBRV   ( 8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML   ( 8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS  ( 8*32+ 8) /* "nrip_save" AMD SVM next_rip save 
*/
-#define X86_FEATURE_TSCRATEMSR  ( 8*32+ 9) /* "tsc_scale" AMD TSC scaling 
support */
-#define X86_FEATURE_VMCBCLEAN   ( 8*32+10) /* "vmcb_clean" AMD VMCB clean bits 
support */
-#define X86_FEATURE_FLUSHBYASID ( 8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS ( 8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER ( 8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD ( 8*32+14) /* AMD pause filter threshold */
+
 #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */
 
 
@@ -258,6 +244,30 @@
 /* AMD-defined CPU features, CPUID level 0x8008 (ebx), word 13 */
 #define X86_FEATURE_CLZERO (13*32+0) /* CLZERO instruction */
 
+/* Thermal and Power Management Leaf, CPUID level 0x0006 (eax), word 14 */
+#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
+#define X86_FEATURE_IDA(14*32+ 1) /* Intel Dynamic 
Acceleration */
+#define X86_FEATURE_ARAT   (14*32+ 2) /* Always Running APIC Timer */
+#define X86_FEATURE_PLN(14*32+ 4) /* Intel Power Limit 
Notification */
+#define X86_FEATURE_PTS(14*32+ 6) /* Intel Package Thermal 
Status */
+#define X86_FEATURE_HWP(14*32+ 7) /* Intel Hardware P-states */
+#define X86_FEATURE_HWP_NOTIFY (14*32+ 8) /* HWP Notification */
+#define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */
+#define X86_FEATURE_HWP_EPP(14*32+10) /* HWP Energy Perf. Preference */
+#define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */
+
+/* AMD SVM Feature Identification, CPUID level 

[tip:x86/cleanups] x86/cpufeature: Cleanup get_cpu_cap()

[tip-bot for Borislav Petkov]

Commit-ID:  39c06df4dc10a41de5fe706f4378ee5f09beba73
Gitweb: http://git.kernel.org/tip/39c06df4dc10a41de5fe706f4378ee5f09beba73
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:54 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level 

[tip:x86/cleanups] x86/cpu: Provide a config option to disable static_cpu_has

[tip-bot for Borislav Petkov]

Commit-ID:  6e1315fe82308cd29e7550eab967262e8bbc71a3
Gitweb: http://git.kernel.org/tip/6e1315fe82308cd29e7550eab967262e8bbc71a3
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:42 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:55 +0100

x86/cpu: Provide a config option to disable static_cpu_has

This brings .text savings of about ~1.6K when building a tinyconfig. It
is off by default so nothing changes for the default.

Kconfig help text from Josh.

Signed-off-by: Borislav Petkov 
Reviewed-by: Josh Triplett 
Link: http://lkml.kernel.org/r/1449481182-27541-5-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/Kconfig  | 11 +++
 arch/x86/include/asm/cpufeature.h |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index db3622f..a2abc2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -349,6 +349,17 @@ config X86_FEATURE_NAMES
 
  If in doubt, say Y.
 
+config X86_FAST_FEATURE_TESTS
+   bool "Fast CPU feature tests" if EMBEDDED
+   default y
+   ---help---
+ Some fast-paths in the kernel depend on the capabilities of the CPU.
+ Say Y here for the kernel to patch in the appropriate code at runtime
+ based on the capabilities of the CPU. The infrastructure for patching
+ code at runtime takes up some additional space; space-constrained
+ embedded systems may wish to say N here to produce smaller, slightly
+ slower code.
+
 config X86_X2APIC
bool "Support x2apic"
depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 144b042..43e1444 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -409,7 +409,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
  * fast paths and boot_cpu_has() otherwise!
  */
 
-#if __GNUC__ >= 4
+#if __GNUC__ >= 4 && defined(CONFIG_X86_FAST_FEATURE_TESTS)
 extern void warn_pre_alternatives(void);
 extern bool __static_cpu_has_safe(u16 bit);
 
--
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[tip:x86/cleanups] x86/mm: Align macro defines

[tip-bot for Borislav Petkov]

Commit-ID:  4baf7fe40790c8ffdab54edc8e5b7051cfce3968
Gitweb: http://git.kernel.org/tip/4baf7fe40790c8ffdab54edc8e5b7051cfce3968
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:24:28 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:53:40 +0100

x86/mm: Align macro defines

Bring PAGE_{SHIFT,SIZE,MASK} to the same indentation level as the rest
of the header.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449480268-26583-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/page_types.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/page_types.h 
b/arch/x86/include/asm/page_types.h
index cc071c6..7bd0099 100644
--- a/arch/x86/include/asm/page_types.h
+++ b/arch/x86/include/asm/page_types.h
@@ -5,9 +5,9 @@
 #include 
 
 /* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT 12
-#define PAGE_SIZE  (_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK  (~(PAGE_SIZE-1))
+#define PAGE_SHIFT 12
+#define PAGE_SIZE  (_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK  (~(PAGE_SIZE-1))
 
 #define PMD_PAGE_SIZE  (_AC(1, UL) << PMD_SHIFT)
 #define PMD_PAGE_MASK  (~(PMD_PAGE_SIZE-1))
--
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[tip:x86/asm] x86/entry/64_compat: Make labels local

[tip-bot for Borislav Petkov]

Commit-ID:  f74acf0e4326bfaa2c0be1e82f23801fe347cd9c
Gitweb: http://git.kernel.org/tip/f74acf0e4326bfaa2c0be1e82f23801fe347cd9c
Author: Borislav Petkov 
AuthorDate: Sat, 12 Dec 2015 11:27:57 +0100
Committer:  Ingo Molnar 
CommitDate: Mon, 14 Dec 2015 09:28:48 +0100

x86/entry/64_compat: Make labels local

... so that they don't appear as symbols in the final ELF.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1449916077-6506-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/entry_64_compat.S | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index bbcb285..8d802a1 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -96,15 +96,15 @@ ENTRY(entry_SYSENTER_compat)
 * This needs to happen before enabling interrupts so that
 * we don't get preempted with NT set.
 *
-* NB.: sysenter_fix_flags is a label with the code under it moved
+* NB.: .Lsysenter_fix_flags is a label with the code under it moved
 * out-of-line as an optimization: NT is unlikely to be set in the
 * majority of the cases and instead of polluting the I$ unnecessarily,
 * we're keeping that code behind a branch which will predict as
 * not-taken and therefore its instructions won't be fetched.
 */
testl   $X86_EFLAGS_NT, EFLAGS(%rsp)
-   jnz sysenter_fix_flags
-sysenter_flags_fixed:
+   jnz .Lsysenter_fix_flags
+.Lsysenter_flags_fixed:
 
/*
 * User mode is traced as though IRQs are on, and SYSENTER
@@ -119,10 +119,10 @@ sysenter_flags_fixed:
"jmp .Lsyscall_32_done", X86_FEATURE_XENPV
jmp sysret32_from_system_call
 
-sysenter_fix_flags:
+.Lsysenter_fix_flags:
pushq   $X86_EFLAGS_FIXED
popfq
-   jmp sysenter_flags_fixed
+   jmp .Lsysenter_flags_fixed
 ENDPROC(entry_SYSENTER_compat)
 
 /*
--
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[tip:x86/asm] x86/entry/64_compat: Make labels local

[tip-bot for Borislav Petkov]

Commit-ID:  f74acf0e4326bfaa2c0be1e82f23801fe347cd9c
Gitweb: http://git.kernel.org/tip/f74acf0e4326bfaa2c0be1e82f23801fe347cd9c
Author: Borislav Petkov 
AuthorDate: Sat, 12 Dec 2015 11:27:57 +0100
Committer:  Ingo Molnar 
CommitDate: Mon, 14 Dec 2015 09:28:48 +0100

x86/entry/64_compat: Make labels local

... so that they don't appear as symbols in the final ELF.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1449916077-6506-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/entry_64_compat.S | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index bbcb285..8d802a1 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -96,15 +96,15 @@ ENTRY(entry_SYSENTER_compat)
 * This needs to happen before enabling interrupts so that
 * we don't get preempted with NT set.
 *
-* NB.: sysenter_fix_flags is a label with the code under it moved
+* NB.: .Lsysenter_fix_flags is a label with the code under it moved
 * out-of-line as an optimization: NT is unlikely to be set in the
 * majority of the cases and instead of polluting the I$ unnecessarily,
 * we're keeping that code behind a branch which will predict as
 * not-taken and therefore its instructions won't be fetched.
 */
testl   $X86_EFLAGS_NT, EFLAGS(%rsp)
-   jnz sysenter_fix_flags
-sysenter_flags_fixed:
+   jnz .Lsysenter_fix_flags
+.Lsysenter_flags_fixed:
 
/*
 * User mode is traced as though IRQs are on, and SYSENTER
@@ -119,10 +119,10 @@ sysenter_flags_fixed:
"jmp .Lsyscall_32_done", X86_FEATURE_XENPV
jmp sysret32_from_system_call
 
-sysenter_fix_flags:
+.Lsysenter_fix_flags:
pushq   $X86_EFLAGS_FIXED
popfq
-   jmp sysenter_flags_fixed
+   jmp .Lsysenter_flags_fixed
 ENDPROC(entry_SYSENTER_compat)
 
 /*
--
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[tip:x86/mm] x86/mm/ptdump: Make (debugfs)/ kernel_page_tables read-only

[tip-bot for Borislav Petkov]

Commit-ID:  071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Gitweb: http://git.kernel.org/tip/071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Author: Borislav Petkov 
AuthorDate: Mon, 30 Nov 2015 13:12:59 +0100
Committer:  Ingo Molnar 
CommitDate: Fri, 4 Dec 2015 12:55:01 +0100

x86/mm/ptdump: Make (debugfs)/kernel_page_tables read-only

File should be created with S_IRUSR and not with S_IWUSR too
because writing to it doesn't make any sense. I mean, we don't
have a ->write method anyway but let's have the permissions
correct too.

Signed-off-by: Borislav Petkov 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Kees Cook 
Cc: Linus Torvalds 
Cc: Paul E. McKenney 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448885579-32506-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/mm/debug_pagetables.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/mm/debug_pagetables.c b/arch/x86/mm/debug_pagetables.c
index b35ee86..bfcffdf 100644
--- a/arch/x86/mm/debug_pagetables.c
+++ b/arch/x86/mm/debug_pagetables.c
@@ -26,7 +26,7 @@ static struct dentry *pe;
 
 static int __init pt_dump_debug_init(void)
 {
-   pe = debugfs_create_file("kernel_page_tables", 0600, NULL, NULL,
+   pe = debugfs_create_file("kernel_page_tables", S_IRUSR, NULL, NULL,
 _fops);
if (!pe)
return -ENOMEM;
--
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[tip:x86/mm] x86/mm/ptdump: Make (debugfs)/ kernel_page_tables read-only

[tip-bot for Borislav Petkov]

Commit-ID:  071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Gitweb: http://git.kernel.org/tip/071ac0c4e8e90d5de05f0779b03ae69ce84820d5
Author: Borislav Petkov 
AuthorDate: Mon, 30 Nov 2015 13:12:59 +0100
Committer:  Ingo Molnar 
CommitDate: Fri, 4 Dec 2015 12:55:01 +0100

x86/mm/ptdump: Make (debugfs)/kernel_page_tables read-only

File should be created with S_IRUSR and not with S_IWUSR too
because writing to it doesn't make any sense. I mean, we don't
have a ->write method anyway but let's have the permissions
correct too.

Signed-off-by: Borislav Petkov 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Kees Cook 
Cc: Linus Torvalds 
Cc: Paul E. McKenney 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448885579-32506-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/mm/debug_pagetables.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/mm/debug_pagetables.c b/arch/x86/mm/debug_pagetables.c
index b35ee86..bfcffdf 100644
--- a/arch/x86/mm/debug_pagetables.c
+++ b/arch/x86/mm/debug_pagetables.c
@@ -26,7 +26,7 @@ static struct dentry *pe;
 
 static int __init pt_dump_debug_init(void)
 {
-   pe = debugfs_create_file("kernel_page_tables", 0600, NULL, NULL,
+   pe = debugfs_create_file("kernel_page_tables", S_IRUSR, NULL, NULL,
 _fops);
if (!pe)
return -ENOMEM;
--
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[tip:ras/core] x86/mce: Add the missing memory error check on AMD

[tip-bot for Borislav Petkov]

Commit-ID:  db548a28fcee0f38cf4c7c726becf24c8afacf02
Gitweb: http://git.kernel.org/tip/db548a28fcee0f38cf4c7c726becf24c8afacf02
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:19 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/mce: Add the missing memory error check on AMD

We simply need to look at the extended error code when detecting
whether the error is of type memory.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fb8b1db..e00e85a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -522,10 +522,10 @@ static bool memory_error(struct mce *m)
struct cpuinfo_x86 *c = _cpu_data;
 
if (c->x86_vendor == X86_VENDOR_AMD) {
-   /*
-* coming soon
-*/
-   return false;
+   /* ErrCodeExt[20:16] */
+   u8 xec = (m->status >> 16) & 0x1f;
+
+   return (xec == 0x0 || xec == 0x8);
} else if (c->x86_vendor == X86_VENDOR_INTEL) {
/*
 * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
--
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[tip:x86/fpu] x86/fpu: Get rid of xstate_fault()

[tip-bot for Borislav Petkov]

Commit-ID:  b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Gitweb: http://git.kernel.org/tip/b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Author: Borislav Petkov 
AuthorDate: Thu, 19 Nov 2015 12:25:26 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100

x86/fpu: Get rid of xstate_fault()

Add macros for the alternative XSAVE*/XRSTOR* operations which
contain the fault handling and use them. Kill xstate_fault().

Also, copy_xregs_to_kernel() didn't have the extended state as
memory reference in the asm.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Hansen 
Cc: Denys Vlasenko 
Cc: Fenghua Yu 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Oleg Nesterov 
Cc: Peter Zijlstra 
Cc: Quentin Casasnovas 
Cc: Rik van Riel 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1447932326-4371-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/fpu/internal.h | 105 ++--
 1 file changed, 52 insertions(+), 53 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h 
b/arch/x86/include/asm/fpu/internal.h
index 709a3df..eadcdd5 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -224,19 +224,6 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 #define XRSTOR ".byte " REX_PREFIX "0x0f,0xae,0x2f"
 #define XRSTORS".byte " REX_PREFIX "0x0f,0xc7,0x1f"
 
-/* xstate instruction fault handler: */
-#define xstate_fault(__err)\
-   \
-   ".section .fixup,\"ax\"\n"  \
-   \
-   "3:  movl $-2,%[_err]\n"\
-   "jmp  2b\n" \
-   \
-   ".previous\n"   \
-   \
-   _ASM_EXTABLE(1b, 3b)\
-   : [_err] "=r" (__err)
-
 #define XSTATE_OP(op, st, lmask, hmask, err)   \
asm volatile("1:" op "\n\t" \
 "xor %[err], %[err]\n" \
@@ -250,6 +237,54 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
 : "memory")
 
+/*
+ * If XSAVES is enabled, it replaces XSAVEOPT because it supports a compact
+ * format and supervisor states in addition to modified optimization in
+ * XSAVEOPT.
+ *
+ * Otherwise, if XSAVEOPT is enabled, XSAVEOPT replaces XSAVE because XSAVEOPT
+ * supports modified optimization which is not supported by XSAVE.
+ *
+ * We use XSAVE as a fallback.
+ *
+ * The 661 label is defined in the ALTERNATIVE* macros as the address of the
+ * original instruction which gets replaced. We need to use it here as the
+ * address of the instruction where we might get an exception at.
+ */
+#define XSTATE_XSAVE(st, lmask, hmask, err)\
+   asm volatile(ALTERNATIVE_2(XSAVE,   \
+  XSAVEOPT, X86_FEATURE_XSAVEOPT,  \
+  XSAVES,   X86_FEATURE_XSAVES)\
+"\n"   \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n" \
+"4: movl $-2, %[err]\n"\
+"jmp 3b\n" \
+".popsection\n"\
+_ASM_EXTABLE(661b, 4b) \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+/*
+ * Use XRSTORS to restore context if it is enabled. XRSTORS supports compact
+ * XSAVE area format.
+ */
+#define XSTATE_XRESTORE(st, lmask, hmask, err) \
+   asm volatile(ALTERNATIVE(XRSTOR,\
+XRSTORS, X86_FEATURE_XSAVES)   \
+"\n"   \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n" \
+"4: movl $-2, %[err]\n"\
+"jmp 3b\n" \
+".popsection\n"\
+_ASM_EXTABLE(661b, 4b) \
+: [err] "=r" (err)  

[tip:x86/fpu] x86/fpu: Add an XSTATE_OP() macro

[tip-bot for Borislav Petkov]

Commit-ID:  b74a0cf1b3db30173eefa00c411775d2b1697700
Gitweb: http://git.kernel.org/tip/b74a0cf1b3db30173eefa00c411775d2b1697700
Author: Borislav Petkov 
AuthorDate: Thu, 19 Nov 2015 12:25:25 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100

x86/fpu: Add an XSTATE_OP() macro

Add an XSTATE_OP() macro which contains the XSAVE* fault handling
and replace all non-alternatives users of xstate_fault() with
it.

This fixes also the buglet in copy_xregs_to_user() and
copy_user_to_xregs() where the inline asm didn't have @xstate as
memory reference and thus potentially causing unwanted
reordering of accesses to the extended state.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Hansen 
Cc: Denys Vlasenko 
Cc: Fenghua Yu 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Oleg Nesterov 
Cc: Peter Zijlstra 
Cc: Quentin Casasnovas 
Cc: Rik van Riel 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1447932326-4371-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/fpu/internal.h | 68 +
 1 file changed, 31 insertions(+), 37 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h 
b/arch/x86/include/asm/fpu/internal.h
index 3c3550c..709a3df 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -237,6 +237,20 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
_ASM_EXTABLE(1b, 3b)\
: [_err] "=r" (__err)
 
+#define XSTATE_OP(op, st, lmask, hmask, err)   \
+   asm volatile("1:" op "\n\t" \
+"xor %[err], %[err]\n" \
+"2:\n\t"   \
+".pushsection .fixup,\"ax\"\n\t"   \
+"3: movl $-2,%[err]\n\t"   \
+"jmp 2b\n\t"   \
+".popsection\n\t"  \
+_ASM_EXTABLE(1b, 3b)   \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+
 /*
  * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
@@ -246,22 +260,14 @@ static inline void copy_xregs_to_kernel_booting(struct 
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
-   int err = 0;
+   int err;
 
WARN_ON(system_state != SYSTEM_BOOTING);
 
-   if (boot_cpu_has(X86_FEATURE_XSAVES))
-   asm volatile("1:"XSAVES"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+   XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
else
-   asm volatile("1:"XSAVE"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
 
/* We should never fault when copying to a kernel buffer: */
WARN_ON_FPU(err);
@@ -276,22 +282,14 @@ static inline void copy_kernel_to_xregs_booting(struct 
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
-   int err = 0;
+   int err;
 
WARN_ON(system_state != SYSTEM_BOOTING);
 
-   if (boot_cpu_has(X86_FEATURE_XSAVES))
-   asm volatile("1:"XRSTORS"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+   XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
else
-   asm volatile("1:"XRSTOR"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
 
/* We should never fault when copying from a kernel buffer: */
WARN_ON_FPU(err);
@@ -388,12 +386,10 @@ static inline int copy_xregs_to_user(struct xregs_state 
__user *buf)
if (unlikely(err))
return -EFAULT;
 
-   __asm__ __volatile__(ASM_STAC "\n"
-"1:"XSAVE"\n"
-   

[tip:x86/cpu] x86/cpu: Fix MSR value truncation issue

[tip-bot for Borislav Petkov]

Commit-ID:  31ac34ca5636e596485c6e03df1879643bde585e
Gitweb: http://git.kernel.org/tip/31ac34ca5636e596485c6e03df1879643bde585e
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:25 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:55 +0100

x86/cpu: Fix MSR value truncation issue

So sparse rightfully complains that the u64 MSR value we're
writing into the STAR MSR, i.e. 0xc081, is being truncated:

./arch/x86/include/asm/msr.h:193:36: warning: cast truncates
bits from constant value (230010 becomes 0)

because the actual value doesn't fit into the unsigned 32-bit
quantity which are the @low and @high wrmsrl() parameters.

This is not a problem, practically, because gcc is actually
being smart enough here and does the right thing:

  .loc 3 87 0
  xorl%esi, %esi# we needz a 32-bit zero
  movl$2293776, %edx# 0x00230010 == (__USER32_CS << 16) | 
__KERNEL_CS go into the high bits
  movl$-1073741695, %ecx# MSR_STAR, i.e., 0xc081
  movl%esi, %eax# low order 32 bits in the MSR which are 0
  #APP
  # 87 "./arch/x86/include/asm/msr.h" 1
  wrmsr

More specifically, MSR_STAR[31:0] is being set to 0. That field
is reserved on Intel and on AMD it is 32-bit SYSCALL Target EIP.

I'd strongly guess because Intel doesn't have SYSCALL in
compat/legacy mode and we're using SYSENTER and INT80 there. And
for compat syscalls in long mode we use CSTAR.

So let's fix the sparse warning by writing SYSRET and SYSCALL CS
and SS into the high 32-bit half of STAR and 0 in the low half
explicitly.

 [ Actually, if we had to be precise, we would have to read what's in
   STAR[31:0] and write it back unchanged on Intel and write 0 on AMD. I
   guess the current writing to 0 is still ok since Intel can apparently
   stomach it. ]

The resulting code is identical to what we have above:

  .loc 3 87 0
  xorl%esi, %esi  # tmp104
  movl$2293776, %eax  #, tmp103
  movl$-1073741695, %ecx  #, tmp102
  movl%esi, %edx  # tmp104, tmp104

  ...

wrmsr

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 0bed416..105da8d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1180,7 +1180,7 @@ void syscall_init(void)
 * They both write to the same internal register. STAR allows to
 * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip.
 */
-   wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
+   wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS);
wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);
 
 #ifdef CONFIG_IA32_EMULATION
--
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[tip:x86/cpu] x86/MSR: Chop off lower 32-bit value

[tip-bot for Borislav Petkov]

Commit-ID:  679bcea857d72868e3431dde3a0e158bf0ed9119
Gitweb: http://git.kernel.org/tip/679bcea857d72868e3431dde3a0e158bf0ed9119
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:26 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:55 +0100

x86/MSR: Chop off lower 32-bit value

sparse complains that the cast truncates the high bits. But here
we really do know what we're doing and we need the lower 32 bits
only as the @low argument. So make that explicit.

Suggested-by: Andy Lutomirski 
Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/msr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 77d8b28..8613382 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -190,7 +190,7 @@ static inline void wrmsr(unsigned msr, unsigned low, 
unsigned high)
 
 static inline void wrmsrl(unsigned msr, u64 val)
 {
-   native_write_msr(msr, (u32)val, (u32)(val >> 32));
+   native_write_msr(msr, (u32)(val & 0xULL), (u32)(val >> 32));
 }
 
 /* wrmsr with exception handling */
--
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[tip:x86/cpu] x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR

[tip-bot for Borislav Petkov]

Commit-ID:  ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Gitweb: http://git.kernel.org/tip/ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:23 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR

The kernel accesses IC_CFG MSR (0xc0011021) on AMD because it
checks whether the way access filter is enabled on some F15h
models, and, if so, disables it.

kvm doesn't handle that MSR access and complains about it, which
can get really noisy in dmesg when one starts kvm guests all the
time for testing. And it is useless anyway - guest kernel
shouldn't be doing such changes anyway so tell it that that
filter is disabled.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/kernel/cpu/amd.c|  4 ++--
 arch/x86/kvm/svm.c   | 17 +
 3 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 690b402..b05402e 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -321,6 +321,7 @@
 #define MSR_F15H_PERF_CTR  0xc0010201
 #define MSR_F15H_NB_PERF_CTL   0xc0010240
 #define MSR_F15H_NB_PERF_CTR   0xc0010241
+#define MSR_F15H_IC_CFG0xc0011021
 
 /* Fam 10h MSRs */
 #define MSR_FAM10H_MMIO_CONF_BASE  0xc0010058
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index a8816b3..e229640 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -678,9 +678,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
 * Disable it on the affected CPUs.
 */
if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
-   if (!rdmsrl_safe(0xc0011021, ) && !(value & 0x1E)) {
+   if (!rdmsrl_safe(MSR_F15H_IC_CFG, ) && !(value & 0x1E)) {
value |= 0x1E;
-   wrmsrl_safe(0xc0011021, value);
+   wrmsrl_safe(MSR_F15H_IC_CFG, value);
}
}
 }
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 83a1c64..58b64c1 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3053,6 +3053,23 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct 
msr_data *msr_info)
case MSR_IA32_UCODE_REV:
msr_info->data = 0x0165;
break;
+   case MSR_F15H_IC_CFG: {
+
+   int family, model;
+
+   family = guest_cpuid_family(vcpu);
+   model  = guest_cpuid_model(vcpu);
+
+   if (family < 0 || model < 0)
+   return kvm_get_msr_common(vcpu, msr_info);
+
+   msr_info->data = 0;
+
+   if (family == 0x15 &&
+   (model >= 0x2 && model < 0x20))
+   msr_info->data = 0x1E;
+   }
+   break;
default:
return kvm_get_msr_common(vcpu, msr_info);
}
--
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[tip:x86/cpu] x86/cpu: Unify CPU family, model, stepping calculation

[tip-bot for Borislav Petkov]

Commit-ID:  99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Gitweb: http://git.kernel.org/tip/99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:21 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

x86/cpu: Unify CPU family, model, stepping calculation

Add generic functions which calc family, model and stepping from
the CPUID_1.EAX leaf and stick them into the library we have.

Rename those which do call CPUID with the prefix "x86_cpuid" as
suggested by Paolo Bonzini.

No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/cpu.h|  3 +++
 arch/x86/include/asm/microcode.h  | 39 +++
 arch/x86/kernel/cpu/common.c  | 11 +++---
 arch/x86/kernel/cpu/microcode/core.c  | 12 +--
 arch/x86/kernel/cpu/microcode/intel.c | 16 ++
 arch/x86/lib/Makefile |  2 +-
 arch/x86/lib/cpu.c| 35 +++
 7 files changed, 61 insertions(+), 57 deletions(-)

diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index bf2caa1..678637a 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -36,4 +36,7 @@ extern int _debug_hotplug_cpu(int cpu, int action);
 
 int mwait_usable(const struct cpuinfo_x86 *);
 
+unsigned int x86_family(unsigned int sig);
+unsigned int x86_model(unsigned int sig);
+unsigned int x86_stepping(unsigned int sig);
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 34e62b1..1e1b07a 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#include 
 #include 
 
 #define native_rdmsr(msr, val1, val2)  \
@@ -95,14 +96,14 @@ static inline void __exit exit_amd_microcode(void) {}
 
 /*
  * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
- * x86_vendor() gets vendor id for BSP.
+ * x86_cpuid_vendor() gets vendor id for BSP.
  *
  * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
- * coding, we still use x86_vendor() to get vendor id for AP.
+ * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
  *
- * x86_vendor() gets vendor information directly from CPUID.
+ * x86_cpuid_vendor() gets vendor information directly from CPUID.
  */
-static inline int x86_vendor(void)
+static inline int x86_cpuid_vendor(void)
 {
u32 eax = 0x;
u32 ebx, ecx = 0, edx;
@@ -118,40 +119,14 @@ static inline int x86_vendor(void)
return X86_VENDOR_UNKNOWN;
 }
 
-static inline unsigned int __x86_family(unsigned int sig)
-{
-   unsigned int x86;
-
-   x86 = (sig >> 8) & 0xf;
-
-   if (x86 == 0xf)
-   x86 += (sig >> 20) & 0xff;
-
-   return x86;
-}
-
-static inline unsigned int x86_family(void)
+static inline unsigned int x86_cpuid_family(void)
 {
u32 eax = 0x0001;
u32 ebx, ecx = 0, edx;
 
native_cpuid(, , , );
 
-   return __x86_family(eax);
-}
-
-static inline unsigned int x86_model(unsigned int sig)
-{
-   unsigned int x86, model;
-
-   x86 = __x86_family(sig);
-
-   model = (sig >> 4) & 0xf;
-
-   if (x86 == 0x6 || x86 == 0xf)
-   model += ((sig >> 16) & 0xf) << 4;
-
-   return model;
+   return x86_family(eax);
 }
 
 #ifdef CONFIG_MICROCODE
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c2b7522..0bed416 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -581,14 +581,9 @@ void cpu_detect(struct cpuinfo_x86 *c)
u32 junk, tfms, cap0, misc;
 
cpuid(0x0001, , , , );
-   c->x86 = (tfms >> 8) & 0xf;
-   c->x86_model = (tfms >> 4) & 0xf;
-   c->x86_mask = tfms & 0xf;
-
-   if (c->x86 == 0xf)
-   c->x86 += (tfms >> 20) & 0xff;
-   if (c->x86 >= 0x6)
-   c->x86_model += ((tfms >> 16) & 0xf) << 4;
+   c->x86  = x86_family(tfms);
+   c->x86_model= x86_model(tfms);
+   c->x86_mask = x86_stepping(tfms);
 
if (cap0 & (1<<19)) {
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 7fc27f1..3aaffb6 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -129,8 +129,8 @@ void __init load_ucode_bsp(void)

[tip:x86/cpu] kvm: Add accessors for guest CPU's family, model, stepping

[tip-bot for Borislav Petkov]

Commit-ID:  91713faf386be6d7e6556b656436813f8c4ee552
Gitweb: http://git.kernel.org/tip/91713faf386be6d7e6556b656436813f8c4ee552
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:22 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

kvm: Add accessors for guest CPU's family, model, stepping

Those give the family, model and stepping of the guest vcpu.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kvm/cpuid.h | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 06332cb..5d47e0d 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -2,6 +2,7 @@
 #define ARCH_X86_KVM_CPUID_H
 
 #include "x86.h"
+#include 
 
 int kvm_update_cpuid(struct kvm_vcpu *vcpu);
 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
@@ -170,4 +171,37 @@ static inline bool guest_cpuid_has_nrips(struct kvm_vcpu 
*vcpu)
 }
 #undef BIT_NRIPS
 
+static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_family(best->eax);
+}
+
+static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_model(best->eax);
+}
+
+static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_stepping(best->eax);
+}
+
 #endif
--
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[tip:ras/core] x86/mce: Make usable address checks Intel-only

[tip-bot for Borislav Petkov]

Commit-ID:  feab21f8356bde572663e29c9d9e48c964292e05
Gitweb: http://git.kernel.org/tip/feab21f8356bde572663e29c9d9e48c964292e05
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:20 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/mce: Make usable address checks Intel-only

The MCi_MISC bitfield definitions mce_usable_address() checks
are Intel-only. Make them so.

While at it, move mce_usable_address() up, before all its
callers and get rid of the forward declaration.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 40 ++--
 1 file changed, 22 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index e00e85a..3865e95 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -114,7 +114,6 @@ static struct work_struct mce_work;
 static struct irq_work mce_irq_work;
 
 static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
-static int mce_usable_address(struct mce *m);
 
 /*
  * CPU/chipset specific EDAC code can register a notifier call here to print
@@ -475,6 +474,28 @@ static void mce_report_event(struct pt_regs *regs)
irq_work_queue(_irq_work);
 }
 
+/*
+ * Check if the address reported by the CPU is in a format we can parse.
+ * It would be possible to add code for most other cases, but all would
+ * be somewhat complicated (e.g. segment offset would require an instruction
+ * parser). So only support physical addresses up to page granuality for now.
+ */
+static int mce_usable_address(struct mce *m)
+{
+   if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
+   return 0;
+
+   /* Checks after this one are Intel-specific: */
+   if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+   return 1;
+
+   if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
+   return 0;
+   if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
+   return 0;
+   return 1;
+}
+
 static int srao_decode_notifier(struct notifier_block *nb, unsigned long val,
void *data)
 {
@@ -930,23 +951,6 @@ reset:
return ret;
 }
 
-/*
- * Check if the address reported by the CPU is in a format we can parse.
- * It would be possible to add code for most other cases, but all would
- * be somewhat complicated (e.g. segment offset would require an instruction
- * parser). So only support physical addresses up to page granuality for now.
- */
-static int mce_usable_address(struct mce *m)
-{
-   if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
-   return 0;
-   if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
-   return 0;
-   if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
-   return 0;
-   return 1;
-}
-
 static void mce_clear_state(unsigned long *toclear)
 {
int i;
--
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[tip:ras/core] x86/RAS: Remove mce.usable_addr

[tip-bot for Borislav Petkov]

Commit-ID:  c0ec382e1928402031e754ad0391ecbdabb18c43
Gitweb: http://git.kernel.org/tip/c0ec382e1928402031e754ad0391ecbdabb18c43
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:18 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/RAS: Remove mce.usable_addr

It is useless and we can use the function instead. Besides,
mcelog(8) hasn't managed to make use of it yet. So kill it.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/uapi/asm/mce.h  |  2 +-
 arch/x86/kernel/cpu/mcheck/mce.c | 12 
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 03429da..2184943 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -16,7 +16,7 @@ struct mce {
__u8  cpuvendor;/* cpu vendor as encoded in system.h */
__u8  inject_flags; /* software inject flags */
__u8  severity;
-   __u8  usable_addr;
+   __u8  pad;
__u32 cpuid;/* CPUID 1 EAX */
__u8  cs;   /* code segment */
__u8  bank; /* machine check bank */
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 6531cb4..fb8b1db 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -484,7 +484,7 @@ static int srao_decode_notifier(struct notifier_block *nb, 
unsigned long val,
if (!mce)
return NOTIFY_DONE;
 
-   if (mce->usable_addr && (mce->severity == MCE_AO_SEVERITY)) {
+   if (mce_usable_address(mce) && (mce->severity == MCE_AO_SEVERITY)) {
pfn = mce->addr >> PAGE_SHIFT;
memory_failure(pfn, MCE_VECTOR, 0);
}
@@ -610,12 +610,9 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t 
*b)
 
severity = mce_severity(, mca_cfg.tolerant, NULL, false);
 
-   if (severity == MCE_DEFERRED_SEVERITY && memory_error()) {
-   if (m.status & MCI_STATUS_ADDRV) {
+   if (severity == MCE_DEFERRED_SEVERITY && memory_error())
+   if (m.status & MCI_STATUS_ADDRV)
m.severity = severity;
-   m.usable_addr = mce_usable_address();
-   }
-   }
 
/*
 * Don't get the IP here because it's unlikely to
@@ -623,7 +620,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t 
*b)
 */
if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
mce_log();
-   else if (m.usable_addr) {
+   else if (mce_usable_address()) {
/*
 * Although we skipped logging this, we still want
 * to take action. Add to the pool so the registered
@@ -1091,7 +1088,6 @@ void do_machine_check(struct pt_regs *regs, long 
error_code)
 
/* assuming valid severity level != 0 */
m.severity = severity;
-   m.usable_addr = mce_usable_address();
 
mce_log();
 
--
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[tip:x86/cpu] x86/cpu: Unify CPU family, model, stepping calculation

[tip-bot for Borislav Petkov]

Commit-ID:  99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Gitweb: http://git.kernel.org/tip/99f925ce927e4ac313d9af8bd1bf55796e2cdcb1
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:21 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

x86/cpu: Unify CPU family, model, stepping calculation

Add generic functions which calc family, model and stepping from
the CPUID_1.EAX leaf and stick them into the library we have.

Rename those which do call CPUID with the prefix "x86_cpuid" as
suggested by Paolo Bonzini.

No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/cpu.h|  3 +++
 arch/x86/include/asm/microcode.h  | 39 +++
 arch/x86/kernel/cpu/common.c  | 11 +++---
 arch/x86/kernel/cpu/microcode/core.c  | 12 +--
 arch/x86/kernel/cpu/microcode/intel.c | 16 ++
 arch/x86/lib/Makefile |  2 +-
 arch/x86/lib/cpu.c| 35 +++
 7 files changed, 61 insertions(+), 57 deletions(-)

diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index bf2caa1..678637a 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -36,4 +36,7 @@ extern int _debug_hotplug_cpu(int cpu, int action);
 
 int mwait_usable(const struct cpuinfo_x86 *);
 
+unsigned int x86_family(unsigned int sig);
+unsigned int x86_model(unsigned int sig);
+unsigned int x86_stepping(unsigned int sig);
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 34e62b1..1e1b07a 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#include 
 #include 
 
 #define native_rdmsr(msr, val1, val2)  \
@@ -95,14 +96,14 @@ static inline void __exit exit_amd_microcode(void) {}
 
 /*
  * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
- * x86_vendor() gets vendor id for BSP.
+ * x86_cpuid_vendor() gets vendor id for BSP.
  *
  * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
- * coding, we still use x86_vendor() to get vendor id for AP.
+ * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
  *
- * x86_vendor() gets vendor information directly from CPUID.
+ * x86_cpuid_vendor() gets vendor information directly from CPUID.
  */
-static inline int x86_vendor(void)
+static inline int x86_cpuid_vendor(void)
 {
u32 eax = 0x;
u32 ebx, ecx = 0, edx;
@@ -118,40 +119,14 @@ static inline int x86_vendor(void)
return X86_VENDOR_UNKNOWN;
 }
 
-static inline unsigned int __x86_family(unsigned int sig)
-{
-   unsigned int x86;
-
-   x86 = (sig >> 8) & 0xf;
-
-   if (x86 == 0xf)
-   x86 += (sig >> 20) & 0xff;
-
-   return x86;
-}
-
-static inline unsigned int x86_family(void)
+static inline unsigned int x86_cpuid_family(void)
 {
u32 eax = 0x0001;
u32 ebx, ecx = 0, edx;
 
native_cpuid(, , , );
 
-   return __x86_family(eax);
-}
-
-static inline unsigned int x86_model(unsigned int sig)
-{
-   unsigned int x86, model;
-
-   x86 = __x86_family(sig);
-
-   model = (sig >> 4) & 0xf;
-
-   if (x86 == 0x6 || x86 == 0xf)
-   model += ((sig >> 16) & 0xf) << 4;
-
-   return model;
+   return x86_family(eax);
 }
 
 #ifdef CONFIG_MICROCODE
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c2b7522..0bed416 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -581,14 +581,9 @@ void cpu_detect(struct cpuinfo_x86 *c)
u32 junk, tfms, cap0, misc;
 
cpuid(0x0001, , , , );
-   c->x86 = (tfms >> 8) & 0xf;
-   c->x86_model = (tfms >> 4) & 0xf;
-   c->x86_mask = tfms & 0xf;
-
-   if (c->x86 == 0xf)
-   c->x86 += (tfms >> 20) & 0xff;
-   if (c->x86 >= 0x6)
-   c->x86_model += ((tfms >> 16) & 0xf) << 4;
+   c->x86  = x86_family(tfms);
+   c->x86_model= x86_model(tfms);
+   c->x86_mask = x86_stepping(tfms);
 
if (cap0 & (1<<19)) {
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
diff --git 

[tip:x86/cpu] kvm: Add accessors for guest CPU's family, model, stepping

[tip-bot for Borislav Petkov]

Commit-ID:  91713faf386be6d7e6556b656436813f8c4ee552
Gitweb: http://git.kernel.org/tip/91713faf386be6d7e6556b656436813f8c4ee552
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:22 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

kvm: Add accessors for guest CPU's family, model, stepping

Those give the family, model and stepping of the guest vcpu.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kvm/cpuid.h | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 06332cb..5d47e0d 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -2,6 +2,7 @@
 #define ARCH_X86_KVM_CPUID_H
 
 #include "x86.h"
+#include 
 
 int kvm_update_cpuid(struct kvm_vcpu *vcpu);
 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
@@ -170,4 +171,37 @@ static inline bool guest_cpuid_has_nrips(struct kvm_vcpu 
*vcpu)
 }
 #undef BIT_NRIPS
 
+static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_family(best->eax);
+}
+
+static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_model(best->eax);
+}
+
+static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
+   if (!best)
+   return -1;
+
+   return x86_stepping(best->eax);
+}
+
 #endif
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/RAS: Remove mce.usable_addr

[tip-bot for Borislav Petkov]

Commit-ID:  c0ec382e1928402031e754ad0391ecbdabb18c43
Gitweb: http://git.kernel.org/tip/c0ec382e1928402031e754ad0391ecbdabb18c43
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:18 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/RAS: Remove mce.usable_addr

It is useless and we can use the function instead. Besides,
mcelog(8) hasn't managed to make use of it yet. So kill it.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/uapi/asm/mce.h  |  2 +-
 arch/x86/kernel/cpu/mcheck/mce.c | 12 
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index 03429da..2184943 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -16,7 +16,7 @@ struct mce {
__u8  cpuvendor;/* cpu vendor as encoded in system.h */
__u8  inject_flags; /* software inject flags */
__u8  severity;
-   __u8  usable_addr;
+   __u8  pad;
__u32 cpuid;/* CPUID 1 EAX */
__u8  cs;   /* code segment */
__u8  bank; /* machine check bank */
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 6531cb4..fb8b1db 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -484,7 +484,7 @@ static int srao_decode_notifier(struct notifier_block *nb, 
unsigned long val,
if (!mce)
return NOTIFY_DONE;
 
-   if (mce->usable_addr && (mce->severity == MCE_AO_SEVERITY)) {
+   if (mce_usable_address(mce) && (mce->severity == MCE_AO_SEVERITY)) {
pfn = mce->addr >> PAGE_SHIFT;
memory_failure(pfn, MCE_VECTOR, 0);
}
@@ -610,12 +610,9 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t 
*b)
 
severity = mce_severity(, mca_cfg.tolerant, NULL, false);
 
-   if (severity == MCE_DEFERRED_SEVERITY && memory_error()) {
-   if (m.status & MCI_STATUS_ADDRV) {
+   if (severity == MCE_DEFERRED_SEVERITY && memory_error())
+   if (m.status & MCI_STATUS_ADDRV)
m.severity = severity;
-   m.usable_addr = mce_usable_address();
-   }
-   }
 
/*
 * Don't get the IP here because it's unlikely to
@@ -623,7 +620,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t 
*b)
 */
if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
mce_log();
-   else if (m.usable_addr) {
+   else if (mce_usable_address()) {
/*
 * Although we skipped logging this, we still want
 * to take action. Add to the pool so the registered
@@ -1091,7 +1088,6 @@ void do_machine_check(struct pt_regs *regs, long 
error_code)
 
/* assuming valid severity level != 0 */
m.severity = severity;
-   m.usable_addr = mce_usable_address();
 
mce_log();
 
--
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More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/mce: Make usable address checks Intel-only

[tip-bot for Borislav Petkov]

Commit-ID:  feab21f8356bde572663e29c9d9e48c964292e05
Gitweb: http://git.kernel.org/tip/feab21f8356bde572663e29c9d9e48c964292e05
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:20 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/mce: Make usable address checks Intel-only

The MCi_MISC bitfield definitions mce_usable_address() checks
are Intel-only. Make them so.

While at it, move mce_usable_address() up, before all its
callers and get rid of the forward declaration.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 40 ++--
 1 file changed, 22 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index e00e85a..3865e95 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -114,7 +114,6 @@ static struct work_struct mce_work;
 static struct irq_work mce_irq_work;
 
 static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
-static int mce_usable_address(struct mce *m);
 
 /*
  * CPU/chipset specific EDAC code can register a notifier call here to print
@@ -475,6 +474,28 @@ static void mce_report_event(struct pt_regs *regs)
irq_work_queue(_irq_work);
 }
 
+/*
+ * Check if the address reported by the CPU is in a format we can parse.
+ * It would be possible to add code for most other cases, but all would
+ * be somewhat complicated (e.g. segment offset would require an instruction
+ * parser). So only support physical addresses up to page granuality for now.
+ */
+static int mce_usable_address(struct mce *m)
+{
+   if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
+   return 0;
+
+   /* Checks after this one are Intel-specific: */
+   if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+   return 1;
+
+   if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
+   return 0;
+   if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
+   return 0;
+   return 1;
+}
+
 static int srao_decode_notifier(struct notifier_block *nb, unsigned long val,
void *data)
 {
@@ -930,23 +951,6 @@ reset:
return ret;
 }
 
-/*
- * Check if the address reported by the CPU is in a format we can parse.
- * It would be possible to add code for most other cases, but all would
- * be somewhat complicated (e.g. segment offset would require an instruction
- * parser). So only support physical addresses up to page granuality for now.
- */
-static int mce_usable_address(struct mce *m)
-{
-   if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
-   return 0;
-   if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
-   return 0;
-   if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
-   return 0;
-   return 1;
-}
-
 static void mce_clear_state(unsigned long *toclear)
 {
int i;
--
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[tip:x86/fpu] x86/fpu: Get rid of xstate_fault()

[tip-bot for Borislav Petkov]

Commit-ID:  b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Gitweb: http://git.kernel.org/tip/b7106fa0f29f9fd83d2d1905ab690d334ef855c1
Author: Borislav Petkov 
AuthorDate: Thu, 19 Nov 2015 12:25:26 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100

x86/fpu: Get rid of xstate_fault()

Add macros for the alternative XSAVE*/XRSTOR* operations which
contain the fault handling and use them. Kill xstate_fault().

Also, copy_xregs_to_kernel() didn't have the extended state as
memory reference in the asm.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Hansen 
Cc: Denys Vlasenko 
Cc: Fenghua Yu 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Oleg Nesterov 
Cc: Peter Zijlstra 
Cc: Quentin Casasnovas 
Cc: Rik van Riel 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1447932326-4371-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/fpu/internal.h | 105 ++--
 1 file changed, 52 insertions(+), 53 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h 
b/arch/x86/include/asm/fpu/internal.h
index 709a3df..eadcdd5 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -224,19 +224,6 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 #define XRSTOR ".byte " REX_PREFIX "0x0f,0xae,0x2f"
 #define XRSTORS".byte " REX_PREFIX "0x0f,0xc7,0x1f"
 
-/* xstate instruction fault handler: */
-#define xstate_fault(__err)\
-   \
-   ".section .fixup,\"ax\"\n"  \
-   \
-   "3:  movl $-2,%[_err]\n"\
-   "jmp  2b\n" \
-   \
-   ".previous\n"   \
-   \
-   _ASM_EXTABLE(1b, 3b)\
-   : [_err] "=r" (__err)
-
 #define XSTATE_OP(op, st, lmask, hmask, err)   \
asm volatile("1:" op "\n\t" \
 "xor %[err], %[err]\n" \
@@ -250,6 +237,54 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
 : "memory")
 
+/*
+ * If XSAVES is enabled, it replaces XSAVEOPT because it supports a compact
+ * format and supervisor states in addition to modified optimization in
+ * XSAVEOPT.
+ *
+ * Otherwise, if XSAVEOPT is enabled, XSAVEOPT replaces XSAVE because XSAVEOPT
+ * supports modified optimization which is not supported by XSAVE.
+ *
+ * We use XSAVE as a fallback.
+ *
+ * The 661 label is defined in the ALTERNATIVE* macros as the address of the
+ * original instruction which gets replaced. We need to use it here as the
+ * address of the instruction where we might get an exception at.
+ */
+#define XSTATE_XSAVE(st, lmask, hmask, err)\
+   asm volatile(ALTERNATIVE_2(XSAVE,   \
+  XSAVEOPT, X86_FEATURE_XSAVEOPT,  \
+  XSAVES,   X86_FEATURE_XSAVES)\
+"\n"   \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n" \
+"4: movl $-2, %[err]\n"\
+"jmp 3b\n" \
+".popsection\n"\
+_ASM_EXTABLE(661b, 4b) \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+/*
+ * Use XRSTORS to restore context if it is enabled. XRSTORS supports compact
+ * XSAVE area format.
+ */
+#define XSTATE_XRESTORE(st, lmask, hmask, err) \
+   asm volatile(ALTERNATIVE(XRSTOR,\
+XRSTORS, X86_FEATURE_XSAVES)   \
+"\n"   \
+"xor %[err], %[err]\n" \
+"3:\n" \
+".pushsection .fixup,\"ax\"\n"  

[tip:x86/cpu] x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR

[tip-bot for Borislav Petkov]

Commit-ID:  ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Gitweb: http://git.kernel.org/tip/ae8b787543d872cf89a7f9ef8aa302f3ef9bcbd7
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:23 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:54 +0100

x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR

The kernel accesses IC_CFG MSR (0xc0011021) on AMD because it
checks whether the way access filter is enabled on some F15h
models, and, if so, disables it.

kvm doesn't handle that MSR access and complains about it, which
can get really noisy in dmesg when one starts kvm guests all the
time for testing. And it is useless anyway - guest kernel
shouldn't be doing such changes anyway so tell it that that
filter is disabled.

Signed-off-by: Borislav Petkov 
Reviewed-by: Paolo Bonzini 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/msr-index.h |  1 +
 arch/x86/kernel/cpu/amd.c|  4 ++--
 arch/x86/kvm/svm.c   | 17 +
 3 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 690b402..b05402e 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -321,6 +321,7 @@
 #define MSR_F15H_PERF_CTR  0xc0010201
 #define MSR_F15H_NB_PERF_CTL   0xc0010240
 #define MSR_F15H_NB_PERF_CTR   0xc0010241
+#define MSR_F15H_IC_CFG0xc0011021
 
 /* Fam 10h MSRs */
 #define MSR_FAM10H_MMIO_CONF_BASE  0xc0010058
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index a8816b3..e229640 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -678,9 +678,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c)
 * Disable it on the affected CPUs.
 */
if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
-   if (!rdmsrl_safe(0xc0011021, ) && !(value & 0x1E)) {
+   if (!rdmsrl_safe(MSR_F15H_IC_CFG, ) && !(value & 0x1E)) {
value |= 0x1E;
-   wrmsrl_safe(0xc0011021, value);
+   wrmsrl_safe(MSR_F15H_IC_CFG, value);
}
}
 }
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 83a1c64..58b64c1 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3053,6 +3053,23 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct 
msr_data *msr_info)
case MSR_IA32_UCODE_REV:
msr_info->data = 0x0165;
break;
+   case MSR_F15H_IC_CFG: {
+
+   int family, model;
+
+   family = guest_cpuid_family(vcpu);
+   model  = guest_cpuid_model(vcpu);
+
+   if (family < 0 || model < 0)
+   return kvm_get_msr_common(vcpu, msr_info);
+
+   msr_info->data = 0;
+
+   if (family == 0x15 &&
+   (model >= 0x2 && model < 0x20))
+   msr_info->data = 0x1E;
+   }
+   break;
default:
return kvm_get_msr_common(vcpu, msr_info);
}
--
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[tip:x86/fpu] x86/fpu: Add an XSTATE_OP() macro

[tip-bot for Borislav Petkov]

Commit-ID:  b74a0cf1b3db30173eefa00c411775d2b1697700
Gitweb: http://git.kernel.org/tip/b74a0cf1b3db30173eefa00c411775d2b1697700
Author: Borislav Petkov 
AuthorDate: Thu, 19 Nov 2015 12:25:25 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:52:52 +0100

x86/fpu: Add an XSTATE_OP() macro

Add an XSTATE_OP() macro which contains the XSAVE* fault handling
and replace all non-alternatives users of xstate_fault() with
it.

This fixes also the buglet in copy_xregs_to_user() and
copy_user_to_xregs() where the inline asm didn't have @xstate as
memory reference and thus potentially causing unwanted
reordering of accesses to the extended state.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Hansen 
Cc: Denys Vlasenko 
Cc: Fenghua Yu 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Oleg Nesterov 
Cc: Peter Zijlstra 
Cc: Quentin Casasnovas 
Cc: Rik van Riel 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1447932326-4371-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/fpu/internal.h | 68 +
 1 file changed, 31 insertions(+), 37 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h 
b/arch/x86/include/asm/fpu/internal.h
index 3c3550c..709a3df 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -237,6 +237,20 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
_ASM_EXTABLE(1b, 3b)\
: [_err] "=r" (__err)
 
+#define XSTATE_OP(op, st, lmask, hmask, err)   \
+   asm volatile("1:" op "\n\t" \
+"xor %[err], %[err]\n" \
+"2:\n\t"   \
+".pushsection .fixup,\"ax\"\n\t"   \
+"3: movl $-2,%[err]\n\t"   \
+"jmp 2b\n\t"   \
+".popsection\n\t"  \
+_ASM_EXTABLE(1b, 3b)   \
+: [err] "=r" (err) \
+: "D" (st), "m" (*st), "a" (lmask), "d" (hmask)\
+: "memory")
+
+
 /*
  * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
@@ -246,22 +260,14 @@ static inline void copy_xregs_to_kernel_booting(struct 
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
-   int err = 0;
+   int err;
 
WARN_ON(system_state != SYSTEM_BOOTING);
 
-   if (boot_cpu_has(X86_FEATURE_XSAVES))
-   asm volatile("1:"XSAVES"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+   XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
else
-   asm volatile("1:"XSAVE"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
 
/* We should never fault when copying to a kernel buffer: */
WARN_ON_FPU(err);
@@ -276,22 +282,14 @@ static inline void copy_kernel_to_xregs_booting(struct 
xregs_state *xstate)
u64 mask = -1;
u32 lmask = mask;
u32 hmask = mask >> 32;
-   int err = 0;
+   int err;
 
WARN_ON(system_state != SYSTEM_BOOTING);
 
-   if (boot_cpu_has(X86_FEATURE_XSAVES))
-   asm volatile("1:"XRSTORS"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   if (static_cpu_has_safe(X86_FEATURE_XSAVES))
+   XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
else
-   asm volatile("1:"XRSTOR"\n\t"
-   "2:\n\t"
-xstate_fault(err)
-   : "D" (xstate), "m" (*xstate), "a" (lmask), "d" 
(hmask), "0" (err)
-   : "memory");
+   XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);

[tip:x86/cpu] x86/MSR: Chop off lower 32-bit value

[tip-bot for Borislav Petkov]

Commit-ID:  679bcea857d72868e3431dde3a0e158bf0ed9119
Gitweb: http://git.kernel.org/tip/679bcea857d72868e3431dde3a0e158bf0ed9119
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:26 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:55 +0100

x86/MSR: Chop off lower 32-bit value

sparse complains that the cast truncates the high bits. But here
we really do know what we're doing and we need the lower 32 bits
only as the @low argument. So make that explicit.

Suggested-by: Andy Lutomirski 
Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/msr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 77d8b28..8613382 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -190,7 +190,7 @@ static inline void wrmsr(unsigned msr, unsigned low, 
unsigned high)
 
 static inline void wrmsrl(unsigned msr, u64 val)
 {
-   native_write_msr(msr, (u32)val, (u32)(val >> 32));
+   native_write_msr(msr, (u32)(val & 0xULL), (u32)(val >> 32));
 }
 
 /* wrmsr with exception handling */
--
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[tip:x86/cpu] x86/cpu: Fix MSR value truncation issue

[tip-bot for Borislav Petkov]

Commit-ID:  31ac34ca5636e596485c6e03df1879643bde585e
Gitweb: http://git.kernel.org/tip/31ac34ca5636e596485c6e03df1879643bde585e
Author: Borislav Petkov 
AuthorDate: Mon, 23 Nov 2015 11:12:25 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:15:55 +0100

x86/cpu: Fix MSR value truncation issue

So sparse rightfully complains that the u64 MSR value we're
writing into the STAR MSR, i.e. 0xc081, is being truncated:

./arch/x86/include/asm/msr.h:193:36: warning: cast truncates
bits from constant value (230010 becomes 0)

because the actual value doesn't fit into the unsigned 32-bit
quantity which are the @low and @high wrmsrl() parameters.

This is not a problem, practically, because gcc is actually
being smart enough here and does the right thing:

  .loc 3 87 0
  xorl%esi, %esi# we needz a 32-bit zero
  movl$2293776, %edx# 0x00230010 == (__USER32_CS << 16) | 
__KERNEL_CS go into the high bits
  movl$-1073741695, %ecx# MSR_STAR, i.e., 0xc081
  movl%esi, %eax# low order 32 bits in the MSR which are 0
  #APP
  # 87 "./arch/x86/include/asm/msr.h" 1
  wrmsr

More specifically, MSR_STAR[31:0] is being set to 0. That field
is reserved on Intel and on AMD it is 32-bit SYSCALL Target EIP.

I'd strongly guess because Intel doesn't have SYSCALL in
compat/legacy mode and we're using SYSENTER and INT80 there. And
for compat syscalls in long mode we use CSTAR.

So let's fix the sparse warning by writing SYSRET and SYSCALL CS
and SS into the high 32-bit half of STAR and 0 in the low half
explicitly.

 [ Actually, if we had to be precise, we would have to read what's in
   STAR[31:0] and write it back unchanged on Intel and write 0 on AMD. I
   guess the current writing to 0 is still ok since Intel can apparently
   stomach it. ]

The resulting code is identical to what we have above:

  .loc 3 87 0
  xorl%esi, %esi  # tmp104
  movl$2293776, %eax  #, tmp103
  movl$-1073741695, %ecx  #, tmp102
  movl%esi, %edx  # tmp104, tmp104

  ...

wrmsr

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448273546-2567-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 0bed416..105da8d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1180,7 +1180,7 @@ void syscall_init(void)
 * They both write to the same internal register. STAR allows to
 * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip.
 */
-   wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
+   wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS);
wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);
 
 #ifdef CONFIG_IA32_EMULATION
--
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[tip:ras/core] x86/mce: Add the missing memory error check on AMD

[tip-bot for Borislav Petkov]

Commit-ID:  db548a28fcee0f38cf4c7c726becf24c8afacf02
Gitweb: http://git.kernel.org/tip/db548a28fcee0f38cf4c7c726becf24c8afacf02
Author: Borislav Petkov 
AuthorDate: Tue, 24 Nov 2015 08:41:19 +0100
Committer:  Ingo Molnar 
CommitDate: Tue, 24 Nov 2015 09:12:35 +0100

x86/mce: Add the missing memory error check on AMD

We simply need to look at the extended error code when detecting
whether the error is of type memory.

Signed-off-by: Borislav Petkov 
Acked-by: Tony Luck 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1448350880-5573-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fb8b1db..e00e85a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -522,10 +522,10 @@ static bool memory_error(struct mce *m)
struct cpuinfo_x86 *c = _cpu_data;
 
if (c->x86_vendor == X86_VENDOR_AMD) {
-   /*
-* coming soon
-*/
-   return false;
+   /* ErrCodeExt[20:16] */
+   u8 xec = (m->status >> 16) & 0x1f;
+
+   return (xec == 0x0 || xec == 0x8);
} else if (c->x86_vendor == X86_VENDOR_INTEL) {
/*
 * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
--
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[tip:x86/urgent] x86/microcode: Initialize the driver late when facilities are up

[tip-bot for Borislav Petkov]

Commit-ID:  2d5be37d686c4dae8e60d20283d6f44ac2c44f65
Gitweb: http://git.kernel.org/tip/2d5be37d686c4dae8e60d20283d6f44ac2c44f65
Author: Borislav Petkov 
AuthorDate: Fri, 20 Nov 2015 12:24:00 +0100
Committer:  Ingo Molnar 
CommitDate: Mon, 23 Nov 2015 10:39:49 +0100

x86/microcode: Initialize the driver late when facilities are up

Running microcode_init() from setup_arch() is a bad idea because
not even kmalloc() is ready at that point and the loader does
all kinds of allocations and init/registration with various
subsystems.

Make it a late initcall when required facilities are initialized
so that the microcode driver initialization can succeed too.

Reported-and-tested-by: Markus Trippelsdorf 
Signed-off-by: Borislav Petkov 
Cc: Andrew Morton 
Cc: Linus Torvalds 
Cc: Paul E. McKenney 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20151120112400.gc4...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/core.c | 1 +
 arch/x86/kernel/setup.c  | 2 --
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 7fc27f1..b3e94ef 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -698,3 +698,4 @@ int __init microcode_init(void)
return error;
 
 }
+late_initcall(microcode_init);
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 29db25f..d2bbe34 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1250,8 +1250,6 @@ void __init setup_arch(char **cmdline_p)
if (efi_enabled(EFI_BOOT))
efi_apply_memmap_quirks();
 #endif
-
-   microcode_init();
 }
 
 #ifdef CONFIG_X86_32
--
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[tip:x86/urgent] x86/microcode: Initialize the driver late when facilities are up

[tip-bot for Borislav Petkov]

Commit-ID:  2d5be37d686c4dae8e60d20283d6f44ac2c44f65
Gitweb: http://git.kernel.org/tip/2d5be37d686c4dae8e60d20283d6f44ac2c44f65
Author: Borislav Petkov 
AuthorDate: Fri, 20 Nov 2015 12:24:00 +0100
Committer:  Ingo Molnar 
CommitDate: Mon, 23 Nov 2015 10:39:49 +0100

x86/microcode: Initialize the driver late when facilities are up

Running microcode_init() from setup_arch() is a bad idea because
not even kmalloc() is ready at that point and the loader does
all kinds of allocations and init/registration with various
subsystems.

Make it a late initcall when required facilities are initialized
so that the microcode driver initialization can succeed too.

Reported-and-tested-by: Markus Trippelsdorf 
Signed-off-by: Borislav Petkov 
Cc: Andrew Morton 
Cc: Linus Torvalds 
Cc: Paul E. McKenney 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20151120112400.gc4...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/core.c | 1 +
 arch/x86/kernel/setup.c  | 2 --
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 7fc27f1..b3e94ef 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -698,3 +698,4 @@ int __init microcode_init(void)
return error;
 
 }
+late_initcall(microcode_init);
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 29db25f..d2bbe34 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1250,8 +1250,6 @@ void __init setup_arch(char **cmdline_p)
if (efi_enabled(EFI_BOOT))
efi_apply_memmap_quirks();
 #endif
-
-   microcode_init();
 }
 
 #ifdef CONFIG_X86_32
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/cleanups] x86/paravirt: Kill some unused patching functions

[tip-bot for Borislav Petkov]

Commit-ID:  79f1d836925c545b4612f7ed19423f0950978b5e
Gitweb: http://git.kernel.org/tip/79f1d836925c545b4612f7ed19423f0950978b5e
Author: Borislav Petkov 
AuthorDate: Tue, 3 Nov 2015 10:18:49 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 7 Nov 2015 18:09:35 +0100

x86/paravirt: Kill some unused patching functions

paravirt_patch_ignore() is completely unused and paravirt_patch_nop()
doesn't do a whole lot. Remove them both.

Signed-off-by: Borislav Petkov 
Reviewed-by: Juergen Gross 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Chris Wright 
Cc: Jeremy Fitzhardinge 
Cc: "Peter Zijlstra (Intel)" 
Cc: Rusty Russell 
Cc: virtualizat...@lists.linux-foundation.org
Cc: xen-de...@lists.xenproject.org
Link: http://lkml.kernel.org/r/1446542329-32037-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/kernel/paravirt.c| 13 +
 2 files changed, 1 insertion(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/paravirt_types.h 
b/arch/x86/include/asm/paravirt_types.h
index 31247b5..e1f31df 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -402,10 +402,8 @@ extern struct pv_lock_ops pv_lock_ops;
__visible extern const char start_##ops##_##name[], 
end_##ops##_##name[];   \
asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, 
name))
 
-unsigned paravirt_patch_nop(void);
 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
-unsigned paravirt_patch_ignore(unsigned len);
 unsigned paravirt_patch_call(void *insnbuf,
 const void *target, u16 tgt_clobbers,
 unsigned long addr, u16 site_clobbers,
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index c2130ae..4f32a10 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -74,16 +74,6 @@ void __init default_banner(void)
 /* Undefined instruction for dealing with missing ops pointers. */
 static const unsigned char ud2a[] = { 0x0f, 0x0b };
 
-unsigned paravirt_patch_nop(void)
-{
-   return 0;
-}
-
-unsigned paravirt_patch_ignore(unsigned len)
-{
-   return len;
-}
-
 struct branch {
unsigned char opcode;
u32 delta;
@@ -152,8 +142,7 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void 
*insnbuf,
/* If there's no function, patch it with a ud2a (BUG) */
ret = paravirt_patch_insns(insnbuf, len, ud2a, 
ud2a+sizeof(ud2a));
else if (opfunc == _paravirt_nop)
-   /* If the operation is a nop, then nop the callsite */
-   ret = paravirt_patch_nop();
+   ret = 0;
 
/* identity functions just return their single argument */
else if (opfunc == _paravirt_ident_32)
--
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[tip:x86/urgent] x86/cpu: Call verify_cpu() after having entered long mode too

[tip-bot for Borislav Petkov]

Commit-ID:  04633df0c43d710e5f696b06539c100898678235
Gitweb: http://git.kernel.org/tip/04633df0c43d710e5f696b06539c100898678235
Author: Borislav Petkov 
AuthorDate: Thu, 5 Nov 2015 16:57:56 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 7 Nov 2015 10:45:02 +0100

x86/cpu: Call verify_cpu() after having entered long mode too

When we get loaded by a 64-bit bootloader, kernel entry point is
startup_64 in head_64.S. We don't trust any and all bootloaders because
some will fiddle with CPU configuration so we go ahead and massage each
CPU into sanity again.

For example, some dell BIOSes have this XD disable feature which set
IA32_MISC_ENABLE[34] and disable NX. This might be some dumb workaround
for other OSes but Linux sure doesn't need it.

A similar thing is present in the Surface 3 firmware - see
https://bugzilla.kernel.org/show_bug.cgi?id=106051 - which sets this bit
only on the BSP:

  # rdmsr -a 0x1a0
  400850089
  850089
  850089
  850089

I know, right?!

There's not even an off switch in there.

So fix all those cases by sanitizing the 64-bit entry point too. For
that, make verify_cpu() callable in 64-bit mode also.

Requested-and-debugged-by: "H. Peter Anvin" 
Reported-and-tested-by: Bastien Nocera 
Signed-off-by: Borislav Petkov 
Cc: Matt Fleming 
Cc: Peter Zijlstra 
Cc: sta...@vger.kernel.org
Link: http://lkml.kernel.org/r/1446739076-21303-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/head_64.S|  8 
 arch/x86/kernel/verify_cpu.S | 12 +++-
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 1d40ca8..ffdc0e8 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -65,6 +65,9 @@ startup_64:
 * tables and then reload them.
 */
 
+   /* Sanitize CPU configuration */
+   call verify_cpu
+
/*
 * Compute the delta between the address I am compiled to run at and the
 * address I am actually running at.
@@ -174,6 +177,9 @@ ENTRY(secondary_startup_64)
 * after the boot processor executes this code.
 */
 
+   /* Sanitize CPU configuration */
+   call verify_cpu
+
movq$(init_level4_pgt - __START_KERNEL_map), %rax
 1:
 
@@ -288,6 +294,8 @@ ENTRY(secondary_startup_64)
pushq   %rax# target address in negative space
lretq
 
+#include "verify_cpu.S"
+
 #ifdef CONFIG_HOTPLUG_CPU
 /*
  * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index b9242ba..4cf401f 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -34,10 +34,11 @@
 #include 
 
 verify_cpu:
-   pushfl  # Save caller passed flags
-   pushl   $0  # Kill any dangerous flags
-   popfl
+   pushf   # Save caller passed flags
+   push$0  # Kill any dangerous flags
+   popf
 
+#ifndef __x86_64__
pushfl  # standard way to check for cpuid
popl%eax
movl%eax,%ebx
@@ -48,6 +49,7 @@ verify_cpu:
popl%eax
cmpl%eax,%ebx
jz  verify_cpu_no_longmode  # cpu has no cpuid
+#endif
 
movl$0x0,%eax   # See if cpuid 1 is implemented
cpuid
@@ -130,10 +132,10 @@ verify_cpu_sse_test:
jmp verify_cpu_sse_test # try again
 
 verify_cpu_no_longmode:
-   popfl   # Restore caller passed flags
+   popf# Restore caller passed flags
movl $1,%eax
ret
 verify_cpu_sse_ok:
-   popfl   # Restore caller passed flags
+   popf# Restore caller passed flags
xorl %eax, %eax
ret
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/urgent] x86/cpu: Call verify_cpu() after having entered long mode too

[tip-bot for Borislav Petkov]

Commit-ID:  04633df0c43d710e5f696b06539c100898678235
Gitweb: http://git.kernel.org/tip/04633df0c43d710e5f696b06539c100898678235
Author: Borislav Petkov 
AuthorDate: Thu, 5 Nov 2015 16:57:56 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 7 Nov 2015 10:45:02 +0100

x86/cpu: Call verify_cpu() after having entered long mode too

When we get loaded by a 64-bit bootloader, kernel entry point is
startup_64 in head_64.S. We don't trust any and all bootloaders because
some will fiddle with CPU configuration so we go ahead and massage each
CPU into sanity again.

For example, some dell BIOSes have this XD disable feature which set
IA32_MISC_ENABLE[34] and disable NX. This might be some dumb workaround
for other OSes but Linux sure doesn't need it.

A similar thing is present in the Surface 3 firmware - see
https://bugzilla.kernel.org/show_bug.cgi?id=106051 - which sets this bit
only on the BSP:

  # rdmsr -a 0x1a0
  400850089
  850089
  850089
  850089

I know, right?!

There's not even an off switch in there.

So fix all those cases by sanitizing the 64-bit entry point too. For
that, make verify_cpu() callable in 64-bit mode also.

Requested-and-debugged-by: "H. Peter Anvin" 
Reported-and-tested-by: Bastien Nocera 
Signed-off-by: Borislav Petkov 
Cc: Matt Fleming 
Cc: Peter Zijlstra 
Cc: sta...@vger.kernel.org
Link: http://lkml.kernel.org/r/1446739076-21303-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/kernel/head_64.S|  8 
 arch/x86/kernel/verify_cpu.S | 12 +++-
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 1d40ca8..ffdc0e8 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -65,6 +65,9 @@ startup_64:
 * tables and then reload them.
 */
 
+   /* Sanitize CPU configuration */
+   call verify_cpu
+
/*
 * Compute the delta between the address I am compiled to run at and the
 * address I am actually running at.
@@ -174,6 +177,9 @@ ENTRY(secondary_startup_64)
 * after the boot processor executes this code.
 */
 
+   /* Sanitize CPU configuration */
+   call verify_cpu
+
movq$(init_level4_pgt - __START_KERNEL_map), %rax
 1:
 
@@ -288,6 +294,8 @@ ENTRY(secondary_startup_64)
pushq   %rax# target address in negative space
lretq
 
+#include "verify_cpu.S"
+
 #ifdef CONFIG_HOTPLUG_CPU
 /*
  * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index b9242ba..4cf401f 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -34,10 +34,11 @@
 #include 
 
 verify_cpu:
-   pushfl  # Save caller passed flags
-   pushl   $0  # Kill any dangerous flags
-   popfl
+   pushf   # Save caller passed flags
+   push$0  # Kill any dangerous flags
+   popf
 
+#ifndef __x86_64__
pushfl  # standard way to check for cpuid
popl%eax
movl%eax,%ebx
@@ -48,6 +49,7 @@ verify_cpu:
popl%eax
cmpl%eax,%ebx
jz  verify_cpu_no_longmode  # cpu has no cpuid
+#endif
 
movl$0x0,%eax   # See if cpuid 1 is implemented
cpuid
@@ -130,10 +132,10 @@ verify_cpu_sse_test:
jmp verify_cpu_sse_test # try again
 
 verify_cpu_no_longmode:
-   popfl   # Restore caller passed flags
+   popf# Restore caller passed flags
movl $1,%eax
ret
 verify_cpu_sse_ok:
-   popfl   # Restore caller passed flags
+   popf# Restore caller passed flags
xorl %eax, %eax
ret
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/cleanups] x86/paravirt: Kill some unused patching functions

[tip-bot for Borislav Petkov]

Commit-ID:  79f1d836925c545b4612f7ed19423f0950978b5e
Gitweb: http://git.kernel.org/tip/79f1d836925c545b4612f7ed19423f0950978b5e
Author: Borislav Petkov 
AuthorDate: Tue, 3 Nov 2015 10:18:49 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 7 Nov 2015 18:09:35 +0100

x86/paravirt: Kill some unused patching functions

paravirt_patch_ignore() is completely unused and paravirt_patch_nop()
doesn't do a whole lot. Remove them both.

Signed-off-by: Borislav Petkov 
Reviewed-by: Juergen Gross 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Chris Wright 
Cc: Jeremy Fitzhardinge 
Cc: "Peter Zijlstra (Intel)" 
Cc: Rusty Russell 
Cc: virtualizat...@lists.linux-foundation.org
Cc: xen-de...@lists.xenproject.org
Link: http://lkml.kernel.org/r/1446542329-32037-1-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/kernel/paravirt.c| 13 +
 2 files changed, 1 insertion(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/paravirt_types.h 
b/arch/x86/include/asm/paravirt_types.h
index 31247b5..e1f31df 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -402,10 +402,8 @@ extern struct pv_lock_ops pv_lock_ops;
__visible extern const char start_##ops##_##name[], 
end_##ops##_##name[];   \
asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, 
name))
 
-unsigned paravirt_patch_nop(void);
 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
-unsigned paravirt_patch_ignore(unsigned len);
 unsigned paravirt_patch_call(void *insnbuf,
 const void *target, u16 tgt_clobbers,
 unsigned long addr, u16 site_clobbers,
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index c2130ae..4f32a10 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -74,16 +74,6 @@ void __init default_banner(void)
 /* Undefined instruction for dealing with missing ops pointers. */
 static const unsigned char ud2a[] = { 0x0f, 0x0b };
 
-unsigned paravirt_patch_nop(void)
-{
-   return 0;
-}
-
-unsigned paravirt_patch_ignore(unsigned len)
-{
-   return len;
-}
-
 struct branch {
unsigned char opcode;
u32 delta;
@@ -152,8 +142,7 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void 
*insnbuf,
/* If there's no function, patch it with a ud2a (BUG) */
ret = paravirt_patch_insns(insnbuf, len, ud2a, 
ud2a+sizeof(ud2a));
else if (opfunc == _paravirt_nop)
-   /* If the operation is a nop, then nop the callsite */
-   ret = paravirt_patch_nop();
+   ret = 0;
 
/* identity functions just return their single argument */
else if (opfunc == _paravirt_ident_32)
--
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More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()

[tip-bot for Borislav Petkov]

Commit-ID:  dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193
Gitweb: http://git.kernel.org/tip/dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193
Author: Borislav Petkov 
AuthorDate: Fri, 30 Oct 2015 13:11:38 +0100
Committer:  Ingo Molnar 
CommitDate: Sun, 1 Nov 2015 11:26:14 +0100

x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()

Caught by building with W= which enable -Wswitch-default also.

Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1446207099-24948-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 3d631c4..c5b0d56 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1586,6 +1586,8 @@ static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 
*c)
winchip_mcheck_init(c);
return 1;
break;
+   default:
+   return 0;
}
 
return 0;
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()

[tip-bot for Borislav Petkov]

Commit-ID:  dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193
Gitweb: http://git.kernel.org/tip/dc34bdd2367fd31744ee3ba1de1b1cc0fa2ce193
Author: Borislav Petkov 
AuthorDate: Fri, 30 Oct 2015 13:11:38 +0100
Committer:  Ingo Molnar 
CommitDate: Sun, 1 Nov 2015 11:26:14 +0100

x86/mce: Add a default case to the switch in __mcheck_cpu_ancient_init()

Caught by building with W= which enable -Wswitch-default also.

Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1446207099-24948-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 3d631c4..c5b0d56 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1586,6 +1586,8 @@ static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 
*c)
winchip_mcheck_init(c);
return 1;
break;
+   default:
+   return 0;
}
 
return 0;
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] MAINTAINERS: Unify the microcode driver section

[tip-bot for Borislav Petkov]

Commit-ID:  79ebdc9536c132eb92b4bcce26daaed7f4bf359e
Gitweb: http://git.kernel.org/tip/79ebdc9536c132eb92b4bcce26daaed7f4bf359e
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:49 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:13 +0200

MAINTAINERS: Unify the microcode driver section

Merge the AMD and Intel sections and generalize the file patterns.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 MAINTAINERS | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 5f46784..3a39ef4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,11 +654,6 @@ F: drivers/gpu/drm/radeon/radeon_kfd.c
 F: drivers/gpu/drm/radeon/radeon_kfd.h
 F: include/uapi/linux/kfd_ioctl.h
 
-AMD MICROCODE UPDATE SUPPORT
-M: Borislav Petkov 
-S: Maintained
-F: arch/x86/kernel/cpu/microcode/amd*
-
 AMD XGBE DRIVER
 M: Tom Lendacky 
 L: net...@vger.kernel.org
@@ -5430,12 +5425,6 @@ W:   https://01.org/linux-acpi
 S: Supported
 F: drivers/platform/x86/intel_menlow.c
 
-INTEL IA32 MICROCODE UPDATE SUPPORT
-M: Borislav Petkov 
-S: Maintained
-F: arch/x86/kernel/cpu/microcode/core*
-F: arch/x86/kernel/cpu/microcode/intel*
-
 INTEL I/OAT DMA DRIVER
 M: Dave Jiang 
 R: Dan Williams 
@@ -11451,6 +11440,11 @@ L: linux-e...@vger.kernel.org
 S: Maintained
 F: arch/x86/kernel/cpu/mcheck/*
 
+X86 MICROCODE UPDATE SUPPORT
+M: Borislav Petkov 
+S: Maintained
+F: arch/x86/kernel/cpu/microcode/*
+
 X86 VDSO
 M: Andy Lutomirski 
 L: linux-kernel@vger.kernel.org
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/microcode/intel: Move #ifdef DEBUG inside the function

[tip-bot for Borislav Petkov]

Commit-ID:  c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Gitweb: http://git.kernel.org/tip/c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:48 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode/intel: Move #ifdef DEBUG inside the function

... and save us the stub.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/intel.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 3f32558..ce47402 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -389,9 +389,9 @@ static int collect_cpu_info_early(struct ucode_cpu_info 
*uci)
return 0;
 }
 
-#ifdef DEBUG
 static void show_saved_mc(void)
 {
+#ifdef DEBUG
int i, j;
unsigned int sig, pf, rev, total_size, data_size, date;
struct ucode_cpu_info uci;
@@ -449,12 +449,8 @@ static void show_saved_mc(void)
}
 
}
-}
-#else
-static inline void show_saved_mc(void)
-{
-}
 #endif
+}
 
 #ifdef CONFIG_HOTPLUG_CPU
 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
--
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[tip:ras/core] x86/microcode/amd: Remove maintainers from comments

[tip-bot for Borislav Petkov]

Commit-ID:  6f7fc44bf1eef6768f9dcb527c737ab24a3203ac
Gitweb: http://git.kernel.org/tip/6f7fc44bf1eef6768f9dcb527c737ab24a3203ac
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:47 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode/amd: Remove maintainers from comments

We have the MAINTAINERS file for that. Also, Andreas doesn't
have the time for this work anymore.

Signed-off-by: Borislav Petkov 
Cc: Andreas Herrmann 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/amd.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 6eeda7b..2233f8a 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -11,10 +11,6 @@
  *  Based on work by:
  *  Tigran Aivazian 
  *
- *  Maintainers:
- *  Andreas Herrmann 
- *  Borislav Petkov 
- *
  *  early loader:
  *  Copyright (C) 2013 Advanced Micro Devices, Inc.
  *
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/microcode: Merge the early microcode loader

[tip-bot for Borislav Petkov]

Commit-ID:  fe055896c040df571e4ff56fb196d6845130057b
Gitweb: http://git.kernel.org/tip/fe055896c040df571e4ff56fb196d6845130057b
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:45 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode: Merge the early microcode loader

Merge the early loader functionality into the driver proper. The
diff is huge but logically, it is simply moving code from the
_early.c files into the main driver.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig|  19 +-
 arch/x86/include/asm/microcode.h|  19 +-
 arch/x86/include/asm/microcode_amd.h|   2 +-
 arch/x86/include/asm/microcode_intel.h  |  10 +-
 arch/x86/kernel/cpu/microcode/Makefile  |   3 -
 arch/x86/kernel/cpu/microcode/amd.c | 446 ++-
 arch/x86/kernel/cpu/microcode/amd_early.c   | 444 ---
 arch/x86/kernel/cpu/microcode/core.c| 160 +-
 arch/x86/kernel/cpu/microcode/core_early.c  | 170 --
 arch/x86/kernel/cpu/microcode/intel.c   | 788 ++-
 arch/x86/kernel/cpu/microcode/intel_early.c | 808 
 arch/x86/kernel/head_32.S   |   5 +-
 arch/x86/mm/init.c  |   2 -
 13 files changed, 1399 insertions(+), 1477 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fdf1f0c..255ea22 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1126,6 +1126,7 @@ config MICROCODE
bool "CPU microcode loading support"
default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
+   depends on BLK_DEV_INITRD
select FW_LOADER
---help---
 
@@ -1167,24 +1168,6 @@ config MICROCODE_OLD_INTERFACE
def_bool y
depends on MICROCODE
 
-config MICROCODE_INTEL_EARLY
-   bool
-
-config MICROCODE_AMD_EARLY
-   bool
-
-config MICROCODE_EARLY
-   bool "Early load microcode"
-   depends on MICROCODE && BLK_DEV_INITRD
-   select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
-   select MICROCODE_AMD_EARLY if MICROCODE_AMD
-   default y
-   help
- This option provides functionality to read additional microcode data
- at the beginning of initrd image. The data tells kernel to load
- microcode to CPU's as early as possible. No functional change if no
- microcode data is glued to the initrd, therefore it's safe to say Y.
-
 config X86_MSR
tristate "/dev/cpu/*/msr - Model-specific register support"
---help---
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index d1ff724f..9f953f7 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -81,7 +81,6 @@ static inline struct microcode_ops * __init 
init_amd_microcode(void)
 static inline void __exit exit_amd_microcode(void) {}
 #endif
 
-#ifdef CONFIG_MICROCODE_EARLY
 #define MAX_UCODE_COUNT 128
 
 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
@@ -156,22 +155,18 @@ static inline unsigned int x86_model(unsigned int sig)
return model;
 }
 
+#ifdef CONFIG_MICROCODE
 extern void __init load_ucode_bsp(void);
 extern void load_ucode_ap(void);
 extern int __init save_microcode_in_initrd(void);
 void reload_early_microcode(void);
 extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
 #else
-static inline void __init load_ucode_bsp(void) {}
-static inline void load_ucode_ap(void) {}
-static inline int __init save_microcode_in_initrd(void)
-{
-   return 0;
-}
-static inline void reload_early_microcode(void) {}
-static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name)
-{
-   return false;
-}
+static inline void __init load_ucode_bsp(void) { }
+static inline void load_ucode_ap(void) { }
+static inline int __init save_microcode_in_initrd(void){ 
return 0; }
+static inline void reload_early_microcode(void){ }
+static inline bool
+get_builtin_firmware(struct cpio_data *cd, const char *name)   { return false; 
}
 #endif
 #endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index d3e86cf..adfc847 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -64,7 +64,7 @@ extern enum ucode_state load_microcode_amd(int cpu, u8 
family, const u8 *data, s
 #define PATCH_MAX_SIZE PAGE_SIZE
 extern u8 amd_ucode_patch[PATCH_MAX_SIZE];
 
-#ifdef CONFIG_MICROCODE_AMD_EARLY
+#ifdef 

[tip:ras/core] x86/microcode: Remove modularization leftovers

[tip-bot for Borislav Petkov]

Commit-ID:  6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Gitweb: http://git.kernel.org/tip/6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:46 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode: Remove modularization leftovers

Remove the remaining module functionality leftovers. Make
"dis_ucode_ldr" an early_param and make it static again. Drop
module aliases, autoloading table, description, etc.

Bump version number, while at it.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode.h  |  1 -
 arch/x86/kernel/cpu/microcode/amd.c   |  7 +-
 arch/x86/kernel/cpu/microcode/core.c  | 36 +--
 arch/x86/kernel/cpu/microcode/intel.c |  7 +-
 arch/x86/kernel/cpu/microcode/intel_lib.c |  1 -
 5 files changed, 12 insertions(+), 40 deletions(-)

diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 9f953f7..34e62b1 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -27,7 +27,6 @@ struct cpu_signature {
 struct device;
 
 enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
-extern bool dis_ucode_ldr;
 
 struct microcode_ops {
enum ucode_state (*request_microcode_user) (int cpu,
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 20297fb..6eeda7b 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -24,7 +24,7 @@
  *  Licensed under the terms of the GNU General Public
  *  License version 2. See file COPYING for details.
  */
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
 
 #include 
 #include 
@@ -32,7 +32,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include 
@@ -42,10 +41,6 @@
 #include 
 #include 
 
-MODULE_DESCRIPTION("AMD Microcode Update Driver");
-MODULE_AUTHOR("Peter Oruba");
-MODULE_LICENSE("GPL v2");
-
 static struct equiv_cpu_entry *equiv_cpu_table;
 
 struct ucode_patch {
diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 18848c7..7fc27f1 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -19,7 +19,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
 
 #include 
 #include 
@@ -27,7 +27,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -41,16 +40,18 @@
 #include 
 #include 
 
-MODULE_DESCRIPTION("Microcode Update Driver");
-MODULE_AUTHOR("Tigran Aivazian ");
-MODULE_LICENSE("GPL");
-
-#define MICROCODE_VERSION  "2.00"
+#define MICROCODE_VERSION  "2.01"
 
 static struct microcode_ops*microcode_ops;
 
-bool dis_ucode_ldr;
-module_param(dis_ucode_ldr, bool, 0);
+static bool dis_ucode_ldr;
+
+static int __init disable_loader(char *str)
+{
+   dis_ucode_ldr = true;
+   return 1;
+}
+__setup("dis_ucode_ldr", disable_loader);
 
 /*
  * Synchronization.
@@ -364,9 +365,6 @@ static void __exit microcode_dev_exit(void)
 {
misc_deregister(_dev);
 }
-
-MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
-MODULE_ALIAS("devname:cpu/microcode");
 #else
 #define microcode_dev_init()   0
 #define microcode_dev_exit()   do { } while (0)
@@ -617,20 +615,6 @@ static struct notifier_block mc_cpu_notifier = {
.notifier_call  = mc_cpu_callback,
 };
 
-#ifdef MODULE
-/* Autoload on Intel and AMD systems */
-static const struct x86_cpu_id __initconst microcode_id[] = {
-#ifdef CONFIG_MICROCODE_INTEL
-   { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
-#ifdef CONFIG_MICROCODE_AMD
-   { X86_VENDOR_AMD, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
-   {}
-};
-MODULE_DEVICE_TABLE(x86cpu, microcode_id);
-#endif
-
 static struct attribute *cpu_root_microcode_attrs[] = {
_attr_reload.attr,
NULL
diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 2e09171..3f32558 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -21,7 +21,7 @@
  *
  *#define DEBUG
  */
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
 
 #include 
 #include 
@@ -29,7 +29,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -40,10 +39,6 @@
 #include 
 #include 
 
-MODULE_DESCRIPTION("Microcode Update Driver");
-MODULE_AUTHOR("Tigran Aivazian ");
-MODULE_LICENSE("GPL");
-
 static unsigned long 

[tip:ras/core] x86/microcode: Unmodularize the microcode driver

[tip-bot for Borislav Petkov]

Commit-ID:  9a2bc335f100a0f6ee6392b9f97ac4188d84db1d
Gitweb: http://git.kernel.org/tip/9a2bc335f100a0f6ee6392b9f97ac4188d84db1d
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:44 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:11 +0200

x86/microcode: Unmodularize the microcode driver

Make CONFIG_MICROCODE a bool. It was practically a bool already anyway,
since early loader was forcing it to =y.

Regardless, there's no real reason to have something be a module which
gets built-in on the majority of installations out there. And its not
like there's noticeable change in functionality - we still can load late
microcode - just the module glue disappears.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig  |  5 +++--
 arch/x86/include/asm/microcode.h  |  6 ++
 arch/x86/kernel/cpu/microcode/amd.c   |  2 +-
 arch/x86/kernel/cpu/microcode/core.c  | 36 ++-
 arch/x86/kernel/cpu/microcode/intel.c |  2 +-
 arch/x86/kernel/setup.c   |  3 +++
 6 files changed, 16 insertions(+), 38 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 96d058a..fdf1f0c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1123,7 +1123,8 @@ config X86_REBOOTFIXUPS
  Say N otherwise.
 
 config MICROCODE
-   tristate "CPU microcode loading support"
+   bool "CPU microcode loading support"
+   default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
select FW_LOADER
---help---
@@ -1174,7 +1175,7 @@ config MICROCODE_AMD_EARLY
 
 config MICROCODE_EARLY
bool "Early load microcode"
-   depends on MICROCODE=y && BLK_DEV_INITRD
+   depends on MICROCODE && BLK_DEV_INITRD
select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
select MICROCODE_AMD_EARLY if MICROCODE_AMD
default y
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 9e6278c..d1ff724f 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -55,6 +55,12 @@ struct ucode_cpu_info {
 };
 extern struct ucode_cpu_info ucode_cpu_info[];
 
+#ifdef CONFIG_MICROCODE
+int __init microcode_init(void);
+#else
+static inline int __init microcode_init(void)  { return 0; };
+#endif
+
 #ifdef CONFIG_MICROCODE_INTEL
 extern struct microcode_ops * __init init_intel_microcode(void);
 #else
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index da922d1..5dcce5d 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -523,7 +523,7 @@ static struct microcode_ops microcode_amd_ops = {
 
 struct microcode_ops * __init init_amd_microcode(void)
 {
-   struct cpuinfo_x86 *c = _data(0);
+   struct cpuinfo_x86 *c = _cpu_data;
 
if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 9e3f3c7..15491dd 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -487,9 +487,9 @@ static struct attribute_group cpu_root_microcode_group = {
.attrs = cpu_root_microcode_attrs,
 };
 
-static int __init microcode_init(void)
+int __init microcode_init(void)
 {
-   struct cpuinfo_x86 *c = _data(0);
+   struct cpuinfo_x86 *c = _cpu_data;
int error;
 
if (paravirt_enabled() || dis_ucode_ldr)
@@ -560,35 +560,3 @@ static int __init microcode_init(void)
return error;
 
 }
-module_init(microcode_init);
-
-static void __exit microcode_exit(void)
-{
-   struct cpuinfo_x86 *c = _data(0);
-
-   microcode_dev_exit();
-
-   unregister_hotcpu_notifier(_cpu_notifier);
-   unregister_syscore_ops(_syscore_ops);
-
-   sysfs_remove_group(_subsys.dev_root->kobj,
-  _root_microcode_group);
-
-   get_online_cpus();
-   mutex_lock(_mutex);
-
-   subsys_interface_unregister(_cpu_interface);
-
-   mutex_unlock(_mutex);
-   put_online_cpus();
-
-   platform_device_unregister(microcode_pdev);
-
-   microcode_ops = NULL;
-
-   if (c->x86_vendor == X86_VENDOR_AMD)
-   exit_amd_microcode();
-
-   pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
-}
-module_exit(microcode_exit);
diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 969dc17..bfd6fcd 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -264,7 +264,7 

[tip:x86/cpu] x86/Kconfig/cpus: Fix/complete CPU type help texts

[tip-bot for Borislav Petkov]

Commit-ID:  221836e92cd5664de6fc2f1d836f6343ae5f2e43
Gitweb: http://git.kernel.org/tip/221836e92cd5664de6fc2f1d836f6343ae5f2e43
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 10:41:17 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:12:56 +0200

x86/Kconfig/cpus: Fix/complete CPU type help texts

Move the generic help text explaining each CPU type and what to
select under the "Processor Family" prompt and not under the
M486 option. Also, amend it with the missing options.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1445244077-25120-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig.cpu | 24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 6983314..3ba5ff2 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -3,10 +3,6 @@ choice
prompt "Processor family"
default M686 if X86_32
default GENERIC_CPU if X86_64
-
-config M486
-   bool "486"
-   depends on X86_32
---help---
  This is the processor type of your CPU. This information is
  used for optimizing purposes. In order to compile a kernel
@@ -23,9 +19,9 @@ config M486
 
  Here are the settings recommended for greatest speed:
  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
- SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
+   SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  - "586" for generic Pentium CPUs lacking the TSC
- (time stamp counter) register.
+   (time stamp counter) register.
  - "Pentium-Classic" for the Intel Pentium.
  - "Pentium-MMX" for the Intel Pentium MMX.
  - "Pentium-Pro" for the Intel Pentium Pro.
@@ -34,17 +30,31 @@ config M486
  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
+ - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
  - "Crusoe" for the Transmeta Crusoe series.
  - "Efficeon" for the Transmeta Efficeon series.
  - "Winchip-C6" for original IDT Winchip.
  - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
+ - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  - "Geode GX/LX" For AMD Geode GX and LX processors.
  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
  - "VIA C7" for VIA C7.
+ - "Intel P4" for the Pentium 4/Netburst microarchitecture.
+ - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
+ - "Intel Atom" for the Atom-microarchitecture CPUs.
+ - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
+
+ See each option's help text for additional details. If you don't know
+ what to do, choose "486".
 
- If you don't know what to do, choose "486".
+config M486
+   bool "486"
+   depends on X86_32
+   ---help---
+ Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
+ 486DX/DX2/DX4 or SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
 
 config M586
bool "586/K5/5x86/6x86/6x86MX"
--
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[tip:ras/core] x86/setup/crash: Check memblock_reserve() retval

[tip-bot for Borislav Petkov]

Commit-ID:  6f3760570e26eefc214e641b6daeddb7106240bb
Gitweb: http://git.kernel.org/tip/6f3760570e26eefc214e641b6daeddb7106240bb
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:46 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Check memblock_reserve() retval

memblock_reserve() can fail but the crashkernel reservation code
doesn't check that and this can lead the user into believing
that the crashkernel region was actually reserved. Make sure we
check that return value and we exit early with a failure message
in the error case.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d478871..3f75297 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -531,7 +531,11 @@ static int __init reserve_crashkernel_low(void)
return -ENOMEM;
}
 
-   memblock_reserve(low_base, low_size);
+   ret = memblock_reserve(low_base, low_size);
+   if (ret) {
+   pr_err("%s: Error reserving crashkernel low memblock.\n", 
__func__);
+   return ret;
+   }
 
pr_info("Reserving %ldMB of low memory at %ldMB for crashkernel (System 
low RAM: %ldMB)\n",
(unsigned long)(low_size >> 20),
@@ -589,7 +593,11 @@ static void __init reserve_crashkernel(void)
return;
}
}
-   memblock_reserve(crash_base, crash_size);
+   ret = memblock_reserve(crash_base, crash_size);
+   if (ret) {
+   pr_err("%s: Error reserving crashkernel memblock.\n", __func__);
+   return;
+   }
 
if (crash_base >= (1ULL << 32) && reserve_crashkernel_low()) {
memblock_free(crash_base, crash_size);
--
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[tip:ras/core] kexec/crash: Say which char is the unrecognized

[tip-bot for Borislav Petkov]

Commit-ID:  53b90c0c56b502056da83d768047dcf765bac9fb
Gitweb: http://git.kernel.org/tip/53b90c0c56b502056da83d768047dcf765bac9fb
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:47 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:57 +0200

kexec/crash: Say which char is the unrecognized

It is helpful when the crashkernel cmdline parsing routines
actually say which character is the unrecognized one. Make them
do so.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Baoquan He 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Vivek Goyal 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 kernel/kexec_core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c
index 201b453..bd9f8a0 100644
--- a/kernel/kexec_core.c
+++ b/kernel/kexec_core.c
@@ -1149,7 +1149,7 @@ static int __init parse_crashkernel_simple(char *cmdline,
if (*cur == '@')
*crash_base = memparse(cur+1, );
else if (*cur != ' ' && *cur != '\0') {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
 
@@ -1186,12 +1186,12 @@ static int __init parse_crashkernel_suffix(char 
*cmdline,
 
/* check with suffix */
if (strncmp(cur, suffix, strlen(suffix))) {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
cur += strlen(suffix);
if (*cur != ' ' && *cur != '\0') {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
 
--
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[tip:ras/core] x86/setup/crash: Cleanup some more

[tip-bot for Borislav Petkov]

Commit-ID:  f56d55781c1ff5663874775d0672ba954fe5634c
Gitweb: http://git.kernel.org/tip/f56d55781c1ff5663874775d0672ba954fe5634c
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:45 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Cleanup some more

* Remove unused auto_set variable
* Cleanup local function variable declarations
* Reformat printk string and use pr_info()

No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 19 +++
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index ea086dd..d478871 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -499,17 +499,15 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 static int __init reserve_crashkernel_low(void)
 {
 #ifdef CONFIG_X86_64
-   unsigned long long low_base = 0, low_size = 0;
+   unsigned long long base, low_base = 0, low_size = 0;
unsigned long total_low_mem;
-   unsigned long long base;
-   bool auto_set = false;
int ret;
 
total_low_mem = memblock_mem_size(1UL << (32 - PAGE_SHIFT));
 
/* crashkernel=Y,low */
ret = parse_crashkernel_low(boot_command_line, total_low_mem, 
_size, );
-   if (ret != 0) {
+   if (ret) {
/*
 * two parts from lib/swiotlb.c:
 * -swiotlb size: user-specified with swiotlb= or default.
@@ -520,7 +518,6 @@ static int __init reserve_crashkernel_low(void)
 * don't run out of DMA buffers for 32-bit devices.
 */
low_size = max(swiotlb_size_or_default() + (8UL << 20), 256UL 
<< 20);
-   auto_set = true;
} else {
/* passed with crashkernel=0,low ? */
if (!low_size)
@@ -550,8 +547,7 @@ static int __init reserve_crashkernel_low(void)
 
 static void __init reserve_crashkernel(void)
 {
-   unsigned long long total_mem;
-   unsigned long long crash_size, crash_base;
+   unsigned long long crash_size, crash_base, total_mem;
bool high = false;
int ret;
 
@@ -600,11 +596,10 @@ static void __init reserve_crashkernel(void)
return;
}
 
-   printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
-   "for crashkernel (System RAM: %ldMB)\n",
-   (unsigned long)(crash_size >> 20),
-   (unsigned long)(crash_base >> 20),
-   (unsigned long)(total_mem >> 20));
+   pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System 
RAM: %ldMB)\n",
+   (unsigned long)(crash_size >> 20),
+   (unsigned long)(crash_base >> 20),
+   (unsigned long)(total_mem >> 20));
 
crashk_res.start = crash_base;
crashk_res.end   = crash_base + crash_size - 1;
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/setup/crash: Remove alignment variable

[tip-bot for Borislav Petkov]

Commit-ID:  606134f77ce22997fd2800d5937698d85c6990d9
Gitweb: http://git.kernel.org/tip/606134f77ce22997fd2800d5937698d85c6990d9
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:44 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Remove alignment variable

Use a macro instead. No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index fd9e178..ea086dd 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -480,6 +480,9 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 
 #ifdef CONFIG_KEXEC_CORE
 
+/* 16M alignment for crash kernel regions */
+#define CRASH_ALIGN(16 << 20)
+
 /*
  * Keep the crash kernel below this limit.  On 32 bits earlier kernels
  * would limit the kernel to the low 512 MiB due to mapping restrictions.
@@ -496,7 +499,6 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 static int __init reserve_crashkernel_low(void)
 {
 #ifdef CONFIG_X86_64
-   const unsigned long long alignment = 16<<20;/* 16M */
unsigned long long low_base = 0, low_size = 0;
unsigned long total_low_mem;
unsigned long long base;
@@ -525,7 +527,7 @@ static int __init reserve_crashkernel_low(void)
return 0;
}
 
-   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
alignment);
+   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
CRASH_ALIGN);
if (!low_base) {
pr_err("Cannot reserve %ldMB crashkernel low memory, please try 
smaller size.\n",
   (unsigned long)(low_size >> 20));
@@ -548,7 +550,6 @@ static int __init reserve_crashkernel_low(void)
 
 static void __init reserve_crashkernel(void)
 {
-   const unsigned long long alignment = 16<<20;/* 16M */
unsigned long long total_mem;
unsigned long long crash_size, crash_base;
bool high = false;
@@ -572,10 +573,10 @@ static void __init reserve_crashkernel(void)
/*
 *  kexec want bzImage is below CRASH_KERNEL_ADDR_MAX
 */
-   crash_base = memblock_find_in_range(alignment,
+   crash_base = memblock_find_in_range(CRASH_ALIGN,
high ? CRASH_ADDR_HIGH_MAX
 : CRASH_ADDR_LOW_MAX,
-   crash_size, alignment);
+   crash_size, CRASH_ALIGN);
if (!crash_base) {
pr_info("crashkernel reservation failed - No suitable 
area found.\n");
return;
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/setup: Cleanup crashkernel reservation functions

[tip-bot for Borislav Petkov]

Commit-ID:  97eac21babe47e1a8ed4cac4f8874c5746cf6e36
Gitweb: http://git.kernel.org/tip/97eac21babe47e1a8ed4cac4f8874c5746cf6e36
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:43 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup: Cleanup crashkernel reservation functions

* Shorten variable names
* Realign code, space out for better readability

No code changed:

  # arch/x86/kernel/setup.o:

   textdata bss dec hex filename
   45433096   69904   77543   12ee7 setup.o.before
   45433096   69904   77543   12ee7 setup.o.after

md5:
   8a1b7c6738a553ca207b56bd84a8f359  setup.o.before.asm
   8a1b7c6738a553ca207b56bd84a8f359  setup.o.after.asm

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 43 +--
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 1b36839..fd9e178 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -486,11 +486,11 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
  * On 64bit, old kexec-tools need to under 896MiB.
  */
 #ifdef CONFIG_X86_32
-# define CRASH_KERNEL_ADDR_LOW_MAX (512 << 20)
-# define CRASH_KERNEL_ADDR_HIGH_MAX(512 << 20)
+# define CRASH_ADDR_LOW_MAX(512 << 20)
+# define CRASH_ADDR_HIGH_MAX   (512 << 20)
 #else
-# define CRASH_KERNEL_ADDR_LOW_MAX (896UL<<20)
-# define CRASH_KERNEL_ADDR_HIGH_MAXMAXMEM
+# define CRASH_ADDR_LOW_MAX(896UL << 20)
+# define CRASH_ADDR_HIGH_MAX   MAXMEM
 #endif
 
 static int __init reserve_crashkernel_low(void)
@@ -503,10 +503,10 @@ static int __init reserve_crashkernel_low(void)
bool auto_set = false;
int ret;
 
-   total_low_mem = memblock_mem_size(1UL<<(32-PAGE_SHIFT));
+   total_low_mem = memblock_mem_size(1UL << (32 - PAGE_SHIFT));
+
/* crashkernel=Y,low */
-   ret = parse_crashkernel_low(boot_command_line, total_low_mem,
-   _size, );
+   ret = parse_crashkernel_low(boot_command_line, total_low_mem, 
_size, );
if (ret != 0) {
/*
 * two parts from lib/swiotlb.c:
@@ -517,7 +517,7 @@ static int __init reserve_crashkernel_low(void)
 * make sure we allocate enough extra low memory so that we
 * don't run out of DMA buffers for 32-bit devices.
 */
-   low_size = max(swiotlb_size_or_default() + (8UL<<20), 
256UL<<20);
+   low_size = max(swiotlb_size_or_default() + (8UL << 20), 256UL 
<< 20);
auto_set = true;
} else {
/* passed with crashkernel=0,low ? */
@@ -525,9 +525,7 @@ static int __init reserve_crashkernel_low(void)
return 0;
}
 
-   low_base = memblock_find_in_range(low_size, (1ULL<<32),
-   low_size, alignment);
-
+   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
alignment);
if (!low_base) {
pr_err("Cannot reserve %ldMB crashkernel low memory, please try 
smaller size.\n",
   (unsigned long)(low_size >> 20));
@@ -535,10 +533,12 @@ static int __init reserve_crashkernel_low(void)
}
 
memblock_reserve(low_base, low_size);
+
pr_info("Reserving %ldMB of low memory at %ldMB for crashkernel (System 
low RAM: %ldMB)\n",
-   (unsigned long)(low_size >> 20),
-   (unsigned long)(low_base >> 20),
-   (unsigned long)(total_low_mem >> 20));
+   (unsigned long)(low_size >> 20),
+   (unsigned long)(low_base >> 20),
+   (unsigned long)(total_low_mem >> 20));
+
crashk_low_res.start = low_base;
crashk_low_res.end   = low_base + low_size - 1;
insert_resource(_resource, _low_res);
@@ -557,12 +557,11 @@ static void __init reserve_crashkernel(void)
total_mem = memblock_phys_mem_size();
 
/* crashkernel=XM */
-   ret = parse_crashkernel(boot_command_line, total_mem,
-   _size, _base);
+   ret = parse_crashkernel(boot_command_line, total_mem, _size, 
_base);
if (ret != 0 || crash_size <= 0) {
/* crashkernel=X,high */
ret = parse_crashkernel_high(boot_command_line, total_mem,
-   _size, _base);
+_size, _base);
if (ret != 0 || crash_size <= 0)

[tip:ras/core] x86/setup: Cleanup crashkernel reservation functions

[tip-bot for Borislav Petkov]

Commit-ID:  97eac21babe47e1a8ed4cac4f8874c5746cf6e36
Gitweb: http://git.kernel.org/tip/97eac21babe47e1a8ed4cac4f8874c5746cf6e36
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:43 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup: Cleanup crashkernel reservation functions

* Shorten variable names
* Realign code, space out for better readability

No code changed:

  # arch/x86/kernel/setup.o:

   textdata bss dec hex filename
   45433096   69904   77543   12ee7 setup.o.before
   45433096   69904   77543   12ee7 setup.o.after

md5:
   8a1b7c6738a553ca207b56bd84a8f359  setup.o.before.asm
   8a1b7c6738a553ca207b56bd84a8f359  setup.o.after.asm

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 43 +--
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 1b36839..fd9e178 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -486,11 +486,11 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
  * On 64bit, old kexec-tools need to under 896MiB.
  */
 #ifdef CONFIG_X86_32
-# define CRASH_KERNEL_ADDR_LOW_MAX (512 << 20)
-# define CRASH_KERNEL_ADDR_HIGH_MAX(512 << 20)
+# define CRASH_ADDR_LOW_MAX(512 << 20)
+# define CRASH_ADDR_HIGH_MAX   (512 << 20)
 #else
-# define CRASH_KERNEL_ADDR_LOW_MAX (896UL<<20)
-# define CRASH_KERNEL_ADDR_HIGH_MAXMAXMEM
+# define CRASH_ADDR_LOW_MAX(896UL << 20)
+# define CRASH_ADDR_HIGH_MAX   MAXMEM
 #endif
 
 static int __init reserve_crashkernel_low(void)
@@ -503,10 +503,10 @@ static int __init reserve_crashkernel_low(void)
bool auto_set = false;
int ret;
 
-   total_low_mem = memblock_mem_size(1UL<<(32-PAGE_SHIFT));
+   total_low_mem = memblock_mem_size(1UL << (32 - PAGE_SHIFT));
+
/* crashkernel=Y,low */
-   ret = parse_crashkernel_low(boot_command_line, total_low_mem,
-   _size, );
+   ret = parse_crashkernel_low(boot_command_line, total_low_mem, 
_size, );
if (ret != 0) {
/*
 * two parts from lib/swiotlb.c:
@@ -517,7 +517,7 @@ static int __init reserve_crashkernel_low(void)
 * make sure we allocate enough extra low memory so that we
 * don't run out of DMA buffers for 32-bit devices.
 */
-   low_size = max(swiotlb_size_or_default() + (8UL<<20), 
256UL<<20);
+   low_size = max(swiotlb_size_or_default() + (8UL << 20), 256UL 
<< 20);
auto_set = true;
} else {
/* passed with crashkernel=0,low ? */
@@ -525,9 +525,7 @@ static int __init reserve_crashkernel_low(void)
return 0;
}
 
-   low_base = memblock_find_in_range(low_size, (1ULL<<32),
-   low_size, alignment);
-
+   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
alignment);
if (!low_base) {
pr_err("Cannot reserve %ldMB crashkernel low memory, please try 
smaller size.\n",
   (unsigned long)(low_size >> 20));
@@ -535,10 +533,12 @@ static int __init reserve_crashkernel_low(void)
}
 
memblock_reserve(low_base, low_size);
+
pr_info("Reserving %ldMB of low memory at %ldMB for crashkernel (System 
low RAM: %ldMB)\n",
-   (unsigned long)(low_size >> 20),
-   (unsigned long)(low_base >> 20),
-   (unsigned long)(total_low_mem >> 20));
+   (unsigned long)(low_size >> 20),
+   (unsigned long)(low_base >> 20),
+   (unsigned long)(total_low_mem >> 20));
+
crashk_low_res.start = low_base;
crashk_low_res.end   = low_base + low_size - 1;
insert_resource(_resource, _low_res);
@@ -557,12 +557,11 @@ static void __init reserve_crashkernel(void)
total_mem = memblock_phys_mem_size();
 
/* crashkernel=XM */
-   ret = parse_crashkernel(boot_command_line, total_mem,
-   _size, _base);
+   ret = parse_crashkernel(boot_command_line, total_mem, _size, 
_base);
if (ret != 0 || 

[tip:ras/core] x86/setup/crash: Cleanup some more

[tip-bot for Borislav Petkov]

Commit-ID:  f56d55781c1ff5663874775d0672ba954fe5634c
Gitweb: http://git.kernel.org/tip/f56d55781c1ff5663874775d0672ba954fe5634c
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:45 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Cleanup some more

* Remove unused auto_set variable
* Cleanup local function variable declarations
* Reformat printk string and use pr_info()

No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 19 +++
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index ea086dd..d478871 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -499,17 +499,15 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 static int __init reserve_crashkernel_low(void)
 {
 #ifdef CONFIG_X86_64
-   unsigned long long low_base = 0, low_size = 0;
+   unsigned long long base, low_base = 0, low_size = 0;
unsigned long total_low_mem;
-   unsigned long long base;
-   bool auto_set = false;
int ret;
 
total_low_mem = memblock_mem_size(1UL << (32 - PAGE_SHIFT));
 
/* crashkernel=Y,low */
ret = parse_crashkernel_low(boot_command_line, total_low_mem, 
_size, );
-   if (ret != 0) {
+   if (ret) {
/*
 * two parts from lib/swiotlb.c:
 * -swiotlb size: user-specified with swiotlb= or default.
@@ -520,7 +518,6 @@ static int __init reserve_crashkernel_low(void)
 * don't run out of DMA buffers for 32-bit devices.
 */
low_size = max(swiotlb_size_or_default() + (8UL << 20), 256UL 
<< 20);
-   auto_set = true;
} else {
/* passed with crashkernel=0,low ? */
if (!low_size)
@@ -550,8 +547,7 @@ static int __init reserve_crashkernel_low(void)
 
 static void __init reserve_crashkernel(void)
 {
-   unsigned long long total_mem;
-   unsigned long long crash_size, crash_base;
+   unsigned long long crash_size, crash_base, total_mem;
bool high = false;
int ret;
 
@@ -600,11 +596,10 @@ static void __init reserve_crashkernel(void)
return;
}
 
-   printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
-   "for crashkernel (System RAM: %ldMB)\n",
-   (unsigned long)(crash_size >> 20),
-   (unsigned long)(crash_base >> 20),
-   (unsigned long)(total_mem >> 20));
+   pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System 
RAM: %ldMB)\n",
+   (unsigned long)(crash_size >> 20),
+   (unsigned long)(crash_base >> 20),
+   (unsigned long)(total_mem >> 20));
 
crashk_res.start = crash_base;
crashk_res.end   = crash_base + crash_size - 1;
--
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[tip:ras/core] x86/setup/crash: Remove alignment variable

[tip-bot for Borislav Petkov]

Commit-ID:  606134f77ce22997fd2800d5937698d85c6990d9
Gitweb: http://git.kernel.org/tip/606134f77ce22997fd2800d5937698d85c6990d9
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:44 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Remove alignment variable

Use a macro instead. No functionality change.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index fd9e178..ea086dd 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -480,6 +480,9 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 
 #ifdef CONFIG_KEXEC_CORE
 
+/* 16M alignment for crash kernel regions */
+#define CRASH_ALIGN(16 << 20)
+
 /*
  * Keep the crash kernel below this limit.  On 32 bits earlier kernels
  * would limit the kernel to the low 512 MiB due to mapping restrictions.
@@ -496,7 +499,6 @@ static void __init 
memblock_x86_reserve_range_setup_data(void)
 static int __init reserve_crashkernel_low(void)
 {
 #ifdef CONFIG_X86_64
-   const unsigned long long alignment = 16<<20;/* 16M */
unsigned long long low_base = 0, low_size = 0;
unsigned long total_low_mem;
unsigned long long base;
@@ -525,7 +527,7 @@ static int __init reserve_crashkernel_low(void)
return 0;
}
 
-   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
alignment);
+   low_base = memblock_find_in_range(low_size, 1ULL << 32, low_size, 
CRASH_ALIGN);
if (!low_base) {
pr_err("Cannot reserve %ldMB crashkernel low memory, please try 
smaller size.\n",
   (unsigned long)(low_size >> 20));
@@ -548,7 +550,6 @@ static int __init reserve_crashkernel_low(void)
 
 static void __init reserve_crashkernel(void)
 {
-   const unsigned long long alignment = 16<<20;/* 16M */
unsigned long long total_mem;
unsigned long long crash_size, crash_base;
bool high = false;
@@ -572,10 +573,10 @@ static void __init reserve_crashkernel(void)
/*
 *  kexec want bzImage is below CRASH_KERNEL_ADDR_MAX
 */
-   crash_base = memblock_find_in_range(alignment,
+   crash_base = memblock_find_in_range(CRASH_ALIGN,
high ? CRASH_ADDR_HIGH_MAX
 : CRASH_ADDR_LOW_MAX,
-   crash_size, alignment);
+   crash_size, CRASH_ALIGN);
if (!crash_base) {
pr_info("crashkernel reservation failed - No suitable 
area found.\n");
return;
--
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[tip:ras/core] x86/setup/crash: Check memblock_reserve() retval

[tip-bot for Borislav Petkov]

Commit-ID:  6f3760570e26eefc214e641b6daeddb7106240bb
Gitweb: http://git.kernel.org/tip/6f3760570e26eefc214e641b6daeddb7106240bb
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:46 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:56 +0200

x86/setup/crash: Check memblock_reserve() retval

memblock_reserve() can fail but the crashkernel reservation code
doesn't check that and this can lead the user into believing
that the crashkernel region was actually reserved. Make sure we
check that return value and we exit early with a failure message
in the error case.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/setup.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d478871..3f75297 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -531,7 +531,11 @@ static int __init reserve_crashkernel_low(void)
return -ENOMEM;
}
 
-   memblock_reserve(low_base, low_size);
+   ret = memblock_reserve(low_base, low_size);
+   if (ret) {
+   pr_err("%s: Error reserving crashkernel low memblock.\n", 
__func__);
+   return ret;
+   }
 
pr_info("Reserving %ldMB of low memory at %ldMB for crashkernel (System 
low RAM: %ldMB)\n",
(unsigned long)(low_size >> 20),
@@ -589,7 +593,11 @@ static void __init reserve_crashkernel(void)
return;
}
}
-   memblock_reserve(crash_base, crash_size);
+   ret = memblock_reserve(crash_base, crash_size);
+   if (ret) {
+   pr_err("%s: Error reserving crashkernel memblock.\n", __func__);
+   return;
+   }
 
if (crash_base >= (1ULL << 32) && reserve_crashkernel_low()) {
memblock_free(crash_base, crash_size);
--
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[tip:ras/core] kexec/crash: Say which char is the unrecognized

[tip-bot for Borislav Petkov]

Commit-ID:  53b90c0c56b502056da83d768047dcf765bac9fb
Gitweb: http://git.kernel.org/tip/53b90c0c56b502056da83d768047dcf765bac9fb
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 11:17:47 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:10:57 +0200

kexec/crash: Say which char is the unrecognized

It is helpful when the crashkernel cmdline parsing routines
actually say which character is the unrecognized one. Make them
do so.

Signed-off-by: Borislav Petkov 
Reviewed-by: Dave Young 
Reviewed-by: Joerg Roedel 
Cc: Andrew Morton 
Cc: Andy Lutomirski 
Cc: Baoquan He 
Cc: H. Peter Anvin 
Cc: Jiri Kosina 
Cc: Juergen Gross 
Cc: Linus Torvalds 
Cc: Mark Salter 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Vivek Goyal 
Cc: WANG Chao 
Cc: jerry_hoem...@hp.com
Link: http://lkml.kernel.org/r/1445246268-26285-8-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 kernel/kexec_core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c
index 201b453..bd9f8a0 100644
--- a/kernel/kexec_core.c
+++ b/kernel/kexec_core.c
@@ -1149,7 +1149,7 @@ static int __init parse_crashkernel_simple(char *cmdline,
if (*cur == '@')
*crash_base = memparse(cur+1, );
else if (*cur != ' ' && *cur != '\0') {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
 
@@ -1186,12 +1186,12 @@ static int __init parse_crashkernel_suffix(char 
*cmdline,
 
/* check with suffix */
if (strncmp(cur, suffix, strlen(suffix))) {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
cur += strlen(suffix);
if (*cur != ' ' && *cur != '\0') {
-   pr_warn("crashkernel: unrecognized char\n");
+   pr_warn("crashkernel: unrecognized char: %c\n", *cur);
return -EINVAL;
}
 
--
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[tip:x86/cpu] x86/Kconfig/cpus: Fix/complete CPU type help texts

[tip-bot for Borislav Petkov]

Commit-ID:  221836e92cd5664de6fc2f1d836f6343ae5f2e43
Gitweb: http://git.kernel.org/tip/221836e92cd5664de6fc2f1d836f6343ae5f2e43
Author: Borislav Petkov 
AuthorDate: Mon, 19 Oct 2015 10:41:17 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:12:56 +0200

x86/Kconfig/cpus: Fix/complete CPU type help texts

Move the generic help text explaining each CPU type and what to
select under the "Processor Family" prompt and not under the
M486 option. Also, amend it with the missing options.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1445244077-25120-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig.cpu | 24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 6983314..3ba5ff2 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -3,10 +3,6 @@ choice
prompt "Processor family"
default M686 if X86_32
default GENERIC_CPU if X86_64
-
-config M486
-   bool "486"
-   depends on X86_32
---help---
  This is the processor type of your CPU. This information is
  used for optimizing purposes. In order to compile a kernel
@@ -23,9 +19,9 @@ config M486
 
  Here are the settings recommended for greatest speed:
  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
- SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
+   SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  - "586" for generic Pentium CPUs lacking the TSC
- (time stamp counter) register.
+   (time stamp counter) register.
  - "Pentium-Classic" for the Intel Pentium.
  - "Pentium-MMX" for the Intel Pentium MMX.
  - "Pentium-Pro" for the Intel Pentium Pro.
@@ -34,17 +30,31 @@ config M486
  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
+ - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
  - "Crusoe" for the Transmeta Crusoe series.
  - "Efficeon" for the Transmeta Efficeon series.
  - "Winchip-C6" for original IDT Winchip.
  - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
+ - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  - "Geode GX/LX" For AMD Geode GX and LX processors.
  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
  - "VIA C7" for VIA C7.
+ - "Intel P4" for the Pentium 4/Netburst microarchitecture.
+ - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
+ - "Intel Atom" for the Atom-microarchitecture CPUs.
+ - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
+
+ See each option's help text for additional details. If you don't know
+ what to do, choose "486".
 
- If you don't know what to do, choose "486".
+config M486
+   bool "486"
+   depends on X86_32
+   ---help---
+ Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
+ 486DX/DX2/DX4 or SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
 
 config M586
bool "586/K5/5x86/6x86/6x86MX"
--
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[tip:ras/core] MAINTAINERS: Unify the microcode driver section

[tip-bot for Borislav Petkov]

Commit-ID:  79ebdc9536c132eb92b4bcce26daaed7f4bf359e
Gitweb: http://git.kernel.org/tip/79ebdc9536c132eb92b4bcce26daaed7f4bf359e
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:49 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:13 +0200

MAINTAINERS: Unify the microcode driver section

Merge the AMD and Intel sections and generalize the file patterns.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 MAINTAINERS | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 5f46784..3a39ef4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,11 +654,6 @@ F: drivers/gpu/drm/radeon/radeon_kfd.c
 F: drivers/gpu/drm/radeon/radeon_kfd.h
 F: include/uapi/linux/kfd_ioctl.h
 
-AMD MICROCODE UPDATE SUPPORT
-M: Borislav Petkov 
-S: Maintained
-F: arch/x86/kernel/cpu/microcode/amd*
-
 AMD XGBE DRIVER
 M: Tom Lendacky 
 L: net...@vger.kernel.org
@@ -5430,12 +5425,6 @@ W:   https://01.org/linux-acpi
 S: Supported
 F: drivers/platform/x86/intel_menlow.c
 
-INTEL IA32 MICROCODE UPDATE SUPPORT
-M: Borislav Petkov 
-S: Maintained
-F: arch/x86/kernel/cpu/microcode/core*
-F: arch/x86/kernel/cpu/microcode/intel*
-
 INTEL I/OAT DMA DRIVER
 M: Dave Jiang 
 R: Dan Williams 
@@ -11451,6 +11440,11 @@ L: linux-e...@vger.kernel.org
 S: Maintained
 F: arch/x86/kernel/cpu/mcheck/*
 
+X86 MICROCODE UPDATE SUPPORT
+M: Borislav Petkov 
+S: Maintained
+F: arch/x86/kernel/cpu/microcode/*
+
 X86 VDSO
 M: Andy Lutomirski 
 L: linux-kernel@vger.kernel.org
--
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[tip:ras/core] x86/microcode/intel: Move #ifdef DEBUG inside the function

[tip-bot for Borislav Petkov]

Commit-ID:  c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Gitweb: http://git.kernel.org/tip/c595ac2bac930ce79f336c7a7e45e1ea38abfe16
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:48 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode/intel: Move #ifdef DEBUG inside the function

... and save us the stub.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/intel.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 3f32558..ce47402 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -389,9 +389,9 @@ static int collect_cpu_info_early(struct ucode_cpu_info 
*uci)
return 0;
 }
 
-#ifdef DEBUG
 static void show_saved_mc(void)
 {
+#ifdef DEBUG
int i, j;
unsigned int sig, pf, rev, total_size, data_size, date;
struct ucode_cpu_info uci;
@@ -449,12 +449,8 @@ static void show_saved_mc(void)
}
 
}
-}
-#else
-static inline void show_saved_mc(void)
-{
-}
 #endif
+}
 
 #ifdef CONFIG_HOTPLUG_CPU
 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
--
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[tip:ras/core] x86/microcode/amd: Remove maintainers from comments

[tip-bot for Borislav Petkov]

Commit-ID:  6f7fc44bf1eef6768f9dcb527c737ab24a3203ac
Gitweb: http://git.kernel.org/tip/6f7fc44bf1eef6768f9dcb527c737ab24a3203ac
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:47 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode/amd: Remove maintainers from comments

We have the MAINTAINERS file for that. Also, Andreas doesn't
have the time for this work anymore.

Signed-off-by: Borislav Petkov 
Cc: Andreas Herrmann 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-5-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/microcode/amd.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 6eeda7b..2233f8a 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -11,10 +11,6 @@
  *  Based on work by:
  *  Tigran Aivazian 
  *
- *  Maintainers:
- *  Andreas Herrmann 
- *  Borislav Petkov 
- *
  *  early loader:
  *  Copyright (C) 2013 Advanced Micro Devices, Inc.
  *
--
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[tip:ras/core] x86/microcode: Merge the early microcode loader

[tip-bot for Borislav Petkov]

Commit-ID:  fe055896c040df571e4ff56fb196d6845130057b
Gitweb: http://git.kernel.org/tip/fe055896c040df571e4ff56fb196d6845130057b
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:45 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode: Merge the early microcode loader

Merge the early loader functionality into the driver proper. The
diff is huge but logically, it is simply moving code from the
_early.c files into the main driver.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig|  19 +-
 arch/x86/include/asm/microcode.h|  19 +-
 arch/x86/include/asm/microcode_amd.h|   2 +-
 arch/x86/include/asm/microcode_intel.h  |  10 +-
 arch/x86/kernel/cpu/microcode/Makefile  |   3 -
 arch/x86/kernel/cpu/microcode/amd.c | 446 ++-
 arch/x86/kernel/cpu/microcode/amd_early.c   | 444 ---
 arch/x86/kernel/cpu/microcode/core.c| 160 +-
 arch/x86/kernel/cpu/microcode/core_early.c  | 170 --
 arch/x86/kernel/cpu/microcode/intel.c   | 788 ++-
 arch/x86/kernel/cpu/microcode/intel_early.c | 808 
 arch/x86/kernel/head_32.S   |   5 +-
 arch/x86/mm/init.c  |   2 -
 13 files changed, 1399 insertions(+), 1477 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fdf1f0c..255ea22 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1126,6 +1126,7 @@ config MICROCODE
bool "CPU microcode loading support"
default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
+   depends on BLK_DEV_INITRD
select FW_LOADER
---help---
 
@@ -1167,24 +1168,6 @@ config MICROCODE_OLD_INTERFACE
def_bool y
depends on MICROCODE
 
-config MICROCODE_INTEL_EARLY
-   bool
-
-config MICROCODE_AMD_EARLY
-   bool
-
-config MICROCODE_EARLY
-   bool "Early load microcode"
-   depends on MICROCODE && BLK_DEV_INITRD
-   select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
-   select MICROCODE_AMD_EARLY if MICROCODE_AMD
-   default y
-   help
- This option provides functionality to read additional microcode data
- at the beginning of initrd image. The data tells kernel to load
- microcode to CPU's as early as possible. No functional change if no
- microcode data is glued to the initrd, therefore it's safe to say Y.
-
 config X86_MSR
tristate "/dev/cpu/*/msr - Model-specific register support"
---help---
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index d1ff724f..9f953f7 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -81,7 +81,6 @@ static inline struct microcode_ops * __init 
init_amd_microcode(void)
 static inline void __exit exit_amd_microcode(void) {}
 #endif
 
-#ifdef CONFIG_MICROCODE_EARLY
 #define MAX_UCODE_COUNT 128
 
 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
@@ -156,22 +155,18 @@ static inline unsigned int x86_model(unsigned int sig)
return model;
 }
 
+#ifdef CONFIG_MICROCODE
 extern void __init load_ucode_bsp(void);
 extern void load_ucode_ap(void);
 extern int __init save_microcode_in_initrd(void);
 void reload_early_microcode(void);
 extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
 #else
-static inline void __init load_ucode_bsp(void) {}
-static inline void load_ucode_ap(void) {}
-static inline int __init save_microcode_in_initrd(void)
-{
-   return 0;
-}
-static inline void reload_early_microcode(void) {}
-static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name)
-{
-   return false;
-}
+static inline void __init load_ucode_bsp(void) { }
+static inline void load_ucode_ap(void) { }
+static inline int __init save_microcode_in_initrd(void){ 
return 0; }
+static inline void reload_early_microcode(void){ }
+static inline bool
+get_builtin_firmware(struct cpio_data *cd, const char *name)   { return false; 
}
 #endif
 #endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/include/asm/microcode_amd.h 

[tip:ras/core] x86/microcode: Remove modularization leftovers

[tip-bot for Borislav Petkov]

Commit-ID:  6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Gitweb: http://git.kernel.org/tip/6b26e1bf66bb4bf1b1b9b4f27d1f324875689cf0
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:46 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:12 +0200

x86/microcode: Remove modularization leftovers

Remove the remaining module functionality leftovers. Make
"dis_ucode_ldr" an early_param and make it static again. Drop
module aliases, autoloading table, description, etc.

Bump version number, while at it.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-4-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode.h  |  1 -
 arch/x86/kernel/cpu/microcode/amd.c   |  7 +-
 arch/x86/kernel/cpu/microcode/core.c  | 36 +--
 arch/x86/kernel/cpu/microcode/intel.c |  7 +-
 arch/x86/kernel/cpu/microcode/intel_lib.c |  1 -
 5 files changed, 12 insertions(+), 40 deletions(-)

diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 9f953f7..34e62b1 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -27,7 +27,6 @@ struct cpu_signature {
 struct device;
 
 enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
-extern bool dis_ucode_ldr;
 
 struct microcode_ops {
enum ucode_state (*request_microcode_user) (int cpu,
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 20297fb..6eeda7b 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -24,7 +24,7 @@
  *  Licensed under the terms of the GNU General Public
  *  License version 2. See file COPYING for details.
  */
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
 
 #include 
 #include 
@@ -32,7 +32,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include 
@@ -42,10 +41,6 @@
 #include 
 #include 
 
-MODULE_DESCRIPTION("AMD Microcode Update Driver");
-MODULE_AUTHOR("Peter Oruba");
-MODULE_LICENSE("GPL v2");
-
 static struct equiv_cpu_entry *equiv_cpu_table;
 
 struct ucode_patch {
diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 18848c7..7fc27f1 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -19,7 +19,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#define pr_fmt(fmt) "microcode: " fmt
 
 #include 
 #include 
@@ -27,7 +27,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -41,16 +40,18 @@
 #include 
 #include 
 
-MODULE_DESCRIPTION("Microcode Update Driver");
-MODULE_AUTHOR("Tigran Aivazian ");
-MODULE_LICENSE("GPL");
-
-#define MICROCODE_VERSION  "2.00"
+#define MICROCODE_VERSION  "2.01"
 
 static struct microcode_ops*microcode_ops;
 
-bool dis_ucode_ldr;
-module_param(dis_ucode_ldr, bool, 0);
+static bool dis_ucode_ldr;
+
+static int __init disable_loader(char *str)
+{
+   dis_ucode_ldr = true;
+   return 1;
+}
+__setup("dis_ucode_ldr", disable_loader);
 
 /*
  * Synchronization.
@@ -364,9 +365,6 @@ static void __exit microcode_dev_exit(void)
 {
misc_deregister(_dev);
 }
-
-MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
-MODULE_ALIAS("devname:cpu/microcode");
 #else
 #define microcode_dev_init()   0
 #define microcode_dev_exit()   do { } while (0)
@@ -617,20 +615,6 @@ static struct notifier_block mc_cpu_notifier = {
.notifier_call  = mc_cpu_callback,
 };
 
-#ifdef MODULE
-/* Autoload on Intel and AMD systems */
-static const struct x86_cpu_id __initconst microcode_id[] = {
-#ifdef CONFIG_MICROCODE_INTEL
-   { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
-#ifdef CONFIG_MICROCODE_AMD
-   { X86_VENDOR_AMD, X86_FAMILY_ANY, X86_MODEL_ANY, },
-#endif
-   {}
-};
-MODULE_DEVICE_TABLE(x86cpu, microcode_id);
-#endif
-
 static struct attribute *cpu_root_microcode_attrs[] = {
_attr_reload.attr,
NULL
diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index 2e09171..3f32558 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -21,7 +21,7 @@
  *
  *#define DEBUG
  */
-#define 

[tip:ras/core] x86/microcode: Unmodularize the microcode driver

[tip-bot for Borislav Petkov]

Commit-ID:  9a2bc335f100a0f6ee6392b9f97ac4188d84db1d
Gitweb: http://git.kernel.org/tip/9a2bc335f100a0f6ee6392b9f97ac4188d84db1d
Author: Borislav Petkov 
AuthorDate: Tue, 20 Oct 2015 11:54:44 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 21 Oct 2015 11:22:11 +0200

x86/microcode: Unmodularize the microcode driver

Make CONFIG_MICROCODE a bool. It was practically a bool already anyway,
since early loader was forcing it to =y.

Regardless, there's no real reason to have something be a module which
gets built-in on the majority of installations out there. And its not
like there's noticeable change in functionality - we still can load late
microcode - just the module glue disappears.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Arjan van de Ven 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Dave Jones 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Len Brown 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Rafael J. Wysocki 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1445334889-300-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Kconfig  |  5 +++--
 arch/x86/include/asm/microcode.h  |  6 ++
 arch/x86/kernel/cpu/microcode/amd.c   |  2 +-
 arch/x86/kernel/cpu/microcode/core.c  | 36 ++-
 arch/x86/kernel/cpu/microcode/intel.c |  2 +-
 arch/x86/kernel/setup.c   |  3 +++
 6 files changed, 16 insertions(+), 38 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 96d058a..fdf1f0c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1123,7 +1123,8 @@ config X86_REBOOTFIXUPS
  Say N otherwise.
 
 config MICROCODE
-   tristate "CPU microcode loading support"
+   bool "CPU microcode loading support"
+   default y
depends on CPU_SUP_AMD || CPU_SUP_INTEL
select FW_LOADER
---help---
@@ -1174,7 +1175,7 @@ config MICROCODE_AMD_EARLY
 
 config MICROCODE_EARLY
bool "Early load microcode"
-   depends on MICROCODE=y && BLK_DEV_INITRD
+   depends on MICROCODE && BLK_DEV_INITRD
select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
select MICROCODE_AMD_EARLY if MICROCODE_AMD
default y
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 9e6278c..d1ff724f 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -55,6 +55,12 @@ struct ucode_cpu_info {
 };
 extern struct ucode_cpu_info ucode_cpu_info[];
 
+#ifdef CONFIG_MICROCODE
+int __init microcode_init(void);
+#else
+static inline int __init microcode_init(void)  { return 0; };
+#endif
+
 #ifdef CONFIG_MICROCODE_INTEL
 extern struct microcode_ops * __init init_intel_microcode(void);
 #else
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index da922d1..5dcce5d 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -523,7 +523,7 @@ static struct microcode_ops microcode_amd_ops = {
 
 struct microcode_ops * __init init_amd_microcode(void)
 {
-   struct cpuinfo_x86 *c = _data(0);
+   struct cpuinfo_x86 *c = _cpu_data;
 
if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
diff --git a/arch/x86/kernel/cpu/microcode/core.c 
b/arch/x86/kernel/cpu/microcode/core.c
index 9e3f3c7..15491dd 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -487,9 +487,9 @@ static struct attribute_group cpu_root_microcode_group = {
.attrs = cpu_root_microcode_attrs,
 };
 
-static int __init microcode_init(void)
+int __init microcode_init(void)
 {
-   struct cpuinfo_x86 *c = _data(0);
+   struct cpuinfo_x86 *c = _cpu_data;
int error;
 
if (paravirt_enabled() || dis_ucode_ldr)
@@ -560,35 +560,3 @@ static int __init microcode_init(void)
return error;
 
 }
-module_init(microcode_init);
-
-static void __exit microcode_exit(void)
-{
-   struct cpuinfo_x86 *c = _data(0);
-
-   microcode_dev_exit();
-
-   unregister_hotcpu_notifier(_cpu_notifier);
-   unregister_syscore_ops(_syscore_ops);
-
-   sysfs_remove_group(_subsys.dev_root->kobj,
-  _root_microcode_group);
-
-   get_online_cpus();
-   mutex_lock(_mutex);
-
-   subsys_interface_unregister(_cpu_interface);
-
-   mutex_unlock(_mutex);
-   put_online_cpus();
-
-   platform_device_unregister(microcode_pdev);
-
-   microcode_ops = NULL;
-
-   if (c->x86_vendor == X86_VENDOR_AMD)
-   

[tip:ras/core] x86/microcode/amd: Do not overwrite final patch levels

[tip-bot for Borislav Petkov]

Commit-ID:  0399f73299f1b7e04de329050f7111b362b7eeb5
Gitweb: http://git.kernel.org/tip/0399f73299f1b7e04de329050f7111b362b7eeb5
Author: Borislav Petkov 
AuthorDate: Mon, 12 Oct 2015 11:22:42 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 12 Oct 2015 16:15:48 +0200

x86/microcode/amd: Do not overwrite final patch levels

A certain number of patch levels of applied microcode should not
be overwritten by the microcode loader, otherwise bad things
will happen.

Check those and abort update if the current core has one of
those final patch levels applied by the BIOS. 32-bit needs
special handling, of course.

See https://bugzilla.suse.com/show_bug.cgi?id=913996 for more
info.

Tested-by: Peter Kirchgeßner 
Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1444641762-9437-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  2 +-
 arch/x86/kernel/cpu/microcode/amd.c   | 38 +++
 arch/x86/kernel/cpu/microcode/amd_early.c | 13 ---
 3 files changed, 44 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index 9b214e1..d3e86cf 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,5 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
-extern bool check_current_patch_level(u32 *rev);
+extern bool check_current_patch_level(u32 *rev, bool early);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 2d63013..da922d1 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -178,6 +178,16 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
 }
 
 /*
+ * Those patch levels cannot be updated to newer ones and thus should be final.
+ */
+static u32 final_levels[] = {
+   0x0198,
+   0x019f,
+   0x01af,
+   0, /* T-101 terminator */
+};
+
+/*
  * Check the current patch level on this CPU.
  *
  * @rev: Use it to return the patch level. It is set to 0 in the case of
@@ -187,13 +197,31 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
  *  - true: if update should stop
  *  - false: otherwise
  */
-bool check_current_patch_level(u32 *rev)
+bool check_current_patch_level(u32 *rev, bool early)
 {
-   u32 dummy;
+   u32 lvl, dummy, i;
+   bool ret = false;
+   u32 *levels;
+
+   native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
+
+   if (IS_ENABLED(CONFIG_X86_32) && early)
+   levels = (u32 *)__pa_nodebug(_levels);
+   else
+   levels = final_levels;
+
+   for (i = 0; levels[i]; i++) {
+   if (lvl == levels[i]) {
+   lvl = 0;
+   ret = true;
+   break;
+   }
+   }
 
-   native_rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+   if (rev)
+   *rev = lvl;
 
-   return false;
+   return ret;
 }
 
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
@@ -229,7 +257,7 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, false))
return -1;
 
/* need to apply patch? */
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index abb9009..a54a47b 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,7 +196,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, true))
return;
 
while (left > 0) {
@@ -330,7 +330,10 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   if (check_current_patch_level())
+   /*
+* 64-bit runs with paging enabled, thus early==false.
+*/
+   if (check_current_patch_level(, false))
return;
 
eax = cpuid_eax(0x0001);
@@ -422,7 +425,11 @@ void reload_ucode_amd(void)
struct microcode_amd *mc;
u32 rev;
 
-   if (check_current_patch_level())
+   /*
+* early==false because this is a syscore ->resume path and by
+* that time paging is long enabled.
+*/
+   if (check_current_patch_level(, false))
return;
 
mc = (struct microcode_amd *)amd_ucode_patch;
--
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More majordomo 

[tip:ras/core] x86/microcode/amd: Extract current patch level read to a function

[tip-bot for Borislav Petkov]

Commit-ID:  2eff73c0a11f19ff082a566e3429fbaaca7b8e7b
Gitweb: http://git.kernel.org/tip/2eff73c0a11f19ff082a566e3429fbaaca7b8e7b
Author: Borislav Petkov 
AuthorDate: Mon, 12 Oct 2015 11:22:41 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 12 Oct 2015 16:15:48 +0200

x86/microcode/amd: Extract current patch level read to a function

Pave the way for checking the current patch level of the
microcode in a core. We want to be able to do stuff depending on
the patch level - in this case decide whether to update or not.
But that will be added in a later patch.

Drop unused local var uci assignment, while at it.

Integrate a fix for 32-bit and CONFIG_PARAVIRT from Takashi Iwai:

 Use native_rdmsr() in check_current_patch_level() because with
 CONFIG_PARAVIRT enabled and on 32-bit, where we run before
 paging has been enabled, we cannot deref pv_info yet. Or we
 could, but we'd need to access its physical address. This way of
 fixing it is simpler. See:

   https://bugzilla.suse.com/show_bug.cgi?id=943179 for the background.

Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Takashi Iwai :
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1444641762-9437-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  1 +
 arch/x86/kernel/cpu/microcode/amd.c   | 24 ++--
 arch/x86/kernel/cpu/microcode/amd_early.c | 17 +++--
 3 files changed, 30 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index ac6d328..9b214e1 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,4 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
+extern bool check_current_patch_level(u32 *rev);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 12829c3..2d63013 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -177,6 +177,25 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
return patch_size;
 }
 
+/*
+ * Check the current patch level on this CPU.
+ *
+ * @rev: Use it to return the patch level. It is set to 0 in the case of
+ * error.
+ *
+ * Returns:
+ *  - true: if update should stop
+ *  - false: otherwise
+ */
+bool check_current_patch_level(u32 *rev)
+{
+   u32 dummy;
+
+   native_rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+
+   return false;
+}
+
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
 {
u32 rev, dummy;
@@ -197,7 +216,7 @@ int apply_microcode_amd(int cpu)
struct microcode_amd *mc_amd;
struct ucode_cpu_info *uci;
struct ucode_patch *p;
-   u32 rev, dummy;
+   u32 rev;
 
BUG_ON(raw_smp_processor_id() != cpu);
 
@@ -210,7 +229,8 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+   if (check_current_patch_level())
+   return -1;
 
/* need to apply patch? */
if (rev >= mc_amd->hdr.patch_id) {
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index e8a215a..abb9009 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,9 +196,8 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   /* find ucode and update if needed */
-
-   native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
+   if (check_current_patch_level())
+   return;
 
while (left > 0) {
struct microcode_amd *mc;
@@ -319,7 +318,6 @@ static void __init get_bsp_sig(void)
 void load_ucode_amd_ap(void)
 {
unsigned int cpu = smp_processor_id();
-   struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
struct equiv_cpu_entry *eq;
struct microcode_amd *mc;
u32 rev, eax;
@@ -332,10 +330,8 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
-
-   uci->cpu_sig.rev = rev;
-   uci->cpu_sig.sig = eax;
+   if (check_current_patch_level())
+   return;
 
eax = cpuid_eax(0x0001);
eq  = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ);
@@ -424,9 +420,10 @@ int __init save_microcode_in_initrd_amd(void)
 void reload_ucode_amd(void)
 {
struct microcode_amd *mc;
-   u32 rev, eax;
+   u32 rev;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
+   if (check_current_patch_level())
+   return;
 
mc = (struct microcode_amd *)amd_ucode_patch;
 
--
To unsubscribe from this list: send the 

[tip:ras/core] x86/microcode/amd: Extract current patch level read to a function

[tip-bot for Borislav Petkov]

Commit-ID:  2eff73c0a11f19ff082a566e3429fbaaca7b8e7b
Gitweb: http://git.kernel.org/tip/2eff73c0a11f19ff082a566e3429fbaaca7b8e7b
Author: Borislav Petkov 
AuthorDate: Mon, 12 Oct 2015 11:22:41 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 12 Oct 2015 16:15:48 +0200

x86/microcode/amd: Extract current patch level read to a function

Pave the way for checking the current patch level of the
microcode in a core. We want to be able to do stuff depending on
the patch level - in this case decide whether to update or not.
But that will be added in a later patch.

Drop unused local var uci assignment, while at it.

Integrate a fix for 32-bit and CONFIG_PARAVIRT from Takashi Iwai:

 Use native_rdmsr() in check_current_patch_level() because with
 CONFIG_PARAVIRT enabled and on 32-bit, where we run before
 paging has been enabled, we cannot deref pv_info yet. Or we
 could, but we'd need to access its physical address. This way of
 fixing it is simpler. See:

   https://bugzilla.suse.com/show_bug.cgi?id=943179 for the background.

Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Takashi Iwai :
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1444641762-9437-6-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  1 +
 arch/x86/kernel/cpu/microcode/amd.c   | 24 ++--
 arch/x86/kernel/cpu/microcode/amd_early.c | 17 +++--
 3 files changed, 30 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index ac6d328..9b214e1 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,4 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
+extern bool check_current_patch_level(u32 *rev);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 12829c3..2d63013 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -177,6 +177,25 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
return patch_size;
 }
 
+/*
+ * Check the current patch level on this CPU.
+ *
+ * @rev: Use it to return the patch level. It is set to 0 in the case of
+ * error.
+ *
+ * Returns:
+ *  - true: if update should stop
+ *  - false: otherwise
+ */
+bool check_current_patch_level(u32 *rev)
+{
+   u32 dummy;
+
+   native_rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+
+   return false;
+}
+
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
 {
u32 rev, dummy;
@@ -197,7 +216,7 @@ int apply_microcode_amd(int cpu)
struct microcode_amd *mc_amd;
struct ucode_cpu_info *uci;
struct ucode_patch *p;
-   u32 rev, dummy;
+   u32 rev;
 
BUG_ON(raw_smp_processor_id() != cpu);
 
@@ -210,7 +229,8 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+   if (check_current_patch_level())
+   return -1;
 
/* need to apply patch? */
if (rev >= mc_amd->hdr.patch_id) {
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index e8a215a..abb9009 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,9 +196,8 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   /* find ucode and update if needed */
-
-   native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
+   if (check_current_patch_level())
+   return;
 
while (left > 0) {
struct microcode_amd *mc;
@@ -319,7 +318,6 @@ static void __init get_bsp_sig(void)
 void load_ucode_amd_ap(void)
 {
unsigned int cpu = smp_processor_id();
-   struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
struct equiv_cpu_entry *eq;
struct microcode_amd *mc;
u32 rev, eax;
@@ -332,10 +330,8 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
-
-   uci->cpu_sig.rev = rev;
-   uci->cpu_sig.sig = eax;
+   if (check_current_patch_level())
+   return;
 
eax = cpuid_eax(0x0001);
eq  = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ);
@@ -424,9 +420,10 @@ int __init save_microcode_in_initrd_amd(void)
 void reload_ucode_amd(void)
 {
struct microcode_amd *mc;
-   u32 rev, eax;
+   u32 rev;
 
-   

[tip:ras/core] x86/microcode/amd: Do not overwrite final patch levels

[tip-bot for Borislav Petkov]

Commit-ID:  0399f73299f1b7e04de329050f7111b362b7eeb5
Gitweb: http://git.kernel.org/tip/0399f73299f1b7e04de329050f7111b362b7eeb5
Author: Borislav Petkov 
AuthorDate: Mon, 12 Oct 2015 11:22:42 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 12 Oct 2015 16:15:48 +0200

x86/microcode/amd: Do not overwrite final patch levels

A certain number of patch levels of applied microcode should not
be overwritten by the microcode loader, otherwise bad things
will happen.

Check those and abort update if the current core has one of
those final patch levels applied by the BIOS. 32-bit needs
special handling, of course.

See https://bugzilla.suse.com/show_bug.cgi?id=913996 for more
info.

Tested-by: Peter Kirchgeßner 
Signed-off-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1444641762-9437-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  2 +-
 arch/x86/kernel/cpu/microcode/amd.c   | 38 +++
 arch/x86/kernel/cpu/microcode/amd_early.c | 13 ---
 3 files changed, 44 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index 9b214e1..d3e86cf 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,5 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
-extern bool check_current_patch_level(u32 *rev);
+extern bool check_current_patch_level(u32 *rev, bool early);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 2d63013..da922d1 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -178,6 +178,16 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
 }
 
 /*
+ * Those patch levels cannot be updated to newer ones and thus should be final.
+ */
+static u32 final_levels[] = {
+   0x0198,
+   0x019f,
+   0x01af,
+   0, /* T-101 terminator */
+};
+
+/*
  * Check the current patch level on this CPU.
  *
  * @rev: Use it to return the patch level. It is set to 0 in the case of
@@ -187,13 +197,31 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
  *  - true: if update should stop
  *  - false: otherwise
  */
-bool check_current_patch_level(u32 *rev)
+bool check_current_patch_level(u32 *rev, bool early)
 {
-   u32 dummy;
+   u32 lvl, dummy, i;
+   bool ret = false;
+   u32 *levels;
+
+   native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
+
+   if (IS_ENABLED(CONFIG_X86_32) && early)
+   levels = (u32 *)__pa_nodebug(_levels);
+   else
+   levels = final_levels;
+
+   for (i = 0; levels[i]; i++) {
+   if (lvl == levels[i]) {
+   lvl = 0;
+   ret = true;
+   break;
+   }
+   }
 
-   native_rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+   if (rev)
+   *rev = lvl;
 
-   return false;
+   return ret;
 }
 
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
@@ -229,7 +257,7 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, false))
return -1;
 
/* need to apply patch? */
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index abb9009..a54a47b 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,7 +196,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, true))
return;
 
while (left > 0) {
@@ -330,7 +330,10 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   if (check_current_patch_level())
+   /*
+* 64-bit runs with paging enabled, thus early==false.
+*/
+   if (check_current_patch_level(, false))
return;
 
eax = cpuid_eax(0x0001);
@@ -422,7 +425,11 @@ void reload_ucode_amd(void)
struct microcode_amd *mc;
u32 rev;
 
-   if (check_current_patch_level())
+   /*
+* early==false because this is a syscore ->resume path and by
+* that time paging is long enabled.
+*/
+   if (check_current_patch_level(, false))
  

[tip:x86/asm] x86/entry/64/compat: Document sysenter_fix_flags' s reason for existence

[tip-bot for Borislav Petkov]

Commit-ID:  374a3a3916a70fc6236bc2b8f8ac02548a128a54
Gitweb: http://git.kernel.org/tip/374a3a3916a70fc6236bc2b8f8ac02548a128a54
Author: Borislav Petkov 
AuthorDate: Fri, 9 Oct 2015 19:08:59 +0200
Committer:  Ingo Molnar 
CommitDate: Sun, 11 Oct 2015 11:06:40 +0200

x86/entry/64/compat: Document sysenter_fix_flags's reason for existence

The code under the label can normally be inline, without the
jumping back and forth but the latter is an optimization.

Document that.

Signed-off-by: Borislav Petkov 
Acked-by: Andy Lutomirski 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20151009170859.ga24...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/entry_64_compat.S | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index cf9641c..92b0b27 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -102,6 +102,12 @@ ENTRY(entry_SYSENTER_compat)
 * NT was set instead of doing an unconditional popfq.
 * This needs to happen before enabling interrupts so that
 * we don't get preempted with NT set.
+*
+* NB.: sysenter_fix_flags is a label with the code under it moved
+* out-of-line as an optimization: NT is unlikely to be set in the
+* majority of the cases and instead of polluting the I$ unnecessarily,
+* we're keeping that code behind a branch which will predict as
+* not-taken and therefore its instructions won't be fetched.
 */
testl   $X86_EFLAGS_NT, EFLAGS(%rsp)
jnz sysenter_fix_flags
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/asm] x86/entry/64/compat: Document sysenter_fix_flags' s reason for existence

[tip-bot for Borislav Petkov]

Commit-ID:  374a3a3916a70fc6236bc2b8f8ac02548a128a54
Gitweb: http://git.kernel.org/tip/374a3a3916a70fc6236bc2b8f8ac02548a128a54
Author: Borislav Petkov 
AuthorDate: Fri, 9 Oct 2015 19:08:59 +0200
Committer:  Ingo Molnar 
CommitDate: Sun, 11 Oct 2015 11:06:40 +0200

x86/entry/64/compat: Document sysenter_fix_flags's reason for existence

The code under the label can normally be inline, without the
jumping back and forth but the latter is an optimization.

Document that.

Signed-off-by: Borislav Petkov 
Acked-by: Andy Lutomirski 
Cc: Andy Lutomirski 
Cc: Borislav Petkov 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20151009170859.ga24...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/entry_64_compat.S | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index cf9641c..92b0b27 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -102,6 +102,12 @@ ENTRY(entry_SYSENTER_compat)
 * NT was set instead of doing an unconditional popfq.
 * This needs to happen before enabling interrupts so that
 * we don't get preempted with NT set.
+*
+* NB.: sysenter_fix_flags is a label with the code under it moved
+* out-of-line as an optimization: NT is unlikely to be set in the
+* majority of the cases and instead of polluting the I$ unnecessarily,
+* we're keeping that code behind a branch which will predict as
+* not-taken and therefore its instructions won't be fetched.
 */
testl   $X86_EFLAGS_NT, EFLAGS(%rsp)
jnz sysenter_fix_flags
--
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[tip:x86/fpu] x86/fpu: Fixup uninitialized feature_name warning

[tip-bot for Borislav Petkov]

Commit-ID:  158ecc39185b885420e5136b803b29be2bbec7fb
Gitweb: http://git.kernel.org/tip/158ecc39185b885420e5136b803b29be2bbec7fb
Author: Borislav Petkov 
AuthorDate: Wed, 23 Sep 2015 12:49:01 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 24 Sep 2015 09:21:20 +0200

x86/fpu: Fixup uninitialized feature_name warning

Hand in _name to cpu_has_xfeatures() as it is supposed
to. Fixes an uninitialized warning.

Signed-off-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: brge...@gmail.com
Cc: dvlas...@redhat.com
Cc: fenghua...@intel.com
Cc: l...@amacapital.net
Cc: tim.c.c...@linux.intel.com
Fixes: d91cab78133d ("x86/fpu: Rename XSAVE macros")
Link: http://lkml.kernel.org/r/20150923104901.ga3...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/crypto/twofish_avx_glue.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/crypto/twofish_avx_glue.c 
b/arch/x86/crypto/twofish_avx_glue.c
index 6f3738c..b7a3904 100644
--- a/arch/x86/crypto/twofish_avx_glue.c
+++ b/arch/x86/crypto/twofish_avx_glue.c
@@ -558,7 +558,7 @@ static int __init twofish_init(void)
 {
const char *feature_name;
 
-   if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
+   if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, 
_name)) {
pr_info("CPU feature '%s' is not supported.\n", feature_name);
return -ENODEV;
}
--
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[tip:x86/fpu] x86/fpu: Fixup uninitialized feature_name warning

[tip-bot for Borislav Petkov]

Commit-ID:  158ecc39185b885420e5136b803b29be2bbec7fb
Gitweb: http://git.kernel.org/tip/158ecc39185b885420e5136b803b29be2bbec7fb
Author: Borislav Petkov 
AuthorDate: Wed, 23 Sep 2015 12:49:01 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 24 Sep 2015 09:21:20 +0200

x86/fpu: Fixup uninitialized feature_name warning

Hand in _name to cpu_has_xfeatures() as it is supposed
to. Fixes an uninitialized warning.

Signed-off-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: brge...@gmail.com
Cc: dvlas...@redhat.com
Cc: fenghua...@intel.com
Cc: l...@amacapital.net
Cc: tim.c.c...@linux.intel.com
Fixes: d91cab78133d ("x86/fpu: Rename XSAVE macros")
Link: http://lkml.kernel.org/r/20150923104901.ga3...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/crypto/twofish_avx_glue.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/crypto/twofish_avx_glue.c 
b/arch/x86/crypto/twofish_avx_glue.c
index 6f3738c..b7a3904 100644
--- a/arch/x86/crypto/twofish_avx_glue.c
+++ b/arch/x86/crypto/twofish_avx_glue.c
@@ -558,7 +558,7 @@ static int __init twofish_init(void)
 {
const char *feature_name;
 
-   if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
+   if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, 
_name)) {
pr_info("CPU feature '%s' is not supported.\n", feature_name);
return -ENODEV;
}
--
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[tip:x86/asm] x86/entry/vsyscall: Fix undefined symbol warning

[tip-bot for Borislav Petkov]

Commit-ID:  93f13a9f96771a064c716364aebc6e283b186eb8
Gitweb: http://git.kernel.org/tip/93f13a9f96771a064c716364aebc6e283b186eb8
Author: Borislav Petkov 
AuthorDate: Mon, 21 Sep 2015 09:48:29 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 21 Sep 2015 09:56:59 +0200

x86/entry/vsyscall: Fix undefined symbol warning

Commit:

  3dc33bd30f3e1 ("x86/entry/vsyscall: Add CONFIG to control default")

did the ifdef/elif thing but GCC doesn't like that:

  arch/x86/entry/vsyscall/vsyscall_64.c:44:7: warning: 
"CONFIG_LEGACY_VSYSCALL_NONE" is not defined [-Wundef]
   #elif CONFIG_LEGACY_VSYSCALL_NONE
 ^

Use defined() instead.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Josh Triplett 
Cc: Kees Cook 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20150921074829.ga3...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/vsyscall/vsyscall_64.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c 
b/arch/x86/entry/vsyscall/vsyscall_64.c
index 76e0fd3..174c254 100644
--- a/arch/x86/entry/vsyscall/vsyscall_64.c
+++ b/arch/x86/entry/vsyscall/vsyscall_64.c
@@ -39,9 +39,9 @@
 #include "vsyscall_trace.h"
 
 static enum { EMULATE, NATIVE, NONE } vsyscall_mode =
-#ifdef CONFIG_LEGACY_VSYSCALL_NATIVE
+#if defined(CONFIG_LEGACY_VSYSCALL_NATIVE)
NATIVE;
-#elif CONFIG_LEGACY_VSYSCALL_NONE
+#elif defined(CONFIG_LEGACY_VSYSCALL_NONE)
NONE;
 #else
EMULATE;
--
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[tip:x86/asm] x86/entry/vsyscall: Fix undefined symbol warning

[tip-bot for Borislav Petkov]

Commit-ID:  93f13a9f96771a064c716364aebc6e283b186eb8
Gitweb: http://git.kernel.org/tip/93f13a9f96771a064c716364aebc6e283b186eb8
Author: Borislav Petkov 
AuthorDate: Mon, 21 Sep 2015 09:48:29 +0200
Committer:  Ingo Molnar 
CommitDate: Mon, 21 Sep 2015 09:56:59 +0200

x86/entry/vsyscall: Fix undefined symbol warning

Commit:

  3dc33bd30f3e1 ("x86/entry/vsyscall: Add CONFIG to control default")

did the ifdef/elif thing but GCC doesn't like that:

  arch/x86/entry/vsyscall/vsyscall_64.c:44:7: warning: 
"CONFIG_LEGACY_VSYSCALL_NONE" is not defined [-Wundef]
   #elif CONFIG_LEGACY_VSYSCALL_NONE
 ^

Use defined() instead.

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Brian Gerst 
Cc: Denys Vlasenko 
Cc: H. Peter Anvin 
Cc: Josh Triplett 
Cc: Kees Cook 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/20150921074829.ga3...@pd.tnic
Signed-off-by: Ingo Molnar 
---
 arch/x86/entry/vsyscall/vsyscall_64.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c 
b/arch/x86/entry/vsyscall/vsyscall_64.c
index 76e0fd3..174c254 100644
--- a/arch/x86/entry/vsyscall/vsyscall_64.c
+++ b/arch/x86/entry/vsyscall/vsyscall_64.c
@@ -39,9 +39,9 @@
 #include "vsyscall_trace.h"
 
 static enum { EMULATE, NATIVE, NONE } vsyscall_mode =
-#ifdef CONFIG_LEGACY_VSYSCALL_NATIVE
+#if defined(CONFIG_LEGACY_VSYSCALL_NATIVE)
NATIVE;
-#elif CONFIG_LEGACY_VSYSCALL_NONE
+#elif defined(CONFIG_LEGACY_VSYSCALL_NONE)
NONE;
 #else
EMULATE;
--
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[tip:x86/urgent] x86/cpu: Print family/model/stepping in hex

[tip-bot for Borislav Petkov]

Commit-ID:  7c5b190e115a2f7a51a85f261e7d7dca4b4bbe64
Gitweb: http://git.kernel.org/tip/7c5b190e115a2f7a51a85f261e7d7dca4b4bbe64
Author: Borislav Petkov 
AuthorDate: Thu, 10 Sep 2015 21:55:27 +0200
Committer:  Ingo Molnar 
CommitDate: Sun, 13 Sep 2015 09:30:07 +0200

x86/cpu: Print family/model/stepping in hex

924e101a7ab6 ("x86/debug: Dump family, model, stepping of the
boot CPU") had its good intentions to dump the exact F/M/S as an
aid during debugging sessions but its output can be ambiguous.
Fix that:

-smpboot: CPU0: Intel Core Processor (Broadwell) (fam: 06, model: 47, stepping: 
02)
+smpboot: CPU0: Intel Core Processor (Broadwell) (family: 0x6, model: 0x47, 
stepping: 0x2)

Also, spell out "family".

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1441914927-32037-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 07ce52c..de22ea7 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1110,10 +1110,10 @@ void print_cpu_info(struct cpuinfo_x86 *c)
else
printk(KERN_CONT "%d86", c->x86);
 
-   printk(KERN_CONT " (fam: %02x, model: %02x", c->x86, c->x86_model);
+   printk(KERN_CONT " (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
 
if (c->x86_mask || c->cpuid_level >= 0)
-   printk(KERN_CONT ", stepping: %02x)\n", c->x86_mask);
+   printk(KERN_CONT ", stepping: 0x%x)\n", c->x86_mask);
else
printk(KERN_CONT ")\n");
 
--
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[tip:x86/urgent] x86/cpu: Print family/model/stepping in hex

[tip-bot for Borislav Petkov]

Commit-ID:  7c5b190e115a2f7a51a85f261e7d7dca4b4bbe64
Gitweb: http://git.kernel.org/tip/7c5b190e115a2f7a51a85f261e7d7dca4b4bbe64
Author: Borislav Petkov 
AuthorDate: Thu, 10 Sep 2015 21:55:27 +0200
Committer:  Ingo Molnar 
CommitDate: Sun, 13 Sep 2015 09:30:07 +0200

x86/cpu: Print family/model/stepping in hex

924e101a7ab6 ("x86/debug: Dump family, model, stepping of the
boot CPU") had its good intentions to dump the exact F/M/S as an
aid during debugging sessions but its output can be ambiguous.
Fix that:

-smpboot: CPU0: Intel Core Processor (Broadwell) (fam: 06, model: 47, stepping: 
02)
+smpboot: CPU0: Intel Core Processor (Broadwell) (family: 0x6, model: 0x47, 
stepping: 0x2)

Also, spell out "family".

Signed-off-by: Borislav Petkov 
Cc: Andy Lutomirski 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1441914927-32037-1-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 07ce52c..de22ea7 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1110,10 +1110,10 @@ void print_cpu_info(struct cpuinfo_x86 *c)
else
printk(KERN_CONT "%d86", c->x86);
 
-   printk(KERN_CONT " (fam: %02x, model: %02x", c->x86, c->x86_model);
+   printk(KERN_CONT " (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
 
if (c->x86_mask || c->cpuid_level >= 0)
-   printk(KERN_CONT ", stepping: %02x)\n", c->x86_mask);
+   printk(KERN_CONT ", stepping: 0x%x)\n", c->x86_mask);
else
printk(KERN_CONT ")\n");
 
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:ras/core] x86/ras: Move AMD MCE injector to arch/x86/ras/

[tip-bot for Borislav Petkov]

Commit-ID:  6c36dfe949187dc2729abfad4b083758ac5c2e0e
Gitweb: http://git.kernel.org/tip/6c36dfe949187dc2729abfad4b083758ac5c2e0e
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:45 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:54 +0200

x86/ras: Move AMD MCE injector to arch/x86/ras/

This is an x86-specific module and would benefit from being
closer to the arch code. Move it there. Update copyright while
at it.

Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1439396985-12812-14-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/Makefile|  2 ++
 arch/x86/ras/Kconfig | 11 +++
 arch/x86/ras/Makefile|  2 ++
 {drivers/edac => arch/x86/ras}/mce_amd_inj.c |  6 +++---
 drivers/edac/Kconfig | 10 --
 drivers/edac/Makefile|  1 -
 drivers/ras/Kconfig  |  3 +++
 7 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 118e6de..0f38418 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -212,6 +212,8 @@ drivers-$(CONFIG_PM) += arch/x86/power/
 
 drivers-$(CONFIG_FB) += arch/x86/video/
 
+drivers-$(CONFIG_RAS) += arch/x86/ras/
+
 
 # boot loader support. Several targets are kept for legacy purposes
 
diff --git a/arch/x86/ras/Kconfig b/arch/x86/ras/Kconfig
new file mode 100644
index 000..10fea5f
--- /dev/null
+++ b/arch/x86/ras/Kconfig
@@ -0,0 +1,11 @@
+config AMD_MCE_INJ
+   tristate "Simple MCE injection interface for AMD processors"
+   depends on RAS && EDAC_DECODE_MCE && DEBUG_FS
+   default n
+   help
+ This is a simple debugfs interface to inject MCEs and test different
+ aspects of the MCE handling code.
+
+ WARNING: Do not even assume this interface is staying stable!
+
+
diff --git a/arch/x86/ras/Makefile b/arch/x86/ras/Makefile
new file mode 100644
index 000..dd2c98b
--- /dev/null
+++ b/arch/x86/ras/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_AMD_MCE_INJ)  += mce_amd_inj.o
+
diff --git a/drivers/edac/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
similarity index 98%
rename from drivers/edac/mce_amd_inj.c
rename to arch/x86/ras/mce_amd_inj.c
index 4c73e4d0..17e35b5 100644
--- a/drivers/edac/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -6,7 +6,7 @@
  * This file may be distributed under the terms of the GNU General Public
  * License version 2.
  *
- * Copyright (c) 2010-14:  Borislav Petkov 
+ * Copyright (c) 2010-15:  Borislav Petkov 
  * Advanced Micro Devices Inc.
  */
 
@@ -19,7 +19,7 @@
 #include 
 #include 
 
-#include "mce_amd.h"
+#include "../kernel/cpu/mcheck/mce-internal.h"
 
 /*
  * Collect all the MCi_XXX settings
@@ -195,7 +195,7 @@ static void do_inject(void)
i_mce.status |= MCI_STATUS_MISCV;
 
if (inj_type == SW_INJ) {
-   amd_decode_mce(NULL, 0, _mce);
+   mce_inject_log(_mce);
return;
}
 
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 8677ead..ef25000 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -61,16 +61,6 @@ config EDAC_DECODE_MCE
  which occur really early upon boot, before the module infrastructure
  has been initialized.
 
-config EDAC_MCE_INJ
-   tristate "Simple MCE injection interface"
-   depends on EDAC_DECODE_MCE && DEBUG_FS
-   default n
-   help
- This is a simple debugfs interface to inject MCEs and test different
- aspects of the MCE handling code.
-
- WARNING: Do not even assume this interface is staying stable!
-
 config EDAC_MM_EDAC
tristate "Main Memory EDAC (Error Detection And Correction) reporting"
select RAS
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 28ef2a5..ae3c5f3 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -17,7 +17,6 @@ edac_core-y   += edac_pci.o edac_pci_sysfs.o
 endif
 
 obj-$(CONFIG_EDAC_GHES)+= ghes_edac.o
-obj-$(CONFIG_EDAC_MCE_INJ) += mce_amd_inj.o
 
 edac_mce_amd-y := mce_amd.o
 obj-$(CONFIG_EDAC_DECODE_MCE)  += edac_mce_amd.o
diff --git a/drivers/ras/Kconfig b/drivers/ras/Kconfig
index e5f0a43..4c3c67d 100644
--- a/drivers/ras/Kconfig
+++ b/drivers/ras/Kconfig
@@ -29,4 +29,7 @@ menuconfig RAS
  data corruption.
 
 if RAS
+
+source arch/x86/ras/Kconfig
+
 endif
--
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[tip:ras/core] x86/mce: Add a wrapper around mce_log() for injection

[tip-bot for Borislav Petkov]

Commit-ID:  a79da38494ec23f1a7d6ee734e07e9575fd18b58
Gitweb: http://git.kernel.org/tip/a79da38494ec23f1a7d6ee734e07e9575fd18b58
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:44 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

x86/mce: Add a wrapper around mce_log() for injection

Will be used by an injector module in a following patch.

Additionally, add a missing module export reported by 0-DAY
kernel test.

Reported-by: kbuild test robot 
Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1439396985-12812-13-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce-internal.h | 2 ++
 arch/x86/kernel/cpu/mcheck/mce.c  | 8 
 2 files changed, 10 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h 
b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index ea8b622..547720e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -79,3 +79,5 @@ static inline int apei_clear_mce(u64 record_id)
return -EINVAL;
 }
 #endif
+
+void mce_inject_log(struct mce *m);
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index b979711..e4e6646 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -199,6 +199,14 @@ void mce_log(struct mce *mce)
set_bit(0, _need_notify);
 }
 
+void mce_inject_log(struct mce *m)
+{
+   mutex_lock(_chrdev_read_mutex);
+   mce_log(m);
+   mutex_unlock(_chrdev_read_mutex);
+}
+EXPORT_SYMBOL_GPL(mce_inject_log);
+
 static struct notifier_block mce_srao_nb;
 
 void mce_register_decode_chain(struct notifier_block *nb)
--
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[tip:ras/core] x86/mce: Rename rcu_dereference_check_mce() to mce_log_get_idx_check()

[tip-bot for Borislav Petkov]

Commit-ID:  9a7783d02197f299f71b4fa2364a345c05f92b83
Gitweb: http://git.kernel.org/tip/9a7783d02197f299f71b4fa2364a345c05f92b83
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:43 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

x86/mce: Rename rcu_dereference_check_mce() to mce_log_get_idx_check()

The "rcu_" prefix misleads for it being a proper RCU interface
which is not. It basically checks whether we're preemptible or
holding the chrdev_read mutex.

Rename it accordingly.

Signed-off-by: Borislav Petkov 
Acked-by: Paul E. McKenney 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1439396985-12812-12-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/cpu/mcheck/mce.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index ee5272d..b979711 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -52,11 +52,11 @@
 
 static DEFINE_MUTEX(mce_chrdev_read_mutex);
 
-#define rcu_dereference_check_mce(p) \
+#define mce_log_get_idx_check(p) \
 ({ \
rcu_lockdep_assert(rcu_read_lock_sched_held() || \
   lockdep_is_held(_chrdev_read_mutex), \
-  "suspicious rcu_dereference_check_mce() usage"); \
+  "suspicious mce_log_get_idx_check() usage"); \
smp_load_acquire(&(p)); \
 })
 
@@ -165,7 +165,7 @@ void mce_log(struct mce *mce)
mce->finished = 0;
wmb();
for (;;) {
-   entry = rcu_dereference_check_mce(mcelog.next);
+   entry = mce_log_get_idx_check(mcelog.next);
for (;;) {
 
/*
@@ -1812,7 +1812,7 @@ static ssize_t mce_chrdev_read(struct file *filp, char 
__user *ubuf,
goto out;
}
 
-   next = rcu_dereference_check_mce(mcelog.next);
+   next = mce_log_get_idx_check(mcelog.next);
 
/* Only supports full reads right now */
err = -EINVAL;
--
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[tip:ras/core] RAS: Add a menuconfig option with descriptive text

[tip-bot for Borislav Petkov]

Commit-ID:  9b45ef443acde55526485db37440cd3e8f03d544
Gitweb: http://git.kernel.org/tip/9b45ef443acde55526485db37440cd3e8f03d544
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:42 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

RAS: Add a menuconfig option with descriptive text

Text taken a previous patch from "Gong Chen" .

Signed-off-by: Borislav Petkov 
Cc: Gong Chen 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1439396985-12812-11-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 drivers/ras/Kconfig | 34 --
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/ras/Kconfig b/drivers/ras/Kconfig
index f9da613..e5f0a43 100644
--- a/drivers/ras/Kconfig
+++ b/drivers/ras/Kconfig
@@ -1,2 +1,32 @@
-config RAS
-   bool
+menuconfig RAS
+   bool "Reliability, Availability and Serviceability (RAS) features"
+   help
+ Reliability, availability and serviceability (RAS) is a computer
+ hardware engineering term. Computers designed with higher levels
+ of RAS have a multitude of features that protect data integrity
+ and help them stay available for long periods of time without
+ failure.
+
+ Reliability can be defined as the probability that the system will
+ produce correct outputs up to some given time. Reliability is
+ enhanced by features that help to avoid, detect and repair hardware
+ faults.
+
+ Availability is the probability a system is operational at a given
+ time, i.e. the amount of time a device is actually operating as the
+ percentage of total time it should be operating.
+
+ Serviceability or maintainability is the simplicity and speed with
+ which a system can be repaired or maintained; if the time to repair
+ a failed system increases, then availability will decrease.
+
+ Note that Reliability and Availability are distinct concepts:
+ Reliability is a measure of the ability of a system to function
+ correctly, including avoiding data corruption, whereas Availability
+ measures how often it is available for use, even though it may not
+ be functioning correctly. For example, a server may run forever and
+ so have ideal availability, but may be unreliable, with frequent
+ data corruption.
+
+if RAS
+endif
--
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[tip:ras/core] x86/mce: Kill drain_mcelog_buffer()

[tip-bot for Borislav Petkov]

Commit-ID:  eef4dfa0cb83899c782935ac5345532f47073cea
Gitweb: http://git.kernel.org/tip/eef4dfa0cb83899c782935ac5345532f47073cea
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:38 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:52 +0200

x86/mce: Kill drain_mcelog_buffer()

This used to flush out MCEs logged during early boot and which
were in the MCA registers from a previous system run. No need
for that now, since we've moved to a genpool.

Suggested-by: Tony Luck 
Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1439396985-12812-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/mce.h   |  2 +-
 arch/x86/kernel/cpu/mcheck/mce.c | 44 ++--
 drivers/acpi/acpi_extlog.c   |  2 +-
 drivers/edac/i7core_edac.c   |  2 +-
 drivers/edac/mce_amd.c   |  2 +-
 drivers/edac/sb_edac.c   |  2 +-
 6 files changed, 7 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index dfaa4de..982dfc3 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -140,7 +140,7 @@ struct mce_vendor_flags {
 extern struct mce_vendor_flags mce_flags;
 
 extern struct mca_config mca_cfg;
-extern void mce_register_decode_chain(struct notifier_block *nb, bool drain);
+extern void mce_register_decode_chain(struct notifier_block *nb);
 extern void mce_unregister_decode_chain(struct notifier_block *nb);
 
 #include 
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 9568bb5..32b586e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -199,55 +199,15 @@ void mce_log(struct mce *mce)
set_bit(0, _need_notify);
 }
 
-static void drain_mcelog_buffer(void)
-{
-   unsigned int next, i, prev = 0;
-
-   next = ACCESS_ONCE(mcelog.next);
-
-   do {
-   struct mce *m;
-
-   /* drain what was logged during boot */
-   for (i = prev; i < next; i++) {
-   unsigned long start = jiffies;
-   unsigned retries = 1;
-
-   m = [i];
-
-   while (!m->finished) {
-   if (time_after_eq(jiffies, start + 2*retries))
-   retries++;
-
-   cpu_relax();
-
-   if (!m->finished && retries >= 4) {
-   pr_err("skipping error being logged 
currently!\n");
-   break;
-   }
-   }
-   smp_rmb();
-   atomic_notifier_call_chain(_mce_decoder_chain, 0, 
m);
-   }
-
-   memset(mcelog.entry + prev, 0, (next - prev) * sizeof(*m));
-   prev = next;
-   next = cmpxchg(, prev, 0);
-   } while (next != prev);
-}
-
 static struct notifier_block mce_srao_nb;
 
-void mce_register_decode_chain(struct notifier_block *nb, bool drain)
+void mce_register_decode_chain(struct notifier_block *nb)
 {
/* Ensure SRAO notifier has the highest priority in the decode chain. */
if (nb != _srao_nb && nb->priority == INT_MAX)
nb->priority -= 1;
 
atomic_notifier_chain_register(_mce_decoder_chain, nb);
-
-   if (drain)
-   drain_mcelog_buffer();
 }
 EXPORT_SYMBOL_GPL(mce_register_decode_chain);
 
@@ -2028,7 +1988,7 @@ __setup("mce", mcheck_enable);
 int __init mcheck_init(void)
 {
mcheck_intel_therm_init();
-   mce_register_decode_chain(_srao_nb, false);
+   mce_register_decode_chain(_srao_nb);
mcheck_vendor_init_severity();
 
INIT_WORK(_work, mce_process_work);
diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
index 07e012e..b3842ff 100644
--- a/drivers/acpi/acpi_extlog.c
+++ b/drivers/acpi/acpi_extlog.c
@@ -286,7 +286,7 @@ static int __init extlog_init(void)
 */
old_edac_report_status = get_edac_report_status();
set_edac_report_status(EDAC_REPORTING_DISABLED);
-   mce_register_decode_chain(_mce_dec, true);
+   mce_register_decode_chain(_mce_dec);
/* enable OS to be involved to take over management from BIOS */
((struct extlog_l1_head *)extlog_l1_addr)->flags |= FLAG_OS_OPTIN;
 
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 13d77f4..01087a3 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -2424,7 +2424,7 @@ static int __init i7core_init(void)
pci_rc = pci_register_driver(_driver);
 
if (pci_rc >= 0) {
-   mce_register_decode_chain(_mce_dec, true);
+   mce_register_decode_chain(_mce_dec);
return 0;
}
 
diff --git a/drivers/edac/mce_amd.c 

[tip:ras/core] x86/mce: Reuse one of the u16 padding fields in ' struct mce'

[tip-bot for Borislav Petkov]

Commit-ID:  20d51a426fe9a0d0a63cc3a7488f621c8bac37e1
Gitweb: http://git.kernel.org/tip/20d51a426fe9a0d0a63cc3a7488f621c8bac37e1
Author: Borislav Petkov 
AuthorDate: Wed, 12 Aug 2015 18:29:33 +0200
Committer:  Ingo Molnar 
CommitDate: Thu, 13 Aug 2015 10:12:50 +0200

x86/mce: Reuse one of the u16 padding fields in 'struct mce'

... to save the error severity of the MCE and whether the
reported address of the error is usable.

Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: Tony Luck 
Link: http://lkml.kernel.org/r/1439396985-12812-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/uapi/asm/mce.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index a0eab85..76880ed 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -15,7 +15,8 @@ struct mce {
__u64 time; /* wall time_t when error was detected */
__u8  cpuvendor;/* cpu vendor as encoded in system.h */
__u8  inject_flags; /* software inject flags */
-   __u16  pad;
+   __u8  severity;
+   __u8  usable_addr;
__u32 cpuid;/* CPUID 1 EAX */
__u8  cs;   /* code segment */
__u8  bank; /* machine check bank */
--
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[tip:ras/core] x86/ras: Move AMD MCE injector to arch/x86/ras/

[tip-bot for Borislav Petkov]

Commit-ID:  6c36dfe949187dc2729abfad4b083758ac5c2e0e
Gitweb: http://git.kernel.org/tip/6c36dfe949187dc2729abfad4b083758ac5c2e0e
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:45 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:54 +0200

x86/ras: Move AMD MCE injector to arch/x86/ras/

This is an x86-specific module and would benefit from being
closer to the arch code. Move it there. Update copyright while
at it.

Signed-off-by: Borislav Petkov b...@suse.de
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Tony Luck tony.l...@intel.com
Link: http://lkml.kernel.org/r/1439396985-12812-14-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/Makefile|  2 ++
 arch/x86/ras/Kconfig | 11 +++
 arch/x86/ras/Makefile|  2 ++
 {drivers/edac = arch/x86/ras}/mce_amd_inj.c |  6 +++---
 drivers/edac/Kconfig | 10 --
 drivers/edac/Makefile|  1 -
 drivers/ras/Kconfig  |  3 +++
 7 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 118e6de..0f38418 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -212,6 +212,8 @@ drivers-$(CONFIG_PM) += arch/x86/power/
 
 drivers-$(CONFIG_FB) += arch/x86/video/
 
+drivers-$(CONFIG_RAS) += arch/x86/ras/
+
 
 # boot loader support. Several targets are kept for legacy purposes
 
diff --git a/arch/x86/ras/Kconfig b/arch/x86/ras/Kconfig
new file mode 100644
index 000..10fea5f
--- /dev/null
+++ b/arch/x86/ras/Kconfig
@@ -0,0 +1,11 @@
+config AMD_MCE_INJ
+   tristate Simple MCE injection interface for AMD processors
+   depends on RAS  EDAC_DECODE_MCE  DEBUG_FS
+   default n
+   help
+ This is a simple debugfs interface to inject MCEs and test different
+ aspects of the MCE handling code.
+
+ WARNING: Do not even assume this interface is staying stable!
+
+
diff --git a/arch/x86/ras/Makefile b/arch/x86/ras/Makefile
new file mode 100644
index 000..dd2c98b
--- /dev/null
+++ b/arch/x86/ras/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_AMD_MCE_INJ)  += mce_amd_inj.o
+
diff --git a/drivers/edac/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
similarity index 98%
rename from drivers/edac/mce_amd_inj.c
rename to arch/x86/ras/mce_amd_inj.c
index 4c73e4d0..17e35b5 100644
--- a/drivers/edac/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -6,7 +6,7 @@
  * This file may be distributed under the terms of the GNU General Public
  * License version 2.
  *
- * Copyright (c) 2010-14:  Borislav Petkov b...@alien8.de
+ * Copyright (c) 2010-15:  Borislav Petkov b...@alien8.de
  * Advanced Micro Devices Inc.
  */
 
@@ -19,7 +19,7 @@
 #include linux/uaccess.h
 #include asm/mce.h
 
-#include mce_amd.h
+#include ../kernel/cpu/mcheck/mce-internal.h
 
 /*
  * Collect all the MCi_XXX settings
@@ -195,7 +195,7 @@ static void do_inject(void)
i_mce.status |= MCI_STATUS_MISCV;
 
if (inj_type == SW_INJ) {
-   amd_decode_mce(NULL, 0, i_mce);
+   mce_inject_log(i_mce);
return;
}
 
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 8677ead..ef25000 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -61,16 +61,6 @@ config EDAC_DECODE_MCE
  which occur really early upon boot, before the module infrastructure
  has been initialized.
 
-config EDAC_MCE_INJ
-   tristate Simple MCE injection interface
-   depends on EDAC_DECODE_MCE  DEBUG_FS
-   default n
-   help
- This is a simple debugfs interface to inject MCEs and test different
- aspects of the MCE handling code.
-
- WARNING: Do not even assume this interface is staying stable!
-
 config EDAC_MM_EDAC
tristate Main Memory EDAC (Error Detection And Correction) reporting
select RAS
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 28ef2a5..ae3c5f3 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -17,7 +17,6 @@ edac_core-y   += edac_pci.o edac_pci_sysfs.o
 endif
 
 obj-$(CONFIG_EDAC_GHES)+= ghes_edac.o
-obj-$(CONFIG_EDAC_MCE_INJ) += mce_amd_inj.o
 
 edac_mce_amd-y := mce_amd.o
 obj-$(CONFIG_EDAC_DECODE_MCE)  += edac_mce_amd.o
diff --git a/drivers/ras/Kconfig b/drivers/ras/Kconfig
index e5f0a43..4c3c67d 100644
--- a/drivers/ras/Kconfig
+++ b/drivers/ras/Kconfig
@@ -29,4 +29,7 @@ menuconfig RAS
  data corruption.
 
 if RAS
+
+source arch/x86/ras/Kconfig
+
 endif
--
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[tip:ras/core] x86/mce: Add a wrapper around mce_log() for injection

[tip-bot for Borislav Petkov]

Commit-ID:  a79da38494ec23f1a7d6ee734e07e9575fd18b58
Gitweb: http://git.kernel.org/tip/a79da38494ec23f1a7d6ee734e07e9575fd18b58
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:44 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

x86/mce: Add a wrapper around mce_log() for injection

Will be used by an injector module in a following patch.

Additionally, add a missing module export reported by 0-DAY
kernel test.

Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Borislav Petkov b...@suse.de
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Tony Luck tony.l...@intel.com
Link: http://lkml.kernel.org/r/1439396985-12812-13-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/kernel/cpu/mcheck/mce-internal.h | 2 ++
 arch/x86/kernel/cpu/mcheck/mce.c  | 8 
 2 files changed, 10 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h 
b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index ea8b622..547720e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -79,3 +79,5 @@ static inline int apei_clear_mce(u64 record_id)
return -EINVAL;
 }
 #endif
+
+void mce_inject_log(struct mce *m);
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index b979711..e4e6646 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -199,6 +199,14 @@ void mce_log(struct mce *mce)
set_bit(0, mce_need_notify);
 }
 
+void mce_inject_log(struct mce *m)
+{
+   mutex_lock(mce_chrdev_read_mutex);
+   mce_log(m);
+   mutex_unlock(mce_chrdev_read_mutex);
+}
+EXPORT_SYMBOL_GPL(mce_inject_log);
+
 static struct notifier_block mce_srao_nb;
 
 void mce_register_decode_chain(struct notifier_block *nb)
--
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[tip:ras/core] x86/mce: Rename rcu_dereference_check_mce() to mce_log_get_idx_check()

[tip-bot for Borislav Petkov]

Commit-ID:  9a7783d02197f299f71b4fa2364a345c05f92b83
Gitweb: http://git.kernel.org/tip/9a7783d02197f299f71b4fa2364a345c05f92b83
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:43 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

x86/mce: Rename rcu_dereference_check_mce() to mce_log_get_idx_check()

The rcu_ prefix misleads for it being a proper RCU interface
which is not. It basically checks whether we're preemptible or
holding the chrdev_read mutex.

Rename it accordingly.

Signed-off-by: Borislav Petkov b...@suse.de
Acked-by: Paul E. McKenney paul...@linux.vnet.ibm.com
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Tony Luck tony.l...@intel.com
Link: http://lkml.kernel.org/r/1439396985-12812-12-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/kernel/cpu/mcheck/mce.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index ee5272d..b979711 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -52,11 +52,11 @@
 
 static DEFINE_MUTEX(mce_chrdev_read_mutex);
 
-#define rcu_dereference_check_mce(p) \
+#define mce_log_get_idx_check(p) \
 ({ \
rcu_lockdep_assert(rcu_read_lock_sched_held() || \
   lockdep_is_held(mce_chrdev_read_mutex), \
-  suspicious rcu_dereference_check_mce() usage); \
+  suspicious mce_log_get_idx_check() usage); \
smp_load_acquire((p)); \
 })
 
@@ -165,7 +165,7 @@ void mce_log(struct mce *mce)
mce-finished = 0;
wmb();
for (;;) {
-   entry = rcu_dereference_check_mce(mcelog.next);
+   entry = mce_log_get_idx_check(mcelog.next);
for (;;) {
 
/*
@@ -1812,7 +1812,7 @@ static ssize_t mce_chrdev_read(struct file *filp, char 
__user *ubuf,
goto out;
}
 
-   next = rcu_dereference_check_mce(mcelog.next);
+   next = mce_log_get_idx_check(mcelog.next);
 
/* Only supports full reads right now */
err = -EINVAL;
--
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[tip:ras/core] RAS: Add a menuconfig option with descriptive text

[tip-bot for Borislav Petkov]

Commit-ID:  9b45ef443acde55526485db37440cd3e8f03d544
Gitweb: http://git.kernel.org/tip/9b45ef443acde55526485db37440cd3e8f03d544
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:42 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:53 +0200

RAS: Add a menuconfig option with descriptive text

Text taken a previous patch from Gong Chen gong.c...@linux.intel.com.

Signed-off-by: Borislav Petkov b...@suse.de
Cc: Gong Chen gong.c...@linux.intel.com
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Tony Luck tony.l...@intel.com
Link: http://lkml.kernel.org/r/1439396985-12812-11-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 drivers/ras/Kconfig | 34 --
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/ras/Kconfig b/drivers/ras/Kconfig
index f9da613..e5f0a43 100644
--- a/drivers/ras/Kconfig
+++ b/drivers/ras/Kconfig
@@ -1,2 +1,32 @@
-config RAS
-   bool
+menuconfig RAS
+   bool Reliability, Availability and Serviceability (RAS) features
+   help
+ Reliability, availability and serviceability (RAS) is a computer
+ hardware engineering term. Computers designed with higher levels
+ of RAS have a multitude of features that protect data integrity
+ and help them stay available for long periods of time without
+ failure.
+
+ Reliability can be defined as the probability that the system will
+ produce correct outputs up to some given time. Reliability is
+ enhanced by features that help to avoid, detect and repair hardware
+ faults.
+
+ Availability is the probability a system is operational at a given
+ time, i.e. the amount of time a device is actually operating as the
+ percentage of total time it should be operating.
+
+ Serviceability or maintainability is the simplicity and speed with
+ which a system can be repaired or maintained; if the time to repair
+ a failed system increases, then availability will decrease.
+
+ Note that Reliability and Availability are distinct concepts:
+ Reliability is a measure of the ability of a system to function
+ correctly, including avoiding data corruption, whereas Availability
+ measures how often it is available for use, even though it may not
+ be functioning correctly. For example, a server may run forever and
+ so have ideal availability, but may be unreliable, with frequent
+ data corruption.
+
+if RAS
+endif
--
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[tip:ras/core] x86/mce: Reuse one of the u16 padding fields in ' struct mce'

[tip-bot for Borislav Petkov]

Commit-ID:  20d51a426fe9a0d0a63cc3a7488f621c8bac37e1
Gitweb: http://git.kernel.org/tip/20d51a426fe9a0d0a63cc3a7488f621c8bac37e1
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:33 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:50 +0200

x86/mce: Reuse one of the u16 padding fields in 'struct mce'

... to save the error severity of the MCE and whether the
reported address of the error is usable.

Signed-off-by: Borislav Petkov b...@suse.de
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Tony Luck tony.l...@intel.com
Link: http://lkml.kernel.org/r/1439396985-12812-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/include/uapi/asm/mce.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
index a0eab85..76880ed 100644
--- a/arch/x86/include/uapi/asm/mce.h
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -15,7 +15,8 @@ struct mce {
__u64 time; /* wall time_t when error was detected */
__u8  cpuvendor;/* cpu vendor as encoded in system.h */
__u8  inject_flags; /* software inject flags */
-   __u16  pad;
+   __u8  severity;
+   __u8  usable_addr;
__u32 cpuid;/* CPUID 1 EAX */
__u8  cs;   /* code segment */
__u8  bank; /* machine check bank */
--
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[tip:ras/core] x86/mce: Kill drain_mcelog_buffer()

[tip-bot for Borislav Petkov]

Commit-ID:  eef4dfa0cb83899c782935ac5345532f47073cea
Gitweb: http://git.kernel.org/tip/eef4dfa0cb83899c782935ac5345532f47073cea
Author: Borislav Petkov b...@suse.de
AuthorDate: Wed, 12 Aug 2015 18:29:38 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Thu, 13 Aug 2015 10:12:52 +0200

x86/mce: Kill drain_mcelog_buffer()

This used to flush out MCEs logged during early boot and which
were in the MCA registers from a previous system run. No need
for that now, since we've moved to a genpool.

Suggested-by: Tony Luck tony.l...@intel.com
Signed-off-by: Borislav Petkov b...@suse.de
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Thomas Gleixner t...@linutronix.de
Link: http://lkml.kernel.org/r/1439396985-12812-7-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/include/asm/mce.h   |  2 +-
 arch/x86/kernel/cpu/mcheck/mce.c | 44 ++--
 drivers/acpi/acpi_extlog.c   |  2 +-
 drivers/edac/i7core_edac.c   |  2 +-
 drivers/edac/mce_amd.c   |  2 +-
 drivers/edac/sb_edac.c   |  2 +-
 6 files changed, 7 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index dfaa4de..982dfc3 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -140,7 +140,7 @@ struct mce_vendor_flags {
 extern struct mce_vendor_flags mce_flags;
 
 extern struct mca_config mca_cfg;
-extern void mce_register_decode_chain(struct notifier_block *nb, bool drain);
+extern void mce_register_decode_chain(struct notifier_block *nb);
 extern void mce_unregister_decode_chain(struct notifier_block *nb);
 
 #include linux/percpu.h
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 9568bb5..32b586e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -199,55 +199,15 @@ void mce_log(struct mce *mce)
set_bit(0, mce_need_notify);
 }
 
-static void drain_mcelog_buffer(void)
-{
-   unsigned int next, i, prev = 0;
-
-   next = ACCESS_ONCE(mcelog.next);
-
-   do {
-   struct mce *m;
-
-   /* drain what was logged during boot */
-   for (i = prev; i  next; i++) {
-   unsigned long start = jiffies;
-   unsigned retries = 1;
-
-   m = mcelog.entry[i];
-
-   while (!m-finished) {
-   if (time_after_eq(jiffies, start + 2*retries))
-   retries++;
-
-   cpu_relax();
-
-   if (!m-finished  retries = 4) {
-   pr_err(skipping error being logged 
currently!\n);
-   break;
-   }
-   }
-   smp_rmb();
-   atomic_notifier_call_chain(x86_mce_decoder_chain, 0, 
m);
-   }
-
-   memset(mcelog.entry + prev, 0, (next - prev) * sizeof(*m));
-   prev = next;
-   next = cmpxchg(mcelog.next, prev, 0);
-   } while (next != prev);
-}
-
 static struct notifier_block mce_srao_nb;
 
-void mce_register_decode_chain(struct notifier_block *nb, bool drain)
+void mce_register_decode_chain(struct notifier_block *nb)
 {
/* Ensure SRAO notifier has the highest priority in the decode chain. */
if (nb != mce_srao_nb  nb-priority == INT_MAX)
nb-priority -= 1;
 
atomic_notifier_chain_register(x86_mce_decoder_chain, nb);
-
-   if (drain)
-   drain_mcelog_buffer();
 }
 EXPORT_SYMBOL_GPL(mce_register_decode_chain);
 
@@ -2028,7 +1988,7 @@ __setup(mce, mcheck_enable);
 int __init mcheck_init(void)
 {
mcheck_intel_therm_init();
-   mce_register_decode_chain(mce_srao_nb, false);
+   mce_register_decode_chain(mce_srao_nb);
mcheck_vendor_init_severity();
 
INIT_WORK(mce_work, mce_process_work);
diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
index 07e012e..b3842ff 100644
--- a/drivers/acpi/acpi_extlog.c
+++ b/drivers/acpi/acpi_extlog.c
@@ -286,7 +286,7 @@ static int __init extlog_init(void)
 */
old_edac_report_status = get_edac_report_status();
set_edac_report_status(EDAC_REPORTING_DISABLED);
-   mce_register_decode_chain(extlog_mce_dec, true);
+   mce_register_decode_chain(extlog_mce_dec);
/* enable OS to be involved to take over management from BIOS */
((struct extlog_l1_head *)extlog_l1_addr)-flags |= FLAG_OS_OPTIN;
 
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 13d77f4..01087a3 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -2424,7 +2424,7 @@ static int __init i7core_init(void)
pci_rc = pci_register_driver(i7core_driver);
 
if 

[tip:x86/urgent] x86/cpu/cacheinfo: Fix teardown path

[tip-bot for Borislav Petkov]

Commit-ID:  680ac028240f8747f31c03986fbcf18b2b521e93
Gitweb: http://git.kernel.org/tip/680ac028240f8747f31c03986fbcf18b2b521e93
Author: Borislav Petkov 
AuthorDate: Mon, 27 Jul 2015 09:58:05 +0200
Committer:  Ingo Molnar 
CommitDate: Wed, 5 Aug 2015 10:08:17 +0200

x86/cpu/cacheinfo: Fix teardown path

Philip Müller reported a hang when booting 32-bit 4.1 kernel on
an AMD box. A fragment of the splat was enough to pinpoint the
issue:

  task: f58e ti: f58e8000 task.ti: f58e800
  EIP: 0060:[] EFLAGS: 00010206 CPU: 0
  EIP is at free_cache_attributes+0x83/0xd0
  EAX: 0001 EBX: f589d46c ECX: 0090 EDX: 360c2000
  ESI:  EDI: c1724a80 EBP: f58e9ec0 ESP: f58e9ea0
   DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
  CR0: 8005003b CR2: 00ac CR3: 01731000 CR4: 06d0

cache_shared_cpu_map_setup() did check sibling CPUs cacheinfo
descriptor while the respective teardown path
cache_shared_cpu_map_remove() didn't. Fix that.

>From tglx's version: to be on the safe side, move the cacheinfo
descriptor check to free_cache_attributes(), thus cleaning up
the hotplug path a little and making this even more robust.

Reported-by: Philip Müller 
Signed-off-by: Borislav Petkov 
Cc:  # v4.1+
Cc: Andre Przywara 
Cc: Guenter Roeck 
Cc: H. Peter Anvin 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Sudeep Holla 
Cc: Thomas Gleixner 
Cc: linux-kernel@vger.kernel.org
Cc: manjaro-...@manjaro.org
Link: http://lkml.kernel.org/r/20150727075805.ga20...@nazgul.tnic
Link: https://lkml.kernel.org/r/55b47bb8.6080...@manjaro.org
Signed-off-by: Ingo Molnar 
---
 drivers/base/cacheinfo.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 764280a..e9fd32e 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -148,7 +148,11 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 
if (sibling == cpu) /* skip itself */
continue;
+
sib_cpu_ci = get_cpu_cacheinfo(sibling);
+   if (!sib_cpu_ci->info_list)
+   continue;
+
sib_leaf = sib_cpu_ci->info_list + index;
cpumask_clear_cpu(cpu, _leaf->shared_cpu_map);
cpumask_clear_cpu(sibling, _leaf->shared_cpu_map);
@@ -159,6 +163,9 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 
 static void free_cache_attributes(unsigned int cpu)
 {
+   if (!per_cpu_cacheinfo(cpu))
+   return;
+
cache_shared_cpu_map_remove(cpu);
 
kfree(per_cpu_cacheinfo(cpu));
@@ -514,8 +521,7 @@ static int cacheinfo_cpu_callback(struct notifier_block 
*nfb,
break;
case CPU_DEAD:
cache_remove_dev(cpu);
-   if (per_cpu_cacheinfo(cpu))
-   free_cache_attributes(cpu);
+   free_cache_attributes(cpu);
break;
}
return notifier_from_errno(rc);
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/urgent] x86/cpu/cacheinfo: Fix teardown path

[tip-bot for Borislav Petkov]

Commit-ID:  680ac028240f8747f31c03986fbcf18b2b521e93
Gitweb: http://git.kernel.org/tip/680ac028240f8747f31c03986fbcf18b2b521e93
Author: Borislav Petkov b...@suse.de
AuthorDate: Mon, 27 Jul 2015 09:58:05 +0200
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Wed, 5 Aug 2015 10:08:17 +0200

x86/cpu/cacheinfo: Fix teardown path

Philip Müller reported a hang when booting 32-bit 4.1 kernel on
an AMD box. A fragment of the splat was enough to pinpoint the
issue:

  task: f58e ti: f58e8000 task.ti: f58e800
  EIP: 0060:[c135a903] EFLAGS: 00010206 CPU: 0
  EIP is at free_cache_attributes+0x83/0xd0
  EAX: 0001 EBX: f589d46c ECX: 0090 EDX: 360c2000
  ESI:  EDI: c1724a80 EBP: f58e9ec0 ESP: f58e9ea0
   DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
  CR0: 8005003b CR2: 00ac CR3: 01731000 CR4: 06d0

cache_shared_cpu_map_setup() did check sibling CPUs cacheinfo
descriptor while the respective teardown path
cache_shared_cpu_map_remove() didn't. Fix that.

From tglx's version: to be on the safe side, move the cacheinfo
descriptor check to free_cache_attributes(), thus cleaning up
the hotplug path a little and making this even more robust.

Reported-by: Philip Müller ph...@manjaro.org
Signed-off-by: Borislav Petkov b...@suse.de
Cc: sta...@vger.kernel.org # v4.1+
Cc: Andre Przywara andre.przyw...@arm.com
Cc: Guenter Roeck li...@roeck-us.net
Cc: H. Peter Anvin h...@zytor.com
Cc: Linus Torvalds torva...@linux-foundation.org
Cc: Peter Zijlstra pet...@infradead.org
Cc: Sudeep Holla sudeep.ho...@arm.com
Cc: Thomas Gleixner t...@linutronix.de
Cc: linux-kernel@vger.kernel.org
Cc: manjaro-...@manjaro.org
Link: http://lkml.kernel.org/r/20150727075805.ga20...@nazgul.tnic
Link: https://lkml.kernel.org/r/55b47bb8.6080...@manjaro.org
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 drivers/base/cacheinfo.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 764280a..e9fd32e 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -148,7 +148,11 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 
if (sibling == cpu) /* skip itself */
continue;
+
sib_cpu_ci = get_cpu_cacheinfo(sibling);
+   if (!sib_cpu_ci-info_list)
+   continue;
+
sib_leaf = sib_cpu_ci-info_list + index;
cpumask_clear_cpu(cpu, sib_leaf-shared_cpu_map);
cpumask_clear_cpu(sibling, this_leaf-shared_cpu_map);
@@ -159,6 +163,9 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 
 static void free_cache_attributes(unsigned int cpu)
 {
+   if (!per_cpu_cacheinfo(cpu))
+   return;
+
cache_shared_cpu_map_remove(cpu);
 
kfree(per_cpu_cacheinfo(cpu));
@@ -514,8 +521,7 @@ static int cacheinfo_cpu_callback(struct notifier_block 
*nfb,
break;
case CPU_DEAD:
cache_remove_dev(cpu);
-   if (per_cpu_cacheinfo(cpu))
-   free_cache_attributes(cpu);
+   free_cache_attributes(cpu);
break;
}
return notifier_from_errno(rc);
--
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Please read the FAQ at  http://www.tux.org/lkml/

[tip:x86/microcode] x86/microcode/amd: Do not overwrite final patch levels

[tip-bot for Borislav Petkov]

Commit-ID:  d48a9c164b45c5cc40f00c12231564f9aac8ab1d
Gitweb: http://git.kernel.org/tip/d48a9c164b45c5cc40f00c12231564f9aac8ab1d
Author: Borislav Petkov 
AuthorDate: Thu, 16 Jul 2015 10:05:47 +0200
Committer:  Ingo Molnar 
CommitDate: Tue, 21 Jul 2015 09:45:40 +0200

x86/microcode/amd: Do not overwrite final patch levels

A certain number of patch levels of applied microcode should not
be overwritten by the microcode loader, otherwise bad things
will happen.

Check those and abort update if the current core has one of
those final patch levels applied by the BIOS. 32-bit needs
special handling, of course.

See https://bugzilla.suse.com/show_bug.cgi?id=913996 for more info.

Tested-by: Peter Kirchgeßner 
Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1437033947-30234-3-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  2 +-
 arch/x86/kernel/cpu/microcode/amd.c   | 38 +++
 arch/x86/kernel/cpu/microcode/amd_early.c | 13 ---
 3 files changed, 44 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index 9b214e1..d3e86cf 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,5 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
-extern bool check_current_patch_level(u32 *rev);
+extern bool check_current_patch_level(u32 *rev, bool early);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 59a3612..c7d2415 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -178,6 +178,16 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
 }
 
 /*
+ * Those patch levels cannot be updated to newer ones and thus should be final.
+ */
+static u32 final_levels[] = {
+   0x0198,
+   0x019f,
+   0x01af,
+   0, /* T-101 terminator */
+};
+
+/*
  * Check the current patch level on this CPU.
  *
  * @rev: Use it to return the patch level. It is set to 0 in the case of
@@ -187,13 +197,31 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
  *  - true: if update should stop
  *  - false: otherwise
  */
-bool check_current_patch_level(u32 *rev)
+bool check_current_patch_level(u32 *rev, bool early)
 {
-   u32 dummy;
+   u32 lvl, dummy, i;
+   bool ret = false;
+   u32 *levels;
+
+   rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
+
+   if (IS_ENABLED(CONFIG_X86_32) && early)
+   levels = (u32 *)__pa_nodebug(_levels);
+   else
+   levels = final_levels;
+
+   for (i = 0; levels[i]; i++) {
+   if (lvl == levels[i]) {
+   lvl = 0;
+   ret = true;
+   break;
+   }
+   }
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+   if (rev)
+   *rev = lvl;
 
-   return false;
+   return ret;
 }
 
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
@@ -229,7 +257,7 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, false))
return -1;
 
/* need to apply patch? */
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index abb9009..a54a47b 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,7 +196,7 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   if (check_current_patch_level())
+   if (check_current_patch_level(, true))
return;
 
while (left > 0) {
@@ -330,7 +330,10 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   if (check_current_patch_level())
+   /*
+* 64-bit runs with paging enabled, thus early==false.
+*/
+   if (check_current_patch_level(, false))
return;
 
eax = cpuid_eax(0x0001);
@@ -422,7 +425,11 @@ void reload_ucode_amd(void)
struct microcode_amd *mc;
u32 rev;
 
-   if (check_current_patch_level())
+   /*
+* early==false because this is a syscore ->resume path and by
+* that time paging is long enabled.
+*/
+   if (check_current_patch_level(, false))
return;
 
mc = (struct microcode_amd *)amd_ucode_patch;
--
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[tip:x86/microcode] x86/microcode/amd: Extract current patch level read to a function

[tip-bot for Borislav Petkov]

Commit-ID:  7708698e783e304da0fac10052dddce1193f47a8
Gitweb: http://git.kernel.org/tip/7708698e783e304da0fac10052dddce1193f47a8
Author: Borislav Petkov 
AuthorDate: Thu, 16 Jul 2015 10:05:46 +0200
Committer:  Ingo Molnar 
CommitDate: Tue, 21 Jul 2015 09:45:40 +0200

x86/microcode/amd: Extract current patch level read to a function

Pave the way for checking the current patch level of the
microcode in a core. We want to be able to do stuff depending on
the patch level - in this case decide whether to update or not.
But that will be added in a later patch; here we do not
introduce any functionality change.

Drop unused local var uci assignment, while at it.

Signed-off-by: Borislav Petkov 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1437033947-30234-2-git-send-email...@alien8.de
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/microcode_amd.h  |  1 +
 arch/x86/kernel/cpu/microcode/amd.c   | 24 ++--
 arch/x86/kernel/cpu/microcode/amd_early.c | 17 +++--
 3 files changed, 30 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/microcode_amd.h 
b/arch/x86/include/asm/microcode_amd.h
index ac6d328..9b214e1 100644
--- a/arch/x86/include/asm/microcode_amd.h
+++ b/arch/x86/include/asm/microcode_amd.h
@@ -76,4 +76,5 @@ static inline int __init save_microcode_in_initrd_amd(void) { 
return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
 
+extern bool check_current_patch_level(u32 *rev);
 #endif /* _ASM_X86_MICROCODE_AMD_H */
diff --git a/arch/x86/kernel/cpu/microcode/amd.c 
b/arch/x86/kernel/cpu/microcode/amd.c
index 12829c3..59a3612 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -177,6 +177,25 @@ static unsigned int verify_patch_size(u8 family, u32 
patch_size,
return patch_size;
 }
 
+/*
+ * Check the current patch level on this CPU.
+ *
+ * @rev: Use it to return the patch level. It is set to 0 in the case of
+ * error.
+ *
+ * Returns:
+ *  - true: if update should stop
+ *  - false: otherwise
+ */
+bool check_current_patch_level(u32 *rev)
+{
+   u32 dummy;
+
+   rdmsr(MSR_AMD64_PATCH_LEVEL, *rev, dummy);
+
+   return false;
+}
+
 int __apply_microcode_amd(struct microcode_amd *mc_amd)
 {
u32 rev, dummy;
@@ -197,7 +216,7 @@ int apply_microcode_amd(int cpu)
struct microcode_amd *mc_amd;
struct ucode_cpu_info *uci;
struct ucode_patch *p;
-   u32 rev, dummy;
+   u32 rev;
 
BUG_ON(raw_smp_processor_id() != cpu);
 
@@ -210,7 +229,8 @@ int apply_microcode_amd(int cpu)
mc_amd  = p->data;
uci->mc = p->data;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+   if (check_current_patch_level())
+   return -1;
 
/* need to apply patch? */
if (rev >= mc_amd->hdr.patch_id) {
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c 
b/arch/x86/kernel/cpu/microcode/amd_early.c
index e8a215a..abb9009 100644
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ b/arch/x86/kernel/cpu/microcode/amd_early.c
@@ -196,9 +196,8 @@ static void apply_ucode_in_initrd(void *ucode, size_t size, 
bool save_patch)
return;
}
 
-   /* find ucode and update if needed */
-
-   native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
+   if (check_current_patch_level())
+   return;
 
while (left > 0) {
struct microcode_amd *mc;
@@ -319,7 +318,6 @@ static void __init get_bsp_sig(void)
 void load_ucode_amd_ap(void)
 {
unsigned int cpu = smp_processor_id();
-   struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
struct equiv_cpu_entry *eq;
struct microcode_amd *mc;
u32 rev, eax;
@@ -332,10 +330,8 @@ void load_ucode_amd_ap(void)
if (!container)
return;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
-
-   uci->cpu_sig.rev = rev;
-   uci->cpu_sig.sig = eax;
+   if (check_current_patch_level())
+   return;
 
eax = cpuid_eax(0x0001);
eq  = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ);
@@ -424,9 +420,10 @@ int __init save_microcode_in_initrd_amd(void)
 void reload_ucode_amd(void)
 {
struct microcode_amd *mc;
-   u32 rev, eax;
+   u32 rev;
 
-   rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
+   if (check_current_patch_level())
+   return;
 
mc = (struct microcode_amd *)amd_ucode_patch;
 
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