RE: [PATCH v2 2/2] clocksource: Add Intel Keem Bay Timer Support
Hi Andy, > From: andriy.shevche...@linux.intel.com > > > > > + data.base = of_iomap(np, 2); > > > > + if (!data.base) > > > > + return -ENXIO; > > > > + > > > > + ret = keembay_clocksource_init(np, ); > > > > + if (ret) > > > > + goto exit; > > > > + > > > > + ret = keembay_clockevent_init(np, ); > > > > > > Is this missing ? > > > > > > > Yes. Either case it goes to the exit path. So I thought of avoiding this > > error > handling code. > > The point is that in success you probably won't call keembay_timer_cleanup(). > Yes. You are right, if I use this error handling code. > > > if (ret) > > > goto exit; > > > > > > return 0; > > > > > > > +exit: > > > > + keembay_timer_cleanup(np, ); > > > > + > > > > + return ret; > > > > +} > Thanks, Vijay
RE: [PATCH v2 2/2] clocksource: Add Intel Keem Bay Timer Support
Hi Daniel,
> From: Daniel Lezcano
> > From: Vijayakannan Ayyathurai
>
> [ ... ]
>
> > +static struct timer_of keembay_ce_to = {
> > + .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
> > + .clkevt = {
> > + .name = "keembay_sys_clkevt",
> > + .features = CLOCK_EVT_FEAT_PERIODIC |
> > + CLOCK_EVT_FEAT_ONESHOT |
> > + CLOCK_EVT_FEAT_DYNIRQ,
> > + .rating = TIM_RATING,
> > + .set_next_event =
> keembay_timer_set_next_event,
> > + .set_state_periodic = keembay_timer_periodic,
> > + .set_state_shutdown = keembay_timer_shutdown,
> > + },
> > + .of_base = {
> > + .index = 0,
> > + },
> > + .of_irq = {
> > + .handler = keembay_timer_isr,
> > + .flags = IRQF_TIMER | IRQF_IRQPOLL,
>
> Is the IRQPOLL flag really needed here ?
>
Not really needed. I will remove this redundant Flag in my next version.
> > +static int __init keembay_timer_init(struct device_node *np)
> > +{
> > + struct keembay_init_data data;
> > + int ret;
> > +
> > + data.base = of_iomap(np, 2);
> > + if (!data.base)
> > + return -ENXIO;
> > +
> > + ret = keembay_clocksource_init(np, );
> > + if (ret)
> > + goto exit;
> > +
> > + ret = keembay_clockevent_init(np, );
>
> Is this missing ?
>
Yes. Either case it goes to the exit path. So I thought of avoiding this error
handling code.
> if (ret)
> goto exit;
>
> return 0;
>
> > +
> > +exit:
> > + keembay_timer_cleanup(np, );
> > +
> > + return ret;
> > +}
> > +
> > +TIMER_OF_DECLARE(keembay_timer, "intel,keembay-timer",
> keembay_timer_init);
> >
>
Thanks,
Vijay
RE: [PATCH v2 0/2] Add drivers for Intel Keem Bay SoC timer block
Hi Daniel, > From: Daniel Lezcano > >> From: Vijayakannan Ayyathurai > >> > >> Changes since v1: > >> - Add support for KEEMBAY_TIMER to get selected through > Kconfig.platforms. > >> - Add CLOCK_EVT_FEAT_DYNIRQ as part of clockevent feature. > >> - Avoid overlapping reg regions across 2 device nodes. > >> - Simplify 2 device nodes as 1 because both are from same IP block. > >> - Adapt the driver code according to the new simplified devicetree. > >> > >> Vijayakannan Ayyathurai (2): > >> dt-bindings: timer: Add bindings for Intel Keem Bay SoC timer > >> clocksource: Add Intel Keem Bay Timer Support > > > > Kindly help us to review this updated patch(v2) set. > > Review in progress ... :) > Thank you for the Review. Thanks, Vijay
RE: [PATCH v2 0/2] Add drivers for Intel Keem Bay SoC timer block
Hi, > From: Vijayakannan Ayyathurai > > Changes since v1: > - Add support for KEEMBAY_TIMER to get selected through Kconfig.platforms. > - Add CLOCK_EVT_FEAT_DYNIRQ as part of clockevent feature. > - Avoid overlapping reg regions across 2 device nodes. > - Simplify 2 device nodes as 1 because both are from same IP block. > - Adapt the driver code according to the new simplified devicetree. > > Vijayakannan Ayyathurai (2): > dt-bindings: timer: Add bindings for Intel Keem Bay SoC timer > clocksource: Add Intel Keem Bay Timer Support Kindly help us to review this updated patch(v2) set. Thanks, Vijay
RE: [PATCH v2 1/2] dt-bindings: timer: Add bindings for Intel Keem Bay SoC timer
Hi Rob, > From: Rob Herring > > From: Vijayakannan Ayyathurai > > > > Add Device Tree bindings for the Timer IP, which used as clocksource and > > clockevent device in the Intel Keem Bay SoC. > > > > Acked-by: Mark Gross > > Acked-by: Andy Shevchenko > > Signed-off-by: Vijayakannan Ayyathurai > > > --- > > .../bindings/timer/intel,keembay-timer.yaml | 52 +++ > > 1 file changed, 52 insertions(+) > > create mode 100644 > Documentation/devicetree/bindings/timer/intel,keembay-timer.yaml > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > Error: Documentation/devicetree/bindings/timer/intel,keembay- > timer.example.dts:32.3-33.1 syntax error > FATAL ERROR: Unable to parse input tree > make[1]: *** [scripts/Makefile.lib:344: > Documentation/devicetree/bindings/timer/intel,keembay- > timer.example.dt.yaml] Error 1 > make: *** [Makefile:1370: dt_binding_check] Error 2 > > See https://patchwork.ozlabs.org/patch/1421313 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. Thanks for the review. Let me check again and re-submit in the next version. Thanks, Vijay
RE: [PATCH RFC] pwm: keembay: Fix build failure with -Os
Hi Thierry,
> From: Uwe Kleine-König
> Subject: Re: [PATCH RFC] pwm: keembay: Fix build failure with -Os
>
> [Cc: += linux-pwm which I forgot for the initial submission]
>
> Hello,
>
> On Mon, Nov 16, 2020 at 10:08:04AM +0100, Uwe Kleine-König wrote:
> > The driver used this construct:
> >
> > #define KMB_PWM_LEADIN_MASK GENMASK(30, 0)
> >
> > static inline void keembay_pwm_update_bits(struct keembay_pwm
> *priv, u32 mask,
> >u32 val, u32 offset)
> > {
> > u32 buff = readl(priv->base + offset);
> >
> > buff = u32_replace_bits(buff, val, mask);
> > writel(buff, priv->base + offset);
> > }
> >
> > ...
> > keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0,
> > KMB_PWM_LEADIN_OFFSET(pwm-
> >hwpwm));
> >
> > With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this
> > triggers:
> >
> > In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-
> keembay.c:16:
> > In function ‘field_multiplier’,
> > inlined from ‘keembay_pwm_update_bits’ at
> /home/uwe/gsrc/linux/include/linux/bitfield.h:124:17:
> > /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to
> ‘__bad_mask’ declared with attribute error: bad bitfield mask
> > 119 | __bad_mask();
> > | ^~~~
> > In function ‘field_multiplier’,
> > inlined from ‘keembay_pwm_update_bits’ at
> /home/uwe/gsrc/linux/include/linux/bitfield.h:154:1:
> > /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to
> ‘__bad_mask’ declared with attribute error: bad bitfield mask
> > 119 | __bad_mask();
> > | ^~~~
> >
> > The compiler doesn't seem to be able to notice that with field being
> > 0x3ff the expression
> >
> > if ((field | (field - 1)) & ((field | (field - 1)) + 1))
> > __bad_mask();
> >
> > can be optimized away.
> >
> > So use __always_inline and document the problem in a comment to fix
> > this.
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Uwe Kleine-König
> > ---
> > Hello,
> >
> > I'm not sure this is the right fix. Maybe the bitfield stuff can be
> > changed somehow to make this problem go away, too?
>
> Note, this patch
>
> Fixes: cdbea243f419 ("pwm: Add PWM driver for Intel Keem Bay")
>
> so this isn't critical for v5.10.
>
> @thierry: If this is ok for you and Vijayakannan, you can squash this
> into the original commit.
>
I am ok with Uwe approach.
I have compiled the change and tested in Keembay board as well.
> Best regards
> Uwe
>
> --
> Pengutronix e.K. | Uwe Kleine-König|
> Industrial Linux Solutions | https://www.pengutronix.de/ |
Thanks,
Vijay
RE: [PATCH RFC] pwm: keembay: Fix build failure with -Os
Hi Uwe,
> From: Uwe Kleine-König
> Sent: Monday, 16 November, 2020 5:08 PM
> Subject: [PATCH RFC] pwm: keembay: Fix build failure with -Os
>
> The driver used this construct:
>
> #define KMB_PWM_LEADIN_MASK GENMASK(30, 0)
>
> static inline void keembay_pwm_update_bits(struct keembay_pwm
> *priv, u32 mask,
> u32 val, u32 offset)
> {
> u32 buff = readl(priv->base + offset);
>
> buff = u32_replace_bits(buff, val, mask);
> writel(buff, priv->base + offset);
> }
>
> ...
> keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0,
> KMB_PWM_LEADIN_OFFSET(pwm-
> >hwpwm));
>
> With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this
> triggers:
>
> In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-
> keembay.c:16:
> In function ‘field_multiplier’,
> inlined from ‘keembay_pwm_update_bits’ at
> /home/uwe/gsrc/linux/include/linux/bitfield.h:124:17:
> /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to
> ‘__bad_mask’ declared with attribute error: bad bitfield mask
> 119 | __bad_mask();
> | ^~~~
> In function ‘field_multiplier’,
> inlined from ‘keembay_pwm_update_bits’ at
> /home/uwe/gsrc/linux/include/linux/bitfield.h:154:1:
> /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to
> ‘__bad_mask’ declared with attribute error: bad bitfield mask
> 119 | __bad_mask();
> | ^~~~
>
> The compiler doesn't seem to be able to notice that with field being
> 0x3ff the expression
>
> if ((field | (field - 1)) & ((field | (field - 1)) + 1))
> __bad_mask();
>
> can be optimized away.
>
> So use __always_inline and document the problem in a comment to fix
> this.
>
> Reported-by: kernel test robot
> Signed-off-by: Uwe Kleine-König
Thank you for spending time in resolving this build failure.
I shall prepare and share the next version of patch with your approach.
> ---
> Hello,
>
> I'm not sure this is the right fix. Maybe the bitfield stuff can be
> changed somehow to make this problem go away, too?
>
> Best regards
> Uwe
>
> drivers/pwm/pwm-keembay.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pwm/pwm-keembay.c b/drivers/pwm/pwm-keembay.c
> index 2b6dd070daa4..cdfdef66ff8e 100644
> --- a/drivers/pwm/pwm-keembay.c
> +++ b/drivers/pwm/pwm-keembay.c
> @@ -63,7 +63,12 @@ static int keembay_clk_enable(struct device *dev,
> struct clk *clk)
> return devm_add_action_or_reset(dev, keembay_clk_unprepare, clk);
> }
>
> -static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32
> mask,
> +/*
> + * With gcc 10, CONFIG_CC_OPTIMIZE_FOR_SIZE and only "inline" instead of
> + * "__always_inline" this fails to compile because the compiler doesn't
> notice
> + * for all valid masks (e.g. KMB_PWM_LEADIN_MASK) that they are ok.
> + */
> +static __always_inline void keembay_pwm_update_bits(struct
> keembay_pwm *priv, u32 mask,
> u32 val, u32 offset)
> {
> u32 buff = readl(priv->base + offset);
> --
> 2.28.0
Thanks,
Vijay
