GL975x enters ASPM L1 state after a short idle in default.
Enlarge the idle period to 7.9us for improving the R/W performance.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/mmc/host
From: Ben Chuang
For GL9763E, although there is the best performance at the maximum delay.
Change the value to 20us in order to have better power consumption.
This change may reduce the maximum performance by 10%.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 6 +++---
1
From: Ben Chuang
Although there is the best performance at the maximum delay.
Change the value to 20us in order to have better power consumption.
This change may reduce the maximum performance by 10%.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 6 +++---
1 file changed, 3
From: Ben Chuang
The GL9763E uses 150Mhz (slow mode) by default in HS400 mode. In order
to make HS400 mode run at 200Mhz, the slow mode needs to be turned off.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/mmc
Hi Ulf,
On Wed, Nov 25, 2020 at 6:49 PM Ulf Hansson wrote:
>
> On Wed, 25 Nov 2020 at 11:43, Ben Chuang wrote:
> >
> > Hi Ulf,
> >
> > On Wed, Nov 25, 2020 at 6:04 PM Ulf Hansson wrote:
> > >
> > > On Wed, 25 Nov 2020 at 10:59, Ben
Hi Ulf,
On Wed, Nov 25, 2020 at 6:04 PM Ulf Hansson wrote:
>
> On Wed, 25 Nov 2020 at 10:59, Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > The GL9763E uses 150Mhz (slow mode) by default in HS400 mode. In order
> > to make HS400 mode run at 200Mhz,
From: Ben Chuang
The GL9763E uses 150Mhz (slow mode) by default in HS400 mode. In order
to make HS400 mode run at 200Mhz, the slow mode needs to be turned off.
Fixes: 1ae1d2d6e555 ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")
Signed-off-by: Ben Chuang
---
drivers/mmc/
From: Ben Chuang
For GL9755, reduce power consumption by lowering the LFCLK and disabling
the DMACLK on low-power.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b
Hi Ulf,
On Mon, Oct 12, 2020 at 6:25 PM Ulf Hansson wrote:
>
> On Mon, 12 Oct 2020 at 10:41, Ben Chuang wrote:
> >
> > Hi Ulf,
> >
> > Regarding this patch, we also want to fix the EMI of one hardware
> > using the old version(such as v5.4).
> &g
3, Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > Set SDR104's clock to 205MHz and enable SSC for GL9750 and GL9755
> >
> > Signed-off-by: Ben Chuang
>
> Applied for next (a while ago), thanks!
>
> Kind regards
> Uff
From: Ben Chuang
Add CQHCI initialization and implement CQHCI operations for GL9763E.
Use bit19 of the register (0x888) to decide whether to disable command
queuing. If the bit is set, the command queuing will be disabled.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 150
Takahiro,
On Thu, Sep 24, 2020 at 5:46 PM AKASHI Takahiro
wrote:
>
> Ben,
>
> On Fri, Sep 18, 2020 at 06:27:01PM +0800, Ben Chuang wrote:
> > On Fri, Sep 18, 2020 at 9:15 AM AKASHI Takahiro
> > wrote:
> > >
> > > Ben,
> > >
> > >
Takahiro,
On Thu, Sep 24, 2020 at 5:57 PM AKASHI Takahiro
wrote:
>
> Ben,
>
> On Fri, Sep 18, 2020 at 06:50:24PM +0800, Ben Chuang wrote:
> > On Fri, Sep 18, 2020 at 2:38 PM AKASHI Takahiro
> > wrote:
> > >
> > > Adrian, Ben,
> > >
> > &g
On Fri, Sep 18, 2020 at 2:38 PM AKASHI Takahiro
wrote:
>
> Adrian, Ben,
>
> Regarding _set_ios() function,
>
> On Fri, Aug 21, 2020 at 05:08:32PM +0300, Adrian Hunter wrote:
> > On 10/07/20 2:10 pm, Ben Chuang wrote:
> > > From: Ben Chuang
> > >
>
On Fri, Sep 18, 2020 at 9:15 AM AKASHI Takahiro
wrote:
>
> Ben,
>
> On Thu, Sep 17, 2020 at 06:12:27PM +0800, Ben Chuang wrote:
> > Hi Takahiro,
> >
> > On Thu, Sep 17, 2020 at 1:12 PM AKASHI Takahiro
> > wrote:
> > >
> > > Adrian, Ben,
>
On Thu, Sep 17, 2020 at 8:56 AM AKASHI Takahiro
wrote:
>
> Ben,
>
> On Wed, Sep 16, 2020 at 05:42:07PM +0800, Ben Chuang wrote:
> > On Wed, Sep 16, 2020 at 8:52 AM AKASHI Takahiro
> > wrote:
> > >
> > > On Tue, Sep 15, 2020 at 07:36:14PM +0
Hi Takahiro,
On Thu, Sep 17, 2020 at 1:12 PM AKASHI Takahiro
wrote:
>
> Adrian, Ben,
>
> Regarding _reset() function,
>
> On Fri, Aug 21, 2020 at 05:08:32PM +0300, Adrian Hunter wrote:
> > On 10/07/20 2:10 pm, Ben Chuang wrote:
> > > From: Ben Chuang
> >
On Wed, Sep 16, 2020 at 8:52 AM AKASHI Takahiro
wrote:
>
> On Tue, Sep 15, 2020 at 07:36:14PM +0800, Ben Chuang wrote:
> > Hi Takahiro,
> >
> > On Tue, Sep 15, 2020 at 2:03 PM AKASHI Takahiro
> > wrote:
> > >
> > > Ben, Adrian,
> > >
>
2020 at 05:09:01PM +0300, Adrian Hunter wrote:
> > >> On 10/07/20 2:11 pm, Ben Chuang wrote:
> > >>> From: AKASHI Takahiro
> > >>>
> > >>> sdhci_start_signal_voltage_switch() should be called only in UHS-I mode,
> > &g
On Tue, Aug 18, 2020 at 7:42 PM Ulf Hansson wrote:
>
> On Fri, 10 Jul 2020 at 13:08, Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > The flow of "interface selection and initialization" was a bit modified
> > for UHS-II card. This commit follow
On Fri, Jul 24, 2020 at 8:36 PM Ulf Hansson wrote:
>
> On Fri, 24 Jul 2020 at 13:11, Ben Chuang wrote:
> >
> > Hi Ulf,
> >
> > On Fri, Jul 17, 2020 at 7:26 PM Ulf Hansson wrote:
> > >
> > > On Fri, 10 Jul 2020 at 13:07, Ben Chua
Hi Ulf,
On Fri, Jul 17, 2020 at 7:26 PM Ulf Hansson wrote:
>
> On Fri, 10 Jul 2020 at 13:07, Ben Chuang wrote:
> >
> > From: AKASHI Takahiro
> >
> > According to Fig. 3-35 in "SD Host Controller Simplified Spec. Ver4.20":
> > - Prepare vdd1,
Hi Ulf,
On Fri, Jul 17, 2020 at 6:55 PM Ulf Hansson wrote:
>
> On Fri, 10 Jul 2020 at 13:07, Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > Add UHS-II support in public headers
>
> I realized that many of the patches in the series have quite limited
&g
On Fri, Jul 17, 2020 at 6:18 PM Ulf Hansson wrote:
>
> On Fri, 10 Jul 2020 at 13:07, Ben Chuang wrote:
> >
> > Summary
> > ===
> > These patches[1] support UHS-II and fix GL9755 UHS-II compatibility.
>
> First of all, thanks for posting this - and my apol
From: Ben Chuang
Set SDR104's clock to 205MHz and enable SSC for GL9750 and GL9755
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 220 ++-
1 file changed, 218 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers
The format string of the task descriptor should be "%016llx".
Signed-off-by: Ben Chuang
---
drivers/mmc/host/cqhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c
index 75934f3c117e..280d64d0b809 100644
--- a/d
From: Ben Chuang
Changes are:
* Disable GL9755 overcurrent interrupt when power on/off on UHS-II.
* Enable the internal clock when do reset on UHS-II mode.
* Set ZC to 0x0 for Sandisk cards and set ZC to 0xB for others.
* Increase timeout value before detecting UHS-II interface.
* Add vendor
From: AKASHI Takahiro
This "post" hook for mmc_attach_sd() will be required to enable UHS-II
support, at least, on GL9755.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/core/sd.c| 6 ++
include/linux/mmc/host.h | 1 +
2 files changed, 7 insertion
From: Ben Chuang
This "post" hook for mmc_attach_sd(), uhs2_post_attach_sd, will be required
to enable UHS-II support, at least, on GL9755.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 9 +
drivers/mmc/host/sdhci.h | 1 +
2 files c
From: AKASHI Takahiro
Those exported functions will be utilized in the following commit
to implement UHS-II support as a kernel module.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 14 --
drivers/mmc/host/sdhci.h | 10 ++
2 files
From: AKASHI Takahiro
All the UHS-II operations in struct sdhci_uhs2_ops are implemented here
and exported as a kernel module.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/Makefile | 1 +
drivers/mmc/host/sdhci-uhs2.c | 794
From: Ben Chuang
This "pre" hook for detect_init(), uhs2_pre_detect_init, will be required
to enable UHS-II support, at least, on GL9755.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci-uhs2.c | 3 +++
drivers/mmc/host/sdhci.h | 2 ++
2 fil
From: AKASHI Takahiro
VDD2 is used for powering UHS-II interface.
Modify sdhci_set_power_and_bus_voltage(), sdhci_set_power_noreg()
and sdhci_set_power_noreg() to handle VDD2.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci-omap.c | 2 +-
drivers/mmc
From: AKASHI Takahiro
Configure a regulator for VDD2 in case of power-off.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 7f2537648a08
From: AKASHI Takahiro
sdhci_start_signal_voltage_switch() should be called only in UHS-I mode,
and not for UHS-II mode.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc
From: Ben Chuang
In this commit, UHS-II related operations will be called via a function
pointer array, sdhci_uhs2_ops, in order to make UHS-II support as
a kernel module.
This array will be initialized only if CONFIG_MMC_SDHCI_UHS2 is enabled
and when the UHS-II module is loaded. Otherwise, all
From: AKASHI Takahiro
Dump UHS-II specific registers, if available, in sdhci_dumpregs()
for informative/debugging use.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers
From: AKASHI Takahiro
Add UHS-II related definitions in shdci.h and sdhci-uhs2.h.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci-uhs2.h | 215 ++
drivers/mmc/host/sdhci.h | 91 +-
2 files changed, 305
From: AKASHI Takahiro
Export sdhci-specific UHS-II operations to core.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/sdhci.c | 70
1 file changed, 70 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc
From: AKASHI Takahiro
This kernel configuration, CONFIG_MMC_SDHCI_UHS2, will be used
in the following commits to indicate UHS-II specific code in sdhci
controllers.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/host/Kconfig | 9 +
1 file changed, 9
From: AKASHI Takahiro
In UHS-II mode, MMC_APP_CMD command need not to be sent.
Instead, APP_CMD bit in a packet should be set.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/core/sd_ops.c | 9 +
drivers/mmc/core/uhs2.c | 4
2 files changed, 13
From: AKASHI Takahiro
In SD-TRAN protocol, legacy SD commands should be "encapsulated" in SD
packets as described in SD specification.
Please see section 7.1 and 7.2.1 in "UHS-II Simplified Addendum."
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/
From: AKASHI Takahiro
mmc_set_chip_select() should be called only in UHS-I mode,
and not for UHS-II mode.
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/core/core.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/core.c b
.
(The code will be added in the next commit.)
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
drivers/mmc/core/block.c | 7 ++-
drivers/mmc/core/sd_ops.c | 3 +++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
From: Ben Chuang
The flow of "interface selection and initialization" was a bit modified
for UHS-II card. This commit follows the sequence defined in SD
specification (Part 1).
See section 7.2.3 in "UHS-II Simplified Addendum."
Signed-off-by: Ben Chuang
Signed-off
vdd2 in case of power-off
mmc: sdhci: UHS-II support, modify set_power() to handle vdd2
mmc: sdhci: UHS-II support, export helper functions to a module
mmc: sdhci: UHS-II support, implement operations as a module
mmc: core: add post-mmc_attach_sd hook
Ben Chuang (6):
mmc: add UHS-II
From: AKASHI Takahiro
According to Fig. 3-35 in "SD Host Controller Simplified Spec. Ver4.20":
- Prepare vdd1, vdd2 and ios.timing for using after/in step (2)
- chip_select is not used in UHS-II, used to return to the legacy flow
Signed-off-by: Ben Chuang
Signed-off-by: AKASH
From: Ben Chuang
Add UHS-II support in public headers
Signed-off-by: Ben Chuang
Signed-off-by: AKASHI Takahiro
---
include/linux/mmc/card.h | 1 +
include/linux/mmc/core.h | 6 +
include/linux/mmc/host.h | 30 +
include/linux/mmc/uhs2.h | 268
;Uffe
>
Thanks Samuel for fixed this issue.
Thanks Ulf for your help.
PS.
I use this email to reply because the company's email will have a
confidentiality clause in the letter.
Best regards,
Ben Chuang
>> ---
>> drivers/mmc/host/sdhci-pci-gli.c | 2 +-
>> 1 file changed, 1
From: Ben Chuang
GL9763E supports High Speed SDR, High Speed DDR, HS200, HS400, Enhanced
Strobe in HS400 mode, 1/4/8 bits data bus and 3.3/1.8V.
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-core.c | 1 +
drivers/mmc/host/sdhci-pci-gli.c | 106
From: Ben Chuang
Need to clear some bits in a vendor-defined register after reboot from
Windows 10.
Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
Reported-by: Grzegorz Kowal
Signed-off-by: Ben Chuang
---
drivers/mmc/host/sdhci-pci-gli.c | 5 +++
ing it into another pull request still
> > intended for 5.4? Waiting on additional acked-by on Ben's work
> > addressing all the review comments?
> >
> > Thanks.
> >
> > On Wed, Sep 11, 2019 at 03:23:44PM +0800, Ben Chuang wrote:
> >> From: Ben Chuang
>
From: Ben Chuang
Add support for the GL9750 and GL9755 chipsets.
Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/
GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor
tuning flow for GL9750.
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K
From: Ben Chuang
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux
From: Ben Chuang
Export sdhci_abort_tuning() function symbols which are used by other SD Host
controller driver modules.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc
From: Ben Chuang
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang
Co-developed-by: Michael
From: Ben Chuang
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
From: Ben Chuang
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755
chipsets.
v9:
- refine gli_set_9750_rx_inv()
- modify comments in sdhci_gli_voltage_switch()
v8:
refine codes in sdhci-gli-pci.c
On Wed, Sep 11, 2019 at 12:42 PM Guenter Roeck wrote:
>
> On Fri, Sep 06, 2019 at 10:33:26AM +0800, Ben Chuang wrote:
> > From: Ben Chuang
> >
> > Add support for the GL9750 and GL9755 chipsets.
> >
> > Enable v4 mode and wait 5ms after set 1.8V signa
From: Ben Chuang
Add support for the GL9750 and GL9755 chipsets.
Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/
GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor
tuning flow for GL9750.
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K
From: Ben Chuang
Export sdhci_abort_tuning() function symbols which are used by other SD Host
controller driver modules.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc
From: Ben Chuang
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux
From: Ben Chuang
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang
Co-developed-by: Michael
From: Ben Chuang
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
From: Ben Chuang
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755
chipsets.
v8:
refine codes in sdhci-gli-pci.c
- remove duplicate assignment
- remove redundant delay
- use '!!'(not not) logical
On Wed, Sep 4, 2019 at 5:54 PM Adrian Hunter wrote:
>
> On 4/09/19 3:58 AM, Ben Chuang wrote:
> > On Tue, Sep 3, 2019 at 6:05 AM Andy Shevchenko
> > wrote:
> >>
> >> On Fri, Aug 30, 2019 at 5:28 AM Ben Chuang wrote:
> >>>
> >>> From: B
On Tue, Sep 3, 2019 at 6:05 AM Andy Shevchenko
wrote:
>
> On Fri, Aug 30, 2019 at 5:28 AM Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > Add support for the GL9750 and GL9755 chipsets.
> >
> > Enable v4 mode and wait 5ms after set 1.8V signal en
From: Ben Chuang
Add support for the GL9750 and GL9755 chipsets.
Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/
GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor
tuning flow for GL9750.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
From: Ben Chuang
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux
From: Ben Chuang
Export sdhci_abort_tuning() function symbols which are used by other SD Host
controller driver modules.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc
From: Ben Chuang
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang
Co-developed-by: Michael
From: Ben Chuang
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
From: Ben Chuang
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755 chipsets.
v7:
- remove condition define CONFIG_MMC_SDHCI_IO_ACCESSORS from sdhci-pci-gli.c
- making the accessors(MMC_SDHCI_IO_ACCESSORS
On Thu, Aug 29, 2019 at 9:34 PM Ulf Hansson wrote:
>
> On Tue, 27 Aug 2019 at 02:32, Ben Chuang wrote:
> >
> > From: Ben Chuang
> >
> > The patches modify internal clock setup to match SD Host Controller
> > Simplified Specifications 4.20 and support Genes
On Thu, Aug 29, 2019 at 9:22 PM Adrian Hunter wrote:
>
> On 28/08/19 4:47 PM, Michael K. Johnson wrote:
> > On Wed, Aug 28, 2019 at 04:13:03PM +0300, Adrian Hunter wrote:
> >> On 27/08/19 3:33 AM, Ben Chuang wrote:
> >> Looks good, one minor
From: Ben Chuang
Export sdhci_abort_tuning() function symbols which are used by other SD Host
controller driver modules.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 1 +
2
From: Ben Chuang
Add support for the GL9750 and GL9755 chipsets.
Enable v4 mode and wait 5ms after set 1.8V signal enable for GL9750/
GL9755. Fix the value of SDHCI_MAX_CURRENT register and use the vendor
tuning flow for GL9750.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
From: Ben Chuang
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Acked-by: Adrian Hunter
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux
From: Ben Chuang
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang
Co-developed-by: Michael
From: Ben Chuang
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755 chipsets.
V6:
- export sdhci_abot_tuning() function symbol
- use C-style comments
- use BIT, FIELD_{GET,PREP} and GENMASK to define bit
From: Ben Chuang
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
Sorry to resend the email because of non-plain text issues.
On Wed, Aug 21, 2019 at 8:30 PM Adrian Hunter wrote:
>
> On 20/08/19 5:07 AM, Ben Chuang wrote:
> > From: Ben Chuang
> >
> > Add support for the GL9750 and GL9755 chipsets.
> >
> > The patches enable
From: Ben Chuang
Add support for the GL9750 and GL9755 chipsets.
The patches enable v4 mode and wait 5ms after set 1.8V signal enable for
GL9750/GL9755. It fixed the value of SDHCI_MAX_CURRENT register and uses
the vendor tuning flow for GL9750.
Signed-off-by: Ben Chuang
Co-developed
From: Ben Chuang
Add the Genesys Logic, Inc. vendor ID to pci_ids.h.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux
From: Ben Chuang
The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.
Signed-off-by: Ben Chuang
Co-developed-by: Michael
From: Ben Chuang
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
From: Ben Chuang
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/
GL9755 support.
V5:
- add "change timeout of loop .." to a patch
- fix typo "verndor" to "vendor"
V4:
- ch
On 8/7/19 8:25 PM, Adrian Hunter wrote:
On 26/07/19 5:07 AM, Michael K. Johnson wrote:
Add support for the GL9750 and GL9755 chipsets.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
diff --git a/drivers/mmc/host/sdhci-gli.h b/drivers/mmc/host
Add support for the GL9750 and GL9755 chipsets.
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
---
drivers/mmc/host/sdhci-gli.h | 27
drivers/mmc/host/sdhci-pci-core.c | 220 ++
drivers/mmc/host/sdhci-pci.h
step and is documented as safe for "prior versions which
do not support PLL Enable."
Signed-off-by: Ben Chuang
Co-developed-by: Michael K Johnson
Signed-off-by: Michael K Johnson
---
drivers/mmc/host/sdhci.c | 33 -
1 file changed, 24 insertions(+), 9
90 matches
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