>If we need a NUMA crossing a mids a contiguous memory range
>we split the range at NUMA boundary so to produce two pmemX
>devices. We do not like 2 NUMA IDs at the same device.
>
>TODO: What happens with real type-12 NvDIMM the BIOS splits
>these ranges?
The physical memory map for an Intel
If we need a NUMA crossing a mids a contiguous memory range
we split the range at NUMA boundary so to produce two pmemX
devices. We do not like 2 NUMA IDs at the same device.
TODO: What happens with real type-12 NvDIMM the BIOS splits
these ranges?
The physical memory map for an Intel based dual
>The other two patches are a heavily rewritten version of the code that
>Intel gave to various storage vendors to discover the type 12 (and earlier
>type 6) nvdimms, which I massaged into a form that is hopefully suitable
>for mainline.
The problem is that the e820 or the UEFI Memory Map Table on
The other two patches are a heavily rewritten version of the code that
Intel gave to various storage vendors to discover the type 12 (and earlier
type 6) nvdimms, which I massaged into a form that is hopefully suitable
for mainline.
The problem is that the e820 or the UEFI Memory Map Table on
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