When we online or offline a CPU, unexpected errors may occur for
a number of reasons. So if a function called within _cpu_down() or
_cpu_up() returns a error code indicating a failed operation, the
warning message should be printed rather than fallow the failed
__cpu_notify().
Signed-off-by: Chen
When we online or offline a CPU, unexpected errors may occur for
a number of reasons. So if a function called within _cpu_down() or
_cpu_up() returns a error code indicating a failed operation, the
warning message should be printed rather than fallow the failed
__cpu_notify().
Signed-off-by: Chen
This patch aims to replace 'MCE' that was introduced by
'commit c2200538d89d ("mm/memory-failure: fix race with
compound page split/merge")' with 'Memory failure'.[1]
[1] https://lkml.org/lkml/2016/4/18/894
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
mm/memory-failure.c
This patch aims to replace 'MCE' that was introduced by
'commit c2200538d89d ("mm/memory-failure: fix race with
compound page split/merge")' with 'Memory failure'.[1]
[1] https://lkml.org/lkml/2016/4/18/894
Signed-off-by: Chen Yucong
---
mm/memory-failure.c | 3 ++-
1 file
to replace 'MCE' with a more appropriate prefix.
[1] commit 75eb3d9b60c2 ("powerpc/powernv: Get FSP memory errors
and plumb into memory poison infrastructure.")
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
mm/memory-failure.c | 69 ---
to replace 'MCE' with a more appropriate prefix.
[1] commit 75eb3d9b60c2 ("powerpc/powernv: Get FSP memory errors
and plumb into memory poison infrastructure.")
Signed-off-by: Chen Yucong
---
mm/memory-failure.c | 69 ---
1 file c
On Thu, 2016-02-25 at 09:22 +0100, Ingo Molnar wrote:
> * Chen Yucong <sla...@gmail.com> wrote:
>
> > arch/x86/* use a mixture of printk(KERN_INFO ) and pr_info().
> > This patch converts all of printk(KERN_INFO ) to pr_info() for
> > arch/x86 directory.
> >
On Thu, 2016-02-25 at 09:22 +0100, Ingo Molnar wrote:
> * Chen Yucong wrote:
>
> > arch/x86/* use a mixture of printk(KERN_INFO ) and pr_info().
> > This patch converts all of printk(KERN_INFO ) to pr_info() for
> > arch/x86 directory.
> >
> > Signed-o
(),
and moves __offline_pages() to not print failure information with
KERN_INFO according to David Rientjes's suggestion[1].
[1] https://lkml.org/lkml/2016/2/24/1094
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
mm/memory_hotplug.c | 32
1 file chang
(),
and moves __offline_pages() to not print failure information with
KERN_INFO according to David Rientjes's suggestion[1].
[1] https://lkml.org/lkml/2016/2/24/1094
Signed-off-by: Chen Yucong
---
mm/memory_hotplug.c | 32
1 file changed, 16 insertions(+), 16
On Wed, 2016-02-24 at 13:33 -0800, David Rientjes wrote:
> On Wed, 24 Feb 2016, Chen Yucong wrote:
>
> > diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
> > index c832ef3..e4b6dec3 100644
> > --- a/mm/memory_hotplug.c
> > +++ b/mm/memory_hotplug.c
> &
On Wed, 2016-02-24 at 13:33 -0800, David Rientjes wrote:
> On Wed, 24 Feb 2016, Chen Yucong wrote:
>
> > diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
> > index c832ef3..e4b6dec3 100644
> > --- a/mm/memory_hotplug.c
> > +++ b/mm/memory_hotplug.c
> &
)
to pr_().
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
mm/memory_hotplug.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index c832ef3..e4b6dec3 100644
--- a/mm/memory_hotplug.c
++
)
to pr_().
Signed-off-by: Chen Yucong
---
mm/memory_hotplug.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index c832ef3..e4b6dec3 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -1059,10
arch/x86/* use a mixture of printk(KERN_INFO ) and pr_info().
This patch converts all of printk(KERN_INFO ) to pr_info() for
arch/x86 directory.
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/crypto/blowfish_glue.c | 5 +---
arch/x86/crypto/camellia_glue.c | 5 +---
arch/x86/* use a mixture of printk(KERN_INFO ) and pr_info().
This patch converts all of printk(KERN_INFO ) to pr_info() for
arch/x86 directory.
Signed-off-by: Chen Yucong
---
arch/x86/crypto/blowfish_glue.c | 5 +---
arch/x86/crypto/camellia_glue.c | 5 +---
arch/x86/crypto
() without a
log level.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/acpi/boot.c | 110
arch/x86/kernel/acpi/cstate.c | 5 +-
arch/x86/kernel/acpi/sleep.c| 2 +-
arch/x86/kernel/alternative.c | 8 +--
arch/x86/kernel
() without a
log level.
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/kernel/acpi/boot.c | 110
arch/x86/kernel/acpi/cstate.c | 5 +-
arch/x86/kernel/acpi/sleep.c| 2 +-
arch/x86/kernel/alternative.c | 8 +--
- convert printk(KERN_DEFAULT ...) to pr_default(...)
Signed-off-by: Chen Yucong
---
arch/x86/kernel/dumpstack.c| 3 +--
arch/x86/kernel/dumpstack_64.c | 4 ++--
arch/x86/kernel/process_32.c | 29 ++---
arch/x86/kernel/process_64.c | 41
Until now, we cover all log-levels by pr_ macros except
KERN_DEFAULT one. Add it for convenience.
Signed-off-by: Chen Yucong
---
include/linux/printk.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/printk.h b/include/linux/printk.h
index 51dd6b8..9808130 100644
() without a
log level.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/acpi/boot.c | 106
arch/x86/kernel/acpi/cstate.c | 5 +-
arch/x86/kernel/acpi/sleep.c| 2 +-
arch/x86/kernel/alternative.c | 8 +--
arch/x86/kernel
() without a
log level.
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/kernel/acpi/boot.c | 106
arch/x86/kernel/acpi/cstate.c | 5 +-
arch/x86/kernel/acpi/sleep.c| 2 +-
arch/x86/kernel/alternative.c | 8 +--
Until now, we cover all log-levels by pr_ macros except
KERN_DEFAULT one. Add it for convenience.
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
include/linux/printk.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/printk.h b/include/linux/printk.h
index 5
- convert printk(KERN_DEFAULT ...) to pr_default(...)
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/kernel/dumpstack.c| 3 +--
arch/x86/kernel/dumpstack_64.c | 4 ++--
arch/x86/kernel/process_32.c | 29 ++---
arch/x86/kernel/process_64.c
Commit-ID: 1b74dde7c47c19a73ea3e9fac95ac27b5d3d50c5
Gitweb: http://git.kernel.org/tip/1b74dde7c47c19a73ea3e9fac95ac27b5d3d50c5
Author: Chen Yucong
AuthorDate: Tue, 2 Feb 2016 11:45:02 +0800
Committer: Ingo Molnar
CommitDate: Wed, 3 Feb 2016 10:30:03 +0100
x86/cpu: Convert printk(KERN_
Commit-ID: 1b74dde7c47c19a73ea3e9fac95ac27b5d3d50c5
Gitweb: http://git.kernel.org/tip/1b74dde7c47c19a73ea3e9fac95ac27b5d3d50c5
Author: Chen Yucong <sla...@gmail.com>
AuthorDate: Tue, 2 Feb 2016 11:45:02 +0800
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Wed, 3 Feb 2
- Use the more current logging style pr_(...) instead of the old
printk(KERN_ ...).
- Convert pr_warning() to pr_warn().
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/amd.c | 23 +++
arch/x86/kernel/cpu/bugs_64.c | 2 +-
arch/x86/kernel/cpu
- Use the more current logging style pr_(...) instead of the old
printk(KERN_ ...).
- Convert pr_warning() to pr_warn().
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/kernel/cpu/amd.c | 23 +++
arch/x86/kernel/cpu/bugs_64.c
Use the current logging styles. And convert printk(KERN_ERR ...)
to pr_err(...) for threshold.c.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/threshold.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c
b/arch/x86
Use the current logging styles. And convert printk(KERN_ERR ...)
to pr_err(...) for threshold.c.
Signed-off-by: Chen Yucong <sla...@gmail.com>
---
arch/x86/kernel/cpu/mcheck/threshold.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/thres
Signed-off-by: Chen Yucong
Converted printk(KERN_ERR to pr_err.
pr_ format is more compact and enable utilizing of pr_fmt macro.
---
arch/x86/kernel/cpu/mcheck/mce-inject.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c
b/arch/x86
Signed-off-by: Chen Yucong <sla...@gmail.com>
Converted printk(KERN_ERR to pr_err.
pr_ format is more compact and enable utilizing of pr_fmt macro.
---
arch/x86/kernel/cpu/mcheck/mce-inject.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mche
the above compiler warning.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/hw_breakpoint.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 7114ba2..302eab3 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b
, but it doesn't
even matter for AMD platform.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c | 48 --
1 file changed, 30 insertions(+), 18 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index
, but it doesn't
even matter for AMD platform.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 48 --
1 file changed, 30 insertions(+), 18 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu
the above compiler warning.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/hw_breakpoint.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 7114ba2..302eab3 100644
--- a/arch/x86/kernel
that have been used for handling
SRAO errors to handle UCNA and Deferred errors.
Acked-by: Borislav Petkov
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
v2:
The first patch have also eliminated a big hack to make mce_severity()
work when called from non-exception context on the
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Reviewed-by: Aravind Gopalakrishnan
Signed-off-by: Chen Yucong
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4 +++-
arch/x86/kernel/cpu/mcheck/mce-severity.c
that have been used for handling
SRAO errors to handle UCNA and Deferred errors.
Acked-by: Borislav Petkov b...@suse.de
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/arch/x86
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
v2:
The first patch have also eliminated a big hack to make mce_severity()
work when called from non-exception context on the
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Reviewed-by: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4
On Tue, 2014-11-11 at 18:44 +, Luck, Tony wrote:
> >> The bank 7 error reported as severity 0 because EN=0 ... so we took no
> >> action for it.
> >
> > How come EN is 0? Bank7 error reporting is not enabled? Why? Or the
> > error injection thing doesn't do it?
>
> The "EN" bit is poorly
On Tue, 2014-11-11 at 18:44 +, Luck, Tony wrote:
The bank 7 error reported as severity 0 because EN=0 ... so we took no
action for it.
How come EN is 0? Bank7 error reporting is not enabled? Why? Or the
error injection thing doesn't do it?
The EN bit is poorly named, and not well
that have been used for handling
SRAO errors to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Signed-off-by: Chen Yucong
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4 +++-
arch/x86/kernel/cpu/mcheck/mce-severity.c | 21 -
arch
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
v2:
The first patch have also eliminated a big hack to make mce_severity()
work when called from non-exception context on the
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
v2:
The first patch have also eliminated a big hack to make mce_severity()
work when called from non-exception context on the
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4 +++-
arch/x86/kernel/cpu/mcheck/mce-severity.c | 21
that have been used for handling
SRAO errors to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86
On Wed, 2014-11-05 at 10:27 -0800, Tony Luck wrote:
> > +#define ONEXCP.excp = NO_EXCP
>
I'm sorry, this is a typing error. Thanks!
> Shouldn't this be named "NOEXCP" and used in the initializations
> for the deferred and UCNA table entries?
>
In fact, "NOEXCP" can be used in the
On Wed, 2014-11-05 at 10:27 -0800, Tony Luck wrote:
+#define ONEXCP.excp = NO_EXCP
I'm sorry, this is a typing error. Thanks!
Shouldn't this be named NOEXCP and used in the initializations
for the deferred and UCNA table entries?
In fact, NOEXCP can be used in the initialization
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Signed-off-by: Chen Yucong
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4 +++-
arch/x86/kernel/cpu/mcheck/mce-severity.c | 21 -
arch
errors to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 453e9bf..37f7649 100644
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
The first patch have also eliminated a big hack to make mce_severity() work
when called from non-exception context on the advice
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
The first patch have also eliminated a big hack to make mce_severity() work
when called from non-exception context on the advice
errors to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 453e9bf
. `is_excp' is used to explicitly
specify the calling context of mce_severity.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |4 +++-
arch/x86/kernel/cpu/mcheck/mce-severity.c | 21
On Wed, 2014-10-29 at 10:16 +0800, Chen Yucong wrote:
> On Mon, 2014-10-27 at 23:10 +, Luck, Tony wrote:
> > + m->mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
> > + severity = mce_severity(m, mca_cfg.tolerant, NULL);
> >
> > This seems a big hack to make m
shold_interrupt() is used for handling
> > >Threshold Interrupt event. And machine_check_poll() has been used for
> > >polling other events.
> > >
> > >This patch introduces a new flag MCJ_INTERRUPT that will be used to
> > >separate CMCI/Thres
() has been used for
> > polling other events.
> >
> > This patch introduces a new flag MCJ_INTERRUPT that will be used to
> > separate CMCI/Threshold Interrupt and POLL handler in mce-inject.
> >
> > Signed-off-by: Chen Yucong mailto:sla...@gmail.com>>
> >
introduces a new flag MCJ_INTERRUPT that will be used to
separate CMCI/Threshold Interrupt and POLL handler in mce-inject.
Signed-off-by: Chen Yucong sla...@gmail.com mailto:sla...@gmail.com
---
arch/x86/include/asm/mce.h |5 +++--
arch/x86/kernel/cpu/mcheck/mce-inject.c
. And machine_check_poll() has been used for
polling other events.
This patch introduces a new flag MCJ_INTERRUPT that will be used to
separate CMCI/Threshold Interrupt and POLL handler in mce-inject.
Signed-off-by: Chen Yucong sla...@gmail.com mailto:sla...@gmail.com
---
arch/x86/include/asm/mce.h
On Wed, 2014-10-29 at 10:16 +0800, Chen Yucong wrote:
On Mon, 2014-10-27 at 23:10 +, Luck, Tony wrote:
+ m-mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
+ severity = mce_severity(m, mca_cfg.tolerant, NULL);
This seems a big hack to make mce_severity() work when called from
This patch introduces a new flag MCJ_INTERRUPT that will be used
to separate CMCI/Threshold Interrupt and POLL in mce-inject.
Signed-off-by: Chen Yucong
---
mce.h |5 +++--
mce.lex |1 +
mce.y |6 +-
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/mce.h b
handler. amd_threshold_interrupt() is used for handling
Threshold Interrupt event. And machine_check_poll() has been used for
polling other events.
This patch introduces a new flag MCJ_INTERRUPT that will be used to
separate CMCI/Threshold Interrupt and POLL handler in mce-inject.
Signed-off-by: Chen
The work based on Boris's ras-for-3.19 branch.
https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git -b ras-for-3.19
Until now, `mce-inject' is unable to inject threshold interrupt event
on AMD platform. That's because both Threshold Interrupt and POLL have a
separate event handler.
Until now, the `mce-inject' mechanism does not support error injection
for threshold interrupt event in AMD platform.
This patch aims to apply MCE MSR wrappers to AMD-specific threshold
interrupt handler for supporting mce-inject.
Signed-off-by: Chen Yucong
---
arch/x86/include/asm/mce.h
The work based on Boris's ras-for-3.19 branch.
https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git -b ras-for-3.19
Until now, `mce-inject' is unable to inject threshold interrupt event
on AMD platform. That's because both Threshold Interrupt and POLL have a
separate event handler.
Until now, the `mce-inject' mechanism does not support error injection
for threshold interrupt event in AMD platform.
This patch aims to apply MCE MSR wrappers to AMD-specific threshold
interrupt handler for supporting mce-inject.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/include
handler. amd_threshold_interrupt() is used for handling
Threshold Interrupt event. And machine_check_poll() has been used for
polling other events.
This patch introduces a new flag MCJ_INTERRUPT that will be used to
separate CMCI/Threshold Interrupt and POLL handler in mce-inject.
Signed-off-by: Chen
This patch introduces a new flag MCJ_INTERRUPT that will be used
to separate CMCI/Threshold Interrupt and POLL in mce-inject.
Signed-off-by: Chen Yucong sla...@gmail.com
---
mce.h |5 +++--
mce.lex |1 +
mce.y |6 +-
3 files changed, 9 insertions(+), 3 deletions(-)
diff
status to avoid making logs
> that have incorrect data.
>
Hi all,
At the suggestion of Tony, this patch add a comment, and restore m->mcgstatus
to avoid
making logs that have incorrect data.
thx!
cyc
From: Chen Yucong
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c
data.
Hi all,
At the suggestion of Tony, this patch add a comment, and restore m-mcgstatus
to avoid
making logs that have incorrect data.
thx!
cyc
From: Chen Yucong sla...@gmail.com
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 64
On Mon, 2014-10-27 at 23:10 +, Luck, Tony wrote:
> + m->mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
> + severity = mce_severity(m, mca_cfg.tolerant, NULL);
>
> This seems a big hack to make mce_severity() work when called from
> CMCI context (when MCG_STATUS register is not set).
On Mon, 2014-10-27 at 08:56 +0800, Chen Yucong wrote:
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
And on the basis of the first patch, the second patch adds the support
On Mon, 2014-10-27 at 08:56 +0800, Chen Yucong wrote:
Hi all,
At the suggestion of Boris, the first patch extends the mce_severity
mechanism for handling UCNA/DEFERRED error.
Link: https://lkml.org/lkml/2014/10/23/190
And on the basis of the first patch, the second patch adds the support
On Mon, 2014-10-27 at 23:10 +, Luck, Tony wrote:
+ m-mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
+ severity = mce_severity(m, mca_cfg.tolerant, NULL);
This seems a big hack to make mce_severity() work when called from
CMCI context (when MCG_STATUS register is not set). It
to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong
---
arch/x86/kernel/cpu/mcheck/mce.c | 55 --
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fdc422e
introduces a new severity level - MCE_UCNA/DEFERRED_SEVERITY.
Signed-off-by: Chen Yucong
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |2 ++
arch/x86/kernel/cpu/mcheck/mce-severity.c |6 +-
arch/x86/kernel/cpu/mcheck/mce.c
And on the basis of the first patch, the second patch adds the support
for identifying and handling UCNA/DEFERRED error in machine_check_poll.
[PATCH 1/2] x86, mce, severity: extend the the mce_severity
[PATCH 2/2] x86, mce: support memory error recovery for both UCNA
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And on the basis of the first patch, the second patch adds the support
for identifying and handling UCNA/DEFERRED error in machine_check_poll.
[PATCH 1/2] x86, mce, severity: extend the the mce_severity
[PATCH 2/2] x86, mce: support memory error recovery for both UCNA
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introduces a new severity level - MCE_UCNA/DEFERRED_SEVERITY.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/include/asm/mce.h|4
arch/x86/kernel/cpu/mcheck/mce-internal.h |2 ++
arch/x86/kernel/cpu/mcheck/mce-severity.c |6 +-
arch/x86/kernel/cpu
to handle UCNA and Deferred errors.
Signed-off-by: Chen Yucong sla...@gmail.com
---
arch/x86/kernel/cpu/mcheck/mce.c | 55 --
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index
On Wed, 2014-10-22 at 10:16 +0200, Borislav Petkov wrote:
> On Wed, Oct 22, 2014 at 09:51:18AM +0800, Chen Yucong wrote:
> > Can you check the following link? The link contains my reply about
> > "x86, MCE, AMD: Move invariant code out from loop body". The reply was
>
On Fri, 2014-10-10 at 14:03 +0800, Chen Yucong wrote:
> From: Chen Yucong
>
> dram_ce_error() stems from Boris's patch set. Thanks!
> Link: http://lkml.org/lkml/2014/7/1/545
>
> Uncorrected no action required (UCNA) - is a UCR error that is not
> signaled via a ma
On Fri, 2014-10-10 at 14:03 +0800, Chen Yucong wrote:
From: Chen Yucong sla...@gmail.com
dram_ce_error() stems from Boris's patch set. Thanks!
Link: http://lkml.org/lkml/2014/7/1/545
Uncorrected no action required (UCNA) - is a UCR error that is not
signaled via a machine check exception
On Wed, 2014-10-22 at 10:16 +0200, Borislav Petkov wrote:
On Wed, Oct 22, 2014 at 09:51:18AM +0800, Chen Yucong wrote:
Can you check the following link? The link contains my reply about
x86, MCE, AMD: Move invariant code out from loop body. The reply was
sent to you on October 7, but until
On Tue, 2014-10-21 at 22:28 +0200, Borislav Petkov wrote:
> On Thu, Oct 09, 2014 at 02:01:06PM -0500, Aravind Gopalakrishnan wrote:
> > I actually agree with this approach. So no argument:)
>
> Ok, thanks, here's a patch.
>
> Btw, I'm pushing the whole queue to a ras-for-3.19 branch at
>
On Tue, 2014-10-21 at 22:28 +0200, Borislav Petkov wrote:
On Thu, Oct 09, 2014 at 02:01:06PM -0500, Aravind Gopalakrishnan wrote:
I actually agree with this approach. So no argument:)
Ok, thanks, here's a patch.
Btw, I'm pushing the whole queue to a ras-for-3.19 branch at
From: Chen Yucong
dram_ce_error() stems from Boris's patch set. Thanks!
Link: http://lkml.org/lkml/2014/7/1/545
Uncorrected no action required (UCNA) - is a UCR error that is not
signaled via a machine check exception and, instead, is reported to
system software as a corrected machine check
From: Chen Yucong sla...@gmail.com
dram_ce_error() stems from Boris's patch set. Thanks!
Link: http://lkml.org/lkml/2014/7/1/545
Uncorrected no action required (UCNA) - is a UCR error that is not
signaled via a machine check exception and, instead, is reported to
system software as a corrected
On Mon, 2014-10-06 at 23:27 +0200, Borislav Petkov wrote:
> On Thu, Oct 02, 2014 at 11:20:12PM +0800, Chen Yucong wrote:
> > From: Chen Yucong
> > Subject: [PATCH] x86, MCE, AMD: move invariant code out from loop body
> >
> > "mce_threshold_vector = amd_thresho
On Mon, 2014-10-06 at 23:27 +0200, Borislav Petkov wrote:
On Thu, Oct 02, 2014 at 11:20:12PM +0800, Chen Yucong wrote:
From: Chen Yucong sla...@gmail.com
Subject: [PATCH] x86, MCE, AMD: move invariant code out from loop body
mce_threshold_vector = amd_threshold_interrupt; is loop
On Thu, 2014-10-02 at 16:38 +0200, Borislav Petkov wrote:
>
> On Mon, Sep 22, 2014 at 09:11:00PM +0200, Borislav Petkov wrote:
> > On Mon, Sep 22, 2014 at 05:23:32PM +0800, Chen Yucong wrote:
> > > Hi Boris,
> > >
> > > I have found the following code sni
On Thu, 2014-10-02 at 15:12 +0200, Borislav Petkov wrote:
>
> Ok, this return is still bugging me - we're logging the error which
> caused the counter overflow but we go and explicitly clear _STATUS so
> that machine_check_poll doesn't pick up the same error again.
>
> Even though,
On Thu, 2014-10-02 at 15:12 +0200, Borislav Petkov wrote:
Ok, this return is still bugging me - we're logging the error which
caused the counter overflow but we go and explicitly clear _STATUS so
that machine_check_poll doesn't pick up the same error again.
Even though, machine_check_poll
On Thu, 2014-10-02 at 16:38 +0200, Borislav Petkov wrote:
On Mon, Sep 22, 2014 at 09:11:00PM +0200, Borislav Petkov wrote:
On Mon, Sep 22, 2014 at 05:23:32PM +0800, Chen Yucong wrote:
Hi Boris,
I have found the following code snippet in mce_amd.c.
/* cpu init entry point
800
+++ linux-3.16.3/arch/x86/kernel/cpu/mcheck/threshold.c 2014-10-01 08:49:06.140738192 +0800
@@ -17,6 +17,7 @@
}
void (*mce_threshold_vector)(void) = default_threshold_interrupt;
+EXPORT_SYMBOL_GPL(mce_threshold_vector);
static inline void __smp_threshold_interrupt(void)
{
/*
* Co
On Tue, 2014-09-30 at 12:09 +0200, Borislav Petkov wrote:
> On Tue, Sep 30, 2014 at 05:56:31PM +0800, Chen Yucong wrote:
> > I just clear it to avoid that the mce_log() call logs the above
> > threshold event again in machine_check_poll().
>
> Ok, that's a good point, please
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