Ls1012a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl
Ls1028a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl
Ls1088a platform, the i2c input clock is actually platform pll CLK / 8
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl
Lx2160a platform, the i2c input clock is actually platform pll CLK / 16
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl
This patch adds the spi-flash nodes under the DSPI controller for
ls1088a-qds boards.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 33 +++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
This patch adds the DSPI controller node for ls1088a boards.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl
new compatible string: "fsl,ls1088a-dspi".
Signed-off-by: Chuanhua Han
---
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
b/Documentation/devicetree/bindings/spi/spi-fs
Hi, Rafael J. Wysocki
> -Original Message-
> From: Rafael J. Wysocki
> Sent: 2019年7月18日 16:45
> To: Chuanhua Han
> Cc: l...@kernel.org; shawn...@kernel.org; s.ha...@pengutronix.de;
> linux-a...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-...@vger.kern
Enable NXP i2c controller to boot with ACPI
Signed-off-by: Meenakshi Aggarwal
Signed-off-by: Udit Kumar
Signed-off-by: Chuanhua Han
---
drivers/acpi/acpi_apd.c | 6 ++
drivers/i2c/busses/i2c-imx.c | 15 +++
2 files changed, 21 insertions(+)
diff --git a/drivers/acpi
> -Original Message-
> From: Rob Herring
> Sent: 2019年5月24日 20:29
> To: Chuanhua Han
> Cc: Leo Li ; Shawn Guo ;
> mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Ying Zhang
>
> Subject:
Since fsl-ls1088a Soc GPIO registers are used as little endian,
the patch adds the little-endian attribute to each gpio node.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl
.
This patch enable port input and interrupt.
Signed-off-by: Zhang Ying-22455
Signed-off-by: Chuanhua Han
---
drivers/gpio/gpio-mpc8xxx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index c8673a5d9412
GPIO3 and GPIO4 controllers share one irq number on Layerscape
platform. In the current implementation, only one GPIO controller
can register successfully.
This patch is to allow two controllers to share a single interrupt
number.
Signed-off-by: Zhang Ying-22455
Signed-off-by: Chuanhua Han
ls1028a platform uses sp805 watchdog, and use 1/16 platform clock as
timer clock, this patch fix device tree node.
Signed-off-by: Chuanhua Han
---
Changes in v2:
- Replace 'wdt' with 'watchdog' as the node name.
- Keep nodes sort in unit-address.
.../arm64/boot/dts/freescale
Hi, Rob Herring
> -Original Message-
> From: Leo Li
> Sent: 2019年5月22日 14:50
> To: Chuanhua Han ; Shawn Guo
> ; Rob Herring
> Cc: mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Ying Zhang
>
> -Original Message-
> From: Leo Li
> Sent: 2019年5月22日 4:15
> To: Chuanhua Han ; Shawn Guo
>
> Cc: mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Ying Zhang
>
> Subject: RE: [EXT] Re:
> -Original Message-
> From: Leo Li
> Sent: 2019年5月18日 6:01
> To: Chuanhua Han ; Shawn Guo
>
> Cc: mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Ying Zhang
>
> Subject: RE: [EXT] Re:
> -Original Message-
> From: Shawn Guo
> Sent: 2019年5月17日 10:38
> To: Chuanhua Han
> Cc: Leo Li ; mark.rutl...@arm.com;
> linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Ying Zhang
> Subject: [EXT] Re: [PATCH]
ls1028a platform uses sp805 watchdog, and use 1/16 platform clock as
timer clock, this patch fix device tree node.
Signed-off-by: Zhang Ying-22455
Signed-off-by: Chuanhua Han
---
.../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 19 ---
1 file changed, 12 insertions(+), 7
> -Original Message-
> From: Rob Herring
> Sent: 2019年5月3日 4:59
> To: Chuanhua Han
> Cc: mark.rutl...@arm.com; shawn...@kernel.org; s.ha...@pengutronix.de;
> Leo Li ; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org; linux-arm-ker...@lists.i
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:48
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:41
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:38
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:48
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:38
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年5月6日 15:41
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Sascha Hauer
> Sent: 2019年4月30日 20:51
> To: Chuanhua Han
> Cc: shawn...@kernel.org; Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-kernel@vger.kernel.org;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.inf
> -Original Message-
> From: Uwe Kleine-König
> Sent: 2019年4月30日 14:38
> To: Chuanhua Han
> Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org;
> s.ha...@pengutronix.de; Leo Li ;
> linux-kernel@vger.kernel.org; devicet...@vger.kernel
of the desired Clock.
Therefore, if ls1046a SoC is used, we need to set the i2c clock
according to the corresponding RCW.
Signed-off-by: Sumit Batra
Signed-off-by: Chuanhua Han
---
drivers/i2c/busses/i2c-imx.c | 64
1 file changed, 64 insertions(+)
diff --git
For NXP ls1046a SoC, the i2c clock needs to be configured with the
appropriate bit of RCW, so we add the guts node (GUTS/DCFG global
utilities block) for the driver to read.
Signed-off-by: Sumit Batra
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 5 +
1
of the I2C signals.
So in Optional properties we added our custom mul-value property in the
binding to select which mul option for the device tree i2c controller
node.
Signed-off-by: Chuanhua Han
---
Documentation/devicetree/bindings/i2c/i2c-imx.txt | 3 +++
1 file changed, 3 insertions(+)
diff
for MUL=2 and
MUL=4,so we need to add the corresponding support.
Signed-off-by: Sumit Batra
Signed-off-by: Chuanhua Han
---
drivers/i2c/busses/i2c-imx.c | 71 +++-
1 file changed, 69 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-imx.c b
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index b0ef08b090dd..373310e4c0ea 100644
--- a/arch/arm64/boot/dts/fre
Some SoC share one irq number between DSPI controllers.
For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number.
In this case, only one DSPI controller can register successfully,
and others will fail.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 4 ++--
1 file
Some SoC share one irq number between DSPI controllers.
For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number.
In this case, only one DSPI controller can register successfully,
and others will fail.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 4 ++--
1 file
Some SoC share one irq number between DSPI controllers.
For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number.
In this case, only one DSPI controller can register successfully,
and others will fail.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 4 ++--
1 file
Some SoC share one irq number between DSPI controllers.
For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number.
In this case, only one DSPI controller can register successfully,
and others will fail.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 4 ++--
1 file
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年10月9日 19:21
> To: Chuanhua Han
> Cc: Boris Brezillon ; broo...@kernel.org;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATC
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年10月9日 19:21
> To: Chuanhua Han
> Cc: Boris Brezillon ; broo...@kernel.org;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATC
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年10月9日 18:05
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function
&g
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年10月9日 18:05
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function
&g
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 15:19
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw functio
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 15:19
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw functio
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:40
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 1/4] spi: spi-mem: Add the spi_set_xfer_bpw functio
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:40
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 1/4] spi: spi-mem: Add the spi_set_xfer_bpw functio
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年9月30日 18:18
> To: Boris Brezillon
> Cc: Chuanhua Han ; broo...@kernel.org;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年9月30日 18:18
> To: Boris Brezillon
> Cc: Chuanhua Han ; broo...@kernel.org;
> linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:17
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 2/4] spi: spi-fsl-dspi: Fix delete the processing o
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:17
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 2/4] spi: spi-fsl-dspi: Fix delete the processing o
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:04
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 1/4] spi: spi-mem: Add the spi_set_xfer_bpw func
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:04
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 1/4] spi: spi-mem: Add the spi_set_xfer_bpw func
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:07
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 2/4] spi: spi-fsl-dspi: Fix delete the processing o
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月30日 18:07
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH v2 2/4] spi: spi-fsl-dspi: Fix delete the processing o
Before we add this spi_transfer to the spi_message chain table, we need
bits_per_word_mask based on spi_control to set the bits_per_word of
this spi_transfer.
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is &quo
when no data can be read or written (all the data
obtained is equal to 0).
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is "spi: spi-fsl-dspi: Fix support for XSPI transport
mode"),one of which is segmented.
that the byte
order of the data was reversed by the correct byte order.
When I changed the byte order according to the SPIx_CTARn[LSBFE] flag,
the correct data was obtained.
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch
-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is "spi: spi-fsl-dspi: Fix support for XSPI transport
mode"),one of which is segmented.
drivers/spi/spi-fsl-dspi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
when no data can be read or written (all the data
obtained is equal to 0).
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is "spi: spi-fsl-dspi: Fix support for XSPI transport
mode"),one of which is segmented.
that the byte
order of the data was reversed by the correct byte order.
When I changed the byte order according to the SPIx_CTARn[LSBFE] flag,
the correct data was obtained.
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch
-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is "spi: spi-fsl-dspi: Fix support for XSPI transport
mode"),one of which is segmented.
drivers/spi/spi-fsl-dspi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
Before we add this spi_transfer to the spi_message chain table, we need
bits_per_word_mask based on spi_control to set the bits_per_word of
this spi_transfer.
Signed-off-by: Chuanhua Han
---
Changes in v2:
-The original patch is divided into multiple patches(the original
patch theme is &quo
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年9月29日 22:56
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; boris.brezil...@bootlin.com
> Subject: Re: [PATCH 2/2
> -Original Message-
> From: Esben Haabendal On Behalf Of Esben
> Haabendal
> Sent: 2018年9月29日 22:56
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; boris.brezil...@bootlin.com
> Subject: Re: [PATCH 2/2
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 15:19
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw functio
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 15:19
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw functio
HI,Boris,
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 14:45
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer
HI,Boris,
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年9月28日 14:45
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; e...@deif.com
> Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han
> Subject: [PATCH 2/2] spi: spi-fsl-dspi: Fix suppo
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han
> Subject: [PATCH 2/2] spi: spi-fsl-dspi: Fix suppo
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han
> Subject: [PATCH 1/2] spi: spi-mem: Add the spi_
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han
> Subject: [PATCH 1/2] spi: spi-mem: Add the spi_
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han ;
> sta...@vger.kernel.org
> Subject: [PATCH] spi
> -Original Message-
> From: Chuanhua Han
> Sent: 2018年9月21日 15:06
> To: broo...@kernel.org
> Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; e...@deif.com;
> boris.brezil...@bootlin.com; Chuanhua Han ;
> sta...@vger.kernel.org
> Subject: [PATCH] spi
Before we add this spi_transfer to the spi_message chain table, we need
bits_per_word_mask based on spi_control to set the bits_per_word of
this spi_transfer.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-mem.c | 39 +++
1 file changed, 39 insertions
We need that to adjust the len of the 2nd transfer (called data in
spi-mem) if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Chuanhua Han
Reviewed-by: Boris Brezill
This patch fixes the problem that the XSPI mode of the dspi controller
cannot transfer data properly.
In XSPI mode, cmd_fifo is written before tx_fifo, which transforms the
byte order of sending and receiving data.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 29
Before we add this spi_transfer to the spi_message chain table, we need
bits_per_word_mask based on spi_control to set the bits_per_word of
this spi_transfer.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-mem.c | 39 +++
1 file changed, 39 insertions
We need that to adjust the len of the 2nd transfer (called data in
spi-mem) if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Chuanhua Han
Reviewed-by: Boris Brezill
This patch fixes the problem that the XSPI mode of the dspi controller
cannot transfer data properly.
In XSPI mode, cmd_fifo is written before tx_fifo, which transforms the
byte order of sending and receiving data.
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-dspi.c | 29
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年8月30日 17:17
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; sta...@vger.kernel.org
> Subject: Re: [PATCH v5] spi: spi-mem: Adjust op len based on me
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年8月30日 17:17
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; sta...@vger.kernel.org
> Subject: Re: [PATCH v5] spi: spi-mem: Adjust op len based on me
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年8月30日 16:47
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; sta...@vger.kernel.org
> Subject: Re: [PATCH v5] spi: spi-mem: Adjust op len based on me
> -Original Message-
> From: Boris Brezillon
> Sent: 2018年8月30日 16:47
> To: Chuanhua Han
> Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; sta...@vger.kernel.org
> Subject: Re: [PATCH v5] spi: spi-mem: Adjust op len based on me
We need that to adjust the len of the 2nd transfer (called data in
spi-mem) if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Chuanhua Han
Reviewed-by: Boris
We need that to adjust the len of the 2nd transfer (called data in
spi-mem) if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Chuanhua Han
Reviewed-by: Boris
We need that to adjust the len of the 2nd transfer (called data in spi-mem)
if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Boris Brezillon
Signed-off-by: Ch
We need that to adjust the len of the 2nd transfer (called data in spi-mem)
if it's too long to fit in a SPI message or SPI transfer.
Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
controllers")
Cc:
Signed-off-by: Boris Brezillon
Signed-off-by: Ch
Signed-off-by: Chuanhua Han
---
Changes in v3:
Rename variable name "val" to "opcode_addr_dummy_sum".
Place the legitimacy of the transfer size(i.e.,
"pi_max_message_size(mem->spi)" and
"opcode_addr_dummy_sum") into "if (! ctlr - >
Signed-off-by: Chuanhua Han
---
Changes in v3:
Rename variable name "val" to "opcode_addr_dummy_sum".
Place the legitimacy of the transfer size(i.e.,
"pi_max_message_size(mem->spi)" and
"opcode_addr_dummy_sum") into "if (! ctlr - >
Signed-off-by: Chuanhua Han
---
Changes in v2:
- Place the adjusted transfer bytes code in spi_mem_adjust_op_size()
and check spi_max_message_size(mem->spi) value before subtracting
opcode, addr and dummy bytes.
*fixes:
spi: Extend the core to ease integrat
Signed-off-by: Chuanhua Han
---
Changes in v2:
- Place the adjusted transfer bytes code in spi_mem_adjust_op_size()
and check spi_max_message_size(mem->spi) value before subtracting
opcode, addr and dummy bytes.
*fixes:
spi: Extend the core to ease integrat
The length of the transmitted data needs to be adjusted due to the maximum
length limit for espi transmission messages
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-espi.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers
The length of the transmitted data needs to be adjusted due to the maximum
length limit for espi transmission messages
Signed-off-by: Chuanhua Han
---
drivers/spi/spi-fsl-espi.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers
Consider a message size limit when calculating the maximum amount
of data that can be read.
Signed-off-by: Chuanhua Han
---
drivers/mtd/devices/m25p80.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index
Consider a message size limit when calculating the maximum amount
of data that can be read.
Signed-off-by: Chuanhua Han
---
drivers/mtd/devices/m25p80.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index
95 matches
Mail list logo