Re: [PATCH 2/2] ASoC: DA7219: Implement error check on reg read and write

2018-12-05 Thread Daniel Kurtz
On Wed, Dec 5, 2018 at 4:28 AM Mark Brown wrote: > > On Wed, Dec 05, 2018 at 10:21:04AM +, Adam Thomson wrote: > > > If the previous I2C access failed, how can we be sure that the write back > > to HW > > of 0xFF even succeeds? More importantly these error returns won't > > necessarily > >

Re: [PATCH] ASoC: AMD: Fix race condition between register access

2018-10-29 Thread Daniel Kurtz
Hi Akshu, On Mon, Oct 29, 2018 at 1:39 AM Agrawal, Akshu wrote: > > During simultaneous running of playback and capture, we > got hit by incorrect value write on common register. This was due > to race condition between 2 streams. > Fixing this by locking the common register access. Nice

[PATCH] pinctrl/amd: poll InterruptEnable bits in amd_gpio_irq_set_type

2018-09-22 Thread Daniel Kurtz
emporarily disabled IRQ and incorrectly disable it while trying to modify some other register bits. Fixes: 4c1de0414a1340 pinctrl/amd: poll InterruptEnable bits in enable_irq Signed-off-by: Daniel Kurtz --- drivers/pinctrl/pinctrl-amd.c | 33 +++-- 1 file changed, 23 insertions(+)

Re: [PATCH] ASoC: AMD: Change MCLK to 48Mhz

2018-08-27 Thread Daniel Kurtz
hu Agrawal Reviewed-by: Daniel Kurtz > --- > sound/soc/amd/acp-da7219-max98357a.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/sound/soc/amd/acp-da7219-max98357a.c > b/sound/soc/amd/acp-da7219-max98357a.c > index cf2f648..55d7f61 100644 > --- a

Re: [PATCH] ASoC: AMD: Set constraints for DMIC and MAX98357a codec

2018-08-27 Thread Daniel Kurtz
On Tue, Aug 21, 2018 at 12:55 AM Akshu Agrawal wrote: > > We support dual channel, 48Khz. This constraint was set only for > da7219. It is being extended to DMIC and MAX98357a. > > Signed-off-by: Akshu Agrawal Reviewed-by: Daniel Kurtz > --- > sound/soc/amd/acp-da

Re: [PATCH] clk: x86: Set default parent to 48Mhz

2018-08-27 Thread Daniel Kurtz
On Tue, Aug 21, 2018 at 12:53 AM Akshu Agrawal wrote: > > System clk provided in ST soc can be set to: > 48Mhz, non-spread > 25Mhz, spread > To get accurate rate, we need it to set it at non-spread > option which is 48Mhz. > > Signed-off-by: Akshu Agrawal R

[PATCH v2] pinctrl/amd: use byte access to clear irq/wake status bits

2018-08-22 Thread Daniel Kurtz
These two are the only write-able bits in this byte. Therefore, it should be safe to just write these bits back as a byte access without any additional locking. Signed-off-by: Daniel Kurtz --- drivers/pinctrl/pinctrl-amd.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git

[PATCH v2] ASoC: da7219: Allow pdata to specify a VDDIO

2018-07-22 Thread Daniel Kurtz
. Calling regulator_get_voltage() on a dummy regulator just returns -EINVAL, in which case the DA7219 is always set up to use the default VDDIO voltage range of 2.5-3.6V. Provide a new device property to let such systems specify a different VDDIO if needed (e.g., 1.8V). Signed-off-by: Daniel Kurtz -

[PATCH] ASoC: da7219: Allow pdata to specify a VDDIO

2018-07-20 Thread Daniel Kurtz
. Calling regulator_get_voltage() on a dummy regulator just returns -EINVAL, in which case the DA7219 is always set up to use the default VDDIO voltage range of 2.5-3.6V. Provide a new device property to let such systems specify a different VDDIO if needed (e.g., 1.8V). Signed-off-by: Da

Re: [PATCH 2/2] pinctrl/amd: use byte access to clear irq/wake status bits

2018-07-20 Thread Daniel Kurtz
Hi Daniel, On Tue, Jul 17, 2018 at 6:30 AM Daniel Drake wrote: > > On Mon, Jul 16, 2018 at 7:57 PM, Daniel Kurtz wrote: > > Commit 6afb10267c1692 ("pinctrl/amd: fix masking of GPIO interrupts") > > changed to the clearing of interrupt status bits to a RMW in a criti

[PATCH 2/2] ASoC: AMD: Add an always on fixed 1.8V regulator for da7219 VDDIO

2018-07-17 Thread Daniel Kurtz
From: Akshu Agrawal DA7219's VDDIO for our platform need to be configured for 1.8V. Hence we register a fixed 1.8V voltage regulator in the machine driver. Change-Id: I65fd93e1dd37c3e0d38265b4b1492ea53b93afd4 Signed-off-by: Akshu Agrawal Signed-off-by: Daniel Kurtz --- sound/soc/amd/Kconfig

[PATCH 1/2] regulator: allow drivers in modules to register fixed regulators

2018-07-17 Thread Daniel Kurtz
Sound machine drivers tend to live in modules. Sometimes such a machine driver needs to register a fixed regulator to provide to a codec. Export regulator_register_always_on() such that this is possible. Change-Id: I2906f96df278b5fa65d40d3a777bf6d3d91841d2 Signed-off-by: Daniel Kurtz

[PATCH] pinctrl/amd: fix gpio irq level in debugfs

2018-07-16 Thread Daniel Kurtz
ive on both" to just the edge trigger case, and refactor a bit to make the logic more readable. Change-Id: Id7775ae4cb61d193fa7fbb83967a8c5a7cdd0de6 Signed-off-by: Daniel Kurtz --- drivers/pinctrl/pinctrl-amd.c | 14 +++--- drivers/pinctrl/pinctrl-amd.h | 4 2 files changed, 11

[PATCH 1/2] pinctrl/amd: only handle irq if it is pending and unmasked

2018-07-16 Thread Daniel Kurtz
q(). Note: Is it possible that this bug was the source of the interrupt storm on Ryzen when using chained interrupts before commit ba714a9c1dea85 ("pinctrl/amd: Use regular interrupt instead of chained")? Signed-off-by: Daniel Kurtz --- drivers/pinctrl/pinctrl-amd.c | 3 ++- 1 file changed

[PATCH 2/2] pinctrl/amd: use byte access to clear irq/wake status bits

2018-07-16 Thread Daniel Kurtz
These two are the only write-able bits in this byte. Therefore, it should be safe to just write these bits back as a byte access without any additional locking. Signed-off-by: Daniel Kurtz --- drivers/pinctrl/pinctrl-amd.c | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git

[PATCH 3/6] ASoC: AMD: Always subtract bytescount

2018-07-02 Thread Daniel Kurtz
It is always correct to subtract out the starting bytescount value. Even in the case of 2^64 byte rollover (292 Million Years in the future @ 48000 Hz) the math still works out. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions

[PATCH 5/6] ASoC: AMD: Do not generate interrups for every captured sample

2018-07-02 Thread Daniel Kurtz
anyway, disable it to save quite a few unnecessary interrupts. The real "work" (calling snd_pcm_period_elapsed()) is done when transfer from ACP to SYSRAM is complete. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 15 --- 1 file changed, 15 deletions(-) diff --g

[PATCH 1/6] ASoC: AMD: Always stop ch2 first

2018-07-02 Thread Daniel Kurtz
ay/capture repeated samples after the upstream circular DMA channel has already stopped. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 17 ++--- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-d

[PATCH 2/6] ASoC: AMD: Reset bytescount when starting transaction

2018-07-02 Thread Daniel Kurtz
, so remove this unnecessary code. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index 4665ae12e74e4..e6f85f2e5ac2a 100644 --- a/sound/soc/amd/acp-pcm

[PATCH 4/6] ASoC: AMD: Fix Capture DMA channel names

2018-07-02 Thread Daniel Kurtz
On capture, audio data is first copied from I2S to ACP memory, and then to SYSRAM. For each step the channel number increases, so the names in the driver were wrong. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 24 sound/soc/amd/acp.h | 8

[PATCH 6/6] ASoC: AMD: Simplify trigger handler

2018-07-02 Thread Daniel Kurtz
Now that the I2S channel names are fixed, and DMA data flow order is consistent (ch1 then ch2), we can simplify channel start order: start the upstream channel and then the downstream channel for both playback and capture cases. Signed-off-by: Daniel Kurtz --- sound/soc/amd/acp-pcm-dma.c | 9

Re: [PATCH] ASoC: AMD: make channel 1 dma as circular

2018-05-26 Thread Daniel Kurtz
period granularity on hw pointer. > Signed-off-by: Akshu Agrawal <akshu.agra...@amd.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org> Tested-by: Daniel Kurtz <djku...@chromium.org> > --- > sound/soc/amd/acp-pcm-dma.c | 72 +++-

Re: [PATCH v3 2/2] ACPI: APD: Add AMD misc clock handler support

2018-05-09 Thread Daniel Kurtz
andler will create MMIO mappings to access the > clock registers and enable the clock driver to expose the clock > for use of drivers which will connect to it. > Signed-off-by: Akshu Agrawal <akshu.agra...@amd.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org> > --- >

Re: [PATCH v5 1/2] clk: x86: Add ST oscout platform clock

2018-05-09 Thread Daniel Kurtz
On Wed, May 9, 2018 at 4:01 AM Akshu Agrawal <akshu.agra...@amd.com> wrote: > Stoney SoC provides oscout clock. This clock can support 25Mhz and > 48Mhz of frequency. > The clock is available for general system use. > Signed-off-by: Akshu Agrawal <akshu.agra...@amd.com&

Re: [PATCH V3 10/10] ASoC: amd: dma driver changes for bt i2s instance

2018-05-07 Thread Daniel Kurtz
On Thu, May 3, 2018 at 10:35 PM Agrawal, Akshu <akshu.agra...@amd.com> wrote: > On 5/3/2018 10:10 PM, Daniel Kurtz wrote: > > On Thu, May 3, 2018 at 1:33 AM Mukunda,Vijendar < vijendar.muku...@amd.com> > > wrote: > > > > > > > >> On Thursda

Re: [PATCH v3] ASoC: da7219: read fmw property to get mclk for non-dts systems

2018-05-07 Thread Daniel Kurtz
current code of handling of mclk in the driver is usable only by DT. > The device_property (though ACPI specific) makes this code, a common > code for DT and ACPI based devices. > https://www.kernel.org/doc/Documentation/acpi/DSD-properties-rules.txt > "Still, for the sake of code re-use, it may make sense to provide as > much of the configuration data as possible in the form of device > properties and complement that with an ACPI-specific mechanism suitable > for the use case at hand.." This sounds like a pretty reasonable justification for addressing the issue using DSD to me. For what its worth, you can add: Reviewed-by: Daniel Kurtz <djku...@chromium.org> > Thanks, > Akshu

Re: [PATCH V3 10/10] ASoC: amd: dma driver changes for bt i2s instance

2018-05-03 Thread Daniel Kurtz
On Thu, May 3, 2018 at 1:33 AM Mukunda,Vijendar <vijendar.muku...@amd.com> wrote: > On Thursday 03 May 2018 11:13 AM, Daniel Kurtz wrote: > > Some checkpatch nits below... > > > > On Tue, May 1, 2018 at 2:53 PM Vijendar Mukunda < vijendar.muku...@amd.com>

Re: [PATCH V3 10/10] ASoC: amd: dma driver changes for bt i2s instance

2018-05-02 Thread Daniel Kurtz
Some checkpatch nits below... On Tue, May 1, 2018 at 2:53 PM Vijendar Mukunda wrote: > With in ACP, There are three I2S controllers can be > configured/enabled ( I2S SP, I2S MICSP, I2S BT). > Default enabled I2S controller instance is I2S SP. > This patch provides

Re: [PATCH 09/11] ASoC: AMD: Fix clocks in CZ DA7219 machine driver

2018-04-29 Thread Daniel Kurtz
> Signed-off-by: Akshu Agrawal <akshu.agra...@amd.com> > Signed-off-by: Vijendar Mukunda <vijendar.muku...@amd.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org> > --- > sound/soc/amd/acp-da7219-max98357a.c | 5 ++--- > 1 file changed, 2 insertions(+)

Re: [PATCH 10/11] ASoC: AMD: Add const to snd_soc_ops instances

2018-04-29 Thread Daniel Kurtz
jendar.muku...@amd.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org> > --- > sound/soc/amd/acp-da7219-max98357a.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c >

Re: [PATCH 02/11] ASoC: amd: dma config parameters changes

2018-04-29 Thread Daniel Kurtz
Hi Vijendar, On Thu, Apr 26, 2018 at 5:14 AM Vijendar Mukunda wrote: > Added dma configuration parameters to rtd structure. > Moved dma configuration parameters intialization to > hw_params callback. > Removed hard coding in prepare and trigger callbacks. >

Re: [PATCH 05/11] ASoC: amd: pte offset related dma driver changes

2018-04-29 Thread Daniel Kurtz
On Thu, Apr 26, 2018 at 5:16 AM Vijendar Mukunda wrote: > Added pte offset variable in audio_substream_data structure. > Added Stoney related PTE offset macros in acp header file. > Modified hw_params callback to assign the pte offset value > based on asic_type. >

Re: [PATCH 06/11] ASoC: amd: sram bank update changes

2018-04-29 Thread Daniel Kurtz
On Thu, Apr 26, 2018 at 5:16 AM Vijendar Mukunda <vijendar.muku...@amd.com> wrote: > Added sram bank variable to audio_substream_data structure. > Signed-off-by: Vijendar Mukunda <vijendar.muku...@amd.com> Move initialization to acp_dma_open(), otherwise this is: Reviewed-by:

Re: [PATCH 04/11] ASoC: amd: removed separate byte count variables for playback and capture

2018-04-29 Thread Daniel Kurtz
Hi Vijendar, On Thu, Apr 26, 2018 at 5:15 AM Vijendar Mukunda <vijendar.muku...@amd.com> wrote: > Removed separate byte count variables for playback and capture. > Signed-off-by: Vijendar Mukunda <vijendar.muku...@amd.com> Reviewed-by: Daniel Kurtz <djku...@chromium.org&

Re: [PATCH 03/11] ASoC: amd: added byte count register offset variables to rtd

2018-04-29 Thread Daniel Kurtz
Please fix the small indentation nits, otherwise this one is: Reviewed-by: Daniel Kurtz <djku...@chromium.org> > --- > sound/soc/amd/acp-pcm-dma.c | 36 +++- > sound/soc/amd/acp.h | 2 ++ > 2 files changed, 17 insertions(+), 21 deletio

Re: [PATCH 2/3] ASoC: AMD: Move clk enable from hw_params/free to startup/shutdown

2018-04-24 Thread Daniel Kurtz
On Mon, Apr 23, 2018 at 9:03 PM Vijendar Mukunda wrote: > From: Akshu Agrawal > hw_param can be called multiple times and thus we can have > more clk enable. The clk may not get diabled due to refcounting. > startup/shutdown ensures single clk

Re: [PATCH 1/3] ASoC: amd: acp dma driver code cleanup

2018-04-24 Thread Daniel Kurtz
Hi Vijendar, On Mon, Apr 23, 2018 at 9:02 PM Vijendar Mukunda wrote: > Added dma configuration parameters in audio_substream_data > structure. Moved dma configuration parameters initialization > to dma hw params callback. > Removed separate byte count variables for

Re: [PATCH v2 2/3] ASoC: amd: dma driver changes for BT I2S instance

2018-04-18 Thread Daniel Kurtz
Hi Vijendar, On Wed, Apr 18, 2018 at 5:02 AM Vijendar Mukunda wrote: > With in ACP, There are three I2S controllers can be > configured/enabled ( I2S SP, I2S MICSP, I2S BT). > Default enabled I2S controller instance is I2S SP. > This patch provides required changes to

[PATCH] drm/amdgpu/acp: Fix slab-out-of-bounds in mfd_add_device in acp_hw_init

2018-04-13 Thread Daniel Kurtz
3509] 880107d4dd00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc [6.613509] == Fixes: 51f7415039d4 ("drm/amd/amdgpu: creating two I2S instances for stoney/cz") Signed-off-by: Daniel Kurtz <djku...@chromium.org

[PATCH v6] earlycon: Use a pointer table to fix __earlycon_table stride

2018-04-06 Thread Daniel Kurtz
using pointer array") e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array") Let's use this same "array of pointers to structs" approach for EARLYCON_TABLE. Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride") Signed-off-by: Dani

[PATCH] mmc: sdhci-pci: Only do AMD tuning for HS200

2018-04-06 Thread Daniel Kurtz
0 specific tuning for HS200, and otherwise call back to the standard sdhci_execute_tuning(). Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/mmc/host/sdhci-pci-core.c | 25 +++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/

Re: [PATCH v8 11/14] iommu/rockchip: Use OF_IOMMU to attach devices automatically

2018-04-03 Thread Daniel Kurtz
Hi Jeffy, Sorry for delayed response. On Mon, Mar 26, 2018 at 1:58 AM JeffyChen <jeffy.c...@rock-chips.com> wrote: > Hi Daniel, > Thanks for your reply. > On 03/26/2018 02:31 PM, Daniel Kurtz wrote: > >> >+struct rk_iommudata { > >> >+ struct r

Re: [PATCH v8 11/14] iommu/rockchip: Use OF_IOMMU to attach devices automatically

2018-03-26 Thread Daniel Kurtz
> + .of_xlate = rk_iommu_of_xlate, > }; > static int rk_iommu_probe(struct platform_device *pdev) > @@ -1178,6 +1119,8 @@ static int rk_iommu_probe(struct platform_device *pdev) > goto err_unprepare_clocks; > iommu_device_set_ops(>iommu, _iommu_ops); > + iommu_device_set_fwnode(>iommu, >of_node->fwnode); > + > err = iommu_device_register(>iommu); > if (err) > goto err_remove_sysfs; > @@ -1250,6 +1193,8 @@ static int __init rk_iommu_init(void) > } > subsys_initcall(rk_iommu_init); > +IOMMU_OF_DECLARE(rk_iommu_of, "rockchip,iommu"); > + > MODULE_DESCRIPTION("IOMMU API for Rockchip"); > MODULE_AUTHOR("Simon Xue <x...@rock-chips.com> and Daniel Kurtz < djku...@chromium.org>"); > MODULE_ALIAS("platform:rockchip-iommu"); > -- > 2.11.0

Re: [PATCH v2 0/2] Fix __earlycon_table stride... again

2018-03-23 Thread Daniel Kurtz
On Fri, Mar 23, 2018 at 7:34 AM Greg Kroah-Hartman < gre...@linuxfoundation.org> wrote: > On Tue, Mar 20, 2018 at 11:57:10AM -0600, Daniel Kurtz wrote: > > The __earlycon_table lives in a special "__earlycon_table" section. The > > contents of this table are added

[PATCH v5] earlycon: Use a pointer table to fix __earlycon_table stride

2018-03-20 Thread Daniel Kurtz
using pointer array") e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array") Let's use this same "array of pointers to structs" approach for EARLYCON_TABLE. Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride") Signed-of

[PATCH v4] earlycon: Use a pointer table to fix __earlycon_table stride

2018-03-20 Thread Daniel Kurtz
using pointer array") e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array") Let's use this same "array of pointers to structs" approach for EARLYCON_TABLE. Change-Id: Ic42c4db0c8b034fa6aa2bf02eef0fdc159478ac4 Fixes: 99492c39f39f ("earl

[PATCH v3] earlycon: Use a pointer table to fix __earlycon_table stride

2018-03-20 Thread Daniel Kurtz
alignment using pointer array") e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array") Let's use this same "array of pointers to structs" approach for EARLYCON_TABLE. Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride") Signed-of

[PATCH v2 2/2] earlycon: Use a pointer table to fix __earlycon_table stride

2018-03-20 Thread Daniel Kurtz
alignment using pointer array") e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array") Let's use this same "array of pointers to structs" approach for EARLYCON_TABLE. Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride") Signed-of

[PATCH v2 0/2] Fix __earlycon_table stride... again

2018-03-20 Thread Daniel Kurtz
s is a fix that should hopefully fix a kbuild error that seems to be triggered by Patch 2. Daniel Kurtz (2): serial: sh-sci: Remove __initdata attribute for struct 'port_cfg' earlycon: Use a pointer table to fix __earlycon_table stride drivers/of/fdt.c | 7 +-- drivers/

[PATCH v2 1/2] serial: sh-sci: Remove __initdata attribute for struct 'port_cfg'

2018-03-20 Thread Daniel Kurtz
SCI_NPORTS]; Thus, there is a non-__initdata variable containing the address of a __initdata struct. Fix this section type conflict by just removing the __initdata attribute. Fixes: dd076cffb8cd ("serial: sh-sci: Fix init data attribute for struct 'port_cfg'") Signed-off-by

Re: [PATCH v3 3/3] serial: core: Allow skipping old serial port initialization

2018-03-15 Thread Daniel Kurtz
On Thu, Mar 15, 2018 at 7:04 AM Andy Shevchenko < andriy.shevche...@linux.intel.com> wrote: > On Wed, 2018-03-14 at 20:04 -0600, Daniel Kurtz wrote: > > The old_serial_port global array in 8250_core is supposed to hold an > > entry > > for each serial port on the syste

Re: [PATCH v2] earlycon: Fix __earlycon_table stride... again

2018-03-15 Thread Daniel Kurtz
On Wed, Mar 14, 2018 at 8:33 PM Randy Dunlap <rdun...@infradead.org> wrote: > On 03/14/2018 06:48 PM, Daniel Kurtz wrote: > > Commit 470ca0de69fe ("serial: earlycon: Enable earlycon without command > > line param") added EARLYCON_TABLE(). > > &g

[PATCH v3 0/3] Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
skip initialization of old serial ports that do not exist on these SoCs. Daniel Kurtz (3): serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge ACPI: SPCR: Add support for AMD CT/SZ serial: core: Allow skipping old serial port initialization drivers/acpi/sp

[PATCH v3 2/3] ACPI: SPCR: Add support for AMD CT/SZ

2018-03-14 Thread Daniel Kurtz
-by: Daniel Kurtz <djku...@chromium.org> Reviewed-by: Andy Shevchenko <andy.shevche...@gmail.com> --- Changes since v1: * added Reviewed-by drivers/acpi/spcr.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c index

[PATCH v3 1/3] serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz input clock. Allow these platforms to set up this clock by specifying a kernel command line like: earlycon=amdcz,mmio32,0xfedc6000,115200 Signed-off-by: Daniel Kurtz <djku...@chromium.org> Suggested-by: Andy Shev

[PATCH v3 3/3] serial: core: Allow skipping old serial port initialization

2018-03-14 Thread Daniel Kurtz
-existing serial port. Create a global variable to allow skipping old serial port initialization and wire it up to the AMDCZ ACPI SPCR quirk and the special amdcz earlycon setup handler. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- Changes since v1: * Rename va

[PATCH v3 0/3] Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
skip initialization of old serial ports that do not exist on these SoCs. Daniel Kurtz (3): serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge ACPI: SPCR: Add support for AMD CT/SZ serial: core: Allow skipping old serial port initialization drivers/acpi/sp

Re: [PATCH v2] earlycon: Fix __earlycon_table stride... again

2018-03-14 Thread Daniel Kurtz
On Wed, Mar 14, 2018 at 7:48 PM Daniel Kurtz <djku...@chromium.org> wrote: > Commit 470ca0de69fe ("serial: earlycon: Enable earlycon without command > line param") added EARLYCON_TABLE(). > Commit 99492c39f39f ("earlycon: Fix __earlycon_table stride") reference

[PATCH v2] earlycon: Fix __earlycon_table stride... again

2018-03-14 Thread Daniel Kurtz
654986462939 ("tracepoints: Fix section alignment using pointer array") and commit e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array"). Let's do the same "array of pointers to structs" approach for EARLYCON_TABLE. Signed-off-b

Re: [PATCH v2 3/3] serial: core: Allow skipping old serial port initialization

2018-03-14 Thread Daniel Kurtz
On Wed, Mar 14, 2018 at 6:55 PM Kees Cook <keesc...@chromium.org> wrote: > On Wed, Mar 14, 2018 at 5:23 PM, Daniel Kurtz <djku...@chromium.org> wrote: > > On Wed, Mar 14, 2018 at 5:00 PM Kees Cook <keesc...@chromium.org> wrote: > > > >> On Wed,

Re: [PATCH v2 3/3] serial: core: Allow skipping old serial port initialization

2018-03-14 Thread Daniel Kurtz
On Wed, Mar 14, 2018 at 5:00 PM Kees Cook <keesc...@chromium.org> wrote: > On Wed, Mar 14, 2018 at 3:58 PM, Kees Cook <keesc...@chromium.org> wrote: > > On Wed, Mar 14, 2018 at 2:44 PM, Daniel Kurtz <djku...@chromium.org> wrote: > > Sorry for being dense. What t

[PATCH v2 2/3] ACPI: SPCR: Add support for AMD CT/SZ

2018-03-14 Thread Daniel Kurtz
-by: Daniel Kurtz <djku...@chromium.org> Reviewed-by: Andy Shevchenko <andy.shevche...@gmail.com> --- drivers/acpi/spcr.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c index 9d52743080a4..52d840d0e05b 100644 --- a/

[PATCH v2 1/3] serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz input clock. Allow these platforms to set up this clock by specifying a kernel command line like: earlycon=amdcz,mmio32,0xfedc6000,115200 Signed-off-by: Daniel Kurtz <djku...@chromium.org> Suggested-by: Andy Shev

[PATCH v2 3/3] serial: core: Allow skipping old serial port initialization

2018-03-14 Thread Daniel Kurtz
-existing serial port. Create a global variable to allow skipping old serial port initialization and wire it up to the AMDCZ ACPI SPCR quirk and the special amdcz earlycon setup handler. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- Changes since v1: * Rename va

[PATCH v2 0/3] Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
skip initialization of old serial ports that do not exist on these SoCs. Daniel Kurtz (3): serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge ACPI: SPCR: Add support for AMD CT/SZ serial: core: Allow skipping old serial port initialization drivers/acpi/sp

Re: [PATCH 1/3] serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-14 Thread Daniel Kurtz
Hi Ricardo, On Wed, Mar 14, 2018 at 4:54 AM Ricardo Ribalda Delgado < ricardo.riba...@gmail.com> wrote: > Hi Daniel > On Wed, Mar 14, 2018 at 1:36 AM, Daniel Kurtz <djku...@chromium.org> wrote: > > > > AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that

[PATCH 2/3] ACPI: SPCR: Add support for AMD CT/SZ

2018-03-13 Thread Daniel Kurtz
-by: Daniel Kurtz <djku...@chromium.org> --- drivers/acpi/spcr.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c index 9d52743080a4..52d840d0e05b 100644 --- a/drivers/acpi/spcr.c +++ b/drivers/acpi/spcr.c @@ -73,6 +73,24 @@

[PATCH 3/3] serial: core: Allow skipping old serial port initialization

2018-03-13 Thread Daniel Kurtz
will appear to disappear (when the bogus old takes over) and then re-appear (when the real UART finally gets registered for the console). Create a global variable to allow skipping old serial port initialization and wire it up to the special amdcz earlycon setup handler. Signed-off-by: Daniel Kurtz

[PATCH 1/3] serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge

2018-03-13 Thread Daniel Kurtz
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz input clock. Allow these platforms to set up this clock by specifying a kernel command line like: earlycon=amdcz,mmio32,0xfedc6000,115200 Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/tty/seria

[PATCH] earlycon: Fix __earlycon_table stride... again

2018-03-13 Thread Daniel Kurtz
for earlycon declarations") added the compatible field, which bumped EARLYCON_TABLE() alignment to 128 bytes (LCM of size of all fields of struct earlycon_id. Correct the struct definition and linker alignment to match. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- i

[PATCH] pinctrl/amd: poll InterruptEnable bits in enable_irq

2018-03-12 Thread Daniel Kurtz
nterrupts have truly been enabled in hardware before returning from the irq_enable handler. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/pinctrl/pinctrl-amd.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctr

Re: [PATCH v2] earlycon: Allow specifying a uartclk in options

2018-03-07 Thread Daniel Kurtz
On Thu, Mar 1, 2018 at 11:43 AM Daniel Kurtz <djku...@chromium.org> wrote: > Currently when an earlycon is registered, the uartclk is assumed to be > BASE_BAUD * 16 = 1843200. If a baud rate is specified in the earlycon > options, then 8250_early's init_port will program the UAR

[PATCH 1/2] x86/Kconfig: Add config for specifying BASE_BAUD

2018-03-07 Thread Daniel Kurtz
the UART clock used early in boot before the real serial drivers have a chance to load and read their input clock configuration from ACPI. Add a Kconfig option to override this default hard coded value. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- arch/x86/Kconfig

[PATCH 2/2] x86/Kconfig: Add config to allow not defining old serial ports

2018-03-07 Thread Daniel Kurtz
will appear to disappear (when the bogus old takes over) and then re-appear (when the real UART finally gets registered for the console). Add a Kconfig option to allow overriding this default hard coded value for arch/x86 devices that do not have such serial ports. Signed-off-by: Daniel Kurtz <d

Re: [PATCH v2] earlycon: Allow specifying a uartclk in options

2018-03-02 Thread Daniel Kurtz
On Thu, Mar 1, 2018 at 1:02 PM Andy Shevchenko <andy.shevche...@gmail.com> wrote: > On Thu, Mar 1, 2018 at 9:22 PM, Daniel Kurtz <djku...@chromium.org> wrote: > > On Thu, Mar 1, 2018 at 11:47 AM Andy Shevchenko < andy.shevche...@gmail.com> > > wrote: >

Re: [PATCH v2] earlycon: Allow specifying a uartclk in options

2018-03-01 Thread Daniel Kurtz
On Thu, Mar 1, 2018 at 11:47 AM Andy Shevchenko <andy.shevche...@gmail.com> wrote: > On Thu, Mar 1, 2018 at 8:43 PM, Daniel Kurtz <djku...@chromium.org> wrote: > Please, hold on with new versions. > I'm not satisfied (yet?) by the approach. Copying over your comme

[PATCH v2] earlycon: Allow specifying a uartclk in options

2018-03-01 Thread Daniel Kurtz
parameter to allow specification of a uartclk, like so: earlycon=uart,mmio32,0xfedc6000,115200,4800 If none is specified, fall-back to prior behavior - 1843200. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- Documentation/admin-guide/kernel-parameters.txt | 3 +++ drivers/tty/

[PATCH] earlycon: Allow specifying a uartclk in options

2018-03-01 Thread Daniel Kurtz
parameter to allow specification of a uartclk, like so: earlycon=uart,mmio32,0xfedc6000,115200,4800 If none is specified, fall-back to prior behavior - 1843200. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/tty/serial/earlycon.c | 8 ++-- include/linux/serial_

[PATCH] pinctrl/amd: add get_direction handler

2018-02-16 Thread Daniel Kurtz
e correct value for direction. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/pinctrl/pinctrl-amd.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 61d830c2bc17..281b700fe7e9 100644 --- a/

Re: [PATCH] mmc: mediatek: Fixed bug where clock frequency could be set wrong

2017-03-05 Thread Daniel Kurtz
DIV_ROUND_UP to fix this boundary related > issue. > > Issue 2: > In previous code, we can not set the correct clock frequency when > div equals 0xff. > > Signed-off-by: Yong Mao <yong@mediatek.com> > Signed-off-by: Chaotian Jing <chaotian.j...@mediatek.com> R

[PATCH 1/2] cpufreq: mt8173: Mark mt8173_cpufreq_driver_init as __init

2017-03-02 Thread Daniel Kurtz
This function is only called once at boot by device_initcall(), so mark it as __init. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/cpufreq/mt8173-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/c

Re: [PATCH 1/2] cpufreq: mt8173: Mark mt8173_cpufreq_driver_init as __init

2017-03-02 Thread Daniel Kurtz
On Thu, Mar 2, 2017 at 7:06 PM, Viresh Kumar <viresh.ku...@linaro.org> wrote: > > On 02-03-17, 19:03, Daniel Kurtz wrote: > > This function is only called once at boot by device_initcall(), so mark > > it as __init. > > > > Signed-off-by: Daniel Kurtz <djk

[PATCH 1/2] cpufreq: mt8173: Mark mt8173_cpufreq_driver_init as __init

2017-03-02 Thread Daniel Kurtz
This function is only called once at boot by device_initcall(), so mark it as __init. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- drivers/cpufreq/mt8173-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/c

Re: [PATCH v1] mmc: mediatek: Fixed bug where clock frequency could be set wrong

2017-03-02 Thread Daniel Kurtz
On Wed, Mar 1, 2017 at 5:56 PM, Yong Mao <yong@mediatek.com> wrote: > On Tue, 2017-02-28 at 14:56 +0800, Daniel Kurtz wrote: >> On Fri, Feb 24, 2017 at 5:38 PM, Yong Mao <yong@mediatek.com> wrote: >> > From: Yong Mao <yong@mediatek.com> >> &g

[PATCH 2/2 v2] cpufreq: mediatek: Add support for MT8176 and MT817x

2017-03-02 Thread Daniel Kurtz
for the machine compatible string, add support for the whole family. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- This patch is based on the compatibles added by the MT8176 series: https://patchwork.kernel.org/patch/9573209/ https://patchwork.kernel.org/patch/9573213/ v2: - use of_matc

[PATCH] cpufreq: mt8173: Add support for MT8176 and MT817x compatibles

2017-03-02 Thread Daniel Kurtz
compatible string, add support for the whole family. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- This patch is based on the compatibles added by the MT8176 series: https://patchwork.kernel.org/patch/9573209/ https://patchwork.kernel.org/patch/9573213/ drivers/cpufreq/

Re: [PATCH v1] mmc: mediatek: Fixed bug where clock frequency could be set wrong

2017-02-27 Thread Daniel Kurtz
On Fri, Feb 24, 2017 at 5:38 PM, Yong Mao <yong@mediatek.com> wrote: > From: Yong Mao <yong@mediatek.com> > To: Daniel Kurtz <djku...@chromium.org> > Subject:Re: [PATCH v1] mmc: mediatek: Fixed bug where clock frequency > could be set wrong >

Re: [PATCH v1] mmc: mediatek: Fixed bug where clock frequency could be set wrong

2017-02-24 Thread Daniel Kurtz
On Fri, Feb 24, 2017 at 5:22 PM, Yong Mao wrote: > > From: yong mao > > This patch can fix two issues: > > Issue 1: > The maximum value of clock divider is 0xff. > Because the type of div is u32, div may be larger than max_div. > In this case, we

[PATCH 2/2] arm64: dts: mediatek: Add mt8176 device tree

2017-02-14 Thread Daniel Kurtz
The MT8176 is a member of the MT817x family of SoCs. Its device tree inherits from mt817x, and only describes the mt8176 specific cpu map and cooling contributions. Signed-off-by: Yidi Lin <yidi@mediatek.com> Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- arch/arm64/boot/

[PATCH v2 1/2] arm64: dts: mediatek: Factor out mt817x family device tree

2017-02-14 Thread Daniel Kurtz
and mt8173.dtsi only describes the mt8173 specific cpu map and cooling contributions. Also rename mt817x-pinfunc.h, since it applies to the whole family. Signed-off-by: Yidi Lin <yidi@mediatek.com> Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- Changes in v2: - Add mt8176 in i

Re: [PATCH] [media] mtk-vcodec: fix build errors without DEBUG

2017-02-07 Thread Daniel Kurtz
t defined, mtk_v4l2_debug() is an empty macros, and therefore the arguments are unused. With an updated commit message, this patch is: Reviewed-by: Daniel Kurtz <djku...@chromium.org> > > Signed-off-by: Minghsiu Tsai <minghsiu.t...@mediatek.com> > --- > drivers/media/platfor

Re: [PATCH] spi: mediatek: Manually set dma_ops for spi_master device

2017-01-26 Thread Daniel Kurtz
On Fri, Jan 27, 2017 at 12:35 AM, Dmitry Torokhov <d...@chromium.org> wrote: > On Thu, Jan 26, 2017 at 8:29 AM, Daniel Kurtz <djku...@chromium.org> wrote: >> Hi Robin, >> >> On Thu, Jan 26, 2017 at 1:59 AM, Robin Murphy <robin.mur...@arm.com> wrote: >&g

Re: [PATCH] spi: mediatek: Manually set dma_ops for spi_master device

2017-01-26 Thread Daniel Kurtz
Hi Robin, On Thu, Jan 26, 2017 at 1:59 AM, Robin Murphy <robin.mur...@arm.com> wrote: > > On 25/01/17 10:24, Daniel Kurtz wrote: > > Hi Robin, > > > > On Tue, Jan 24, 2017 at 11:14 PM, Robin Murphy <robin.mur...@arm.com> wrote: > >> Hi Dan, > >

[PATCH 2/2] spi: mediatek: Only do dma for 4-byte aligned buffers

2017-01-26 Thread Daniel Kurtz
. If a buffer is not aligned, we cannot use DMA, and must use FIFO based transaction instead. So, this patch implements a scheme that allows using the FIFO for arbitrary length transactions (larger than the 32-byte FIFO size) by reloading the FIFO in the interrupt handler. Signed-off-by: Daniel Kurtz

[PATCH 1/2] spi: When no dma_chan map buffers with spi_master's parent

2017-01-26 Thread Daniel Kurtz
uf() returns -ENOMEM (-12). Fix this by using the real spi_master's parent device which should be a real physical device with DMA properties. Signed-off-by: Daniel Kurtz <djku...@chromium.org> Fixes: c37f45b5f1cd ("spi: support spi without dma channel to use can_dma()") Cc: Leilk L

Re: [PATCH] spi: mediatek: Manually set dma_ops for spi_master device

2017-01-25 Thread Daniel Kurtz
Hi Robin, On Tue, Jan 24, 2017 at 11:14 PM, Robin Murphy wrote: > Hi Dan, [snip...] >> And I really don't know why we needed to set the coherent_dma_mask to 0 to >> avoid SPI transaction errors. > > Following what I mentioned above, "git grep dma_alloc drivers/spi" makes

[PATCH] spi: mediatek: Manually set dma_ops for spi_master device

2017-01-24 Thread Daniel Kurtz
0x. In fact, using a non-zero dma_mask doesn't actually work and causes frequent SPI transaction errors. To work around this, we also explicitly set coherent_dma_mask to 0. Signed-off-by: Daniel Kurtz <djku...@chromium.org> --- I don't know the right place to configure the dma_o

Re: [PATCH v2] drm/mediatek: Support UYVY and YUYV format for overlay

2017-01-23 Thread Daniel Kurtz
On Tue, Jan 24, 2017 at 9:35 AM, Bibby Hsieh <bibby.hs...@mediatek.com> wrote: > > Hi, Daniel, > > Thanks for your comment. > > On Tue, 2017-01-03 at 14:27 +0800, Daniel Kurtz wrote: > > On Fri, Dec 30, 2016 at 2:26 PM, Bibby Hsieh <bibby.hs...@mediatek.com> &

Re: [PATCH v3 1/3] mmc: dt-bindings: update Mediatek MMC bindings

2017-01-19 Thread Daniel Kurtz
On Thu, Jan 19, 2017 at 6:19 PM, Yong Mao wrote: > > From: yong mao > > Add description for mtk-hs200-cmd-int-delay > Add description for mtk-hs400-cmd-int-delay > Add description for mtk-hs400-cmd-resp-sel > > Signed-off-by: Yong Mao

Re: arm64: dts: mt8173: add node for thermal calibration

2017-01-13 Thread Daniel Kurtz
On Fri, Jan 13, 2017 at 1:52 PM, Dawei Chien <dawei.ch...@mediatek.com> wrote: > > From: "dawei.ch...@mediatek.com" <dawei.ch...@mediatek.com> > > Add this for supporting thermal calibration by e-fuse data. > > Signed-off-by: Dawei Chien <dawei.ch...@med

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