On 10/12/2017 11:50 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
This patch add support for mss boot on msm8996. Major changes
include initializing mss rproc for msm8996, making appropriate
change for executing mss reset sequence etc.
Signed-off-by:
On 10/12/2017 11:50 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
This patch add support for mss boot on msm8996. Major changes
include initializing mss rproc for msm8996, making appropriate
change for executing mss reset sequence etc.
Signed-off-by:
On 10/12/2017 11:48 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
MSS proc on msm8996 can not access fw loaded region without stage
second translation of memory pages where mpss image are loaded.
This patch in order to enable mss boot on msm8996
On 10/12/2017 11:48 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
MSS proc on msm8996 can not access fw loaded region without stage
second translation of memory pages where mpss image are loaded.
This patch in order to enable mss boot on msm8996
On 10/12/2017 11:41 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This
On 10/12/2017 11:41 PM, Bjorn Andersson wrote:
On Fri 21 Jul 03:49 PDT 2017, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This
On 7/13/2017 11:24 AM, Stephen Boyd wrote:
On 07/12, Dwivedi, Avaneesh Kumar (avani) wrote:
On 7/8/2017 4:19 AM, Stephen Boyd wrote:
On 06/22, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6e6d561..cdfe986 100644
On 7/13/2017 11:24 AM, Stephen Boyd wrote:
On 07/12, Dwivedi, Avaneesh Kumar (avani) wrote:
On 7/8/2017 4:19 AM, Stephen Boyd wrote:
On 06/22, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6e6d561..cdfe986 100644
On 7/11/2017 5:13 AM, Bjorn Andersson wrote:
On Thu 22 Jun 05:08 PDT 2017, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This
On 7/11/2017 5:13 AM, Bjorn Andersson wrote:
On Thu 22 Jun 05:08 PDT 2017, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This
On 7/8/2017 4:19 AM, Stephen Boyd wrote:
On 06/22, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6e6d561..cdfe986 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -292,6 +304,86 @@ int
On 7/8/2017 4:19 AM, Stephen Boyd wrote:
On 06/22, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6e6d561..cdfe986 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -292,6 +304,86 @@ int
On 6/2/2017 11:25 PM, Bjorn Andersson wrote:
On Thu 01 Jun 14:42 PDT 2017, Dwivedi, Avaneesh Kumar (avani) wrote:
Hi Bjorn,
Thanks lot many for such a blazing fast response :)
regarding your points.
a- Do you mean caller's of q6v5_xfer_mem_ownership() should pass two
additional inputs i.e
On 6/2/2017 11:25 PM, Bjorn Andersson wrote:
On Thu 01 Jun 14:42 PDT 2017, Dwivedi, Avaneesh Kumar (avani) wrote:
Hi Bjorn,
Thanks lot many for such a blazing fast response :)
regarding your points.
a- Do you mean caller's of q6v5_xfer_mem_ownership() should pass two
additional inputs i.e
On 6/2/2017 11:52 PM, Stephen Boyd wrote:
On 06/02, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, level second memory map table
second level page tables instead of level second memory map table
OK
need
On 6/2/2017 11:52 PM, Stephen Boyd wrote:
On 06/02, Avaneesh Kumar Dwivedi wrote:
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, level second memory map table
second level page tables instead of level second memory map table
OK
need
Hi Bjorn,
Thanks lot many for such a blazing fast response :)
regarding your points.
a- Do you mean caller's of q6v5_xfer_mem_ownership() should pass two
additional inputs i.e. *next_perm and *next_vmid
and that based on successful return of qcom_scm_assign () they
should be treated as
Hi Bjorn,
Thanks lot many for such a blazing fast response :)
regarding your points.
a- Do you mean caller's of q6v5_xfer_mem_ownership() should pass two
additional inputs i.e. *next_perm and *next_vmid
and that based on successful return of qcom_scm_assign () they
should be treated as
On 5/26/2017 11:39 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
---
On 5/26/2017 11:39 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
---
On 5/26/2017 7:46 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
+static int q6v5_assign_mem_to_subsys(struct q6v5 *qproc,
+ phys_addr_t addr, size_t size)
+{
+ struct qcom_scm_destVmPerm next[] = {{ QCOM_SCM_VMID_MSS_MSA,
+
On 5/26/2017 7:46 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
+static int q6v5_assign_mem_to_subsys(struct q6v5 *qproc,
+ phys_addr_t addr, size_t size)
+{
+ struct qcom_scm_destVmPerm next[] = {{ QCOM_SCM_VMID_MSS_MSA,
+
On 5/26/2017 12:43 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
and then update modem proc to authenticate and boot fw.
Nice, I like this! Just some style details below.
Thanks. Sure will
On 5/26/2017 12:43 AM, Bjorn Andersson wrote:
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
and then update modem proc to authenticate and boot fw.
Nice, I like this! Just some style details below.
Thanks. Sure will
On 5/26/2017 11:33 AM, Bjorn Andersson wrote:
On Tue 16 May 11:01 PDT 2017, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index 93e3b96..4eb7d59 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@
On 5/26/2017 11:33 AM, Bjorn Andersson wrote:
On Tue 16 May 11:01 PDT 2017, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index 93e3b96..4eb7d59 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@
On 5/22/2017 4:07 PM, Sricharan R wrote:
Hi,
On 5/22/2017 3:03 PM, Dwivedi, Avaneesh Kumar (avani) wrote:
On 5/20/2017 8:25 AM, Sricharan R wrote:
Hi Bjorn/Avaneesh,
On 5/16/2017 11:32 PM, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
On 5/22/2017 4:07 PM, Sricharan R wrote:
Hi,
On 5/22/2017 3:03 PM, Dwivedi, Avaneesh Kumar (avani) wrote:
On 5/20/2017 8:25 AM, Sricharan R wrote:
Hi Bjorn/Avaneesh,
On 5/16/2017 11:32 PM, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
On 5/20/2017 8:25 AM, Sricharan R wrote:
Hi Bjorn/Avaneesh,
On 5/16/2017 11:32 PM, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
and then update modem proc to authenticate and boot fw.
Also make a trivial change in a error log.
Signed-off-by:
On 5/20/2017 8:25 AM, Sricharan R wrote:
Hi Bjorn/Avaneesh,
On 5/16/2017 11:32 PM, Avaneesh Kumar Dwivedi wrote:
This patch refactor code to first load all firmware blobs
and then update modem proc to authenticate and boot fw.
Also make a trivial change in a error log.
Signed-off-by:
On 4/6/2017 5:14 AM, Stephen Boyd wrote:
On 03/08, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 4a0f5ea..187fc00 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -358,3 +358,28 @@ int
On 4/6/2017 5:14 AM, Stephen Boyd wrote:
On 03/08, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 4a0f5ea..187fc00 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -358,3 +358,28 @@ int
Hi Bjorn/Boyd,
thanks for comments and suggestion, beg apology for delayed reply as i
got busy with internal issues.
please see inline response.
On 4/6/2017 10:13 AM, Bjorn Andersson wrote:
On Wed 08 Mar 10:03 PST 2017, Avaneesh Kumar Dwivedi wrote:
This patch add scm call support to
Hi Bjorn/Boyd,
thanks for comments and suggestion, beg apology for delayed reply as i
got busy with internal issues.
please see inline response.
On 4/6/2017 10:13 AM, Bjorn Andersson wrote:
On Wed 08 Mar 10:03 PST 2017, Avaneesh Kumar Dwivedi wrote:
This patch add scm call support to
On 2/28/2017 4:25 AM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 893f953ea..f476803 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -292,6 +292,20 @@ int
On 2/28/2017 4:25 AM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 893f953ea..f476803 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -292,6 +292,20 @@ int
On 2/28/2017 12:46 PM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
This patch add hypervisor call support for second stage translation from
mss remoteproc driver, this is required so that modem on msm8996 which is
based on armv8 architecture can access DDR region where modem
On 2/28/2017 12:46 PM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
This patch add hypervisor call support for second stage translation from
mss remoteproc driver, this is required so that modem on msm8996 which is
based on armv8 architecture can access DDR region where modem
On 2/28/2017 4:18 AM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 35eee68..9c12a36 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -485,35
On 2/28/2017 4:18 AM, Stephen Boyd wrote:
On 01/30, Avaneesh Kumar Dwivedi wrote:
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c
b/drivers/remoteproc/qcom_q6v5_pil.c
index 35eee68..9c12a36 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -485,35
On 1/31/2017 3:16 AM, Bjorn Andersson wrote:
On Mon 30 Jan 07:03 PST 2017, Avaneesh Kumar Dwivedi wrote:
This patch add additional clock and regulator resource which are
initialized based on compatible and has no impact on existing driver
working. This resourse addition enable the existing
On 1/31/2017 3:16 AM, Bjorn Andersson wrote:
On Mon 30 Jan 07:03 PST 2017, Avaneesh Kumar Dwivedi wrote:
This patch add additional clock and regulator resource which are
initialized based on compatible and has no impact on existing driver
working. This resourse addition enable the existing
On 1/21/2017 2:39 PM, Stephen Boyd wrote:
On 01/09, Avaneesh Kumar Dwivedi wrote:
This patch add hypervisor support for mss bring up on msm8996.
MSS rproc driver make hypervisor request to add certain region
in IPA table owned by hepervisor and assign access permission
Please drop the use of
On 1/21/2017 2:39 PM, Stephen Boyd wrote:
On 01/09, Avaneesh Kumar Dwivedi wrote:
This patch add hypervisor support for mss bring up on msm8996.
MSS rproc driver make hypervisor request to add certain region
in IPA table owned by hepervisor and assign access permission
Please drop the use of
On 12/23/2016 3:16 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
-static int q6v5_regulator_init(struct q6v5 *qproc)
+static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
+ const struct
On 12/23/2016 3:16 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
-static int q6v5_regulator_init(struct q6v5 *qproc)
+static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
+ const struct
On 12/23/2016 3:12 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
Certain regulators and clocks need voting by rproc on behalf of hexagon
only during restart operation but certain clocks and voltage need to be
voted till hexagon is up, these regulators
On 12/23/2016 3:12 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
Certain regulators and clocks need voting by rproc on behalf of hexagon
only during restart operation but certain clocks and voltage need to be
voted till hexagon is up, these regulators
On 12/23/2016 6:34 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYPBIT(25)
+#define QDSP6v56_BHS_ON BIT(24)
+#define QDSP6v56_CLAMP_WL BIT(21)
+#define
On 12/23/2016 6:34 AM, Bjorn Andersson wrote:
On Thu 15 Dec 04:21 PST 2016, Avaneesh Kumar Dwivedi wrote:
+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYPBIT(25)
+#define QDSP6v56_BHS_ON BIT(24)
+#define QDSP6v56_CLAMP_WL BIT(21)
+#define
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