On Wed, Nov 18, 2020 at 08:32:35AM -0800, Randy Dunlap wrote:
> On 11/18/20 5:03 AM, Eduardo Habkost wrote:
> > On Tue, Nov 17, 2020 at 04:23:49PM -0800, Randy Dunlap wrote:
> >> On 11/17/20 2:36 PM, Eduardo Habkost wrote:
> >>> Add a kernel-doc test scri
On Tue, Nov 17, 2020 at 04:23:49PM -0800, Randy Dunlap wrote:
> On 11/17/20 2:36 PM, Eduardo Habkost wrote:
> > Add a kernel-doc test script to tools/testing/kernel-doc.
> >
> > radix_tree_lookup_slot test case provided by Matthew Wilcox.
> >
> > Signed-off-by
On Wed, Nov 18, 2020 at 09:21:11AM +0100, Paolo Bonzini wrote:
> On 17/11/20 23:36, Eduardo Habkost wrote:
> > +# the -man output includes the build date
> > +export KBUILD_BUILD_TIMESTAMP=1991-08-25
>
> Nice :)
>
> > +ok=yes
> > +
> > +# don'
Add a kernel-doc test script to tools/testing/kernel-doc.
radix_tree_lookup_slot test case provided by Matthew Wilcox.
Signed-off-by: Eduardo Habkost
---
tools/testing/kernel-doc/test-case.h | 111 ++
.../testing/kernel-doc/test-case.man.expected | 150
On Fri, Nov 13, 2020 at 10:39:12PM +, Matthew Wilcox wrote:
> On Fri, Nov 13, 2020 at 03:21:06PM -0700, Jonathan Corbet wrote:
> > On Fri, 30 Oct 2020 15:47:13 +0100
> > Paolo Bonzini wrote:
> >
> > > From: Eduardo Habkost
> > >
> > > Exam
On Mon, Sep 28, 2020 at 10:51:03PM +0800, Xu, Like wrote:
> Hi Eduardo,
>
> Thanks for your detailed review.
>
> On 2020/9/25 6:05, Eduardo Habkost wrote:
> > I've just noticed this on my review queue (apologies for the long
> > delay). Comments below:
> &
ure without lbr_fmt values OR,
> - the requested guest vcpu model doesn't support PDCM.
>
> Cc: Paolo Bonzini
> Cc: Richard Henderson
> Cc: Eduardo Habkost
> Cc: "Michael S. Tsirkin"
> Cc: Marcel Apfelbaum
> Cc: Marcelo Tosatti
> Cc: qemu-de...@nongnu.or
CPUs. Make this apparent in the
> result of KVM_GET_SUPPORTED_CPUID as well.
>
> While at it, reuse X86_FEATURE_* constants for the SVM leaf too.
>
> However, we need to hide the bit on Intel processors, so move
> the setting to svm_set_supported_cpuid.
>
> Cc: Konrad Rz
CPUs. Make this apparent in the
> result of KVM_GET_SUPPORTED_CPUID as well.
>
> Cc: Konrad Rzeszutek Wilk
> Reported-by: Eduardo Habkost
> Signed-off-by: Paolo Bonzini
> ---
> arch/x86/kvm/cpuid.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
On Fri, Jul 12, 2019 at 04:29:06PM +0800, Tao Xu wrote:
> UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index E1H
> to determines the maximum time in TSC-quanta that the processor can reside
> in either C0.1 or C0.2.
>
> This patch emulates MSR IA32_UMWAIT_CONTROL in guest and diff
On Wed, Dec 12, 2018 at 09:08:03PM +0100, Borislav Petkov wrote:
> On Wed, Dec 12, 2018 at 05:52:35PM -0200, Eduardo Habkost wrote:
> > Why did you remove this entry from PC_COMPAT_2_4?
> >
> > We must keep compatibility with old behavior of Opteron_G2 on
> > pc-2.4, e
7;s "BIOS and Kernel Developer's Guide (BKDG) for AMD Family
15h Models 00h-0Fh Processors".
Signed-off-by: Eduardo Habkost
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kvm/x86.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h
On Tue, Dec 11, 2018 at 05:14:40PM +0100, Borislav Petkov wrote:
> + qemu-devel.
>
> On Tue, Dec 11, 2018 at 03:30:17PM +, Daniel P. Berrangé wrote:
> > Great, then, this is a non-issue - we just need to mention that fact
> > in the commit that sets the min version for the kernel
>
> Ok, here
On Tue, Dec 11, 2018 at 10:38:39AM +, Daniel P. Berrangé wrote:
> On Mon, Dec 10, 2018 at 06:08:43PM -0200, Eduardo Habkost wrote:
> > On Mon, Dec 10, 2018 at 08:42:58PM +0100, Borislav Petkov wrote:
> > > On Mon, Dec 10, 2018 at 05:06:00PM -0200, Eduardo Habkost wro
On Mon, Dec 10, 2018 at 08:42:58PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 05:06:00PM -0200, Eduardo Habkost wrote:
> > I mean documenting it. We already have code that will print
> > warnings if a feature isn't available.
> >
> > See my previous
On Mon, Dec 10, 2018 at 07:41:53PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 04:37:30PM -0200, Eduardo Habkost wrote:
> > It isn't as simply as reverting commit 33b5e8c03ae7, but we can
> > surely re-add RDTSCP on pc-*-4.0 and newer.
>
> Sure. If you
On Mon, Dec 10, 2018 at 07:41:53PM +0100, Borislav Petkov wrote:
> On Mon, Dec 10, 2018 at 04:37:30PM -0200, Eduardo Habkost wrote:
> > It isn't as simply as reverting commit 33b5e8c03ae7, but we can
> > surely re-add RDTSCP on pc-*-4.0 and newer.
>
> Sure. If you
On Mon, Dec 10, 2018 at 07:13:28PM +0100, Borislav Petkov wrote:
> Reviving an old thread here.
>
> On Wed, Jul 06, 2016 at 11:27:16PM +0200, Paolo Bonzini wrote:
> > On 06/07/2016 19:34, Eduardo Habkost wrote:
> > >> > Nothing is needed in the kernel actuall
On Wed, Dec 05, 2018 at 05:02:06PM -0500, Konrad Rzeszutek Wilk wrote:
> On Wed, Dec 05, 2018 at 05:19:56PM -0200, Eduardo Habkost wrote:
> > Months ago, we have added code to allow direct access to MSR_IA32_SPEC_CTRL
> > to the guest, which makes STIBP available to guests. This
irect access to
MSR_IA32_SPEC_CTRL").
However, we never updated GET_SUPPORTED_CPUID to let userspace know that
STIBP can be enabled in CPUID. Fix that by updating
kvm_cpuid_8000_0008_ebx_x86_features and kvm_cpuid_7_0_edx_x86_features.
Signed-off-by: Eduardo Habkost
---
arch/x86/kvm/cpuid.c | 4 ++-
Commit-ID: 8b2f245faa6238e28a1d801e8633515251d1acfc
Gitweb: https://git.kernel.org/tip/8b2f245faa6238e28a1d801e8633515251d1acfc
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:58 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:45 -0300
perf python
Commit-ID: e13a5d69c31d35538e80176d54d95b6addf4dcbf
Gitweb: https://git.kernel.org/tip/e13a5d69c31d35538e80176d54d95b6addf4dcbf
Author: Eduardo Habkost
AuthorDate: Fri, 5 Oct 2018 17:40:57 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 8 Oct 2018 14:30:44 -0300
perf python
Use a bytes literal so it works with Python 3's version of
Popen(). Note that the b"..." syntax requires Python 2.6+.
Signed-off-by: Eduardo Habkost
---
tools/perf/util/setup.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/util/setup.py b/
ff-by: Eduardo Habkost
---
tools/perf/util/setup.py | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py
index 261a55e7e1b2..63f758c655d5 100644
--- a/tools/perf/util/setup.py
+++ b/tools/perf/util/setup.py
@@ -9,12
This series contains a couple fixes to make it possible to build
perf with Python 3 and clang.
Eduardo Habkost (2):
perf: Make clang_has_option() work on Python 3
perf: More portable way to make CFLAGS work with clang
tools/perf/util/setup.py | 16 +---
1 file changed, 9
On Fri, Jun 29, 2018 at 06:23:35PM +0200, Thomas Gleixner wrote:
> On Fri, 29 Jun 2018, Dave Hansen wrote:
> > On 06/29/2018 07:33 AM, Fenghua Yu wrote:
> > > +/* Detect feature of #AC for split lock by probing bit 29 in
> > > MSR_TEST_CTL. */
> > > +void detect_ac_split_lock(void)
> > > +{
> > >
On Fri, May 18, 2018 at 07:18:57PM +0200, Paolo Bonzini wrote:
> On 18/05/2018 19:13, Eduardo Habkost wrote:
> >> As much as we'd like to be helpful and validate input, you need a real
> >> time host too. I'm not sure how we'd find out - I suggest we do not
On Fri, May 18, 2018 at 08:01:49PM +0300, Michael S. Tsirkin wrote:
> On Fri, May 18, 2018 at 01:04:31PM -0300, Eduardo Habkost wrote:
> > CCing qemu-devel, as I'm now discussing userspace.
> >
> > On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
>
CCing qemu-devel, as I'm now discussing userspace.
On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote:
> On Thu, May 17, 2018 at 03:46:58PM -0300, Eduardo Habkost wrote:
> > On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> > > HINT
On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote:
> HINTS_DEDICATED seems to be somewhat confusing:
>
> Guest doesn't really care whether it's the only task running on a host
> CPU as long as it's not preempted.
>
> And there are more reasons for Guest to be preempted than host
On Mon, Apr 23, 2018 at 02:58:49PM +0200, Borislav Petkov wrote:
> On Wed, Apr 18, 2018 at 12:36:37PM +0200, Paolo Bonzini wrote:
> > On 18/04/2018 11:03, Eduardo Habkost wrote:
> > >>> QEMU setting ucode_rev automatically using the host value when
> > >>&
On Wed, Apr 18, 2018 at 11:24:22AM +0800, Wanpeng Li wrote:
> 2018-04-18 4:24 GMT+08:00 Eduardo Habkost :
> > On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> >> Cc Eduardo,
> >> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini :
> >> > On 26/02/2018 1
On Tue, Apr 17, 2018 at 06:40:58PM +0800, Wanpeng Li wrote:
> Cc Eduardo,
> 2018-02-26 20:41 GMT+08:00 Paolo Bonzini :
> > On 26/02/2018 13:22, Borislav Petkov wrote:
> >> On Mon, Feb 26, 2018 at 01:18:07PM +0100, Paolo Bonzini wrote:
> In this context, "host-initiated" write means written by
On Tue, Apr 10, 2018 at 05:13:21PM +0800, Wanpeng Li wrote:
> Hi Eduardo,
> 2018-03-09 22:16 GMT+08:00 Eduardo Habkost :
> > On Fri, Feb 09, 2018 at 06:15:25AM -0800, Wanpeng Li wrote:
> >> From: Wanpeng Li
> >>
> >> Add KVM_HINTS_DEDICATED performance hint
Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * add a new feature word
>
> target/i386/cpu.c | 14 ++
> target/i386/cpu.h | 3 +++
> target/i386/kvm.c | 4
> 3 files changed, 21 insert
On Sun, Feb 11, 2018 at 11:29:44AM +0800, Wanpeng Li wrote:
[...]
> +KVM_HINTS_DEDICATED|| 0 || guest checks this feature bit
> + || || to determine if they run on
> dedicated
> + || || vCPUs, allow
UNHALT = 1: default is Hybrid PV queued/unfair lock
> PV_DEDICATED = 0, PV_UNHALT = 0: default is tas
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * update to KVM_HINTS_DEDICATED
>
> Documentatio
Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Signed-off-by: Wanpeng Li
[...]
> +[FEAT_KVM_HINTS] = {
> +.feat_names = {
> +"hint-dedicated", NULL, NULL, NULL,
> +NULL, NULL, NULL, NULL,
> +NULL,
On Wed, Jan 31, 2018 at 11:15:50AM +0100, Thomas Gleixner wrote:
> On Wed, 31 Jan 2018, Christophe de Dinechin wrote:
> > > On 30 Jan 2018, at 21:46, Alan Cox wrote:
> > >
> > >> If you are ever going to migrate to Skylake, I think you should just
> > >> always tell the guests that you're running
On Wed, Jan 31, 2018 at 02:04:49PM +, Dr. David Alan Gilbert wrote:
> * Borislav Petkov (b...@suse.de) wrote:
> > On Wed, Jan 31, 2018 at 12:30:36PM +, Dr. David Alan Gilbert wrote:
> > > Indeed, it's only for this weird case where you suddenly need to change
> > > it.
> >
> > No, there's
On Mon, Jan 29, 2018 at 07:32:06PM -0800, Linus Torvalds wrote:
> On Mon, Jan 29, 2018 at 5:32 PM, Arjan van de Ven
> wrote:
> >
> > the most simple solution is that we set the internal feature bit in Linux
> > to turn on the "stuff the RSB" workaround is we're on a SKL *or* as a guest
> > in a V
On Mon, Jan 29, 2018 at 02:25:12PM -0800, Andi Kleen wrote:
>
> I agree with your point that the common hypervisor practice to fake
> old model numbers will break some of the workarounds. Hypervisors
> may need to revisit their practice.
>
> > > In general, making these kinds of decisions based o
On Tue, Jan 30, 2018 at 01:20:52AM +, David Dunn wrote:
> Eduardo,
>
> This is why it would be good to have a CPUID bit that says:
> "apply SkyLake RSB stuffing." That's preferable to "trust FMS"
> for VMware.
Agreed it would be more useful than "trust FMS". However, I
believe a "no need to
On Mon, Jan 29, 2018 at 02:12:02PM -0800, Jim Mattson wrote:
> On Mon, Jan 29, 2018 at 1:50 PM, Eduardo Habkost wrote:
> > On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> >> For GCE, "you might be migrated to Skylake" is pretty much a
> >> cer
On Mon, Jan 29, 2018 at 05:10:11PM -0500, Konrad Rzeszutek Wilk wrote:
[...]
> The migration code could be 'tickled' (when arrived at the destination)
> to recheck the CPUID and do the alternative logic to turn the
> proper bits on.
>
> And this tickling could be as simple as an ACPI DSDT/AML code
On Mon, Jan 29, 2018 at 02:49:51PM -0800, Jim Mattson wrote:
> And if we expect to introduce Cascade Lake into the pool in the
> future, we use a Cascade Lake model number?
>
> It sounds like you are suggesting that we set the model number to the
> highest model number that will ever be introduced
On Mon, Jan 29, 2018 at 10:29:28PM +, David Dunn wrote:
> On Mon, 2018-01-29 at 13:45:07 -0800, Eduardo Habkost wrote:
>
> > Maybe a generic "family/model/stepping/microcode really matches
> > the CPU you are running on" bit would be useful. The bit could
On Mon, Jan 29, 2018 at 01:37:05PM -0800, Jim Mattson wrote:
> For GCE, "you might be migrated to Skylake" is pretty much a
> certainty. Even if you're in a zone that doesn't currently have
> Skylake machines, chances are pretty good that it will have Skylake
> machines some day in the not-too-dist
On Mon, Jan 29, 2018 at 09:02:39PM +, David Woodhouse wrote:
>
>
> On Mon, 2018-01-29 at 12:44 -0800, Arjan van de Ven wrote:
> > On 1/29/2018 12:42 PM, Eduardo Habkost wrote:
> > >
> > > The question is how the hypervisor could tell that to the guest.
>
On Mon, Jan 29, 2018 at 08:17:02PM +, David Woodhouse wrote:
> On Mon, 2018-01-29 at 18:14 -0200, Eduardo Habkost wrote:
> >
> > Sorry for being confused here, as probably the answer is buried
> > on a LKML thread somewhere. The comment explains what the code
> &
On Sat, Jan 20, 2018 at 08:22:56PM +0100, KarimAllah Ahmed wrote:
> From: David Woodhouse
>
> Not functional yet; just add the handling for it in the Spectre v2
> mitigation selection, and the X86_FEATURE_IBRS flag which will control
> the code to be added in later patches.
>
> Also take the #if
On Wed, Nov 29, 2017 at 04:42:16PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 12:44, Eduardo Habkost wrote:
> > > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> > >> On 13/1
On Wed, Nov 29, 2017 at 09:10:47PM -0200, Eduardo Habkost wrote:
> On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> > On 29/11/2017 19:42, Eduardo Habkost wrote:
> > > The reproducer (not a full test case) is quite simple, see patch below.
> >
> > Gre
On Wed, Nov 29, 2017 at 11:47:14PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 19:42, Eduardo Habkost wrote:
> > The reproducer (not a full test case) is quite simple, see patch below.
>
> Great, thanks. I assume that the patch doesn't fix it?!?
I was so convinced that it wa
On Wed, Nov 29, 2017 at 12:44:42PM +0100, Paolo Bonzini wrote:
> On 29/11/2017 12:44, Eduardo Habkost wrote:
> > On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> >> On 13/11/2017 08:15, Wanpeng Li wrote:
> >>> 2017-11-10 17:49 GMT+08:00 Paolo Bonzini :
On Mon, Nov 13, 2017 at 09:32:09AM +0100, Paolo Bonzini wrote:
> On 13/11/2017 08:15, Wanpeng Li wrote:
> > 2017-11-10 17:49 GMT+08:00 Paolo Bonzini :
> >> Sometimes, a processor might execute an instruction while another
> >> processor is updating the page tables for that instruction's code page,
On Fri, Nov 04, 2016 at 10:57:27PM +0100, Paolo Bonzini wrote:
>
>
> On 04/11/2016 21:34, David Matlack wrote:
> > On Mon, Oct 31, 2016 at 6:37 PM, Kyle Huey wrote:
> >> + case MSR_PLATFORM_INFO:
> >> + /* cpuid faulting is supported */
> >> + msr_info->data = P
On Thu, Jul 07, 2016 at 07:04:42PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 01:27:55PM -0300, Eduardo Habkost wrote:
> > You mean KVM kernel patches?
>
> No, other ones. Here's one example:
>
> https://lkml.kernel.org/r/1467633035-32080-2-git-send-e
On Thu, Jul 07, 2016 at 06:01:46PM +0200, Borislav Petkov wrote:
> On Thu, Jul 07, 2016 at 03:16:21PM +0200, Paolo Bonzini wrote:
> > Eduardo is the one to answer, but usually we add features to QEMU
> > before the processors are released (typically as soon as KVM supports
> > them). So with a n
On Wed, Jul 06, 2016 at 03:01:04PM +0200, Paolo Bonzini wrote:
> On 06/07/2016 14:44, Borislav Petkov wrote:
> > Hi guys,
> >
> > how about this below to enable RDTSCP emulation on AMD? IOW, I'm staring
> > at
> >
> > 33b5e8c03ae7 ("target-i386: Disable rdtscp on Opteron_G* CPU models")
> >
>
On Fri, Jun 17, 2016 at 09:11:16AM +0800, Haozhong Zhang wrote:
> On 06/16/16 11:55, Eduardo Habkost wrote:
> > On Thu, Jun 16, 2016 at 12:04:50PM +0200, Paolo Bonzini wrote:
> > > On 16/06/2016 08:05, Haozhong Zhang wrote:
> > > > From: Ashok Raj
> > > &g
On Thu, Jun 16, 2016 at 12:04:50PM +0200, Paolo Bonzini wrote:
> On 16/06/2016 08:05, Haozhong Zhang wrote:
> > From: Ashok Raj
> >
> > On Intel platforms, this patch adds LMCE to KVM MCE supported
> > capabilities and handles guest access to LMCE related MSRs.
> >
> > Signed-off-by: Ashok Raj
On Wed, Jun 15, 2016 at 04:25:32PM +0200, Borislav Petkov wrote:
[...]
>
> As to the error message, dear LKP friends, it happens because -cpu kvm64
> on native Intel hands in CPUID bits of the host, i.e., if you do this in
> the guest:
>
> $ grep epb /proc/cpuinfo
> flags : fpu vme de p
On Mon, Dec 14, 2015 at 07:17:27PM -0500, Raj, Ashok wrote:
> On Mon, Dec 14, 2015 at 11:37:16PM +0100, Borislav Petkov wrote:
> > On Mon, Dec 14, 2015 at 02:11:46PM -0500, Raj, Ashok wrote:
> > > This is mostly harmless.. since the MCG_CAP space is shared and has no
> > > conflict between vendors.
On Mon, Dec 14, 2015 at 02:11:46PM -0500, Raj, Ashok wrote:
> On Mon, Dec 14, 2015 at 05:37:38PM +0100, Borislav Petkov wrote:
> >
> > ... and obviously LMCE is vendor-specific so it cannot be enabled on
> > !Intel guests with a define like that. mce_init() in qemu should check
> > vendor too.
> >
Hi,
Comments below:
On Thu, Dec 10, 2015 at 02:41:21PM -0500, Ashok Raj wrote:
> This patch adds basic enumeration, control msr's required to support
> Local Machine Check Exception Support (LMCE).
>
> - Added Local Machine Check definitions, changed MCG_CAP
> - Added support for IA32_FEATURE_CO
On Thu, Apr 02, 2015 at 09:09:07AM +0200, Michael Mueller wrote:
> On Wed, 1 Apr 2015 20:05:24 -0300
> Eduardo Habkost wrote:
>
> > > >
> > > > If you don't want to encode that knowledge in libvirt or other
> > > > management software
On Wed, Apr 01, 2015 at 09:05:31PM +0200, Michael Mueller wrote:
> On Wed, 1 Apr 2015 13:59:05 -0300
> Eduardo Habkost wrote:
>
> > > Not directly invalid as "-cpu none" will be the same as omitting the -cpu
> > > option.
> > > KVM will setup
(CCing libvir-list and Jiri Denemark for libvirt-related discussion
about -cpu host/none, and live-migration safety expectations)
On Wed, Apr 01, 2015 at 06:31:23PM +0200, Michael Mueller wrote:
> On Wed, 1 Apr 2015 10:01:13 -0300
> Eduardo Habkost wrote:
>
> > On Tue, Mar 31
On Tue, Mar 31, 2015 at 10:09:09PM +0200, Michael Mueller wrote:
> On Tue, 31 Mar 2015 15:35:26 -0300
> Eduardo Habkost wrote:
>
> > On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
> > > This patch implements a new QMP request named 'query-cpu-mod
On Mon, Mar 30, 2015 at 04:28:25PM +0200, Michael Mueller wrote:
[...]
> ##
> # @query-cpu-definitions:
> #
> # Return a list of supported virtual CPU definitions
> #
> +# @machine: #optional machine type (since 2.4)
> +#
> +# @accel: #optional accelerator id (since 2.4)
> +#
> # Returns: a l
On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
> This patch implements a new QMP request named 'query-cpu-model'.
> It returns the cpu model of cpu 0 and its backing accelerator.
>
> request:
> {"execute" : "query-cpu-model" }
>
> answer:
> {"return" : {"name": "2827-ga2", "
On Tue, Mar 31, 2015 at 01:21:05PM +0200, Michael Mueller wrote:
> On Mon, 30 Mar 2015 17:17:21 -0300
> Eduardo Habkost wrote:
>
> > On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
> > > This patch implements a new QMP request named 'query-cpu-mod
On Mon, Mar 30, 2015 at 02:20:43PM -0600, Eric Blake wrote:
> On 03/30/2015 02:17 PM, Eduardo Habkost wrote:
> > On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
> >> This patch implements a new QMP request named 'query-cpu-model'.
> >> It r
On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
> This patch implements a new QMP request named 'query-cpu-model'.
> It returns the cpu model of cpu 0 and its backing accelerator.
>
> request:
> {"execute" : "query-cpu-model" }
>
> answer:
> {"return" : {"name": "2827-ga2", "
On Mon, Mar 30, 2015 at 04:28:26PM +0200, Michael Mueller wrote:
[...]
> CpuDefinitionInfoList *arch_query_cpu_definitions(bool has_machine,
>const char *machine,
>bool has_accel,
>
On Mon, Mar 30, 2015 at 04:28:24PM +0200, Michael Mueller wrote:
[...]
> diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
> index 829945d..1698b52 100644
> --- a/target-s390x/cpu.c
> +++ b/target-s390x/cpu.c
> @@ -37,6 +37,11 @@
> #define CR0_RESET 0xE0UL
> #define CR14_RESET 0xC20
On Mon, Mar 30, 2015 at 04:28:23PM +0200, Michael Mueller wrote:
> This patch implements routine s390_cpu_model_init(). It is called by the
> realize function during instantiation of an cpu object. Its task is to
> initialize the current accelerator with the properties of the selected
> processor m
On Thu, Mar 05, 2015 at 03:56:03PM +0100, Michael Mueller wrote:
> On Wed, 4 Mar 2015 16:19:25 -0300
> Eduardo Habkost wrote:
>
> > On Tue, Mar 03, 2015 at 11:55:24AM +0100, Michael Mueller wrote:
> > > On Mon, 02 Mar 2015 17:57:01 +0100
> > > Andreas Färber wr
On Tue, Mar 03, 2015 at 11:55:24AM +0100, Michael Mueller wrote:
> On Mon, 02 Mar 2015 17:57:01 +0100
> Andreas Färber wrote:
>
> > Am 02.03.2015 um 17:43 schrieb Michael Mueller:
> > > On Mon, 02 Mar 2015 14:57:21 +0100
> > > Andreas Färber wrote:
> > >
> > >>> int configure_accelerator(Machi
On Mon, Mar 02, 2015 at 01:43:52PM +0100, Michael Mueller wrote:
[...]
>
> What's currently a little bit unclear to me is how to best initialize the
> various accelerators for machine 'none'. I played around with different
> options and finally came up with the following sugguestion:
>
> Introduc
On Mon, Mar 02, 2015 at 01:43:53PM +0100, Michael Mueller wrote:
> QEMU now switches into "probe mode" when the selected machine is "none" and no
> specific accelerator(s) has been requested (i.e.: "-machine none").
>
> In probe mode a by "_CONFIG" defines predefined list of accelerators run
> the
On Mon, Mar 02, 2015 at 01:44:06PM +0100, Michael Mueller wrote:
> This patch implements the QMP command 'query-cpu-definitions' in the S390
> context. The command returns a list of cpu model names in the current host
> context. A consumer may successfully request each listed cpu model as long
> fo
Hi,
When running next-20140730 form linux-next, I get the following on dmesg:
be2net :02:00.0: PCIe error reporting enabled
be2net :02:00.0: adapter not in advanced mode
be2net :02:00.0: Emulex OneConnect(be3) initialization failed
be2net :02:00.0: Driver probe function unexpected
On Mon, Jul 28, 2014 at 12:18:10PM -0700, H. Peter Anvin wrote:
> On 07/28/2014 12:04 PM, Eduardo Habkost wrote:
> > When CONFIG_PARAVIRT is enabled, the kernel is ignoring exceptions on
> > the {rd,wr}msr instructions. This makes serious issues (either on the
> > guest kerne
includes linux/bug.h, I don't see what was the
original issue preventing BUG_ON from being used.
Change rdmsr(), wrmsr(), and rdmsrl() to BUG_ON() on errors.
Signed-off-by: Eduardo Habkost
---
* Build-tested using allyesconfig, with no build errors.
* Tested by being able to detect the foll
On Fri, Mar 21, 2014 at 10:27:59AM +0100, Paolo Bonzini wrote:
> This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if
> the interrupt is still sitting in the IOAPIC. After the next patches, it
> avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is
> called.
>
>
amson
> Signed-off-by: Paolo Bonzini
Reviewed-by: Eduardo Habkost
Just code movement, no functional changes.
(The change from entry->fields.trig_mode to irqe.trig_mode is not purely
code movement, but kvm_irq_delivery_to_apic() doesn't change
irq->trig_mode, so it's OK).
On Sat, Sep 28, 2013 at 12:49:04PM +0200, Borislav Petkov wrote:
> On Fri, Sep 27, 2013 at 11:21:34AM -0300, Eduardo Habkost wrote:
> > The problem here is that "requested_features" doesn't include just
> > the explicit "+flag" flags, but any flag included
On Thu, Sep 26, 2013 at 10:32:06PM +0200, Borislav Petkov wrote:
> On Thu, Sep 26, 2013 at 04:20:59PM -0300, Eduardo Habkost wrote:
> > Please point me to the code that does this, because I don't see it on
> > patch 6/6.
>
> @@ -1850,7 +1850,14 @@ static void filter_fe
On Thu, Sep 26, 2013 at 08:55:24PM +0200, Borislav Petkov wrote:
> On Thu, Sep 26, 2013 at 11:19:15AM -0300, Eduardo Habkost wrote:
> > Then we may have a problem: some CPU models already have "movbe"
> > included (e.g. Haswell), and patch 6/6 will make "-cpu Haswell&
On Tue, Sep 24, 2013 at 01:04:14PM +0300, Gleb Natapov wrote:
> On Tue, Sep 24, 2013 at 11:57:00AM +0200, Borislav Petkov wrote:
> > On Mon, September 23, 2013 6:28 pm, Eduardo Habkost wrote:
> > > On Sun, Sep 22, 2013 at 04:44:50PM +0200, Borislav Petkov wrote:
> >
On Sun, Sep 22, 2013 at 04:44:50PM +0200, Borislav Petkov wrote:
> From: Borislav Petkov
>
> Add a kvm ioctl which states which system functionality kvm emulates.
> The format used is that of CPUID and we return the corresponding CPUID
> bits set for which we do emulate functionality.
Let me che
(CCing qemu-devel and libvir-list)
On Sun, Sep 22, 2013 at 04:44:55PM +0200, Borislav Petkov wrote:
> From: Borislav Petkov
>
> Add support for the KVM_GET_EMULATED_CPUID ioctl and leave feature bits
> enabled, when requested by userspace, if kvm emulates them.
>
> Signed-off-by: Borislav Petko
This finally makes paravirt-ops able to compile and boot under x86_64.
Signed-off-by: Eduardo Habkost <[EMAIL PROTECTED]>
---
arch/x86/kernel/paravirt.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/para
paravirt_pagetable_setup_{start,done}() are not used (yet) under x86_64,
and native_pagetable_setup_{start,done}() don't exist on x86_64. So they
don't need to be set.
Signed-off-by: Eduardo Habkost <[EMAIL PROTECTED]>
---
arch/x86/kernel/paravirt.c |2 ++
1 files changed, 2
This series contain fixes to make the paravirt_ops code compile and boot
on x86_64.
This is a follow-up for the previous series from Glauber.
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Trivial compile fix.
Signed-off-by: Eduardo Habkost <[EMAIL PROTECTED]>
---
include/asm-x86/paravirt.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 52bcd9d..62cecb7 100644
--- a/include/asm-x86/para
Add .set_pgd field to pv_mmu_ops.
Implement pud_val(), __pud(), set_pgd(), pud_clear(), pgd_clear().
pud_clear() and pgd_clear() are implemented simply using set_pud()
and set_pmd(). They don't have a field at pv_mmu_ops.
Signed-off-by: Eduardo Habkost <[EMAIL PROTECTED]>
---
incl
On Wed, Dec 19, 2007 at 02:35:36PM -0800, Jeremy Fitzhardinge wrote:
> +static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte,
> __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
> +static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte,
> __pte(pte_val(pte) & ~_PAGE_ACCESSED)); retur
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