[PATCH v11 6/6] arm64: dts: mt8183: add efuse and Mediatek Chip id node to read
From: Michael Mei
support for reading chip ID and efuse
Signed-off-by: Michael Mei
Signed-off-by: Erin Lo
---
This patch is based on this patch:
https://patchwork.kernel.org/patch/10953029/
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 2e3063f..c2749c4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -156,6 +156,15 @@
compatible = "simple-bus";
ranges;
+ soc_data: soc_data@800 {
+ compatible = "mediatek,mt8183-efuse",
+"mediatek,efuse";
+ reg = <0 0x0800 0 0x0010>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@c00 {
compatible = "arm,gic-v3";
#interrupt-cells = <4>;
@@ -369,6 +378,12 @@
#clock-cells = <1>;
};
+ efuse: efuse@11f1 {
+ compatible = "mediatek,mt8183-efuse",
+"mediatek,efuse";
+ reg = <0 0x11f1 0 0x1000>;
+ };
+
mfgcfg: syscon@1300 {
compatible = "mediatek,mt8183-mfgcfg", "syscon";
reg = <0 0x1300 0 0x1000>;
--
1.8.1.1.dirty
[PATCH v11 3/6] arm64: dts: mt8183: add pinctrl device node
From: Zhiyong Tao
The commit adds pinctrl device node for mt8183
Signed-off-by: Zhiyong Tao
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5b34ec6..e74ea21 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include
#include
#include
+#include "mt8183-pinfunc.h"
/ {
compatible = "mediatek,mt8183";
@@ -204,6 +205,30 @@
#clock-cells = <1>;
};
+ pio: pinctrl@10005000 {
+ compatible = "mediatek,mt8183-pinctrl";
+ reg = <0 0x10005000 0 0x1000>,
+ <0 0x11f2 0 0x1000>,
+ <0 0x11e8 0 0x1000>,
+ <0 0x11e7 0 0x1000>,
+ <0 0x11e9 0 0x1000>,
+ <0 0x11d3 0 0x1000>,
+ <0 0x11d2 0 0x1000>,
+ <0 0x11c5 0 0x1000>,
+ <0 0x11f3 0 0x1000>,
+ <0 0x1000b000 0 0x1000>;
+ reg-names = "iocfg0", "iocfg1", "iocfg2",
+ "iocfg3", "iocfg4", "iocfg5",
+ "iocfg6", "iocfg7", "iocfg8",
+ "eint";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = < 0 0 192>;
+ interrupt-controller;
+ interrupts = ;
+ #interrupt-cells = <2>;
+ };
+
apmixedsys: syscon@1000c000 {
compatible = "mediatek,mt8183-apmixedsys", "syscon";
reg = <0 0x1000c000 0 0x1000>;
--
1.8.1.1.dirty
[PATCH v11 1/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 311
3 files changed, 343 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..08274bf
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,311 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = &l
[PATCH v11 5/6] arm64: dts: mt8183: add spi node
Add spi DTS node to the mt8183 and mt8183-evb.
Signed-off-by: Mengqi Zhang
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 105
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 78 +
2 files changed, 183 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 49909ac..d8e555c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -30,6 +30,111 @@
status = "okay";
};
+ {
+ spi_pins_0: spi0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_1: spi1{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_2: spi2{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_3: spi3{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_4: spi4{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_5: spi5{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_0>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_1>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_2>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_3>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_4>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_5>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+
+};
+
{
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5672c18..2e3063f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -285,6 +285,84 @@
status = "disabled";
};
+ spi0: spi@1100a000 {
+ compatible = "mediatek,mt8183-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x1000>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL_D5_D2>,
+< CLK_TOP_MUX_SPI>,
+< CLK_INFRA_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi1: spi@1101 {
+ compatible = "mediatek,mt8183-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1101 0 0x1000>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL_D5_D2>,
+< CLK_TOP_MUX_SPI>,
+< CLK_INFRA_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi2: spi@11012000 {
+ compatible = "mediatek,mt8183-spi";
+
[PATCH v11 2/6] arm64: dts: mt8183: add capacity-dmips-mhz
From: "Hsin-Yi, Wang"
Pinned the frequency to the max and run dhrystone to get the value.
little cpu: 11071 (max freq: 1989000)
big cpu: 15293 (max freq: 1989000)
11071 : 15293 ~= 741 : 1024
Signed-off-by: Erin Lo
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bf..5b34ec6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -56,6 +56,7 @@
compatible = "arm,cortex-a53";
reg = <0x000>;
enable-method = "psci";
+ capacity-dmips-mhz = <741>;
};
cpu1: cpu@1 {
@@ -63,6 +64,7 @@
compatible = "arm,cortex-a53";
reg = <0x001>;
enable-method = "psci";
+ capacity-dmips-mhz = <741>;
};
cpu2: cpu@2 {
@@ -70,6 +72,7 @@
compatible = "arm,cortex-a53";
reg = <0x002>;
enable-method = "psci";
+ capacity-dmips-mhz = <741>;
};
cpu3: cpu@3 {
@@ -77,6 +80,7 @@
compatible = "arm,cortex-a53";
reg = <0x003>;
enable-method = "psci";
+ capacity-dmips-mhz = <741>;
};
cpu4: cpu@100 {
@@ -84,6 +88,7 @@
compatible = "arm,cortex-a73";
reg = <0x100>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
};
cpu5: cpu@101 {
@@ -91,6 +96,7 @@
compatible = "arm,cortex-a73";
reg = <0x101>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
};
cpu6: cpu@102 {
@@ -98,6 +104,7 @@
compatible = "arm,cortex-a73";
reg = <0x102>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
};
cpu7: cpu@103 {
@@ -105,6 +112,7 @@
compatible = "arm,cortex-a73";
reg = <0x103>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
};
};
--
1.8.1.1.dirty
[PATCH v11 4/6] arm64: dts: mt8183: Add auxadc device node
From: Zhiyong Tao
Add auxadc device node for MT8183
Signed-off-by: Zhiyong Tao
Signed-off-by: Erin Lo
---
This patch is based on patch "https://patchwork.kernel.org/patch/10913941/;.
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 10 ++
2 files changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 9b52559..49909ac 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -26,6 +26,10 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index e74ea21..5672c18 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -245,6 +245,16 @@
clock-names = "spi", "wrap";
};
+ auxadc: auxadc@11001000 {
+ compatible = "mediatek,mt8183-auxadc",
+"mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ clocks = < CLK_INFRA_AUXADC>;
+ clock-names = "main";
+ #io-channel-cells = <1>;
+ status = "disabled";
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8183-uart",
"mediatek,mt6577-uart";
--
1.8.1.1.dirty
[PATCH v11 0/6] Add basic node support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. Based on v5.2-rc1 Change in v11: New add spi node, efuse node, pinctrl node, auxadc node, and capacity-dmips-mhz field Change in v10: Add the L2 cache node to prevent warning on unable to detect cache hierarchy. Change in v9: Remove pio node since binding is not documented yet Change in v8: 1. Fix interrupt-parent of pio node 2. Remove pinfunc.h and spi node patches Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (1): arm64: dts: mt8183: add spi node Hsin-Yi, Wang (1): arm64: dts: mt8183: add capacity-dmips-mhz Michael Mei (1): arm64: dts: mt8183: add efuse and Mediatek Chip id node to read Zhiyong Tao (2): arm64: dts: mt8183: add pinctrl device node arm64: dts: mt8183: Add auxadc device node arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 140 ++ arch/arm64/boot/dts/mediatek/mt8183.dtsi| 447 3 files changed, 588 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.8.1.1.dirty
[PATCH] clk: mediatek: Remove MT8183 unused clock
Remove MT8183 sspm clock
Signed-off-by: Erin Lo
---
This clock should only be set in secure world.
---
drivers/clk/mediatek/clk-mt8183.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183.c
b/drivers/clk/mediatek/clk-mt8183.c
index 9d8651033ae9..1aa5f4059251 100644
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -395,14 +395,6 @@ static const char * const atb_parents[] = {
"syspll_d5"
};
-static const char * const sspm_parents[] = {
- "clk26m",
- "univpll_d2_d4",
- "syspll_d2_d2",
- "univpll_d2_d2",
- "syspll_d3"
-};
-
static const char * const dpi0_parents[] = {
"clk26m",
"tvdpll_d2",
@@ -606,9 +598,6 @@ static const struct mtk_mux top_muxes[] = {
MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_ATB, "atb_sel",
atb_parents, 0xa0,
0xa4, 0xa8, 0, 2, 7, 0x004, 24),
- MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_SSPM, "sspm_sel",
- sspm_parents, 0xa0,
- 0xa4, 0xa8, 8, 3, 15, 0x004, 25),
MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_DPI0, "dpi0_sel",
dpi0_parents, 0xa0,
0xa4, 0xa8, 16, 4, 23, 0x004, 26),
@@ -947,12 +936,8 @@ static const struct mtk_gate infra_clks[] = {
"fufs_sel", 13),
GATE_INFRA2(CLK_INFRA_MD32_BCLK, "infra_md32_bclk",
"axi_sel", 14),
- GATE_INFRA2(CLK_INFRA_SSPM, "infra_sspm",
- "sspm_sel", 15),
GATE_INFRA2(CLK_INFRA_UNIPRO_MBIST, "infra_unipro_mbist",
"axi_sel", 16),
- GATE_INFRA2(CLK_INFRA_SSPM_BUS_HCLK, "infra_sspm_bus_hclk",
- "axi_sel", 17),
GATE_INFRA2(CLK_INFRA_I2C5, "infra_i2c5",
"i2c_sel", 18),
GATE_INFRA2(CLK_INFRA_I2C5_ARBITER, "infra_i2c5_arbiter",
@@ -986,10 +971,6 @@ static const struct mtk_gate infra_clks[] = {
"msdc50_0_sel", 1),
GATE_INFRA3(CLK_INFRA_MSDC2_SELF, "infra_msdc2_self",
"msdc50_0_sel", 2),
- GATE_INFRA3(CLK_INFRA_SSPM_26M_SELF, "infra_sspm_26m_self",
- "f_f26m_ck", 3),
- GATE_INFRA3(CLK_INFRA_SSPM_32K_SELF, "infra_sspm_32k_self",
- "f_f26m_ck", 4),
GATE_INFRA3(CLK_INFRA_UFS_AXI, "infra_ufs_axi",
"axi_sel", 5),
GATE_INFRA3(CLK_INFRA_I2C6, "infra_i2c6",
--
2.18.0
Re: [PATCH v9] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Tue, 2019-04-16 at 10:29 +0200, Matthias Brugger wrote: > > On 18/03/2019 19:42, kbuild test robot wrote: > > Hi Erin, > > > > Thank you for the patch! Yet something to improve: > > > > [auto build test ERROR on robh/for-next] > > [also build test ERROR on v5.1-rc1 next-20190318] > > [if your patch is applied to the wrong git tree, please drop us a note to > > help improve the system] > > > > url: > > https://github.com/0day-ci/linux/commits/Erin-Lo/arm64-dts-Add-Mediatek-SoC-MT8183-and-evaluation-board-dts-and-Makefile/20190318-170422 > > base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git > > for-next > > config: arm64-allyesconfig (attached as .config) > > compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 > > reproduce: > > wget > > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O > > ~/bin/make.cross > > chmod +x ~/bin/make.cross > > # save the attached .config to linux build tree > > GCC_VERSION=7.2.0 make.cross ARCH=arm64 > > > > All errors (new ones prefixed by >>): > > > >In file included from arch/arm64/boot/dts/mediatek/mt8183-evb.dts:9:0: > >>> arch/arm64/boot/dts/mediatek/mt8183.dtsi:8:10: fatal error: > >>> dt-bindings/clock/mt8183-clk.h: No such file or directory > > #include > > ^~~~ > >compilation terminated. > > > > vim +8 arch/arm64/boot/dts/mediatek/mt8183.dtsi > > > >> 8 #include > > 9 #include > > 10 #include > > 11 > > > > Stephen queued the corresponding patch for v5.2. > I propose we wait for v5.2-rc1 and then apply the basic support and the others > based on this one. > > Erin: There are may mt8183 dts patches floating around that depend on this or > more patches. Can you coordinate with your colleagues to resend them as a > series? Then it will be easier for me to take them for v5.3, as some have > dependencies on other series etc. > > Thanks a lot. > Matthias OK, I will coordinate with my colleagues to resend mt8183 dts patches as a series base on v5.2-rc1 when v5.2-rc1 release. Since we want to send this series more confident so they still send separate patch in v5.1 just for review in advance. Is that ok for you?
[PATCH v10] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. Based on v5.1-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2019-March/017963.html Change in v10: Add the L2 cache node to prevent warning on unable to detect cache hierarchy. Change in v9: Remove pio node since binding is not documented yet Change in v8: 1. Fix interrupt-parent of pio node 2. Remove pinfunc.h and spi node patches Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++ arch/arm64/boot/dts/mediatek/mt8183.dtsi| 329 3 files changed, 361 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v10] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
Based on v5.1-rc1 and
https://patchwork.kernel.org/cover/10838993/
Which already in clk-next
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/commit/?h=clk-mtk=2f41cd9b13ea891e7cc1bd037b70458132a12e31
---
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 329
3 files changed, 361 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..23d1ad6
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,329 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ next-level-cache = <_l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ next-level-cache = <_l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ com
[PATCH v9] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 311
3 files changed, 343 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..08274bf
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,311 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = &l
[PATCH v9] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. Based on v5.1-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2019-March/017963.html Change in v9: Remove pio node since binding is not documented yet Change in v8: 1. Fix interrupt-parent of pio node 2. Remove pinfunc.h and spi node patches Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++ arch/arm64/boot/dts/mediatek/mt8183.dtsi| 311 3 files changed, 343 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
Re: [PATCH v8 2/2] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Tue, 2019-03-12 at 13:22 +0100, Matthias Brugger wrote:
>
> On 11/03/2019 09:54, Erin Lo wrote:
> > From: Ben Ho
> >
> > Add basic chip support for Mediatek 8183, include
> > uart node with correct uart clocks, pwrap device
> >
> > Add clock controller nodes, include topckgen, infracfg,
> > apmixedsys and subsystem.
> >
> > Signed-off-by: Ben Ho
> > Signed-off-by: Erin Lo
> > Signed-off-by: Seiya Wang
> > Signed-off-by: Weiyi Lu
> > Signed-off-by: Zhiyong Tao
> > Signed-off-by: Hsin-Hsiung Wang
> > Signed-off-by: Eddie Huang
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi| 335
> >
> > 3 files changed, 367 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> > b/arch/arm64/boot/dts/mediatek/Makefile
> > index e8f952f..458bbc4 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > new file mode 100644
> > index 000..9b52559
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > @@ -0,0 +1,31 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (c) 2018 MediaTek Inc.
> > + * Author: Ben Ho
> > + *Erin Lo
> > + */
> > +
> > +/dts-v1/;
> > +#include "mt8183.dtsi"
> > +
> > +/ {
> > + model = "MediaTek MT8183 evaluation board";
> > + compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
> > +
> > + aliases {
> > + serial0 =
> > + };
> > +
> > + memory@4000 {
> > + device_type = "memory";
> > + reg = <0 0x4000 0 0x8000>;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:921600n8";
> > + };
> > +};
> > +
> > + {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > new file mode 100644
> > index 000..64f8bd6
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > @@ -0,0 +1,335 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (c) 2018 MediaTek Inc.
> > + * Author: Ben Ho
> > + *Erin Lo
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +/ {
> > + compatible = "mediatek,mt8183";
> > + interrupt-parent = <>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu-map {
> > + cluster0 {
> > + core0 {
> > + cpu = <>;
> > + };
> > + core1 {
> > + cpu = <>;
> > + };
> > + core2 {
> > + cpu = <>;
> > + };
> > + core3 {
> > + cpu = <>;
> > + };
> > + };
> > +
> > + cluster1 {
> > + core0 {
> > + cpu = <>;
> > + };
> > + core1 {
> > + cpu = <>;
> > + };
> > + core2 {
> > + cpu = <&g
[PATCH v8 0/2] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock, and pwrap. Based on v5.0-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2018-December/016243.html Change in v8: 1. Fix interrupt-parent of pio node 2. Remove pinfunc.h and spi node patches Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (1): dt-bindings: serial: Add compatible for Mediatek MT8183 .../devicetree/bindings/serial/mtk-uart.txt| 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 ++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 335 + 4 files changed, 368 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v8 2/2] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Signed-off-by: Zhiyong Tao
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 335
3 files changed, 367 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..64f8bd6
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,335 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+
[PATCH v8 1/2] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 742cb47..bcfb131 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -16,6 +16,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
Re: [PATCH v7 4/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Fri, 2019-02-15 at 14:02 +0800, Erin Lo wrote:
> From: Ben Ho
>
> Add basic chip support for Mediatek 8183, include
> uart node with correct uart clocks, pwrap device
>
> Add clock controller nodes, include topckgen, infracfg,
> apmixedsys and subsystem.
>
> Signed-off-by: Ben Ho
> Signed-off-by: Erin Lo
> Signed-off-by: Seiya Wang
> Signed-off-by: Weiyi Lu
> Signed-off-by: Zhiyong Tao
> Signed-off-by: Hsin-Hsiung Wang
> Signed-off-by: Eddie Huang
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
> arch/arm64/boot/dts/mediatek/mt8183.dtsi| 336
>
> 3 files changed, 368 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> b/arch/arm64/boot/dts/mediatek/Makefile
> index e8f952f..458bbc4 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> new file mode 100644
> index 000..9b52559
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (c) 2018 MediaTek Inc.
> + * Author: Ben Ho
> + * Erin Lo
> + */
> +
> +/dts-v1/;
> +#include "mt8183.dtsi"
> +
> +/ {
> + model = "MediaTek MT8183 evaluation board";
> + compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
> +
> + aliases {
> + serial0 =
> + };
> +
> + memory@4000 {
> + device_type = "memory";
> + reg = <0 0x4000 0 0x8000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> new file mode 100644
> index 000..1bd1399
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -0,0 +1,336 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (c) 2018 MediaTek Inc.
> + * Author: Ben Ho
> + * Erin Lo
> + */
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + compatible = "mediatek,mt8183";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <>;
> + };
> + core1 {
> + cpu = <>;
> + };
> + core2 {
> + cpu = <>;
> + };
> + core3 {
> + cpu = <>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> + cpu = <>;
> + };
> + core1 {
> + cpu = <>;
> + };
> + core2 {
> + cpu = <>;
> + };
> + core3 {
> + cpu = <>;
> + };
> + };
> + };
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x000>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = &qu
[PATCH v7 4/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Signed-off-by: Zhiyong Tao
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 336
3 files changed, 368 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..1bd1399
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+
[PATCH v7 3/6] dt-bindings: pinctrl: mt8183: add binding document
From: Zhiyong Tao
The commit adds mt8183 compatible node in binding document.
Signed-off-by: Zhiyong Tao
Signed-off-by: Erin Lo
---
.../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 115 +
1 file changed, 115 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
new file mode 100644
index 000..364e673
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
@@ -0,0 +1,115 @@
+* Mediatek MT8183 Pin Controller
+
+The Mediatek's Pin controller is used to control SoC pins.
+
+Required properties:
+- compatible: value should be one of the following.
+ "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2. See the below
+ mentioned gpio binding representation for description of particular cells.
+- gpio-ranges : gpio valid number range.
+- reg: physicall address base for gpio base registers. There are nine
+ physicall address base in mt8183. They are 0x10005000, 0x11F2,
+ 0x11E8, 0x11E7, 0x11E9, 0x11D3, 0x11D2, 0x11C5,
+ 0x11F3.
+
+ Eg: < 6 0>
+ <[phandle of the gpio controller node]
+ [line number within the gpio controller]
+ [flags]>
+
+ Values for gpio specifier:
+ - Line number: is a value between 0 to 202.
+ - Flags: bit field of flags, as defined in .
+Only the following flags are supported:
+0 - GPIO_ACTIVE_HIGH
+1 - GPIO_ACTIVE_LOW
+
+Optional properties:
+- reg-names: gpio base register names. There are nine gpio base register
+ names in mt8183. They are "iocfg0", "iocfg1", "iocfg2", "iocfg3", "iocfg4",
+ "iocfg5", "iocfg6", "iocfg7", "iocfg8".
+- interrupt-controller: Marks the device node as an interrupt controller
+- #interrupt-cells: Should be two.
+- interrupts : The interrupt outputs from the controller.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Subnode format
+A pinctrl node should contain at least one subnodes representing the
+pinctrl groups available on the machine. Each subnode will list the
+pins it needs, and how they should be configured, with regard to muxer
+configuration, pullups, drive strength, input enable/disable and input schmitt.
+
+node {
+ pinmux = ;
+ GENERIC_PINCONFIG;
+};
+
+Required properties:
+- pinmux: integer array, represents gpio pin number and mux setting.
+Supported pin number and mux varies for different SoCs, and are defined
+as macros in boot/dts/-pinfunc.h directly.
+
+Optional properties:
+- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
+bias-pull-down, bias-pull-up, input-enable, input-disable, output-low,
output-high,
+input-schmitt-enable, input-schmitt-disable and drive-strength are valid.
+
+Some special pins have extra pull up strength, there are R0 and R1 pull-up
+resistors available, but for user, it's only need to set R1R0 as 00, 01,
10 or 11.
+So when config mediatek,pull-up-adv or mediatek,pull-down-adv,
+it support arguments for those special pins.
+
+When config drive-strength, it can support some arguments, such as
+MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h.
+
+Examples:
+
+#include "mt8183-pinfunc.h"
+
+...
+{
+ pio: pinctrl@10005000 {
+ compatible = "mediatek,mt8183-pinctrl";
+ reg = <0 0x10005000 0 0x1000>,
+ <0 0x11F2 0 0x1000>,
+ <0 0x11E8 0 0x1000>,
+ <0 0x11E7 0 0x1000>,
+ <0 0x11E9 0 0x1000>,
+ <0 0x11D3 0 0x1000>,
+ <0 0x11D2 0 0x1000>,
+ <0 0x11C5 0 0x1000>,
+ <0 0x11F3 0 0x1000>;
+ reg-names = "iocfg0", "iocfg1", "iocfg2",
+ "iocfg3", "iocfg4", "iocfg5",
+ "iocfg6", "iocfg7", "iocfg8";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = < 0 0 192>;
+ interrupt-controller;
+ interrupts = ;
+ interrupt-parent = <>;
+ #interrupt-cells = <2>;
+
+ i2c0_pins_a
[PATCH v7 5/6] arm64: dts: mt8183: add pintcrl file
This patch adds pinctrl file for mt8183. Signed-off-by: Zhiyong Tao Signed-off-by: Erin Lo --- arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 + 1 file changed, 1120 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h b/arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h new file mode 100644 index 000..768e41e --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h @@ -0,0 +1,1120 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 MediaTek Inc. + * Author: Zhiyong Tao + * + */ + +#ifndef __MT8183_PINFUNC_H +#define __MT8183_PINFUNC_H + +#include + +#define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) +#define PINMUX_GPIO0__FUNC_MRG_SYNC (MTK_PIN_NO(0) | 1) +#define PINMUX_GPIO0__FUNC_PCM0_SYNC (MTK_PIN_NO(0) | 2) +#define PINMUX_GPIO0__FUNC_TP_GPIO0_AO (MTK_PIN_NO(0) | 3) +#define PINMUX_GPIO0__FUNC_SRCLKENAI0 (MTK_PIN_NO(0) | 4) +#define PINMUX_GPIO0__FUNC_SCP_SPI2_CS (MTK_PIN_NO(0) | 5) +#define PINMUX_GPIO0__FUNC_I2S3_MCK (MTK_PIN_NO(0) | 6) +#define PINMUX_GPIO0__FUNC_SPI2_CSB (MTK_PIN_NO(0) | 7) + +#define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) +#define PINMUX_GPIO1__FUNC_MRG_CLK (MTK_PIN_NO(1) | 1) +#define PINMUX_GPIO1__FUNC_PCM0_CLK (MTK_PIN_NO(1) | 2) +#define PINMUX_GPIO1__FUNC_TP_GPIO1_AO (MTK_PIN_NO(1) | 3) +#define PINMUX_GPIO1__FUNC_CLKM3 (MTK_PIN_NO(1) | 4) +#define PINMUX_GPIO1__FUNC_SCP_SPI2_MO (MTK_PIN_NO(1) | 5) +#define PINMUX_GPIO1__FUNC_I2S3_BCK (MTK_PIN_NO(1) | 6) +#define PINMUX_GPIO1__FUNC_SPI2_MO (MTK_PIN_NO(1) | 7) + +#define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) +#define PINMUX_GPIO2__FUNC_MRG_DO (MTK_PIN_NO(2) | 1) +#define PINMUX_GPIO2__FUNC_PCM0_DO (MTK_PIN_NO(2) | 2) +#define PINMUX_GPIO2__FUNC_TP_GPIO2_AO (MTK_PIN_NO(2) | 3) +#define PINMUX_GPIO2__FUNC_SCL6 (MTK_PIN_NO(2) | 4) +#define PINMUX_GPIO2__FUNC_SCP_SPI2_CK (MTK_PIN_NO(2) | 5) +#define PINMUX_GPIO2__FUNC_I2S3_LRCK (MTK_PIN_NO(2) | 6) +#define PINMUX_GPIO2__FUNC_SPI2_CLK (MTK_PIN_NO(2) | 7) + +#define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) +#define PINMUX_GPIO3__FUNC_MRG_DI (MTK_PIN_NO(3) | 1) +#define PINMUX_GPIO3__FUNC_PCM0_DI (MTK_PIN_NO(3) | 2) +#define PINMUX_GPIO3__FUNC_TP_GPIO3_AO (MTK_PIN_NO(3) | 3) +#define PINMUX_GPIO3__FUNC_SDA6 (MTK_PIN_NO(3) | 4) +#define PINMUX_GPIO3__FUNC_TDM_MCK (MTK_PIN_NO(3) | 5) +#define PINMUX_GPIO3__FUNC_I2S3_DO (MTK_PIN_NO(3) | 6) +#define PINMUX_GPIO3__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(3) | 7) + +#define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) +#define PINMUX_GPIO4__FUNC_PWM_B (MTK_PIN_NO(4) | 1) +#define PINMUX_GPIO4__FUNC_I2S0_MCK (MTK_PIN_NO(4) | 2) +#define PINMUX_GPIO4__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(4) | 3) +#define PINMUX_GPIO4__FUNC_MD_URXD1 (MTK_PIN_NO(4) | 4) +#define PINMUX_GPIO4__FUNC_TDM_BCK (MTK_PIN_NO(4) | 5) +#define PINMUX_GPIO4__FUNC_TP_GPIO4_AO (MTK_PIN_NO(4) | 6) +#define PINMUX_GPIO4__FUNC_DAP_MD32_SWD (MTK_PIN_NO(4) | 7) + +#define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) +#define PINMUX_GPIO5__FUNC_PWM_C (MTK_PIN_NO(5) | 1) +#define PINMUX_GPIO5__FUNC_I2S0_BCK (MTK_PIN_NO(5) | 2) +#define PINMUX_GPIO5__FUNC_SSPM_URXD_AO (MTK_PIN_NO(5) | 3) +#define PINMUX_GPIO5__FUNC_MD_UTXD1 (MTK_PIN_NO(5) | 4) +#define PINMUX_GPIO5__FUNC_TDM_LRCK (MTK_PIN_NO(5) | 5) +#define PINMUX_GPIO5__FUNC_TP_GPIO5_AO (MTK_PIN_NO(5) | 6) +#define PINMUX_GPIO5__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(5) | 7) + +#define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) +#define PINMUX_GPIO6__FUNC_PWM_A (MTK_PIN_NO(6) | 1) +#define PINMUX_GPIO6__FUNC_I2S0_LRCK (MTK_PIN_NO(6) | 2) +#define PINMUX_GPIO6__FUNC_IDDIG (MTK_PIN_NO(6) | 3) +#define PINMUX_GPIO6__FUNC_MD_URXD0 (MTK_PIN_NO(6) | 4) +#define PINMUX_GPIO6__FUNC_TDM_DATA0 (MTK_PIN_NO(6) | 5) +#define PINMUX_GPIO6__FUNC_TP_GPIO6_AO (MTK_PIN_NO(6) | 6) +#define PINMUX_GPIO6__FUNC_CMFLASH (MTK_PIN_NO(6) | 7) + +#define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) +#define PINMUX_GPIO7__FUNC_SPI1_B_MI (MTK_PIN_NO(7) | 1) +#define PINMUX_GPIO7__FUNC_I2S0_DI (MTK_PIN_NO(7) | 2) +#define PINMUX_GPIO7__FUNC_USB_DRVVBUS (MTK_PIN_NO(7) | 3) +#define PINMUX_GPIO7__FUNC_MD_UTXD0 (MTK_PIN_NO(7) | 4) +#define PINMUX_GPIO7__FUNC_TDM_DATA1 (MTK_PIN_NO(7) | 5) +#define PINMUX_GPIO7__FUNC_TP_GPIO7_AO (MTK_PIN_NO(7) | 6) +#define PINMUX_GPIO7__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(7) | 7) + +#define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) +#define PINMUX_GPIO8__FUNC_SPI1_B_CSB (MTK_PIN_NO(8) | 1) +#define PINMUX_GPIO8__FUNC_ANT_SEL3 (MTK_PIN_NO(8) | 2) +#define PINMUX_GPIO8__FUNC_SCL7 (MTK_PIN_NO(8) | 3) +#define PINMUX_GPIO8__FUNC_CONN_MCU_TRST_B (MTK_PIN_NO(8) | 4) +#define PINMUX_GPIO8__FUNC_TDM_DATA2 (MTK_PIN_NO(8) | 5) +#define PINMUX_GPIO8__FUNC_MD_INT0 (MTK_PIN_NO(8) | 6) +#define PINMUX_GPIO8__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(8) | 7) + +#define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) +#define PINMUX_GPIO9__FUNC_SPI1_B_MO (MTK_PIN_NO(9) | 1) +#define PINMUX_GPIO9__FUNC_ANT_SEL4
[PATCH v7 6/6] arm64: dts: mt8183: add spi node
Add spi DTS node to the mt8183 and mt8183-evb.
Signed-off-by: Mengqi Zhang
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 105
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 79 +
2 files changed, 184 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 9b52559..b12c6ea 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -26,6 +26,111 @@
};
};
+ {
+ spi_pins_0: spi0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_1: spi1{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_2: spi2{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_3: spi3{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_4: spi4{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_5: spi5{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_0>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_1>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_2>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_3>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_4>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_5>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+
+};
+
{
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 1bd1399..165b859 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include
#include
#include
+#include "mt8183-pinfunc.h"
/ {
compatible = "mediatek,mt8183";
@@ -267,6 +268,84 @@
status = "disabled";
};
+ spi0: spi@1100a000 {
+ compatible = "mediatek,mt8183-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x1000>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL_D5_D2>,
+< CLK_TOP_MUX_SPI>,
+< CLK_INFRA_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi1: spi@1101 {
+ compatible = "mediatek,mt8183-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1101 0 0x1000>;
+ interrupts = ;
+ clocks = < CLK_TOP_SYSPLL_D5_D2>,
+< CLK_TOP_MUX_SPI>,
+< CLK_INFRA_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+
[PATCH v7 2/6] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 742cb47..bcfb131 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -16,6 +16,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v7 1/6] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 33a98eb..91aa9ab 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v7 0/6] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock, pinctrl, spi, and pwrap. Based on v5.0-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2018-December/016243.html Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (4): dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 arm64: dts: mt8183: add pintcrl file arm64: dts: mt8183: add spi node Zhiyong Tao (1): dt-bindings: pinctrl: mt8183: add binding document .../interrupt-controller/mediatek,sysirq.txt |1 + .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 115 ++ .../devicetree/bindings/serial/mtk-uart.txt|1 + arch/arm64/boot/dts/mediatek/Makefile |1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 136 +++ arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 415 7 files changed, 1789 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Thu, 2019-02-14 at 18:14 +0800, Erin Lo wrote: > On Thu, 2019-02-14 at 10:01 +0100, Matthias Brugger wrote: > > > > On 14/02/2019 06:27, Erin Lo wrote: > > > On Wed, 2019-02-13 at 15:54 +0100, Matthias Brugger wrote: > > >> > > >> On 13/02/2019 10:03, Erin Lo wrote: > > >>> On Thu, 2019-02-07 at 16:30 +0100, Matthias Brugger wrote: > > >>>> > > >>>> On 24/01/2019 09:07, Erin Lo wrote: > > >>>>> From: Ben Ho > > >>>>> > > >>>>> Add basic chip support for Mediatek 8183, include > > >>>>> pinctrl file, uart node with correct uart clocks, pwrap device > > >>>>> > > >>>>> Add clock controller nodes, include topckgen, infracfg, > > >>>>> apmixedsys and subsystem. > > >>>>> > > >>>>> Signed-off-by: Ben Ho > > >>>>> Signed-off-by: Erin Lo > > >>>>> Signed-off-by: Seiya Wang > > >>>>> Signed-off-by: Zhiyong Tao > > >>>>> Signed-off-by: Weiyi Lu > > >>>>> Signed-off-by: Mengqi Zhang > > >>>>> Signed-off-by: Hsin-Hsiung Wang > > >>>>> Signed-off-by: Eddie Huang > > >>>>> --- > > >>>>> arch/arm64/boot/dts/mediatek/Makefile |1 + > > >>>>> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++ > > >>>>> arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 > > >>>>> + > > >>>> > > >>>> Would you mind to make the pinfunc.h a seperate patch and adding the > > >>>> pinctrl > > >>>> maintainers to the list. > > >>>> > > >>>> Regards, > > >>>> Matthias > > >>>> > > >>> > > >>> OK! I will take pinfunc.h out of this series. > > >> > > >> My take would be to somehow change this series in something like. > > >> One patch which adds basic support for the SoC without any dependencies > > >> on other > > >> series. > > >> Every node that has a dependency on a different series should go in a > > >> separate > > >> patch. In this case IMHO pinfunc.h can got with the dts node in one > > >> patch. > > >> > > >> Regards, > > >> Matthias > > >> > > > > > > I will separate this patch into 3 patches : basic support for the SoC, > > > mt8183-pinfunc.h, and spi node. > > > > > > Is that OK? > > > Is it ok, if pinctrl@1000b000 is included in basic node? > > > > > > > Why do you want to do that? Without the pinfunc.h I can't take it > > independently, > > right? > > > > Regards, > > Matthias > > spi node need to use pio in mt8183-evb.dts, unless I don't submit spi > relative. > Best Regards. > Erin > > > > > Best Regards. > > > Erin > > > > > >>> > > >>> Best Regards, > > >>> Erin > > >>> > > >>>>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 + > > >>>>> 4 files changed, 1665 insertions(+) > > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h > > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi > > >>>>> > > >>>>> diff --git a/arch/arm64/boot/dts/mediatek/Makefile > > >>>>> b/arch/arm64/boot/dts/mediatek/Makefile > > >>>>> index e8f952f..458bbc4 100644 > > >>>>> --- a/arch/arm64/boot/dts/mediatek/Makefile > > >>>>> +++ b/arch/arm64/boot/dts/mediatek/Makefile > > >>>>> @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > > >>>>> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb > > >>>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > >>>>> b/arch/arm64/boot/dts/mediatek/mt8183-evb.dt
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Thu, 2019-02-14 at 10:01 +0100, Matthias Brugger wrote: > > On 14/02/2019 06:27, Erin Lo wrote: > > On Wed, 2019-02-13 at 15:54 +0100, Matthias Brugger wrote: > >> > >> On 13/02/2019 10:03, Erin Lo wrote: > >>> On Thu, 2019-02-07 at 16:30 +0100, Matthias Brugger wrote: > >>>> > >>>> On 24/01/2019 09:07, Erin Lo wrote: > >>>>> From: Ben Ho > >>>>> > >>>>> Add basic chip support for Mediatek 8183, include > >>>>> pinctrl file, uart node with correct uart clocks, pwrap device > >>>>> > >>>>> Add clock controller nodes, include topckgen, infracfg, > >>>>> apmixedsys and subsystem. > >>>>> > >>>>> Signed-off-by: Ben Ho > >>>>> Signed-off-by: Erin Lo > >>>>> Signed-off-by: Seiya Wang > >>>>> Signed-off-by: Zhiyong Tao > >>>>> Signed-off-by: Weiyi Lu > >>>>> Signed-off-by: Mengqi Zhang > >>>>> Signed-off-by: Hsin-Hsiung Wang > >>>>> Signed-off-by: Eddie Huang > >>>>> --- > >>>>> arch/arm64/boot/dts/mediatek/Makefile |1 + > >>>>> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++ > >>>>> arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 > >>>>> + > >>>> > >>>> Would you mind to make the pinfunc.h a seperate patch and adding the > >>>> pinctrl > >>>> maintainers to the list. > >>>> > >>>> Regards, > >>>> Matthias > >>>> > >>> > >>> OK! I will take pinfunc.h out of this series. > >> > >> My take would be to somehow change this series in something like. > >> One patch which adds basic support for the SoC without any dependencies on > >> other > >> series. > >> Every node that has a dependency on a different series should go in a > >> separate > >> patch. In this case IMHO pinfunc.h can got with the dts node in one patch. > >> > >> Regards, > >> Matthias > >> > > > > I will separate this patch into 3 patches : basic support for the SoC, > > mt8183-pinfunc.h, and spi node. > > > > Is that OK? > > Is it ok, if pinctrl@1000b000 is included in basic node? > > > > Why do you want to do that? Without the pinfunc.h I can't take it > independently, > right? > > Regards, > Matthias spi node need to use pio in mt8183-evb.dts, unless I don't submit spi relative. > > > Best Regards. > > Erin > > > >>> > >>> Best Regards, > >>> Erin > >>> > >>>>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 + > >>>>> 4 files changed, 1665 insertions(+) > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h > >>>>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi > >>>>> > >>>>> diff --git a/arch/arm64/boot/dts/mediatek/Makefile > >>>>> b/arch/arm64/boot/dts/mediatek/Makefile > >>>>> index e8f952f..458bbc4 100644 > >>>>> --- a/arch/arm64/boot/dts/mediatek/Makefile > >>>>> +++ b/arch/arm64/boot/dts/mediatek/Makefile > >>>>> @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > >>>>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > >>>>> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb > >>>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > >>>>> b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > >>>>> new file mode 100644 > >>>>> index 000..b12c6ea > >>>>> --- /dev/null > >>>>> +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > >>>>> @@ -0,0 +1,136 @@ > >>>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > >>>>> +/* > >>>>> + * Copyright (c) 2018 MediaTek Inc. > >>>>> + * Author: Ben Ho > >>>>> + *Erin Lo > >>>>> + */ > >>&g
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Wed, 2019-02-13 at 15:54 +0100, Matthias Brugger wrote:
>
> On 13/02/2019 10:03, Erin Lo wrote:
> > On Thu, 2019-02-07 at 16:30 +0100, Matthias Brugger wrote:
> >>
> >> On 24/01/2019 09:07, Erin Lo wrote:
> >>> From: Ben Ho
> >>>
> >>> Add basic chip support for Mediatek 8183, include
> >>> pinctrl file, uart node with correct uart clocks, pwrap device
> >>>
> >>> Add clock controller nodes, include topckgen, infracfg,
> >>> apmixedsys and subsystem.
> >>>
> >>> Signed-off-by: Ben Ho
> >>> Signed-off-by: Erin Lo
> >>> Signed-off-by: Seiya Wang
> >>> Signed-off-by: Zhiyong Tao
> >>> Signed-off-by: Weiyi Lu
> >>> Signed-off-by: Mengqi Zhang
> >>> Signed-off-by: Hsin-Hsiung Wang
> >>> Signed-off-by: Eddie Huang
> >>> ---
> >>> arch/arm64/boot/dts/mediatek/Makefile |1 +
> >>> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++
> >>> arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120
> >>> +
> >>
> >> Would you mind to make the pinfunc.h a seperate patch and adding the
> >> pinctrl
> >> maintainers to the list.
> >>
> >> Regards,
> >> Matthias
> >>
> >
> > OK! I will take pinfunc.h out of this series.
>
> My take would be to somehow change this series in something like.
> One patch which adds basic support for the SoC without any dependencies on
> other
> series.
> Every node that has a dependency on a different series should go in a separate
> patch. In this case IMHO pinfunc.h can got with the dts node in one patch.
>
> Regards,
> Matthias
>
I will separate this patch into 3 patches : basic support for the SoC,
mt8183-pinfunc.h, and spi node.
Is that OK?
Is it ok, if pinctrl@1000b000 is included in basic node?
Best Regards.
Erin
> >
> > Best Regards,
> > Erin
> >
> >>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 +
> >>> 4 files changed, 1665 insertions(+)
> >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
> >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >>>
> >>> diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> >>> b/arch/arm64/boot/dts/mediatek/Makefile
> >>> index e8f952f..458bbc4 100644
> >>> --- a/arch/arm64/boot/dts/mediatek/Makefile
> >>> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> >>> @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> >>> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> >>> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> >>> b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> >>> new file mode 100644
> >>> index 000..b12c6ea
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> >>> @@ -0,0 +1,136 @@
> >>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >>> +/*
> >>> + * Copyright (c) 2018 MediaTek Inc.
> >>> + * Author: Ben Ho
> >>> + * Erin Lo
> >>> + */
> >>> +
> >>> +/dts-v1/;
> >>> +#include "mt8183.dtsi"
> >>> +
> >>> +/ {
> >>> + model = "MediaTek MT8183 evaluation board";
> >>> + compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
> >>> +
> >>> + aliases {
> >>> + serial0 =
> >>> + };
> >>> +
> >>> + memory@4000 {
> >>> + device_type = "memory";
> >>> + reg = <0 0x4000 0 0x8000>;
> >>> + };
> >>> +
> >>> + chosen {
> >>> + stdout-path = "serial0:921600n8";
> >>> + };
> >>> +};
> >>> +
> >>> + {
> >>> + spi_pins_0: spi0{
> >>> + pins_spi{
> >>> + pinmux = ,
> >>> + ,
> >>> + ,
> >>> + ;
> >>> + bias-disa
Re: [PATCH v6 5/6] dt-bindings: pinctrl: mt8183: add binding document
On Thu, 2019-02-07 at 16:28 +0100, Matthias Brugger wrote:
>
> On 24/01/2019 09:07, Erin Lo wrote:
> > From: Zhiyong Tao
> >
> > The commit adds mt8183 compatible node in binding document.
> >
> > Signed-off-by: Zhiyong Tao
> > Signed-off-by: Erin Lo
> > ---
>
> I'm missing Linus Walleij on the recipient list.
> Pleas make sure to add all persons from the get_maintainers script.
> IMHO it's a bit unfortunate that we got the driver merged, but no binding
> description. Please try to send driver + binding documentation together, that
> makes things easier to discuss.
>
> Thanks,
> Matthias
>
OK! I will add Linus Walleij on the recipient list.
It's right..the binding should send together with driver code.
We will pay more attention of this next time.
Thank you for your reminder.
Best Regards,
Erin
> > .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 115
> > +
> > 1 file changed, 115 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
> > b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
> > new file mode 100644
> > index 000..364e673
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
> > @@ -0,0 +1,115 @@
> > +* Mediatek MT8183 Pin Controller
> > +
> > +The Mediatek's Pin controller is used to control SoC pins.
> > +
> > +Required properties:
> > +- compatible: value should be one of the following.
> > + "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
> > +- gpio-controller : Marks the device node as a gpio controller.
> > +- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
> > + binding is used, the amount of cells must be specified as 2. See the
> > below
> > + mentioned gpio binding representation for description of particular
> > cells.
> > +- gpio-ranges : gpio valid number range.
> > +- reg: physicall address base for gpio base registers. There are nine
> > + physicall address base in mt8183. They are 0x10005000, 0x11F2,
> > + 0x11E8, 0x11E7, 0x11E9, 0x11D3, 0x11D2, 0x11C5,
> > + 0x11F3.
> > +
> > + Eg: < 6 0>
> > + <[phandle of the gpio controller node]
> > + [line number within the gpio controller]
> > + [flags]>
> > +
> > + Values for gpio specifier:
> > + - Line number: is a value between 0 to 202.
> > + - Flags: bit field of flags, as defined in .
> > +Only the following flags are supported:
> > +0 - GPIO_ACTIVE_HIGH
> > +1 - GPIO_ACTIVE_LOW
> > +
> > +Optional properties:
> > +- reg-names: gpio base register names. There are nine gpio base register
> > + names in mt8183. They are "iocfg0", "iocfg1", "iocfg2", "iocfg3",
> > "iocfg4",
> > + "iocfg5", "iocfg6", "iocfg7", "iocfg8".
> > +- interrupt-controller: Marks the device node as an interrupt controller
> > +- #interrupt-cells: Should be two.
> > +- interrupts : The interrupt outputs from the controller.
> > +
> > +Please refer to pinctrl-bindings.txt in this directory for details of the
> > +common pinctrl bindings used by client devices.
> > +
> > +Subnode format
> > +A pinctrl node should contain at least one subnodes representing the
> > +pinctrl groups available on the machine. Each subnode will list the
> > +pins it needs, and how they should be configured, with regard to muxer
> > +configuration, pullups, drive strength, input enable/disable and input
> > schmitt.
> > +
> > +node {
> > + pinmux = ;
> > + GENERIC_PINCONFIG;
> > +};
> > +
> > +Required properties:
> > +- pinmux: integer array, represents gpio pin number and mux setting.
> > +Supported pin number and mux varies for different SoCs, and are defined
> > +as macros in boot/dts/-pinfunc.h directly.
> > +
> > +Optional properties:
> > +- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
> > +bias-pull-down, bias-pull-up, input-enable, input-disable, output-low,
> > output-high,
> > +input-schmitt-enable, input-schmitt-disable and drive-strength are
> > valid.
> > +
> > +Some special pins have extra pull up strength, there are R0 and R1
> > pull-up
> > +resistors available, but for user,
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Thu, 2019-02-07 at 16:30 +0100, Matthias Brugger wrote:
>
> On 24/01/2019 09:07, Erin Lo wrote:
> > From: Ben Ho
> >
> > Add basic chip support for Mediatek 8183, include
> > pinctrl file, uart node with correct uart clocks, pwrap device
> >
> > Add clock controller nodes, include topckgen, infracfg,
> > apmixedsys and subsystem.
> >
> > Signed-off-by: Ben Ho
> > Signed-off-by: Erin Lo
> > Signed-off-by: Seiya Wang
> > Signed-off-by: Zhiyong Tao
> > Signed-off-by: Weiyi Lu
> > Signed-off-by: Mengqi Zhang
> > Signed-off-by: Hsin-Hsiung Wang
> > Signed-off-by: Eddie Huang
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile |1 +
> > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++
> > arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120
> > +
>
> Would you mind to make the pinfunc.h a seperate patch and adding the pinctrl
> maintainers to the list.
>
> Regards,
> Matthias
>
OK! I will take pinfunc.h out of this series.
Best Regards,
Erin
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 +
> > 4 files changed, 1665 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> > b/arch/arm64/boot/dts/mediatek/Makefile
> > index e8f952f..458bbc4 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > new file mode 100644
> > index 000..b12c6ea
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > @@ -0,0 +1,136 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (c) 2018 MediaTek Inc.
> > + * Author: Ben Ho
> > + *Erin Lo
> > + */
> > +
> > +/dts-v1/;
> > +#include "mt8183.dtsi"
> > +
> > +/ {
> > + model = "MediaTek MT8183 evaluation board";
> > + compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
> > +
> > + aliases {
> > + serial0 =
> > + };
> > +
> > + memory@4000 {
> > + device_type = "memory";
> > + reg = <0 0x4000 0 0x8000>;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:921600n8";
> > + };
> > +};
> > +
> > + {
> > + spi_pins_0: spi0{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_1: spi1{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_2: spi2{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_3: spi3{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_4: spi4{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_5: spi5{
> > + pins_spi{
> > +
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Thu, 2019-02-07 at 16:08 +0100, Matthias Brugger wrote:
>
> On 01/02/2019 06:11, Erin Lo wrote:
> > Add back more people since mail server issue
> >
> > On Fri, 2019-02-01 at 11:33 +0800, Erin Lo wrote:
> >> On Thu, 2019-01-31 at 15:10 -0600, Rob Herring wrote:
> >>> On Wed, Jan 30, 2019 at 8:34 PM Erin Lo wrote:
> >>>>
> >>>> On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote:
> >>>>> On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote:
> >>>>>> From: Ben Ho
> >>>>>>
> >>>>>> Add basic chip support for Mediatek 8183, include
> >>>>>> pinctrl file, uart node with correct uart clocks, pwrap device
> >>>>>>
> >>>>>> Add clock controller nodes, include topckgen, infracfg,
> >>>>>> apmixedsys and subsystem.
> >>>>>>
> >>>>>> Signed-off-by: Ben Ho
> >>>>>> Signed-off-by: Erin Lo
> >>>>>> Signed-off-by: Seiya Wang
> >>>>>> Signed-off-by: Zhiyong Tao
> >>>>>> Signed-off-by: Weiyi Lu
> >>>>>> Signed-off-by: Mengqi Zhang
> >>>>>> Signed-off-by: Hsin-Hsiung Wang
> >>>>>> Signed-off-by: Eddie Huang
> >>>>>> ---
> >>>>>
> >>>>>
> >>>>>> + sysirq: intpol-controller@c530a80 {
> >>>>>
> >>>>> interrupt-controller@...
> >>>>
> >>>> I will modify it in next version.
> >>>>>
> >>>>>
> >>>>> Place all the MMIO peripherals under one or more simple-bus nodes.
> >>>>>
> >>>>> Rob
> >>>>>
> >>>>
> >>>> Do you mean need to add simple-bus like this?
> >>>
> >>> Yes.
> >>
> >> We remove soc because Matthias suggested it in former MTK SoC maybe in
> >> 2015 year.
> >>
> >> We will add it back by your comment.
> >>
> >> Thank you.
> >>
> >> Best Regards,
> >> Erin
> >
> > Hi, Matthias,
> > Do you have any comment here?
>
> Although I wasn't able to find it in the documentation my understanding is,
> that
> all devices on-chip should be under soc "bus".
>
> I'm sorry if I created confusion with comments in the past.
>
> Regards,
> Matthias
>
OK! we will add soc "bus" back in next version.
Thank you for your comment.
Best Regards,
Erin
> > Thanks
> >
> > Best Regards,
> > Erin
> >>>
> >>>>
> >>>> + soc: soc {
> >>>> +#address-cells = <0x1>;
> >>>> +#size-cells = <0x1>;
> >>>> +ranges = <0 0 0 0x>;
> >>>> +compatible = "simple-bus";
> >>>>
> >>>> soc_data: soc_data@0800 {
> >>>> compatible = "mediatek,mt8183-efuse",
> >>>> "mediatek,efuse";
> >>>> reg = <0 0x0800 0 0x0010>;
> >>>> #address-cells = <1>;
> >>>> #size-cells = <1>;
> >>>> status = "disabled";
> >>>> };
> >>>>
> >>>> gic: interrupt-controller@0c00 {
> >>>> compatible = "arm,gic-v3";
> >>>> #interrupt-cells = <4>;
> >>>>
> >>>> Best Regards,
> >>>> Erin
> >>>>
> >>>>> ___
> >>>>> Linux-mediatek mailing list
> >>>>> linux-media...@lists.infradead.org
> >>>>> http://lists.infradead.org/mailman/listinfo/linux-mediatek
> >>>>
> >>>>
> >>>>
> >>>> ___
> >>>> linux-arm-kernel mailing list
> >>>> linux-arm-ker...@lists.infradead.org
> >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >>
> >
> >
>
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
Add back more people since mail server issue
On Fri, 2019-02-01 at 11:33 +0800, Erin Lo wrote:
> On Thu, 2019-01-31 at 15:10 -0600, Rob Herring wrote:
> > On Wed, Jan 30, 2019 at 8:34 PM Erin Lo wrote:
> > >
> > > On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote:
> > > > On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote:
> > > > > From: Ben Ho
> > > > >
> > > > > Add basic chip support for Mediatek 8183, include
> > > > > pinctrl file, uart node with correct uart clocks, pwrap device
> > > > >
> > > > > Add clock controller nodes, include topckgen, infracfg,
> > > > > apmixedsys and subsystem.
> > > > >
> > > > > Signed-off-by: Ben Ho
> > > > > Signed-off-by: Erin Lo
> > > > > Signed-off-by: Seiya Wang
> > > > > Signed-off-by: Zhiyong Tao
> > > > > Signed-off-by: Weiyi Lu
> > > > > Signed-off-by: Mengqi Zhang
> > > > > Signed-off-by: Hsin-Hsiung Wang
> > > > > Signed-off-by: Eddie Huang
> > > > > ---
> > > >
> > > >
> > > > > + sysirq: intpol-controller@c530a80 {
> > > >
> > > > interrupt-controller@...
> > >
> > > I will modify it in next version.
> > > >
> > > >
> > > > Place all the MMIO peripherals under one or more simple-bus nodes.
> > > >
> > > > Rob
> > > >
> > >
> > > Do you mean need to add simple-bus like this?
> >
> > Yes.
>
> We remove soc because Matthias suggested it in former MTK SoC maybe in
> 2015 year.
>
> We will add it back by your comment.
>
> Thank you.
>
> Best Regards,
> Erin
Hi, Matthias,
Do you have any comment here?
Thanks
Best Regards,
Erin
> >
> > >
> > > + soc: soc {
> > > +#address-cells = <0x1>;
> > > +#size-cells = <0x1>;
> > > +ranges = <0 0 0 0x>;
> > > +compatible = "simple-bus";
> > >
> > > soc_data: soc_data@0800 {
> > > compatible = "mediatek,mt8183-efuse",
> > > "mediatek,efuse";
> > > reg = <0 0x0800 0 0x0010>;
> > > #address-cells = <1>;
> > > #size-cells = <1>;
> > > status = "disabled";
> > > };
> > >
> > > gic: interrupt-controller@0c00 {
> > > compatible = "arm,gic-v3";
> > > #interrupt-cells = <4>;
> > >
> > > Best Regards,
> > > Erin
> > >
> > > > ___
> > > > Linux-mediatek mailing list
> > > > linux-media...@lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
> > >
> > >
> > >
> > > ___
> > > linux-arm-kernel mailing list
> > > linux-arm-ker...@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote:
> On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote:
> > From: Ben Ho
> >
> > Add basic chip support for Mediatek 8183, include
> > pinctrl file, uart node with correct uart clocks, pwrap device
> >
> > Add clock controller nodes, include topckgen, infracfg,
> > apmixedsys and subsystem.
> >
> > Signed-off-by: Ben Ho
> > Signed-off-by: Erin Lo
> > Signed-off-by: Seiya Wang
> > Signed-off-by: Zhiyong Tao
> > Signed-off-by: Weiyi Lu
> > Signed-off-by: Mengqi Zhang
> > Signed-off-by: Hsin-Hsiung Wang
> > Signed-off-by: Eddie Huang
> > ---
>
>
> > + sysirq: intpol-controller@c530a80 {
>
> interrupt-controller@...
I will modify it in next version.
>
>
> Place all the MMIO peripherals under one or more simple-bus nodes.
>
> Rob
>
Do you mean need to add simple-bus like this?
+ soc: soc {
+#address-cells = <0x1>;
+#size-cells = <0x1>;
+ranges = <0 0 0 0x>;
+compatible = "simple-bus";
soc_data: soc_data@0800 {
compatible = "mediatek,mt8183-efuse",
"mediatek,efuse";
reg = <0 0x0800 0 0x0010>;
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
gic: interrupt-controller@0c00 {
compatible = "arm,gic-v3";
#interrupt-cells = <4>;
Best Regards,
Erin
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
[PATCH v6 2/6] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 8f260e5..f6d6ed3 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -20,6 +20,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -77,3 +78,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v6 5/6] dt-bindings: pinctrl: mt8183: add binding document
From: Zhiyong Tao
The commit adds mt8183 compatible node in binding document.
Signed-off-by: Zhiyong Tao
Signed-off-by: Erin Lo
---
.../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 115 +
1 file changed, 115 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
new file mode 100644
index 000..364e673
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
@@ -0,0 +1,115 @@
+* Mediatek MT8183 Pin Controller
+
+The Mediatek's Pin controller is used to control SoC pins.
+
+Required properties:
+- compatible: value should be one of the following.
+ "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2. See the below
+ mentioned gpio binding representation for description of particular cells.
+- gpio-ranges : gpio valid number range.
+- reg: physicall address base for gpio base registers. There are nine
+ physicall address base in mt8183. They are 0x10005000, 0x11F2,
+ 0x11E8, 0x11E7, 0x11E9, 0x11D3, 0x11D2, 0x11C5,
+ 0x11F3.
+
+ Eg: < 6 0>
+ <[phandle of the gpio controller node]
+ [line number within the gpio controller]
+ [flags]>
+
+ Values for gpio specifier:
+ - Line number: is a value between 0 to 202.
+ - Flags: bit field of flags, as defined in .
+Only the following flags are supported:
+0 - GPIO_ACTIVE_HIGH
+1 - GPIO_ACTIVE_LOW
+
+Optional properties:
+- reg-names: gpio base register names. There are nine gpio base register
+ names in mt8183. They are "iocfg0", "iocfg1", "iocfg2", "iocfg3", "iocfg4",
+ "iocfg5", "iocfg6", "iocfg7", "iocfg8".
+- interrupt-controller: Marks the device node as an interrupt controller
+- #interrupt-cells: Should be two.
+- interrupts : The interrupt outputs from the controller.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Subnode format
+A pinctrl node should contain at least one subnodes representing the
+pinctrl groups available on the machine. Each subnode will list the
+pins it needs, and how they should be configured, with regard to muxer
+configuration, pullups, drive strength, input enable/disable and input schmitt.
+
+node {
+ pinmux = ;
+ GENERIC_PINCONFIG;
+};
+
+Required properties:
+- pinmux: integer array, represents gpio pin number and mux setting.
+Supported pin number and mux varies for different SoCs, and are defined
+as macros in boot/dts/-pinfunc.h directly.
+
+Optional properties:
+- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
+bias-pull-down, bias-pull-up, input-enable, input-disable, output-low,
output-high,
+input-schmitt-enable, input-schmitt-disable and drive-strength are valid.
+
+Some special pins have extra pull up strength, there are R0 and R1 pull-up
+resistors available, but for user, it's only need to set R1R0 as 00, 01,
10 or 11.
+So when config mediatek,pull-up-adv or mediatek,pull-down-adv,
+it support arguments for those special pins.
+
+When config drive-strength, it can support some arguments, such as
+MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h.
+
+Examples:
+
+#include "mt8183-pinfunc.h"
+
+...
+{
+ pio: pinctrl@10005000 {
+ compatible = "mediatek,mt8183-pinctrl";
+ reg = <0 0x10005000 0 0x1000>,
+ <0 0x11F2 0 0x1000>,
+ <0 0x11E8 0 0x1000>,
+ <0 0x11E7 0 0x1000>,
+ <0 0x11E9 0 0x1000>,
+ <0 0x11D3 0 0x1000>,
+ <0 0x11D2 0 0x1000>,
+ <0 0x11C5 0 0x1000>,
+ <0 0x11F3 0 0x1000>;
+ reg-names = "iocfg0", "iocfg1", "iocfg2",
+ "iocfg3", "iocfg4", "iocfg5",
+ "iocfg6", "iocfg7", "iocfg8";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = < 0 0 192>;
+ interrupt-controller;
+ interrupts = ;
+ interrupt-parent = <>;
+ #interrupt-cells = <2>;
+
+ i2c0_pins_a
[PATCH v6 4/6] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 742cb47..bcfb131 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -16,6 +16,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v6 3/6] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 33a98eb..91aa9ab 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
pinctrl file, uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Zhiyong Tao
Signed-off-by: Weiyi Lu
Signed-off-by: Mengqi Zhang
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile |1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++
arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 +
4 files changed, 1665 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..b12c6ea
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ spi_pins_0: spi0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_1: spi1{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_2: spi2{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_3: spi3{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_4: spi4{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_5: spi5{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_0>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_1>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_2>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_3>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_4>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_5>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
b/arch/arm64/boot/dts/mediatek/
[PATCH v6 0/6] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock, pinctrl, spi, and pwrap. Based on v5.0-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2018-December/016243.html Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Seiya Wang (1): irqchip/mtk-sysirq: support 4 interrupt parameters for sysirq Zhiyong Tao (1): dt-bindings: pinctrl: mt8183: add binding document Documentation/devicetree/bindings/arm/mediatek.txt |4 + .../interrupt-controller/mediatek,sysirq.txt |1 + .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 115 ++ .../devicetree/bindings/serial/mtk-uart.txt|1 + arch/arm64/boot/dts/mediatek/Makefile |1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 136 +++ arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 408 +++ drivers/irqchip/irq-mtk-sysirq.c |4 +- 9 files changed, 1788 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v6 1/6] irqchip/mtk-sysirq: support 4 interrupt parameters for sysirq
From: Seiya Wang
To support partitioned PPIs, 4 interrupt parameters should be valid
for sysirq.
Signed-off-by: Seiya Wang
Signed-off-by: Erin Lo
---
drivers/irqchip/irq-mtk-sysirq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-mtk-sysirq.c b/drivers/irqchip/irq-mtk-sysirq.c
index 90aaf19..282736a 100644
--- a/drivers/irqchip/irq-mtk-sysirq.c
+++ b/drivers/irqchip/irq-mtk-sysirq.c
@@ -81,7 +81,7 @@ static int mtk_sysirq_domain_translate(struct irq_domain *d,
unsigned int *type)
{
if (is_of_node(fwspec->fwnode)) {
- if (fwspec->param_count != 3)
+ if (fwspec->param_count != 3 && fwspec->param_count != 4)
return -EINVAL;
/* No PPI should point to this domain */
@@ -104,7 +104,7 @@ static int mtk_sysirq_domain_alloc(struct irq_domain
*domain, unsigned int virq,
struct irq_fwspec *fwspec = arg;
struct irq_fwspec gic_fwspec = *fwspec;
- if (fwspec->param_count != 3)
+ if (fwspec->param_count != 3 && fwspec->param_count != 4)
return -EINVAL;
/* sysirq doesn't support PPI */
--
1.9.1
Re: [PATCH v5 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Fri, 2018-12-28 at 16:11 -0600, Rob Herring wrote:
> On Fri, Dec 28, 2018 at 04:09:41PM +0800, Erin Lo wrote:
> > From: Ben Ho
> >
> > Add basic chip support for Mediatek 8183, include
> > pinctrl file, uart node with correct uart clocks, pwrap device
> > M4U, smi-common and smi-larbs.
> >
> > Add clock controller nodes, include topckgen, infracfg,
> > apmixedsys and subsystem.
> >
> > Add power controller and scpsys node.
> >
> > Signed-off-by: Ben Ho
> > Signed-off-by: Erin Lo
> > Signed-off-by: Seiya Wang
> > Signed-off-by: Zhiyong Tao
> > Signed-off-by: Weiyi Lu
> > Signed-off-by: Yong Wu
> > Signed-off-by: Mengqi Zhang
> > Signed-off-by: Hsin-Hsiung Wang
> > Signed-off-by: Eddie Huang
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile |1 +
> > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++
> > arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120
> > +
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 547
> > 4 files changed, 1804 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> > b/arch/arm64/boot/dts/mediatek/Makefile
> > index e8f952f..458bbc4 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
> > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > new file mode 100644
> > index 000..5d308cb
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > @@ -0,0 +1,136 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (c) 2018 MediaTek Inc.
> > + * Author: Ben Ho
> > + *Erin Lo
> > + */
> > +
> > +/dts-v1/;
> > +#include "mt8183.dtsi"
> > +
> > +/ {
> > + model = "MediaTek MT8183 evaluation board";
> > + compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
> > +
> > + aliases {
> > + serial0 =
> > + };
> > +
> > + memory@4000 {
> > + device_type = "memory";
> > + reg = <0 0x4000 0 0x8000>;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:921600n8";
> > + };
> > +};
> > +
> > + {
> > + spi_pins_0: spi0@0{
>
> Build your dtb with W=1 and fix the warnings.
I will do it next time.
Thank you~
>
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_1: spi1@0{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_2: spi2@0{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_3: spi3@0{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_4: spi4@0{
> > + pins_spi{
> > + pinmux = ,
> > +,
> > +,
> > +;
> > + bias-disable;
> > + };
> > + };
> > +
> > + spi_pins_5: spi5@0{
> > + p
[PATCH v5 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183, include
pinctrl file, uart node with correct uart clocks, pwrap device
M4U, smi-common and smi-larbs.
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Add power controller and scpsys node.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Zhiyong Tao
Signed-off-by: Weiyi Lu
Signed-off-by: Yong Wu
Signed-off-by: Mengqi Zhang
Signed-off-by: Hsin-Hsiung Wang
Signed-off-by: Eddie Huang
---
arch/arm64/boot/dts/mediatek/Makefile |1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 136 +++
arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 547
4 files changed, 1804 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index e8f952f..458bbc4 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..5d308cb
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ spi_pins_0: spi0@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_1: spi1@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_2: spi2@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_3: spi3@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_4: spi4@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+
+ spi_pins_5: spi5@0{
+ pins_spi{
+ pinmux = ,
+,
+,
+;
+ bias-disable;
+ };
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_0>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_1>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_2>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_3>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_4>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_5>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+
+};
+
+ {
+ status = "okay";
[PATCH v5 4/6] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 742cb47..bcfb131 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -16,6 +16,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v5 3/6] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 33a98eb..91aa9ab 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v5 2/6] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 8f260e5..f6d6ed3 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -20,6 +20,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -77,3 +78,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v5 5/6] dt-bindings: pinctrl: mt8183: add binding document
From: Zhiyong Tao
The commit adds mt8183 compatible node in binding document.
Signed-off-by: Zhiyong Tao
Signed-off-by: Erin Lo
---
.../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 110 +
1 file changed, 110 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
new file mode 100644
index 000..7b5285e
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt
@@ -0,0 +1,110 @@
+* Mediatek MT8183 Pin Controller
+
+The Mediatek's Pin controller is used to control SoC pins.
+
+Required properties:
+- compatible: value should be one of the following.
+ "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2. See the below
+ mentioned gpio binding representation for description of particular cells.
+- gpio-ranges : gpio valid number range.
+
+ Eg: < 6 0>
+ <[phandle of the gpio controller node]
+ [line number within the gpio controller]
+ [flags]>
+
+ Values for gpio specifier:
+ - Line number: is a value between 0 to 202.
+ - Flags: bit field of flags, as defined in .
+Only the following flags are supported:
+0 - GPIO_ACTIVE_HIGH
+1 - GPIO_ACTIVE_LOW
+
+Optional properties:
+- reg: physicall address base for gpio base registers.
+- reg-names: gpio base registers name.
+- interrupt-controller: Marks the device node as an interrupt controller
+- #interrupt-cells: Should be two.
+- interrupts : The interrupt outputs from the controller.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Subnode format
+A pinctrl node should contain at least one subnodes representing the
+pinctrl groups available on the machine. Each subnode will list the
+pins it needs, and how they should be configured, with regard to muxer
+configuration, pullups, drive strength, input enable/disable and input schmitt.
+
+node {
+ pinmux = ;
+ GENERIC_PINCONFIG;
+};
+
+Required properties:
+- pinmux: integer array, represents gpio pin number and mux setting.
+Supported pin number and mux varies for different SoCs, and are defined
+as macros in boot/dts/-pinfunc.h directly.
+
+Optional properties:
+- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
+bias-pull-down, bias-pull-up, input-enable, input-disable, output-low,
output-high,
+input-schmitt-enable, input-schmitt-disable and drive-strength are valid.
+
+Some special pins have extra pull up strength, there are R0 and R1 pull-up
+resistors available, but for user, it's only need to set R1R0 as 00, 01,
10 or 11.
+So when config mediatek,pull-up-adv or mediatek,pull-down-adv,
+it support arguments for those special pins.
+
+When config drive-strength, it can support some arguments, such as
+MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h.
+
+Examples:
+
+#include "mt8183-pinfunc.h"
+
+...
+{
+ pio: pinctrl@10005000 {
+ compatible = "mediatek,mt8183-pinctrl";
+ reg = <0 0x10005000 0 0x1000>,
+ <0 0x11F2 0 0x1000>,
+ <0 0x11E8 0 0x1000>,
+ <0 0x11E7 0 0x1000>,
+ <0 0x11E9 0 0x1000>,
+ <0 0x11D3 0 0x1000>,
+ <0 0x11D2 0 0x1000>,
+ <0 0x11C5 0 0x1000>,
+ <0 0x11F3 0 0x1000>;
+ reg-names = "iocfg0", "iocfg1", "iocfg2",
+ "iocfg3", "iocfg4", "iocfg5",
+ "iocfg6", "iocfg7", "iocfg8";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = < 0 0 192>;
+ interrupt-controller;
+ interrupts = ;
+ interrupt-parent = <>;
+ #interrupt-cells = <2>;
+
+ i2c0_pins_a: i2c0@0 {
+ pins1 {
+ pinmux = ,
+;
+ mediatek,pull-up-adv = <11>;
+ };
+ };
+
+ i2c1_pins_a: i2c1@0 {
+ pins {
+ pinmux = ,
+;
+ mediatek,pull-down-adv = <10>;
+ };
+ };
+ ...
+ };
+};
--
1.9.1
[PATCH v5 1/6] irqchip/mtk-sysirq: support 4 interrupt parameters for sysirq
From: Seiya Wang
To support partitioned PPIs, 4 interrupt parameters should be valid
for sysirq.
Signed-off-by: Seiya Wang
Signed-off-by: Erin Lo
---
drivers/irqchip/irq-mtk-sysirq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-mtk-sysirq.c b/drivers/irqchip/irq-mtk-sysirq.c
index 90aaf19..282736a 100644
--- a/drivers/irqchip/irq-mtk-sysirq.c
+++ b/drivers/irqchip/irq-mtk-sysirq.c
@@ -81,7 +81,7 @@ static int mtk_sysirq_domain_translate(struct irq_domain *d,
unsigned int *type)
{
if (is_of_node(fwspec->fwnode)) {
- if (fwspec->param_count != 3)
+ if (fwspec->param_count != 3 && fwspec->param_count != 4)
return -EINVAL;
/* No PPI should point to this domain */
@@ -104,7 +104,7 @@ static int mtk_sysirq_domain_alloc(struct irq_domain
*domain, unsigned int virq,
struct irq_fwspec *fwspec = arg;
struct irq_fwspec gic_fwspec = *fwspec;
- if (fwspec->param_count != 3)
+ if (fwspec->param_count != 3 && fwspec->param_count != 4)
return -EINVAL;
/* sysirq doesn't support PPI */
--
1.9.1
[PATCH v5 0/6] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock, pinctrl, power, iommu, spi, and pwrap. Based on v4.20-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2018-December/016243.html http://lists.infradead.org/pipermail/linux-mediatek/2018-December/016205.html http://lists.infradead.org/pipermail/linux-mediatek/2018-October/015676.html Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Seiya Wang (1): irqchip/mtk-sysirq: support 4 interrupt parameters for sysirq Zhiyong Tao (1): dt-bindings: pinctrl: mt8183: add binding document Documentation/devicetree/bindings/arm/mediatek.txt |4 + .../interrupt-controller/mediatek,sysirq.txt |1 + .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 110 ++ .../devicetree/bindings/serial/mtk-uart.txt|1 + arch/arm64/boot/dts/mediatek/Makefile |1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 136 +++ arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 547 ++ drivers/irqchip/irq-mtk-sysirq.c |4 +- 9 files changed, 1922 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v4 03/10] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 23 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 146
3 files changed, 170 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index 7506b0d..a91d462 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..2a3dd5a
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..1553265
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x100>;
+ enable-method = "psci";
+ };
+
+ cpu5: cpu@101 {
[PATCH v4 03/10] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 23 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 146
3 files changed, 170 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index 7506b0d..a91d462 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..2a3dd5a
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..1553265
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x100>;
+ enable-method = "psci";
+ };
+
+ cpu5: cpu@101 {
[PATCH v4 09/10] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v4 05/10] clk: mediatek: Add dt-bindings for MT8183 clocks
From: Weiyi Lu Add MT8183 clock dt-bindings, include topckgen, apmixedsys, infracfg and subsystem clocks. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- include/dt-bindings/clock/mt8183-clk.h | 413 + 1 file changed, 413 insertions(+) create mode 100644 include/dt-bindings/clock/mt8183-clk.h diff --git a/include/dt-bindings/clock/mt8183-clk.h b/include/dt-bindings/clock/mt8183-clk.h new file mode 100644 index 000..bacad53 --- /dev/null +++ b/include/dt-bindings/clock/mt8183-clk.h @@ -0,0 +1,413 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2018 MediaTek Inc. + * Author: Weiyi Lu + */ + +#ifndef _DT_BINDINGS_CLK_MT8183_H +#define _DT_BINDINGS_CLK_MT8183_H + +/* APMIXED */ +#define CLK_APMIXED_ARMPLL_LL 0 +#define CLK_APMIXED_ARMPLL_L 1 +#define CLK_APMIXED_CCIPLL 2 +#define CLK_APMIXED_MAINPLL3 +#define CLK_APMIXED_UNIV2PLL 4 +#define CLK_APMIXED_MSDCPLL5 +#define CLK_APMIXED_MMPLL 6 +#define CLK_APMIXED_MFGPLL 7 +#define CLK_APMIXED_TVDPLL 8 +#define CLK_APMIXED_APLL1 9 +#define CLK_APMIXED_APLL2 10 +#define CLK_APMIXED_SSUSB_26M 11 +#define CLK_APMIXED_APPLL_26M 12 +#define CLK_APMIXED_MIPIC0_26M 13 +#define CLK_APMIXED_MDPLLGP_26M14 +#define CLK_APMIXED_MMSYS_26M 15 +#define CLK_APMIXED_UFS_26M16 +#define CLK_APMIXED_MIPIC1_26M 17 +#define CLK_APMIXED_MEMPLL_26M 18 +#define CLK_APMIXED_CLKSQ_LVPLL_26M19 +#define CLK_APMIXED_MIPID0_26M 20 +#define CLK_APMIXED_MIPID1_26M 21 +#define CLK_APMIXED_NR_CLK 22 + +/* TOPCKGEN */ +#define CLK_TOP_MUX_AXI0 +#define CLK_TOP_MUX_MM 1 +#define CLK_TOP_MUX_CAM2 +#define CLK_TOP_MUX_MFG3 +#define CLK_TOP_MUX_CAMTG 4 +#define CLK_TOP_MUX_UART 5 +#define CLK_TOP_MUX_SPI6 +#define CLK_TOP_MUX_MSDC50_0_HCLK 7 +#define CLK_TOP_MUX_MSDC50_0 8 +#define CLK_TOP_MUX_MSDC30_1 9 +#define CLK_TOP_MUX_MSDC30_2 10 +#define CLK_TOP_MUX_AUDIO 11 +#define CLK_TOP_MUX_AUD_INTBUS 12 +#define CLK_TOP_MUX_FPWRAP_ULPOSC 13 +#define CLK_TOP_MUX_SCP14 +#define CLK_TOP_MUX_ATB15 +#define CLK_TOP_MUX_SSPM 16 +#define CLK_TOP_MUX_DPI0 17 +#define CLK_TOP_MUX_SCAM 18 +#define CLK_TOP_MUX_AUD_1 19 +#define CLK_TOP_MUX_AUD_2 20 +#define CLK_TOP_MUX_DISP_PWM 21 +#define CLK_TOP_MUX_SSUSB_TOP_XHCI 22 +#define CLK_TOP_MUX_USB_TOP23 +#define CLK_TOP_MUX_SPM24 +#define CLK_TOP_MUX_I2C25 +#define CLK_TOP_MUX_F52M_MFG 26 +#define CLK_TOP_MUX_SENINF 27 +#define CLK_TOP_MUX_DXCC 28 +#define CLK_TOP_MUX_CAMTG2 29 +#define CLK_TOP_MUX_AUD_ENG1 30 +#define CLK_TOP_MUX_AUD_ENG2 31 +#define CLK_TOP_MUX_FAES_UFSFDE32 +#define CLK_TOP_MUX_FUFS 33 +#define CLK_TOP_MUX_IMG34 +#define CLK_TOP_MUX_DSP35 +#define CLK_TOP_MUX_DSP1 36 +#define CLK_TOP_MUX_DSP2 37 +#define CLK_TOP_MUX_IPU_IF 38 +#define CLK_TOP_MUX_CAMTG3 39 +#define CLK_TOP_MUX_CAMTG4 40 +#define CLK_TOP_MUX_PMICSPI41 +#define CLK_TOP_SYSPLL_CK 42 +#define CLK_TOP_SYSPLL_D2 43 +#define CLK_TOP_SYSPLL_D3 44 +#define CLK_TOP_SYSPLL_D5 45 +#define CLK_TOP_SYSPLL_D7 46 +#define CLK_TOP_SYSPLL_D2_D2 47 +#define CLK_TOP_SYSPLL_D2_D4 48 +#define CLK_TOP_SYSPLL_D2_D8 49 +#define CLK_TOP_SYSPLL_D2_D16 50 +#define CLK_TOP_SYSPLL_D3_D2 51 +#define CLK_TOP_SYSPLL_D3_D4 52 +#define CLK_TOP_SYSPLL_D3_D8 53 +#define CLK_TOP_SYSPLL_D5_D2 54 +#define CLK_TOP_SYSPLL_D5_D4 55 +#define CLK_TOP_SYSPLL_D7_D2 56 +#define CLK_TOP_SYSPLL_D7_D4 57 +#define CLK_TOP_UNIVPLL_CK 58 +#define CLK_TOP_UNIVPLL_D2 59 +#define CLK_TOP_UNIVPLL_D3 60 +#define CLK_TOP_UNIVPLL_D5 61 +#define CLK_TOP_UNIVPLL_D7 62 +#define CLK_TOP_UNIVPLL_D2_D2 63 +#define CLK_TOP_UNIVPLL_D2_D4 64 +#define CLK_TOP_UNIVPLL_D2_D8 65 +#define CLK_TOP_UNIVPLL_D3_D2 66 +#define CLK_TOP_UNIVPLL_D3_D4 67 +#define CLK_TOP_UNIVPLL_D3_D8 68 +#define CLK_TOP_UNIVPLL_D5_D2 69 +#define CLK_TOP_UNIVPLL_D5_D4 70 +#define CLK_TOP_UNIVPLL_D5_D8 71 +#define CLK_TOP_APLL1_CK 72 +#define CLK_TOP_APLL1_D2
[PATCH v4 08/10] arm64: dts: mt8183: Add clock controller device nodes
From: Weiyi Lu
Add clock controller nodes for MT8183, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 92
1 file changed, 92 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 1553265..6b87a24 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -5,6 +5,7 @@
*Erin Lo
*/
+#include
#include
#include
@@ -112,6 +113,13 @@
method = "smc";
};
+ clk26m: oscillator@0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2600>;
+ clock-output-names = "clk26m";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <>;
@@ -143,4 +151,88 @@
interrupt-parent = <>;
reg = <0 0x0c530a80 0 0x50>;
};
+
+ topckgen: syscon@1000 {
+ compatible = "mediatek,mt8183-topckgen", "syscon";
+ reg = <0 0x1000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt8183-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ apmixedsys: syscon@1000c000 {
+ compatible = "mediatek,mt8183-apmixedsys", "syscon";
+ reg = <0 0x1000c000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ audiosys: syscon@1122 {
+ compatible = "mediatek,mt8183-audiosys", "syscon";
+ reg = <0 0x1122 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ mfgcfg: syscon@1300 {
+ compatible = "mediatek,mt8183-mfgcfg", "syscon";
+ reg = <0 0x1300 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ mmsys: syscon@1400 {
+ compatible = "mediatek,mt8183-mmsys", "syscon";
+ reg = <0 0x1400 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ imgsys: syscon@1502 {
+ compatible = "mediatek,mt8183-imgsys", "syscon";
+ reg = <0 0x1502 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ vdecsys: syscon@1600 {
+ compatible = "mediatek,mt8183-vdecsys", "syscon";
+ reg = <0 0x1600 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ vencsys: syscon@1700 {
+ compatible = "mediatek,mt8183-vencsys", "syscon";
+ reg = <0 0x1700 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_conn: syscon@1900 {
+ compatible = "mediatek,mt8183-ipu_conn", "syscon";
+ reg = <0 0x1900 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_adl: syscon@1901 {
+ compatible = "mediatek,mt8183-ipu_adl", "syscon";
+ reg = <0 0x1901 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_core0: syscon@1918 {
+ compatible = "mediatek,mt8183-ipu_core0", "syscon";
+ reg = <0 0x1918 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_core1: syscon@1928 {
+ compatible = "mediatek,mt8183-ipu_core1", "syscon";
+ reg = <0 0x1928 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ camsys: syscon@1a00 {
+ compatible = "mediatek,mt8183-camsys", "syscon";
+ reg = <0 0x1a00 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
--
1.9.1
[PATCH v4 06/10] clk: mediatek: Add flags support for mtk_gate data
From: Weiyi Lu
On some Mediatek platforms, there are critical clocks of
clock gate type.
To register clock gate with flags CLK_IS_CRITICAL,
we need to add the flags field in mtk_gate data and register APIs.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
drivers/clk/mediatek/clk-gate.c | 5 +++--
drivers/clk/mediatek/clk-gate.h | 3 ++-
drivers/clk/mediatek/clk-mtk.c | 3 ++-
drivers/clk/mediatek/clk-mtk.h | 1 +
4 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
index 934bf0e..25d25c3 100644
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
@@ -157,7 +157,8 @@ struct clk *mtk_clk_register_gate(
int clr_ofs,
int sta_ofs,
u8 bit,
- const struct clk_ops *ops)
+ const struct clk_ops *ops,
+ unsigned int flags)
{
struct mtk_clk_gate *cg;
struct clk *clk;
@@ -168,7 +169,7 @@ struct clk *mtk_clk_register_gate(
return ERR_PTR(-ENOMEM);
init.name = name;
- init.flags = CLK_SET_RATE_PARENT;
+ init.flags = flags | CLK_SET_RATE_PARENT;
init.parent_names = parent_name ? _name : NULL;
init.num_parents = parent_name ? 1 : 0;
init.ops = ops;
diff --git a/drivers/clk/mediatek/clk-gate.h b/drivers/clk/mediatek/clk-gate.h
index 72ef89b..631cd3a 100644
--- a/drivers/clk/mediatek/clk-gate.h
+++ b/drivers/clk/mediatek/clk-gate.h
@@ -47,6 +47,7 @@ struct clk *mtk_clk_register_gate(
int clr_ofs,
int sta_ofs,
u8 bit,
- const struct clk_ops *ops);
+ const struct clk_ops *ops,
+ unsigned int flags);
#endif /* __DRV_CLK_GATE_H */
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 50becd0..15310f8 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -131,7 +131,8 @@ int mtk_clk_register_gates(struct device_node *node,
gate->regs->set_ofs,
gate->regs->clr_ofs,
gate->regs->sta_ofs,
- gate->shift, gate->ops);
+ gate->shift, gate->ops,
+ gate->flags);
if (IS_ERR(clk)) {
pr_err("Failed to register clk %s: %ld\n",
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 61693f6..c3285ff 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -217,6 +217,7 @@ struct mtk_gate {
const struct mtk_gate_regs *regs;
int shift;
const struct clk_ops *ops;
+ unsigned int flags;
};
int mtk_clk_register_gates(struct device_node *node,
--
1.9.1
[PATCH v4 09/10] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v4 05/10] clk: mediatek: Add dt-bindings for MT8183 clocks
From: Weiyi Lu Add MT8183 clock dt-bindings, include topckgen, apmixedsys, infracfg and subsystem clocks. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- include/dt-bindings/clock/mt8183-clk.h | 413 + 1 file changed, 413 insertions(+) create mode 100644 include/dt-bindings/clock/mt8183-clk.h diff --git a/include/dt-bindings/clock/mt8183-clk.h b/include/dt-bindings/clock/mt8183-clk.h new file mode 100644 index 000..bacad53 --- /dev/null +++ b/include/dt-bindings/clock/mt8183-clk.h @@ -0,0 +1,413 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2018 MediaTek Inc. + * Author: Weiyi Lu + */ + +#ifndef _DT_BINDINGS_CLK_MT8183_H +#define _DT_BINDINGS_CLK_MT8183_H + +/* APMIXED */ +#define CLK_APMIXED_ARMPLL_LL 0 +#define CLK_APMIXED_ARMPLL_L 1 +#define CLK_APMIXED_CCIPLL 2 +#define CLK_APMIXED_MAINPLL3 +#define CLK_APMIXED_UNIV2PLL 4 +#define CLK_APMIXED_MSDCPLL5 +#define CLK_APMIXED_MMPLL 6 +#define CLK_APMIXED_MFGPLL 7 +#define CLK_APMIXED_TVDPLL 8 +#define CLK_APMIXED_APLL1 9 +#define CLK_APMIXED_APLL2 10 +#define CLK_APMIXED_SSUSB_26M 11 +#define CLK_APMIXED_APPLL_26M 12 +#define CLK_APMIXED_MIPIC0_26M 13 +#define CLK_APMIXED_MDPLLGP_26M14 +#define CLK_APMIXED_MMSYS_26M 15 +#define CLK_APMIXED_UFS_26M16 +#define CLK_APMIXED_MIPIC1_26M 17 +#define CLK_APMIXED_MEMPLL_26M 18 +#define CLK_APMIXED_CLKSQ_LVPLL_26M19 +#define CLK_APMIXED_MIPID0_26M 20 +#define CLK_APMIXED_MIPID1_26M 21 +#define CLK_APMIXED_NR_CLK 22 + +/* TOPCKGEN */ +#define CLK_TOP_MUX_AXI0 +#define CLK_TOP_MUX_MM 1 +#define CLK_TOP_MUX_CAM2 +#define CLK_TOP_MUX_MFG3 +#define CLK_TOP_MUX_CAMTG 4 +#define CLK_TOP_MUX_UART 5 +#define CLK_TOP_MUX_SPI6 +#define CLK_TOP_MUX_MSDC50_0_HCLK 7 +#define CLK_TOP_MUX_MSDC50_0 8 +#define CLK_TOP_MUX_MSDC30_1 9 +#define CLK_TOP_MUX_MSDC30_2 10 +#define CLK_TOP_MUX_AUDIO 11 +#define CLK_TOP_MUX_AUD_INTBUS 12 +#define CLK_TOP_MUX_FPWRAP_ULPOSC 13 +#define CLK_TOP_MUX_SCP14 +#define CLK_TOP_MUX_ATB15 +#define CLK_TOP_MUX_SSPM 16 +#define CLK_TOP_MUX_DPI0 17 +#define CLK_TOP_MUX_SCAM 18 +#define CLK_TOP_MUX_AUD_1 19 +#define CLK_TOP_MUX_AUD_2 20 +#define CLK_TOP_MUX_DISP_PWM 21 +#define CLK_TOP_MUX_SSUSB_TOP_XHCI 22 +#define CLK_TOP_MUX_USB_TOP23 +#define CLK_TOP_MUX_SPM24 +#define CLK_TOP_MUX_I2C25 +#define CLK_TOP_MUX_F52M_MFG 26 +#define CLK_TOP_MUX_SENINF 27 +#define CLK_TOP_MUX_DXCC 28 +#define CLK_TOP_MUX_CAMTG2 29 +#define CLK_TOP_MUX_AUD_ENG1 30 +#define CLK_TOP_MUX_AUD_ENG2 31 +#define CLK_TOP_MUX_FAES_UFSFDE32 +#define CLK_TOP_MUX_FUFS 33 +#define CLK_TOP_MUX_IMG34 +#define CLK_TOP_MUX_DSP35 +#define CLK_TOP_MUX_DSP1 36 +#define CLK_TOP_MUX_DSP2 37 +#define CLK_TOP_MUX_IPU_IF 38 +#define CLK_TOP_MUX_CAMTG3 39 +#define CLK_TOP_MUX_CAMTG4 40 +#define CLK_TOP_MUX_PMICSPI41 +#define CLK_TOP_SYSPLL_CK 42 +#define CLK_TOP_SYSPLL_D2 43 +#define CLK_TOP_SYSPLL_D3 44 +#define CLK_TOP_SYSPLL_D5 45 +#define CLK_TOP_SYSPLL_D7 46 +#define CLK_TOP_SYSPLL_D2_D2 47 +#define CLK_TOP_SYSPLL_D2_D4 48 +#define CLK_TOP_SYSPLL_D2_D8 49 +#define CLK_TOP_SYSPLL_D2_D16 50 +#define CLK_TOP_SYSPLL_D3_D2 51 +#define CLK_TOP_SYSPLL_D3_D4 52 +#define CLK_TOP_SYSPLL_D3_D8 53 +#define CLK_TOP_SYSPLL_D5_D2 54 +#define CLK_TOP_SYSPLL_D5_D4 55 +#define CLK_TOP_SYSPLL_D7_D2 56 +#define CLK_TOP_SYSPLL_D7_D4 57 +#define CLK_TOP_UNIVPLL_CK 58 +#define CLK_TOP_UNIVPLL_D2 59 +#define CLK_TOP_UNIVPLL_D3 60 +#define CLK_TOP_UNIVPLL_D5 61 +#define CLK_TOP_UNIVPLL_D7 62 +#define CLK_TOP_UNIVPLL_D2_D2 63 +#define CLK_TOP_UNIVPLL_D2_D4 64 +#define CLK_TOP_UNIVPLL_D2_D8 65 +#define CLK_TOP_UNIVPLL_D3_D2 66 +#define CLK_TOP_UNIVPLL_D3_D4 67 +#define CLK_TOP_UNIVPLL_D3_D8 68 +#define CLK_TOP_UNIVPLL_D5_D2 69 +#define CLK_TOP_UNIVPLL_D5_D4 70 +#define CLK_TOP_UNIVPLL_D5_D8 71 +#define CLK_TOP_APLL1_CK 72 +#define CLK_TOP_APLL1_D2
[PATCH v4 08/10] arm64: dts: mt8183: Add clock controller device nodes
From: Weiyi Lu
Add clock controller nodes for MT8183, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 92
1 file changed, 92 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 1553265..6b87a24 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -5,6 +5,7 @@
*Erin Lo
*/
+#include
#include
#include
@@ -112,6 +113,13 @@
method = "smc";
};
+ clk26m: oscillator@0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2600>;
+ clock-output-names = "clk26m";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <>;
@@ -143,4 +151,88 @@
interrupt-parent = <>;
reg = <0 0x0c530a80 0 0x50>;
};
+
+ topckgen: syscon@1000 {
+ compatible = "mediatek,mt8183-topckgen", "syscon";
+ reg = <0 0x1000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt8183-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ apmixedsys: syscon@1000c000 {
+ compatible = "mediatek,mt8183-apmixedsys", "syscon";
+ reg = <0 0x1000c000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ audiosys: syscon@1122 {
+ compatible = "mediatek,mt8183-audiosys", "syscon";
+ reg = <0 0x1122 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ mfgcfg: syscon@1300 {
+ compatible = "mediatek,mt8183-mfgcfg", "syscon";
+ reg = <0 0x1300 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ mmsys: syscon@1400 {
+ compatible = "mediatek,mt8183-mmsys", "syscon";
+ reg = <0 0x1400 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ imgsys: syscon@1502 {
+ compatible = "mediatek,mt8183-imgsys", "syscon";
+ reg = <0 0x1502 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ vdecsys: syscon@1600 {
+ compatible = "mediatek,mt8183-vdecsys", "syscon";
+ reg = <0 0x1600 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ vencsys: syscon@1700 {
+ compatible = "mediatek,mt8183-vencsys", "syscon";
+ reg = <0 0x1700 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_conn: syscon@1900 {
+ compatible = "mediatek,mt8183-ipu_conn", "syscon";
+ reg = <0 0x1900 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_adl: syscon@1901 {
+ compatible = "mediatek,mt8183-ipu_adl", "syscon";
+ reg = <0 0x1901 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_core0: syscon@1918 {
+ compatible = "mediatek,mt8183-ipu_core0", "syscon";
+ reg = <0 0x1918 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ipu_core1: syscon@1928 {
+ compatible = "mediatek,mt8183-ipu_core1", "syscon";
+ reg = <0 0x1928 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ camsys: syscon@1a00 {
+ compatible = "mediatek,mt8183-camsys", "syscon";
+ reg = <0 0x1a00 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
--
1.9.1
[PATCH v4 06/10] clk: mediatek: Add flags support for mtk_gate data
From: Weiyi Lu
On some Mediatek platforms, there are critical clocks of
clock gate type.
To register clock gate with flags CLK_IS_CRITICAL,
we need to add the flags field in mtk_gate data and register APIs.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
drivers/clk/mediatek/clk-gate.c | 5 +++--
drivers/clk/mediatek/clk-gate.h | 3 ++-
drivers/clk/mediatek/clk-mtk.c | 3 ++-
drivers/clk/mediatek/clk-mtk.h | 1 +
4 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
index 934bf0e..25d25c3 100644
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
@@ -157,7 +157,8 @@ struct clk *mtk_clk_register_gate(
int clr_ofs,
int sta_ofs,
u8 bit,
- const struct clk_ops *ops)
+ const struct clk_ops *ops,
+ unsigned int flags)
{
struct mtk_clk_gate *cg;
struct clk *clk;
@@ -168,7 +169,7 @@ struct clk *mtk_clk_register_gate(
return ERR_PTR(-ENOMEM);
init.name = name;
- init.flags = CLK_SET_RATE_PARENT;
+ init.flags = flags | CLK_SET_RATE_PARENT;
init.parent_names = parent_name ? _name : NULL;
init.num_parents = parent_name ? 1 : 0;
init.ops = ops;
diff --git a/drivers/clk/mediatek/clk-gate.h b/drivers/clk/mediatek/clk-gate.h
index 72ef89b..631cd3a 100644
--- a/drivers/clk/mediatek/clk-gate.h
+++ b/drivers/clk/mediatek/clk-gate.h
@@ -47,6 +47,7 @@ struct clk *mtk_clk_register_gate(
int clr_ofs,
int sta_ofs,
u8 bit,
- const struct clk_ops *ops);
+ const struct clk_ops *ops,
+ unsigned int flags);
#endif /* __DRV_CLK_GATE_H */
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 50becd0..15310f8 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -131,7 +131,8 @@ int mtk_clk_register_gates(struct device_node *node,
gate->regs->set_ofs,
gate->regs->clr_ofs,
gate->regs->sta_ofs,
- gate->shift, gate->ops);
+ gate->shift, gate->ops,
+ gate->flags);
if (IS_ERR(clk)) {
pr_err("Failed to register clk %s: %ld\n",
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 61693f6..c3285ff 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -217,6 +217,7 @@ struct mtk_gate {
const struct mtk_gate_regs *regs;
int shift;
const struct clk_ops *ops;
+ unsigned int flags;
};
int mtk_clk_register_gates(struct device_node *node,
--
1.9.1
[PATCH v4 02/10] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v4 07/10] clk: mediatek: Add MT8183 clock support
From: Weiyi Lu Add MT8183 clock support, include topckgen, apmixedsys, infracfg and subsystem clocks. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- drivers/clk/mediatek/Kconfig | 74 ++ drivers/clk/mediatek/Makefile | 12 + drivers/clk/mediatek/clk-mt8183-audio.c| 112 +++ drivers/clk/mediatek/clk-mt8183-cam.c | 75 ++ drivers/clk/mediatek/clk-mt8183-img.c | 75 ++ drivers/clk/mediatek/clk-mt8183-ipu0.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu1.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 66 ++ drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 155 drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 66 ++ drivers/clk/mediatek/clk-mt8183-mm.c | 128 +++ drivers/clk/mediatek/clk-mt8183-vdec.c | 84 ++ drivers/clk/mediatek/clk-mt8183-venc.c | 71 ++ drivers/clk/mediatek/clk-mt8183.c | 1230 14 files changed, 2284 insertions(+) create mode 100644 drivers/clk/mediatek/clk-mt8183-audio.c create mode 100644 drivers/clk/mediatek/clk-mt8183-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8183-img.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu0.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu1.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_adl.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_conn.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mfgcfg.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8183-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8183-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8183.c diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig index 95e5e52..e70c164 100644 --- a/drivers/clk/mediatek/Kconfig +++ b/drivers/clk/mediatek/Kconfig @@ -194,6 +194,80 @@ config COMMON_CLK_MT8173 ---help--- This driver supports MediaTek MT8173 clocks. +config COMMON_CLK_MT8183 + bool "Clock driver for MediaTek MT8183" + depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST + select COMMON_CLK_MEDIATEK + default ARCH_MEDIATEK && ARM64 + help + This driver supports MediaTek MT8183 basic clocks. + +config COMMON_CLK_MT8183_AUDIOSYS + bool "Clock driver for MediaTek MT8183 audiosys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 audiosys clocks. + +config COMMON_CLK_MT8183_CAMSYS + bool "Clock driver for MediaTek MT8183 camsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 camsys clocks. + +config COMMON_CLK_MT8183_IMGSYS + bool "Clock driver for MediaTek MT8183 imgsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 imgsys clocks. + +config COMMON_CLK_MT8183_IPU_CORE0 + bool "Clock driver for MediaTek MT8183 ipu_core0" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_core0 clocks. + +config COMMON_CLK_MT8183_IPU_CORE1 + bool "Clock driver for MediaTek MT8183 ipu_core1" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_core1 clocks. + +config COMMON_CLK_MT8183_IPU_ADL + bool "Clock driver for MediaTek MT8183 ipu_adl" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_adl clocks. + +config COMMON_CLK_MT8183_IPU_CONN + bool "Clock driver for MediaTek MT8183 ipu_conn" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_conn clocks. + +config COMMON_CLK_MT8183_MFGCFG + bool "Clock driver for MediaTek MT8183 mfgcfg" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 mfgcfg clocks. + +config COMMON_CLK_MT8183_MMSYS + bool "Clock driver for MediaTek MT8183 mmsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 mmsys clocks. + +config COMMON_CLK_MT8183_VDECSYS + bool "Clock driver for MediaTek MT8183 vdecsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 vdecsys clocks. + +config COMMON_CLK_MT8183_VENCSYS + bool "Clock driver for MediaTek MT8183 vencsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 vencsys clocks. + config COMMON_CLK_MT6765 bool "Clock driver for MediaTek MT6765" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index b455a8e..13e6919 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediat
[PATCH v4 10/10] dts: arm64: mt8183: add uart node
From: Weiyi Lu
Add uart node with correct uart clocks.
Signed-off-by: Erin Lo
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 8
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 30 +
2 files changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 2a3dd5a..9b52559 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -12,6 +12,10 @@
model = "MediaTek MT8183 evaluation board";
compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+ aliases {
+ serial0 =
+ };
+
memory@4000 {
device_type = "memory";
reg = <0 0x4000 0 0x8000>;
@@ -21,3 +25,7 @@
stdout-path = "serial0:921600n8";
};
};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 6b87a24..c22a2dc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -170,6 +170,36 @@
#clock-cells = <1>;
};
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART0>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART1>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART2>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
audiosys: syscon@1122 {
compatible = "mediatek,mt8183-audiosys", "syscon";
reg = <0 0x1122 0 0x1000>;
--
1.9.1
[PATCH v4 00/10] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock. Based on v4.18-rc1 and https://patchwork.kernel.org/patch/10528515/ Composed of clock control (PATCH 5-8) and device tree (PATCH 9-10) Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Weiyi Lu (6): dt-bindings: ARM: Mediatek: Document bindings for MT8183 clk: mediatek: Add dt-bindings for MT8183 clocks clk: mediatek: Add flags support for mtk_gate data clk: mediatek: Add MT8183 clock support arm64: dts: mt8183: Add clock controller device nodes dts: arm64: mt8183: add uart node Documentation/devicetree/bindings/arm/mediatek.txt |4 + .../bindings/arm/mediatek/mediatek,apmixedsys.txt |1 + .../bindings/arm/mediatek/mediatek,audsys.txt |1 + .../bindings/arm/mediatek/mediatek,camsys.txt |1 + .../bindings/arm/mediatek/mediatek,imgsys.txt |1 + .../bindings/arm/mediatek/mediatek,infracfg.txt|1 + .../bindings/arm/mediatek/mediatek,ipu.txt | 43 + .../bindings/arm/mediatek/mediatek,mfgcfg.txt |1 + .../bindings/arm/mediatek/mediatek,mmsys.txt |1 + .../bindings/arm/mediatek/mediatek,topckgen.txt|1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt |1 + .../bindings/arm/mediatek/mediatek,vencsys.txt |1 + .../interrupt-controller/mediatek,sysirq.txt |1 + .../devicetree/bindings/serial/mtk-uart.txt|1 + arch/arm64/boot/dts/mediatek/Makefile |1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 268 + drivers/clk/mediatek/Kconfig | 74 ++ drivers/clk/mediatek/Makefile | 12 + drivers/clk/mediatek/clk-gate.c|5 +- drivers/clk/mediatek/clk-gate.h|3 +- drivers/clk/mediatek/clk-mt8183-audio.c| 112 ++ drivers/clk/mediatek/clk-mt8183-cam.c | 75 ++ drivers/clk/mediatek/clk-mt8183-img.c | 75 ++ drivers/clk/mediatek/clk-mt8183-ipu0.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu1.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 66 ++ drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 155 +++ drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 66 ++ drivers/clk/mediatek/clk-mt8183-mm.c | 128 ++ drivers/clk/mediatek/clk-mt8183-vdec.c | 84 ++ drivers/clk/mediatek/clk-mt8183-venc.c | 71 ++ drivers/clk/mediatek/clk-mt8183.c | 1230 drivers/clk/mediatek/clk-mtk.c |3 +- drivers/clk/mediatek/clk-mtk.h |1 + include/dt-bindings/clock/mt8183-clk.h | 413 +++ 36 files changed, 3064 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi create mode 100644 drivers/clk/mediatek/clk-mt8183-audio.c create mode 100644 drivers/clk/mediatek/clk-mt8183-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8183-img.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu0.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu1.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_adl.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_conn.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mfgcfg.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8183-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8183-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8183.c create mode 100644 include/dt-bindings/clock/mt8183-clk.h -- 1.9.1
[PATCH v4 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT8183
From: Weiyi Lu This patch adds the binding documentation for apmixedsys, audiosys, camsys, imgsys, infracfg, mfgcfg, mmsys, topckgen, vdecsys, vencsys and ipu for Mediatek MT8183. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt| 1 + .../bindings/arm/mediatek/mediatek,ipu.txt | 43 ++ .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt| 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 + 11 files changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt index 44eaeac..fddcec8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -13,6 +13,7 @@ Required Properties: - "mediatek,mt7622-apmixedsys" - "mediatek,mt8135-apmixedsys" - "mediatek,mt8173-apmixedsys" + - "mediatek,mt8183-apmixedsys", "syscon" - #clock-cells: Must be 1 The apmixedsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index 9a8672a..63dcc82 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -9,6 +9,7 @@ Required Properties: - "mediatek,mt2701-audsys", "syscon" - "mediatek,mt6765-audsys", "syscon" - "mediatek,mt7622-audsys", "syscon" + - "mediatek,mt8183-audiosys", "syscon" - #clock-cells: Must be 1 The AUDSYS controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt index dc75783..918ccb6 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt6765-camsys", "syscon" + - "mediatek,mt8183-camsys", "syscon" - #clock-cells: Must be 1 The AUDSYS controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt index c7057d0..aeee5c8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6765-imgsys", "syscon" - "mediatek,mt6797-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" + - "mediatek,mt8183-imgsys", "syscon" - #clock-cells: Must be 1 The imgsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index ac6aae5..1b292ec 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -14,6 +14,7 @@ Required Properties: - "mediatek,mt7622-infracfg", "syscon" - "mediatek,mt8135-infracfg", "syscon" - "mediatek,mt8173-infracfg", "syscon" + - "mediatek,mt8183-infracfg", "syscon" - #clock-cells: Must be 1 - #reset-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt new file mode 100644 index 000..aabc8c5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt @@ -0,0 +1,43 @@ +Mediatek IPU controller + + +The Mediatek ipu controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be one of: + - "mediatek,mt8183-ipu_conn", "syscon" + -
[PATCH v4 01/10] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v4 04/10] dt-bindings: ARM: Mediatek: Document bindings for MT8183
From: Weiyi Lu This patch adds the binding documentation for apmixedsys, audiosys, camsys, imgsys, infracfg, mfgcfg, mmsys, topckgen, vdecsys, vencsys and ipu for Mediatek MT8183. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt| 1 + .../bindings/arm/mediatek/mediatek,ipu.txt | 43 ++ .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt| 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 + 11 files changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt index 44eaeac..fddcec8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -13,6 +13,7 @@ Required Properties: - "mediatek,mt7622-apmixedsys" - "mediatek,mt8135-apmixedsys" - "mediatek,mt8173-apmixedsys" + - "mediatek,mt8183-apmixedsys", "syscon" - #clock-cells: Must be 1 The apmixedsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index 9a8672a..63dcc82 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -9,6 +9,7 @@ Required Properties: - "mediatek,mt2701-audsys", "syscon" - "mediatek,mt6765-audsys", "syscon" - "mediatek,mt7622-audsys", "syscon" + - "mediatek,mt8183-audiosys", "syscon" - #clock-cells: Must be 1 The AUDSYS controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt index dc75783..918ccb6 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt @@ -7,6 +7,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt6765-camsys", "syscon" + - "mediatek,mt8183-camsys", "syscon" - #clock-cells: Must be 1 The AUDSYS controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt index c7057d0..aeee5c8 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6765-imgsys", "syscon" - "mediatek,mt6797-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" + - "mediatek,mt8183-imgsys", "syscon" - #clock-cells: Must be 1 The imgsys controller uses the common clk binding from diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index ac6aae5..1b292ec 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -14,6 +14,7 @@ Required Properties: - "mediatek,mt7622-infracfg", "syscon" - "mediatek,mt8135-infracfg", "syscon" - "mediatek,mt8173-infracfg", "syscon" + - "mediatek,mt8183-infracfg", "syscon" - #clock-cells: Must be 1 - #reset-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt new file mode 100644 index 000..aabc8c5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt @@ -0,0 +1,43 @@ +Mediatek IPU controller + + +The Mediatek ipu controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be one of: + - "mediatek,mt8183-ipu_conn", "syscon" + -
[PATCH v4 02/10] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo Acked-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v4 07/10] clk: mediatek: Add MT8183 clock support
From: Weiyi Lu Add MT8183 clock support, include topckgen, apmixedsys, infracfg and subsystem clocks. Signed-off-by: Weiyi Lu Signed-off-by: Erin Lo --- drivers/clk/mediatek/Kconfig | 74 ++ drivers/clk/mediatek/Makefile | 12 + drivers/clk/mediatek/clk-mt8183-audio.c| 112 +++ drivers/clk/mediatek/clk-mt8183-cam.c | 75 ++ drivers/clk/mediatek/clk-mt8183-img.c | 75 ++ drivers/clk/mediatek/clk-mt8183-ipu0.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu1.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 66 ++ drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 155 drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 66 ++ drivers/clk/mediatek/clk-mt8183-mm.c | 128 +++ drivers/clk/mediatek/clk-mt8183-vdec.c | 84 ++ drivers/clk/mediatek/clk-mt8183-venc.c | 71 ++ drivers/clk/mediatek/clk-mt8183.c | 1230 14 files changed, 2284 insertions(+) create mode 100644 drivers/clk/mediatek/clk-mt8183-audio.c create mode 100644 drivers/clk/mediatek/clk-mt8183-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8183-img.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu0.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu1.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_adl.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_conn.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mfgcfg.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8183-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8183-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8183.c diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig index 95e5e52..e70c164 100644 --- a/drivers/clk/mediatek/Kconfig +++ b/drivers/clk/mediatek/Kconfig @@ -194,6 +194,80 @@ config COMMON_CLK_MT8173 ---help--- This driver supports MediaTek MT8173 clocks. +config COMMON_CLK_MT8183 + bool "Clock driver for MediaTek MT8183" + depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST + select COMMON_CLK_MEDIATEK + default ARCH_MEDIATEK && ARM64 + help + This driver supports MediaTek MT8183 basic clocks. + +config COMMON_CLK_MT8183_AUDIOSYS + bool "Clock driver for MediaTek MT8183 audiosys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 audiosys clocks. + +config COMMON_CLK_MT8183_CAMSYS + bool "Clock driver for MediaTek MT8183 camsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 camsys clocks. + +config COMMON_CLK_MT8183_IMGSYS + bool "Clock driver for MediaTek MT8183 imgsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 imgsys clocks. + +config COMMON_CLK_MT8183_IPU_CORE0 + bool "Clock driver for MediaTek MT8183 ipu_core0" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_core0 clocks. + +config COMMON_CLK_MT8183_IPU_CORE1 + bool "Clock driver for MediaTek MT8183 ipu_core1" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_core1 clocks. + +config COMMON_CLK_MT8183_IPU_ADL + bool "Clock driver for MediaTek MT8183 ipu_adl" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_adl clocks. + +config COMMON_CLK_MT8183_IPU_CONN + bool "Clock driver for MediaTek MT8183 ipu_conn" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 ipu_conn clocks. + +config COMMON_CLK_MT8183_MFGCFG + bool "Clock driver for MediaTek MT8183 mfgcfg" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 mfgcfg clocks. + +config COMMON_CLK_MT8183_MMSYS + bool "Clock driver for MediaTek MT8183 mmsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 mmsys clocks. + +config COMMON_CLK_MT8183_VDECSYS + bool "Clock driver for MediaTek MT8183 vdecsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 vdecsys clocks. + +config COMMON_CLK_MT8183_VENCSYS + bool "Clock driver for MediaTek MT8183 vencsys" + depends on COMMON_CLK_MT8183 + help + This driver supports MediaTek MT8183 vencsys clocks. + config COMMON_CLK_MT6765 bool "Clock driver for MediaTek MT6765" depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index b455a8e..13e6919 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediat
[PATCH v4 10/10] dts: arm64: mt8183: add uart node
From: Weiyi Lu
Add uart node with correct uart clocks.
Signed-off-by: Erin Lo
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 8
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 30 +
2 files changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 2a3dd5a..9b52559 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -12,6 +12,10 @@
model = "MediaTek MT8183 evaluation board";
compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+ aliases {
+ serial0 =
+ };
+
memory@4000 {
device_type = "memory";
reg = <0 0x4000 0 0x8000>;
@@ -21,3 +25,7 @@
stdout-path = "serial0:921600n8";
};
};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 6b87a24..c22a2dc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -170,6 +170,36 @@
#clock-cells = <1>;
};
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART0>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART1>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt8183-uart",
+"mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x1000>;
+ interrupts = ;
+ clocks = <>, < CLK_INFRA_UART2>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
audiosys: syscon@1122 {
compatible = "mediatek,mt8183-audiosys", "syscon";
reg = <0 0x1122 0 0x1000>;
--
1.9.1
[PATCH v4 00/10] Add basic and clock support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. This series contains document bindings, device tree including interrupt, uart, clock. Based on v4.18-rc1 and https://patchwork.kernel.org/patch/10528515/ Composed of clock control (PATCH 5-8) and device tree (PATCH 9-10) Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Weiyi Lu (6): dt-bindings: ARM: Mediatek: Document bindings for MT8183 clk: mediatek: Add dt-bindings for MT8183 clocks clk: mediatek: Add flags support for mtk_gate data clk: mediatek: Add MT8183 clock support arm64: dts: mt8183: Add clock controller device nodes dts: arm64: mt8183: add uart node Documentation/devicetree/bindings/arm/mediatek.txt |4 + .../bindings/arm/mediatek/mediatek,apmixedsys.txt |1 + .../bindings/arm/mediatek/mediatek,audsys.txt |1 + .../bindings/arm/mediatek/mediatek,camsys.txt |1 + .../bindings/arm/mediatek/mediatek,imgsys.txt |1 + .../bindings/arm/mediatek/mediatek,infracfg.txt|1 + .../bindings/arm/mediatek/mediatek,ipu.txt | 43 + .../bindings/arm/mediatek/mediatek,mfgcfg.txt |1 + .../bindings/arm/mediatek/mediatek,mmsys.txt |1 + .../bindings/arm/mediatek/mediatek,topckgen.txt|1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt |1 + .../bindings/arm/mediatek/mediatek,vencsys.txt |1 + .../interrupt-controller/mediatek,sysirq.txt |1 + .../devicetree/bindings/serial/mtk-uart.txt|1 + arch/arm64/boot/dts/mediatek/Makefile |1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 268 + drivers/clk/mediatek/Kconfig | 74 ++ drivers/clk/mediatek/Makefile | 12 + drivers/clk/mediatek/clk-gate.c|5 +- drivers/clk/mediatek/clk-gate.h|3 +- drivers/clk/mediatek/clk-mt8183-audio.c| 112 ++ drivers/clk/mediatek/clk-mt8183-cam.c | 75 ++ drivers/clk/mediatek/clk-mt8183-img.c | 75 ++ drivers/clk/mediatek/clk-mt8183-ipu0.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu1.c | 68 ++ drivers/clk/mediatek/clk-mt8183-ipu_adl.c | 66 ++ drivers/clk/mediatek/clk-mt8183-ipu_conn.c | 155 +++ drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 66 ++ drivers/clk/mediatek/clk-mt8183-mm.c | 128 ++ drivers/clk/mediatek/clk-mt8183-vdec.c | 84 ++ drivers/clk/mediatek/clk-mt8183-venc.c | 71 ++ drivers/clk/mediatek/clk-mt8183.c | 1230 drivers/clk/mediatek/clk-mtk.c |3 +- drivers/clk/mediatek/clk-mtk.h |1 + include/dt-bindings/clock/mt8183-clk.h | 413 +++ 36 files changed, 3064 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi create mode 100644 drivers/clk/mediatek/clk-mt8183-audio.c create mode 100644 drivers/clk/mediatek/clk-mt8183-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8183-img.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu0.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu1.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_adl.c create mode 100644 drivers/clk/mediatek/clk-mt8183-ipu_conn.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mfgcfg.c create mode 100644 drivers/clk/mediatek/clk-mt8183-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8183-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8183-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8183.c create mode 100644 include/dt-bindings/clock/mt8183-clk.h -- 1.9.1
[PATCH v4 01/10] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
Re: [PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
On Fri, 2018-07-20 at 12:44 +0200, Matthias Brugger wrote: > > On 20/07/18 10:19, Erin Lo wrote: > > On Mon, 2018-07-16 at 11:28 +0200, Matthias Brugger wrote: > >> Hi Erin, > >> > >> On 17/05/18 08:22, Erin Lo wrote: > >>> MT8183 is a SoC based on 64bit ARMv8 architecture. > >>> It contains 4 CA53 and 4 CA73 cores. > >>> MT8183 share many HW IP with MT65xx series. > >>> This patchset was tested on MT8183 evaluation board, and boot to shell ok. > >>> > >>> This series contains document bindings, device tree including interrupt, > >>> uart. > >>> > >>> Change in v3: > >>> 1. Fill out GICC, GICH, GICV regions > >>> 2. Update Copyright to 2018 > >>> > >>> Change in v2: > >>> 1. Split dt-bindings into different patches > >>> 2. Correct bindings for supported SoCs (mtk-uart.txt) > >>> > >>> Ben Ho (1): > >>> arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > >>> Makefile > >>> > >>> Erin Lo (3): > >>> dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > >>> dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 > >>> dt-bindings: serial: Add compatible for Mediatek MT8183 > >>> > >> > >> I'm a bit reluctant to take this series, as it will only enable the EVB > >> board to > >> boot into a serial console. Are you planning to add support for other > >> devices of > >> this SoC? > >> > >> Apart please take into account that there is an issue with the dts file, > >> as you > >> were told by the kbuild test robot. > >> > >> Regards, > >> Matthias > >> > > > > Hi, Matthias > > Sorry for missing this letter...since mail proxy server. > > We plan to add support all the devices of MT8183 in serious. > > We have implemented the clock and pinctrl driver for upstream and they > > are in internal review right now. > > > > Nice to hear that :) > > > About the dts issue... do you suggest me to send new patch right now or > > wait for clock and pinctrl driver ready then send them together? > > > > I would prefer that you send at least the clock controller together, so that > we > don't have any dummy clocks in the basic device tree. > > Regards, > Matthias > Got it! Next patch, we will send them with clock controller without dummy clocks in the basic device tree. By the way, the clock controller driver of MT8183 is a little bit different from former ICs, so we need more time to prepare them. We will send them to public as soon as possible. Best Regards, Erin > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
On Fri, 2018-07-20 at 12:44 +0200, Matthias Brugger wrote: > > On 20/07/18 10:19, Erin Lo wrote: > > On Mon, 2018-07-16 at 11:28 +0200, Matthias Brugger wrote: > >> Hi Erin, > >> > >> On 17/05/18 08:22, Erin Lo wrote: > >>> MT8183 is a SoC based on 64bit ARMv8 architecture. > >>> It contains 4 CA53 and 4 CA73 cores. > >>> MT8183 share many HW IP with MT65xx series. > >>> This patchset was tested on MT8183 evaluation board, and boot to shell ok. > >>> > >>> This series contains document bindings, device tree including interrupt, > >>> uart. > >>> > >>> Change in v3: > >>> 1. Fill out GICC, GICH, GICV regions > >>> 2. Update Copyright to 2018 > >>> > >>> Change in v2: > >>> 1. Split dt-bindings into different patches > >>> 2. Correct bindings for supported SoCs (mtk-uart.txt) > >>> > >>> Ben Ho (1): > >>> arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > >>> Makefile > >>> > >>> Erin Lo (3): > >>> dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > >>> dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 > >>> dt-bindings: serial: Add compatible for Mediatek MT8183 > >>> > >> > >> I'm a bit reluctant to take this series, as it will only enable the EVB > >> board to > >> boot into a serial console. Are you planning to add support for other > >> devices of > >> this SoC? > >> > >> Apart please take into account that there is an issue with the dts file, > >> as you > >> were told by the kbuild test robot. > >> > >> Regards, > >> Matthias > >> > > > > Hi, Matthias > > Sorry for missing this letter...since mail proxy server. > > We plan to add support all the devices of MT8183 in serious. > > We have implemented the clock and pinctrl driver for upstream and they > > are in internal review right now. > > > > Nice to hear that :) > > > About the dts issue... do you suggest me to send new patch right now or > > wait for clock and pinctrl driver ready then send them together? > > > > I would prefer that you send at least the clock controller together, so that > we > don't have any dummy clocks in the basic device tree. > > Regards, > Matthias > Got it! Next patch, we will send them with clock controller without dummy clocks in the basic device tree. By the way, the clock controller driver of MT8183 is a little bit different from former ICs, so we need more time to prepare them. We will send them to public as soon as possible. Best Regards, Erin > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
On Mon, 2018-07-16 at 11:28 +0200, Matthias Brugger wrote: > Hi Erin, > > On 17/05/18 08:22, Erin Lo wrote: > > MT8183 is a SoC based on 64bit ARMv8 architecture. > > It contains 4 CA53 and 4 CA73 cores. > > MT8183 share many HW IP with MT65xx series. > > This patchset was tested on MT8183 evaluation board, and boot to shell ok. > > > > This series contains document bindings, device tree including interrupt, > > uart. > > > > Change in v3: > > 1. Fill out GICC, GICH, GICV regions > > 2. Update Copyright to 2018 > > > > Change in v2: > > 1. Split dt-bindings into different patches > > 2. Correct bindings for supported SoCs (mtk-uart.txt) > > > > Ben Ho (1): > > arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > > Makefile > > > > Erin Lo (3): > > dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > > dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 > > dt-bindings: serial: Add compatible for Mediatek MT8183 > > > > I'm a bit reluctant to take this series, as it will only enable the EVB board > to > boot into a serial console. Are you planning to add support for other devices > of > this SoC? > > Apart please take into account that there is an issue with the dts file, as > you > were told by the kbuild test robot. > > Regards, > Matthias > Hi, Matthias Sorry for missing this letter...since mail proxy server. We plan to add support all the devices of MT8183 in serious. We have implemented the clock and pinctrl driver for upstream and they are in internal review right now. About the dts issue... do you suggest me to send new patch right now or wait for clock and pinctrl driver ready then send them together? Best Regards, Erin > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
On Mon, 2018-07-16 at 11:28 +0200, Matthias Brugger wrote: > Hi Erin, > > On 17/05/18 08:22, Erin Lo wrote: > > MT8183 is a SoC based on 64bit ARMv8 architecture. > > It contains 4 CA53 and 4 CA73 cores. > > MT8183 share many HW IP with MT65xx series. > > This patchset was tested on MT8183 evaluation board, and boot to shell ok. > > > > This series contains document bindings, device tree including interrupt, > > uart. > > > > Change in v3: > > 1. Fill out GICC, GICH, GICV regions > > 2. Update Copyright to 2018 > > > > Change in v2: > > 1. Split dt-bindings into different patches > > 2. Correct bindings for supported SoCs (mtk-uart.txt) > > > > Ben Ho (1): > > arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > > Makefile > > > > Erin Lo (3): > > dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > > dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 > > dt-bindings: serial: Add compatible for Mediatek MT8183 > > > > I'm a bit reluctant to take this series, as it will only enable the EVB board > to > boot into a serial console. Are you planning to add support for other devices > of > this SoC? > > Apart please take into account that there is an issue with the dts file, as > you > were told by the kbuild test robot. > > Regards, > Matthias > Hi, Matthias Sorry for missing this letter...since mail proxy server. We plan to add support all the devices of MT8183 in serious. We have implemented the clock and pinctrl driver for upstream and they are in internal review right now. About the dts issue... do you suggest me to send new patch right now or wait for clock and pinctrl driver ready then send them together? Best Regards, Erin > ___ > Linux-mediatek mailing list > linux-media...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
[PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board, and boot to shell ok. This series contains document bindings, device tree including interrupt, uart. Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Documentation/devicetree/bindings/arm/mediatek.txt | 4 + .../interrupt-controller/mediatek,sysirq.txt | 1 + .../devicetree/bindings/serial/mtk-uart.txt| 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 182 + 6 files changed, 220 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v3 0/4] Add basic support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board, and boot to shell ok. This series contains document bindings, device tree including interrupt, uart. Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Documentation/devicetree/bindings/arm/mediatek.txt | 4 + .../interrupt-controller/mediatek,sysirq.txt | 1 + .../devicetree/bindings/serial/mtk-uart.txt| 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 182 + 6 files changed, 220 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v3 1/4] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo <erin...@mediatek.com> --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v3 1/4] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v3 2/4] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo <erin...@mediatek.com> --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v3 2/4] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v3 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho <ben...@mediatek.com>
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho <ben...@mediatek.com>
Signed-off-by: Erin Lo <erin...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 182
3 files changed, 214 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index ac17f60..2836261 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -5,3 +5,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho <ben...@mediatek.com>
+ *Erin Lo <erin...@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..03edf9c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho <ben...@mediatek.com>
+ *Erin Lo <erin...@mediatek.com>
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+
[PATCH v3 3/4] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo <erin...@mediatek.com> --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v3 3/4] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v3 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 182
3 files changed, 214 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index ac17f60..2836261 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -5,3 +5,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9b52559
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..03edf9c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2018 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x100>;
+
Re: [PATCH v2 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Mon, 2018-05-14 at 11:35 +0100, Marc Zyngier wrote:
> On 14/05/18 11:22, Erin Lo wrote:
> > From: Ben Ho <ben...@mediatek.com>
> >
> > Add basic chip support for Mediatek 8183
> >
> > Signed-off-by: Ben Ho <ben...@mediatek.com>
> > Signed-off-by: Erin Lo <erin...@mediatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi| 178
> >
> > 3 files changed, 210 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >
>
> [...]
>
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > new file mode 100644
> > index 000..8564a26
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>
> [...]
>
> > + gic: interrupt-controller@0c00 {
> > + compatible = "arm,gic-v3";
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <>;
> > + interrupt-controller;
> > + reg = <0 0x0c00 0 0x4>, // CID
> > + <0 0x0c10 0 0x20>; // CIR
>
> You're missing the GICV and GICH regions that are present on both A53
> and A73 at an offset from PERIPHBASE.
>
> > + interrupts = ;
> > + };
>
> Thanks,
>
> M.
I will fill out the GICV and GICH in next round.
Thanks.
Regards,
Erin
Re: [PATCH v2 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
On Mon, 2018-05-14 at 11:35 +0100, Marc Zyngier wrote:
> On 14/05/18 11:22, Erin Lo wrote:
> > From: Ben Ho
> >
> > Add basic chip support for Mediatek 8183
> >
> > Signed-off-by: Ben Ho
> > Signed-off-by: Erin Lo
> > ---
> > arch/arm64/boot/dts/mediatek/Makefile | 1 +
> > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi| 178
> >
> > 3 files changed, 210 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >
>
> [...]
>
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > new file mode 100644
> > index 000..8564a26
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>
> [...]
>
> > + gic: interrupt-controller@0c00 {
> > + compatible = "arm,gic-v3";
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <>;
> > + interrupt-controller;
> > + reg = <0 0x0c00 0 0x4>, // CID
> > + <0 0x0c10 0 0x20>; // CIR
>
> You're missing the GICV and GICH regions that are present on both A53
> and A73 at an offset from PERIPHBASE.
>
> > + interrupts = ;
> > + };
>
> Thanks,
>
> M.
I will fill out the GICV and GICH in next round.
Thanks.
Regards,
Erin
[PATCH v2 0/4] Add basic support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board, and boot to shell ok. This series contains document bindings, device tree including interrupt, uart. Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Documentation/devicetree/bindings/arm/mediatek.txt | 4 + .../interrupt-controller/mediatek,sysirq.txt | 1 + .../devicetree/bindings/serial/mtk-uart.txt| 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 178 + 6 files changed, 216 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v2 0/4] Add basic support for Mediatek MT8183 SoC
MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board, and boot to shell ok. This series contains document bindings, device tree including interrupt, uart. Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile Erin Lo (3): dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 dt-bindings: serial: Add compatible for Mediatek MT8183 Documentation/devicetree/bindings/arm/mediatek.txt | 4 + .../interrupt-controller/mediatek,sysirq.txt | 1 + .../devicetree/bindings/serial/mtk-uart.txt| 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 178 + 6 files changed, 216 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
[PATCH v2 1/4] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo <erin...@mediatek.com> --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v2 1/4] dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform
This adds dt-binding documentation of cpu for Mediatek MT8183. Signed-off-by: Erin Lo --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 7d21ab3..2754535 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -19,6 +19,7 @@ compatible: Must contain one of "mediatek,mt8127" "mediatek,mt8135" "mediatek,mt8173" + "mediatek,mt8183" Supported boards: @@ -73,3 +74,6 @@ Supported boards: - MTK mt8173 tablet EVB: Required root node properties: - compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; +- Evaluation board for MT8183: +Required root node properties: + - compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; -- 1.9.1
[PATCH v2 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho <ben...@mediatek.com>
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho <ben...@mediatek.com>
Signed-off-by: Erin Lo <erin...@mediatek.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 178
3 files changed, 210 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index ac17f60..2836261 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -5,3 +5,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9a3d6b7
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ben Ho <ben...@mediatek.com>
+ *Erin Lo <erin...@mediatek.com>
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..8564a26
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ben Ho <ben...@mediatek.com>
+ *Erin Lo <erin...@mediatek.com>
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+
[PATCH v2 4/4] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile
From: Ben Ho
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 178
3 files changed, 210 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi
diff --git a/arch/arm64/boot/dts/mediatek/Makefile
b/arch/arm64/boot/dts/mediatek/Makefile
index ac17f60..2836261 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -5,3 +5,4 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
new file mode 100644
index 000..9a3d6b7
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+/dts-v1/;
+#include "mt8183.dtsi"
+
+/ {
+ model = "MediaTek MT8183 evaluation board";
+ compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@4000 {
+ device_type = "memory";
+ reg = <0 0x4000 0 0x8000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
new file mode 100644
index 000..8564a26
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ben Ho
+ *Erin Lo
+ */
+
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8183";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@002 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@003 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+ enable-method = "psci";
+ };
+
+ cpu4: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73";
+ reg = <0x100>;
+
[PATCH v2 3/4] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo <erin...@mediatek.com> --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v2 3/4] dt-bindings: serial: Add compatible for Mediatek MT8183
This adds dt-binding documentation of uart for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index f73abff..4783336 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -15,6 +15,7 @@ Required properties: * "mediatek,mt8127-uart" for MT8127 compatible UARTS * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS + * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. -- 1.9.1
[PATCH v2 2/4] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo <erin...@mediatek.com> --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
[PATCH v2 2/4] dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo --- .../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index 07bf0b9..5ff48a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -5,6 +5,7 @@ interrupt. Required properties: - compatible: should be + "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 -- 1.9.1
Re: [PATCH 0/2] Add basic support for Mediatek MT8183 SoC
On Fri, 2018-05-11 at 10:29 +0200, Matthias Brugger wrote: > Hi Erin, > > Please include the linux-mediatek and arm-linux-kernel mailinglists in the > next > round. > > Some comments in the patches. > > Regards, > Matthias I will add linux-mediatek, linux-arm-kernel, linux-kernel, linux-serial mailinglists in next round. Thanks for your reminder. Regards, Erin > > On 05/11/2018 08:11 AM, Erin Lo wrote: > > MT8183 is a SoC based on 64bit ARMv8 architecture. > > It contains 4 CA53 and 4 CA73 cores. > > MT8183 share many HW IP with MT65xx series. > > This patchset was tested on MT8183 evaluation board, and boot to shell ok. > > > > This series contains document bindings, device tree including interrupt, > > uart. > > > > Ben Ho (1): > > arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > > Makefile > > > > Erin Lo (1): > > dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > > > > Documentation/devicetree/bindings/arm/mediatek.txt | 4 + > > .../interrupt-controller/mediatek,sysirq.txt | 1 + > > .../devicetree/bindings/serial/mtk-uart.txt| 1 + > > arch/arm64/boot/dts/mediatek/Makefile | 1 + > > arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 178 > > + > > 6 files changed, 216 insertions(+) > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi > > > > -- > > 1.9.1 > >
Re: [PATCH 0/2] Add basic support for Mediatek MT8183 SoC
On Fri, 2018-05-11 at 10:29 +0200, Matthias Brugger wrote: > Hi Erin, > > Please include the linux-mediatek and arm-linux-kernel mailinglists in the > next > round. > > Some comments in the patches. > > Regards, > Matthias I will add linux-mediatek, linux-arm-kernel, linux-kernel, linux-serial mailinglists in next round. Thanks for your reminder. Regards, Erin > > On 05/11/2018 08:11 AM, Erin Lo wrote: > > MT8183 is a SoC based on 64bit ARMv8 architecture. > > It contains 4 CA53 and 4 CA73 cores. > > MT8183 share many HW IP with MT65xx series. > > This patchset was tested on MT8183 evaluation board, and boot to shell ok. > > > > This series contains document bindings, device tree including interrupt, > > uart. > > > > Ben Ho (1): > > arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and > > Makefile > > > > Erin Lo (1): > > dt-bindings: arm: Add bindings for Mediatek MT8183 SoC Platform > > > > Documentation/devicetree/bindings/arm/mediatek.txt | 4 + > > .../interrupt-controller/mediatek,sysirq.txt | 1 + > > .../devicetree/bindings/serial/mtk-uart.txt| 1 + > > arch/arm64/boot/dts/mediatek/Makefile | 1 + > > arch/arm64/boot/dts/mediatek/mt8183-evb.dts| 31 > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 178 > > + > > 6 files changed, 216 insertions(+) > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts > > create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi > > > > -- > > 1.9.1 > >
Re: [PATCH 0/5] Add some DT nodes for Mediatek MT2701
Hi Matthias, On Tue, 2017-08-01 at 16:06 +0200, Matthias Brugger wrote: > Hi Erin, > > On 08/01/2017 09:03 AM, Erin Lo wrote: > > This patch series based on v4.13-rc1, include MT2701 ethernet/disp > > bls/display/usb3 function DT nodes. > > > > Chunfeng Yun (1): > >arm: dts: mt2701: Add usb3 device nodes > > > > Sean Wang (1): > >arm: dts: mt2701: Add ethernet device node > > > > Weiqing Kong (2): > >arm: dts: mt2701: Add display bls related nodes for MT2701 > >arm: dts: mt2701: Add display bls related nodes for MT2701 > > > > YT Shen (1): > >arm: dts: mt2701: Add display subsystem related nodes for MT2701 > > > > I took 1/5 and 5/5 in v4.13-next/dts32 > > Please reword the commit message on 2/5 and 3/5. > Also the node should be called pwm instead of bls. > > Regards, > Matthias > Thanks for your comment. We will reword pwm instead of bls in next version and send them with 4/5 in recent days. Regards, Erin > > arch/arm/boot/dts/mt2701-evb.dts | 27 ++ > > arch/arm/boot/dts/mt2701.dtsi| 189 > > +++ > > 2 files changed, 216 insertions(+) > > > > -- > > 1.9.1 > >
Re: [PATCH 0/5] Add some DT nodes for Mediatek MT2701
Hi Matthias, On Tue, 2017-08-01 at 16:06 +0200, Matthias Brugger wrote: > Hi Erin, > > On 08/01/2017 09:03 AM, Erin Lo wrote: > > This patch series based on v4.13-rc1, include MT2701 ethernet/disp > > bls/display/usb3 function DT nodes. > > > > Chunfeng Yun (1): > >arm: dts: mt2701: Add usb3 device nodes > > > > Sean Wang (1): > >arm: dts: mt2701: Add ethernet device node > > > > Weiqing Kong (2): > >arm: dts: mt2701: Add display bls related nodes for MT2701 > >arm: dts: mt2701: Add display bls related nodes for MT2701 > > > > YT Shen (1): > >arm: dts: mt2701: Add display subsystem related nodes for MT2701 > > > > I took 1/5 and 5/5 in v4.13-next/dts32 > > Please reword the commit message on 2/5 and 3/5. > Also the node should be called pwm instead of bls. > > Regards, > Matthias > Thanks for your comment. We will reword pwm instead of bls in next version and send them with 4/5 in recent days. Regards, Erin > > arch/arm/boot/dts/mt2701-evb.dts | 27 ++ > > arch/arm/boot/dts/mt2701.dtsi| 189 > > +++ > > 2 files changed, 216 insertions(+) > > > > -- > > 1.9.1 > >
