[PATCH v4 1/2] dw-xdata-pcie: Fix documentation build warns
Fixes documentation build warns related to indentation, text formatting,
and missing reference on toc.
This fix solves the following warnings:
WARNING: Unexpected indentation.
WARNING: Block quote ends without a blank line; unexpected unindent.
WARNING: document isn't included in any toctree
Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
dw-xdata-pcie driver")
Link:
https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/
Reported-by: Stephen Rothwell
Signed-off-by: Gustavo Pimentel
---
Documentation/misc-devices/dw-xdata-pcie.rst | 14 +++---
Documentation/misc-devices/index.rst | 1 +
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst
b/Documentation/misc-devices/dw-xdata-pcie.rst
index fd75c93..cbc9f69 100644
--- a/Documentation/misc-devices/dw-xdata-pcie.rst
+++ b/Documentation/misc-devices/dw-xdata-pcie.rst
@@ -17,24 +17,24 @@ information to /var/log/kern.log or dmesg.
Request write TLPs traffic generation - Root Complex to Endpoint direction
- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/write
+echo 1 > /sys/class/misc/dw-xdata-pcie/write
Get write TLPs traffic link throughput in MB/s
- Command:
-cat /sys/class/misc/dw-xdata-pcie/write
+cat /sys/class/misc/dw-xdata-pcie/write
- Output example:
- 204
+204
Request read TLPs traffic generation - Endpoint to Root Complex direction:
- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/read
+echo 1 > /sys/class/misc/dw-xdata-pcie/read
Get read TLPs traffic link throughput in MB/s
- Command:
-cat /sys/class/misc/dw-xdata-pcie/read
+cat /sys/class/misc/dw-xdata-pcie/read
- Output example:
- 199
+199
Request to stop any current TLP transfer:
- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/stop
+echo 1 > /sys/class/misc/dw-xdata-pcie/stop
diff --git a/Documentation/misc-devices/index.rst
b/Documentation/misc-devices/index.rst
index 64420b331..30ac58f 100644
--- a/Documentation/misc-devices/index.rst
+++ b/Documentation/misc-devices/index.rst
@@ -19,6 +19,7 @@ fit into other categories.
bh1770glc
eeprom
c2port
+ dw-xdata-pcie
ibmvmc
ics932s401
isl29003
--
2.7.4
[PATCH v4 2/2] dw-xdata-pcie: Update outdated info and improve text format
Removes old information related to the stop file interface in sysfs left by mistake during patch revision. Improves the document text format to be more user-friendly and adds basic driver related information, such as support, datasheet, and author. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 76 ++-- 1 file changed, 50 insertions(+), 26 deletions(-) diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst index cbc9f69..781c679 100644 --- a/Documentation/misc-devices/dw-xdata-pcie.rst +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -4,37 +4,61 @@ Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) === +Supported chips: +Synopsys DesignWare PCIe prototype solution + +Datasheet: +Not freely available + +Author: +Gustavo Pimentel + +Description +--- + This driver should be used as a host-side (Root Complex) driver and Synopsys DesignWare prototype that includes this IP. -The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +The dw-xdata-pcie driver can be used to enable/disable PCIe traffic generator in either direction (mutual exclusion) besides allowing the PCIe link performance analysis. The interaction with this driver is done through the module parameter and can be changed in runtime. The driver outputs the requested command state -information to /var/log/kern.log or dmesg. - -Request write TLPs traffic generation - Root Complex to Endpoint direction -- Command: -echo 1 > /sys/class/misc/dw-xdata-pcie/write - -Get write TLPs traffic link throughput in MB/s -- Command: -cat /sys/class/misc/dw-xdata-pcie/write -- Output example: -204 - -Request read TLPs traffic generation - Endpoint to Root Complex direction: -- Command: -echo 1 > /sys/class/misc/dw-xdata-pcie/read - -Get read TLPs traffic link throughput in MB/s -- Command: -cat /sys/class/misc/dw-xdata-pcie/read -- Output example: -199 - -Request to stop any current TLP transfer: -- Command: -echo 1 > /sys/class/misc/dw-xdata-pcie/stop +information to ``/var/log/kern.log`` or dmesg. + +Example +--- + +Write TLPs traffic generation - Root Complex to Endpoint direction +~~ + +Generate traffic:: + + # echo 1 > /sys/class/misc/dw-xdata-pcie.0/write + +Get link throughput in MB/s:: + + # cat /sys/class/misc/dw-xdata-pcie.0/write + 204 + +Stop traffic in any direction:: + + # echo 0 > /sys/class/misc/dw-xdata-pcie.0/write + +Read TLPs traffic generation - Endpoint to Root Complex direction +~ + +Generate traffic:: + + # echo 1 > /sys/class/misc/dw-xdata-pcie.0/read + +Get link throughput in MB/s:: + + # cat /sys/class/misc/dw-xdata-pcie.0/read + 199 + +Stop traffic in any direction:: + + # echo 0 > /sys/class/misc/dw-xdata-pcie.0/read + -- 2.7.4
[PATCH v4 0/2] dw-xdata-pcie: Fix documentation build warns
The first patch of this series fixes the documentation build warns, such as: WARNING: Unexpected indentation. WARNING: Block quote ends without a blank line; unexpected unindent. WARNING: document isn't included in any toctree. The second patch updates outdated and improve documentation information. Changes: V2: Added cover-letter Added Reported-by, Link, and Fixes tags V3: Reformulated patch's text description and title V4: Reformulated patch's text description and title Rearranged the patches in a logical way, so that the first patch goal is to fix the build warns and the second patch goal is to update the documentation info. Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Cc: Stephen Rothwell Gustavo Pimentel (2): dw-xdata-pcie: Fix documentation build warns dw-xdata-pcie: Update outdated info and improve text format Documentation/misc-devices/dw-xdata-pcie.rst | 76 ++-- Documentation/misc-devices/index.rst | 1 + 2 files changed, 51 insertions(+), 26 deletions(-) -- 2.7.4
RE: [PATCH v2 1/2] Documentation: misc-devices: Fix indentation, formatting, and update outdated info
On Wed, Apr 7, 2021 at 18:35:16, Greg Kroah-Hartman wrote: > On Wed, Apr 07, 2021 at 03:57:31PM +0000, Gustavo Pimentel wrote: > > On Wed, Apr 7, 2021 at 7:17:12, Greg Kroah-Hartman > > wrote: > > > > > On Tue, Apr 06, 2021 at 11:17:48PM +0200, Gustavo Pimentel wrote: > > > > Fixes indentation issues reported by doing *make htmldocs* as well some > > > > text formatting. > > > > > > > > Besides these fixes, there was some outdated information related to stop > > > > file interface in sysfs. > > > > > > You are not doing this for all "misc-devices", you are doing this only > > > for one specific driver file. > > > > > > Please look at the example I provided for how to name this and fix up. > > > > Sorry Greg, I didn't see an example provided. Perhaps you forgot it? > > Nope: > https://urldefense.com/v3/__https://lore.kernel.org/r/YGyl7OWHJm1NuaV2@kroah.com__;!!A4F2R9G_pg!P8mbZ8v-lsQ9vFXveIVRhy11GV8pgDdGWP7FW51NwcuaI2WpDfsuBeCFXIzdFzkTHKTv3oU$ > That's right, for some reason I was stuck thinking that was some kind of link. My bad. -Gustavo
[PATCH v3 2/2] misc-device: Add dw-xdata-pcie to toctree(index)
With the recent addition of dw-xdata-pcie, the documentation build now
warns about a missing reference on the table of content related to it.
This fix solves the following error:
Documentation/misc-devices/dw-xdata-pcie.rst: WARNING: document isn't
included in any toctree
Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
dw-xdata-pcie driver")
Link:
https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/
Reported-by: Stephen Rothwell
Signed-off-by: Gustavo Pimentel
---
Documentation/misc-devices/index.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/misc-devices/index.rst
b/Documentation/misc-devices/index.rst
index 64420b331..30ac58f 100644
--- a/Documentation/misc-devices/index.rst
+++ b/Documentation/misc-devices/index.rst
@@ -19,6 +19,7 @@ fit into other categories.
bh1770glc
eeprom
c2port
+ dw-xdata-pcie
ibmvmc
ics932s401
isl29003
--
2.7.4
[PATCH v3 0/2] dw-xdata-pcie: Fix documentation build warns
This patch series fixes the documentation build warnings, such as: Documentation/misc-devices/dw-xdata-pcie.rst:20: WARNING: Unexpected indentation. Documentation/misc-devices/dw-xdata-pcie.rst:24: WARNING: Unexpected indentation. Documentation/misc-devices/dw-xdata-pcie.rst:25: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/misc-devices/dw-xdata-pcie.rst:30: WARNING: Unexpected indentation. Documentation/misc-devices/dw-xdata-pcie.rst:34: WARNING: Unexpected indentation. Documentation/misc-devices/dw-xdata-pcie.rst:35: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/misc-devices/dw-xdata-pcie.rst:40: WARNING: Unexpected indentation. Documentation/misc-devices/dw-xdata-pcie.rst: WARNING: document isn't included in any toctree Also fixes some outdated information related to stop file interface in sysfs. Changes: V2: Added cover-letter Added Reported-by, Link, and Fixes tags V3: Reformulated patch's text description and title Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Cc: Stephen Rothwell Gustavo Pimentel (2): dw-xdata-pcie: Fix documentation build warns and update outdated info misc-device: Add dw-xdata-pcie to toctree(index) Documentation/misc-devices/dw-xdata-pcie.rst | 62 +++- Documentation/misc-devices/index.rst | 1 + 2 files changed, 44 insertions(+), 19 deletions(-) -- 2.7.4
[PATCH v3 1/2] dw-xdata-pcie: Fix documentation build warns and update outdated info
Fixes documentation build warnings related to indentation and text
formatting, such as:
Documentation/misc-devices/dw-xdata-pcie.rst:20: WARNING: Unexpected
indentation.
Documentation/misc-devices/dw-xdata-pcie.rst:24: WARNING: Unexpected
indentation.
Documentation/misc-devices/dw-xdata-pcie.rst:25: WARNING: Block quote
ends without a blank line; unexpected unindent.
Documentation/misc-devices/dw-xdata-pcie.rst:30: WARNING: Unexpected
indentation.
Documentation/misc-devices/dw-xdata-pcie.rst:34: WARNING: Unexpected
indentation.
Documentation/misc-devices/dw-xdata-pcie.rst:35: WARNING: Block quote
ends without a blank line; unexpected unindent.
Documentation/misc-devices/dw-xdata-pcie.rst:40: WARNING: Unexpected
indentation.
Also fixes some outdated information related to stop file interface in sysfs.
Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
dw-xdata-pcie driver")
Link:
https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/
Reported-by: Stephen Rothwell
Signed-off-by: Gustavo Pimentel
---
Documentation/misc-devices/dw-xdata-pcie.rst | 62 +++-
1 file changed, 43 insertions(+), 19 deletions(-)
diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst
b/Documentation/misc-devices/dw-xdata-pcie.rst
index fd75c93..a956e1a 100644
--- a/Documentation/misc-devices/dw-xdata-pcie.rst
+++ b/Documentation/misc-devices/dw-xdata-pcie.rst
@@ -4,37 +4,61 @@
Driver for Synopsys DesignWare PCIe traffic generator (also known as xData)
===
+Supported chips:
+Synopsys DesignWare PCIe prototype solution
+
+Data sheet:
+Not freely available
+
+Author:
+Gustavo Pimentel
+
+Description
+---
+
This driver should be used as a host-side (Root Complex) driver and Synopsys
DesignWare prototype that includes this IP.
-The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic
+The dw-xdata-pcie driver can be used to enable/disable PCIe traffic
generator in either direction (mutual exclusion) besides allowing the
PCIe link performance analysis.
The interaction with this driver is done through the module parameter and
can be changed in runtime. The driver outputs the requested command state
-information to /var/log/kern.log or dmesg.
+information to ``/var/log/kern.log`` or dmesg.
+
+Example
+---
+
+Write TLPs traffic generation - Root Complex to Endpoint direction
+~~
+
+Generate traffic::
+
+# echo 1 > /sys/class/misc/dw-xdata-pcie.0/write
-Request write TLPs traffic generation - Root Complex to Endpoint direction
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/write
+Get link throughput in MB/s::
-Get write TLPs traffic link throughput in MB/s
-- Command:
-cat /sys/class/misc/dw-xdata-pcie/write
-- Output example:
+# cat /sys/class/misc/dw-xdata-pcie.0/write
204
-Request read TLPs traffic generation - Endpoint to Root Complex direction:
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/read
+Stop traffic in any direction::
-Get read TLPs traffic link throughput in MB/s
-- Command:
-cat /sys/class/misc/dw-xdata-pcie/read
-- Output example:
+# echo 0 > /sys/class/misc/dw-xdata-pcie.0/write
+
+Read TLPs traffic generation - Endpoint to Root Complex direction
+~
+
+Generate traffic::
+
+# echo 1 > /sys/class/misc/dw-xdata-pcie.0/read
+
+Get link throughput in MB/s::
+
+# cat /sys/class/misc/dw-xdata-pcie.0/read
199
-Request to stop any current TLP transfer:
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/stop
+Stop traffic in any direction::
+
+# echo 0 > /sys/class/misc/dw-xdata-pcie.0/read
+
--
2.7.4
RE: [PATCH v2 1/2] Documentation: misc-devices: Fix indentation, formatting, and update outdated info
On Wed, Apr 7, 2021 at 7:17:12, Greg Kroah-Hartman
wrote:
> On Tue, Apr 06, 2021 at 11:17:48PM +0200, Gustavo Pimentel wrote:
> > Fixes indentation issues reported by doing *make htmldocs* as well some
> > text formatting.
> >
> > Besides these fixes, there was some outdated information related to stop
> > file interface in sysfs.
>
> You are not doing this for all "misc-devices", you are doing this only
> for one specific driver file.
>
> Please look at the example I provided for how to name this and fix up.
Sorry Greg, I didn't see an example provided. Perhaps you forgot it?
>
> >
> > Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
> > dw-xdata-pcie driver")
> > Link:
> > https://urldefense.com/v3/__https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/__;!!A4F2R9G_pg!MeIXpmOYi4yJTBq19JEADll7-g6cYBmmwG92EWipqsBiPzeubfMGVllrpMt8FpwvW5ZemHY$
> >
> > Reported-by: Stephen Rothwell
> > Signed-off-by: Gustavo Pimentel
> > ---
> > Documentation/misc-devices/dw-xdata-pcie.rst | 62
> > +++-
> > 1 file changed, 43 insertions(+), 19 deletions(-)
>
> What changed from v1? Always put that below the --- line.
I've considered the V1 the 2 patches sent wrongly separately, based on
your feedback I've generated a v2 to include the cover letter and the
reported-by, link, and fixes tags.
Was this wrong?
I also placed the change list on the cover letter. Or do you prefer on
each patch?
>
> thanks,
>
> greg k-h
[PATCH v2 2/2] Documentation: misc-devices: Add missing entry on the table of content related to dw-xdata-pcie
Add missing entry on the table of content related to dw-xdata-pcie misc
driver reported in a warning by doing *make htmldocs*.
Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
dw-xdata-pcie driver")
Link:
https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/
Reported-by: Stephen Rothwell
Signed-off-by: Gustavo Pimentel
---
Documentation/misc-devices/index.rst | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/misc-devices/index.rst
b/Documentation/misc-devices/index.rst
index 64420b331..30ac58f 100644
--- a/Documentation/misc-devices/index.rst
+++ b/Documentation/misc-devices/index.rst
@@ -19,6 +19,7 @@ fit into other categories.
bh1770glc
eeprom
c2port
+ dw-xdata-pcie
ibmvmc
ics932s401
isl29003
--
2.7.4
[PATCH v2 1/2] Documentation: misc-devices: Fix indentation, formatting, and update outdated info
Fixes indentation issues reported by doing *make htmldocs* as well some
text formatting.
Besides these fixes, there was some outdated information related to stop
file interface in sysfs.
Fixes: e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
dw-xdata-pcie driver")
Link:
https://lore.kernel.org/linux-next/20210406214615.40cf3...@canb.auug.org.au/
Reported-by: Stephen Rothwell
Signed-off-by: Gustavo Pimentel
---
Documentation/misc-devices/dw-xdata-pcie.rst | 62 +++-
1 file changed, 43 insertions(+), 19 deletions(-)
diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst
b/Documentation/misc-devices/dw-xdata-pcie.rst
index fd75c93..a956e1a 100644
--- a/Documentation/misc-devices/dw-xdata-pcie.rst
+++ b/Documentation/misc-devices/dw-xdata-pcie.rst
@@ -4,37 +4,61 @@
Driver for Synopsys DesignWare PCIe traffic generator (also known as xData)
===
+Supported chips:
+Synopsys DesignWare PCIe prototype solution
+
+Data sheet:
+Not freely available
+
+Author:
+Gustavo Pimentel
+
+Description
+---
+
This driver should be used as a host-side (Root Complex) driver and Synopsys
DesignWare prototype that includes this IP.
-The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic
+The dw-xdata-pcie driver can be used to enable/disable PCIe traffic
generator in either direction (mutual exclusion) besides allowing the
PCIe link performance analysis.
The interaction with this driver is done through the module parameter and
can be changed in runtime. The driver outputs the requested command state
-information to /var/log/kern.log or dmesg.
+information to ``/var/log/kern.log`` or dmesg.
+
+Example
+---
+
+Write TLPs traffic generation - Root Complex to Endpoint direction
+~~
+
+Generate traffic::
+
+# echo 1 > /sys/class/misc/dw-xdata-pcie.0/write
-Request write TLPs traffic generation - Root Complex to Endpoint direction
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/write
+Get link throughput in MB/s::
-Get write TLPs traffic link throughput in MB/s
-- Command:
-cat /sys/class/misc/dw-xdata-pcie/write
-- Output example:
+# cat /sys/class/misc/dw-xdata-pcie.0/write
204
-Request read TLPs traffic generation - Endpoint to Root Complex direction:
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/read
+Stop traffic in any direction::
-Get read TLPs traffic link throughput in MB/s
-- Command:
-cat /sys/class/misc/dw-xdata-pcie/read
-- Output example:
+# echo 0 > /sys/class/misc/dw-xdata-pcie.0/write
+
+Read TLPs traffic generation - Endpoint to Root Complex direction
+~
+
+Generate traffic::
+
+# echo 1 > /sys/class/misc/dw-xdata-pcie.0/read
+
+Get link throughput in MB/s::
+
+# cat /sys/class/misc/dw-xdata-pcie.0/read
199
-Request to stop any current TLP transfer:
-- Command:
- echo 1 > /sys/class/misc/dw-xdata-pcie/stop
+Stop traffic in any direction::
+
+# echo 0 > /sys/class/misc/dw-xdata-pcie.0/read
+
--
2.7.4
[PATCH v2 0/2] Documentation: misc-devices: Fix documentation issues (indentation, text format, toc) and outdated information
This patch series fixes the documentation issues reported by doing *make htmldocs*, such as: - indentation - text formatting - missing entry on the table of content related to dw-xdata-pcie misc driver index Besides these warnings also fixes some outdated information related to stop file interface in sysfs. Changes: V2: Added cover-letter Added Reported-by, Link, and Fixes tags Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Cc: Stephen Rothwell Gustavo Pimentel (2): Documentation: misc-devices: Fix indentation, formatting, and update outdated info Documentation: misc-devices: Add missing entry on the table of content related to dw-xdata-pcie Documentation/misc-devices/dw-xdata-pcie.rst | 62 +++- Documentation/misc-devices/index.rst | 1 + 2 files changed, 44 insertions(+), 19 deletions(-) -- 2.7.4
[PATCH] Documentation: misc-devices: Add missing entry on the table of content related to dw-xdata-pcie
Add missing entry on the table of content related to dw-xdata-pcie misc driver reported in a warning by doing *make htmldocs*. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/index.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 64420b331..30ac58f 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -19,6 +19,7 @@ fit into other categories. bh1770glc eeprom c2port + dw-xdata-pcie ibmvmc ics932s401 isl29003 -- 2.7.4
[PATCH] Documentation: misc-devices: Fix indentation, formatting, and update outdated info
Fixes indentation issues reported by doing *make htmldocs* as well some text formatting. Besides these fixes, there was some outdated information related to stop file interface in sysfs. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 62 +++- 1 file changed, 43 insertions(+), 19 deletions(-) diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst index fd75c93..a956e1a 100644 --- a/Documentation/misc-devices/dw-xdata-pcie.rst +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -4,37 +4,61 @@ Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) === +Supported chips: +Synopsys DesignWare PCIe prototype solution + +Data sheet: +Not freely available + +Author: +Gustavo Pimentel + +Description +--- + This driver should be used as a host-side (Root Complex) driver and Synopsys DesignWare prototype that includes this IP. -The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +The dw-xdata-pcie driver can be used to enable/disable PCIe traffic generator in either direction (mutual exclusion) besides allowing the PCIe link performance analysis. The interaction with this driver is done through the module parameter and can be changed in runtime. The driver outputs the requested command state -information to /var/log/kern.log or dmesg. +information to ``/var/log/kern.log`` or dmesg. + +Example +--- + +Write TLPs traffic generation - Root Complex to Endpoint direction +~~ + +Generate traffic:: + +# echo 1 > /sys/class/misc/dw-xdata-pcie.0/write -Request write TLPs traffic generation - Root Complex to Endpoint direction -- Command: - echo 1 > /sys/class/misc/dw-xdata-pcie/write +Get link throughput in MB/s:: -Get write TLPs traffic link throughput in MB/s -- Command: -cat /sys/class/misc/dw-xdata-pcie/write -- Output example: +# cat /sys/class/misc/dw-xdata-pcie.0/write 204 -Request read TLPs traffic generation - Endpoint to Root Complex direction: -- Command: - echo 1 > /sys/class/misc/dw-xdata-pcie/read +Stop traffic in any direction:: -Get read TLPs traffic link throughput in MB/s -- Command: -cat /sys/class/misc/dw-xdata-pcie/read -- Output example: +# echo 0 > /sys/class/misc/dw-xdata-pcie.0/write + +Read TLPs traffic generation - Endpoint to Root Complex direction +~ + +Generate traffic:: + +# echo 1 > /sys/class/misc/dw-xdata-pcie.0/read + +Get link throughput in MB/s:: + +# cat /sys/class/misc/dw-xdata-pcie.0/read 199 -Request to stop any current TLP transfer: -- Command: - echo 1 > /sys/class/misc/dw-xdata-pcie/stop +Stop traffic in any direction:: + +# echo 0 > /sys/class/misc/dw-xdata-pcie.0/read + -- 2.7.4
RE: linux-next: build warning after merge of the char-misc tree
On Tue, Apr 6, 2021 at 15:15:40, Greg KH wrote:
> On Tue, Apr 06, 2021 at 02:13:53PM +0000, Gustavo Pimentel wrote:
> > On Tue, Apr 6, 2021 at 15:7:23, Greg KH wrote:
> >
> > > On Tue, Apr 06, 2021 at 09:44:41PM +1000, Stephen Rothwell wrote:
> > > > Hi all,
> > > >
> > > > After merging the char-misc tree, today's linux-next build (htmldocs)
> > > > produced this warning:
> > > >
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:20: WARNING: Unexpected
> > > > indentation.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:24: WARNING: Unexpected
> > > > indentation.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:25: WARNING: Block quote
> > > > ends without a blank line; unexpected unindent.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:30: WARNING: Unexpected
> > > > indentation.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:34: WARNING: Unexpected
> > > > indentation.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:35: WARNING: Block quote
> > > > ends without a blank line; unexpected unindent.
> > > > Documentation/misc-devices/dw-xdata-pcie.rst:40: WARNING: Unexpected
> > > > indentation.
> > > >
> > > > Introduced by commit
> > > >
> > > > e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
> > > > dw-xdata-pcie driver")
> > >
> > > Gustavo, can you send a follow-on patch to fix this up?
> >
> > Yes, I have already made a fix for it.
> > My apologies for my ignorance on this matter, there is some way to check
> > if my fixes are okay through some script or other way as Stephen has
> > done?
>
> Yes, run 'make htmldocs' in the kernel tree with your change applied and
> see if the warnings go away.
Done. I submitted now the v11 with the fixes.
-Gustavo
>
> thanks,
>
> greg k-h
[PATCH v11 3/4] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9e87692..36387b3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5099,6 +5099,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v11 2/4] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 64 Documentation/misc-devices/index.rst | 1 + 2 files changed, 65 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..a956e1a --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,64 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +Supported chips: +Synopsys DesignWare PCIe prototype solution + +Data sheet: +Not freely available + +Author: +Gustavo Pimentel + +Description +--- + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The dw-xdata-pcie driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to ``/var/log/kern.log`` or dmesg. + +Example +--- + +Write TLPs traffic generation - Root Complex to Endpoint direction +~~ + +Generate traffic:: + +# echo 1 > /sys/class/misc/dw-xdata-pcie.0/write + +Get link throughput in MB/s:: + +# cat /sys/class/misc/dw-xdata-pcie.0/write + 204 + +Stop traffic in any direction:: + +# echo 0 > /sys/class/misc/dw-xdata-pcie.0/write + +Read TLPs traffic generation - Endpoint to Root Complex direction +~ + +Generate traffic:: + +# echo 1 > /sys/class/misc/dw-xdata-pcie.0/read + +Get link throughput in MB/s:: + +# cat /sys/class/misc/dw-xdata-pcie.0/read + 199 + +Stop traffic in any direction:: + +# echo 0 > /sys/class/misc/dw-xdata-pcie.0/read + diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 64420b331..30ac58f 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -19,6 +19,7 @@ fit into other categories. bh1770glc eeprom c2port + dw-xdata-pcie ibmvmc ics932s401 isl29003 -- 2.7.4
[PATCH v11 4/4] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 49 1 file changed, 49 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..f574e8e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,49 @@ +What: /sys/class/misc/drivers/dw-xdata-pcie./write +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction or to disable the PCIe traffic generator + in all directions. + + Write y/1/on to enable, n/0/off to disable + + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./write + or +echo 0 > /sys/class/misc/dw-xdata-pcie./write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./write +204 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./read +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction or to disable the PCIe traffic generator +in all directions. + + Write y/1/on to enable, n/0/off to disable + + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./read + or +echo 0 > /sys/class/misc/dw-xdata-pcie./read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./read +199 + + The file is read and write. -- 2.7.4
[PATCH v11 0/4] misc: Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback - Replace module parameter by sysfs use. - Replace bit fields structure with macros and masks use. - Removed SET() and GET() macros by the writel() and readl(). - Removed some noisy info messages. V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback - Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback - Removed "default n" on Kconfig Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Added some explanatory comments for some steps - Added some bit defines instead of magic numbers V6: Rework driver according to Greg Kroah-Hartman' feedback - Squashed patches #2 and #3 - Removed units (MB/s) on the sys file - Reduced mutex scope on the functions called by sysfs Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Fix typo "DesignWare" V7: Rework driver according to Greg Kroah-Hartman' feedback - Created a sub device (misc device) that will be associated with the PCI driver - sysfs group is now associated with the misc drivers instead of the PCI driver V8: Rework driver according to Greg Kroah-Hartman' feedback - Added more detail to the version changes on the cover letter - Squashed patches #1 and #2 - Removed struct device from the dw_xdata_pcie structure - Replaced the pci_*() use by dev_*() - Added free call for the misc driver name allocation - Added reference counting - Removed snps_edda_data structure and their usage Rebased patches on top of v5.12-rc4 version V9: Squashed temporary development patch #5 into the driver patch #1 V10: Reworked the write_store() and read_store() to validate the input using kstrtobool() Removed stop_store() Update ABI documentation accordingly V11: Fixed the documentation based on the warnings detected by Stephen Rothwell Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Cc: Stephen Rothwell Gustavo Pimentel (4): misc: Add Synopsys DesignWare xData IP driver Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Documentation/ABI/testing/sysfs-driver-xdata | 49 Documentation/misc-devices/dw-xdata-pcie.rst | 64 Documentation/misc-devices/index.rst | 1 + MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 420 +++ 7 files changed, 552 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
[PATCH v11 1/4] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/Kconfig | 10 ++
drivers/misc/Makefile| 1 +
drivers/misc/dw-xdata-pcie.c | 420 +++
3 files changed, 431 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f532c59..e6af9ff 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -402,6 +402,16 @@ config SRAM
config SRAM_EXEC
bool
+config DW_XDATA_PCIE
+ depends on PCI
+ tristate "Synopsys DesignWare xData PCIe driver"
+ help
+ This driver allows controlling Synopsys DesignWare PCIe traffic
+ generator IP also known as xData, present in Synopsys DesignWare
+ PCIe Endpoint prototype.
+
+ If unsure, say N.
+
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 99b6f15..5411996 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_CXL_BASE) += cxl/
+obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-$(CONFIG_BCM_VK) += bcm-vk/
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..257c25d
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+static DEFINE_IDA(xdata_ida);
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+ struct miscdevice misc_dev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
+{
+ return dw->rg_region.vaddr;
+}
+
+static void dw_xdata_stop(struct dw_xdata *dw)
+{
+ u32 burst;
+
+ mutex_lock(>mutex);
+
+ burst = readl(&(__dw_regs(dw)->burst_cnt));
+
+ if (burst & BURST_REPEAT) {
+ burst &= ~(u32)BURST_REPEAT;
+ writel(burst, &(__dw_regs(dw)->burst_cnt));
+ }
+
+ mutex_unlock(>mutex);
+}
+
+static void dw_xdata_start(struct dw_xdata *dw, bool write)
+{
+ struct device *dev = >pdev->dev;
+ u32 control, status;
+
+ /* S
RE: linux-next: build warning after merge of the char-misc tree
On Tue, Apr 6, 2021 at 15:7:23, Greg KH wrote:
> On Tue, Apr 06, 2021 at 09:44:41PM +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > After merging the char-misc tree, today's linux-next build (htmldocs)
> > produced this warning:
> >
> > Documentation/misc-devices/dw-xdata-pcie.rst:20: WARNING: Unexpected
> > indentation.
> > Documentation/misc-devices/dw-xdata-pcie.rst:24: WARNING: Unexpected
> > indentation.
> > Documentation/misc-devices/dw-xdata-pcie.rst:25: WARNING: Block quote ends
> > without a blank line; unexpected unindent.
> > Documentation/misc-devices/dw-xdata-pcie.rst:30: WARNING: Unexpected
> > indentation.
> > Documentation/misc-devices/dw-xdata-pcie.rst:34: WARNING: Unexpected
> > indentation.
> > Documentation/misc-devices/dw-xdata-pcie.rst:35: WARNING: Block quote ends
> > without a blank line; unexpected unindent.
> > Documentation/misc-devices/dw-xdata-pcie.rst:40: WARNING: Unexpected
> > indentation.
> >
> > Introduced by commit
> >
> > e1181b5bbc3c ("Documentation: misc-devices: Add Documentation for
> > dw-xdata-pcie driver")
>
> Gustavo, can you send a follow-on patch to fix this up?
Yes, I have already made a fix for it.
My apologies for my ignorance on this matter, there is some way to check
if my fixes are okay through some script or other way as Stephen has
done?
-Gustavo
>
> thanks,
>
> greg k-h
[PATCH v10 2/4] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..fd75c93 --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/write + +Get write TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/write +- Output example: + 204 + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/read + +Get read TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/read +- Output example: + 199 + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/stop -- 2.7.4
[PATCH v10 3/4] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9e87692..36387b3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5099,6 +5099,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v10 4/4] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 49 1 file changed, 49 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..f574e8e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,49 @@ +What: /sys/class/misc/drivers/dw-xdata-pcie./write +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction or to disable the PCIe traffic generator + in all directions. + + Write y/1/on to enable, n/0/off to disable + + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./write + or +echo 0 > /sys/class/misc/dw-xdata-pcie./write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./write +204 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./read +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction or to disable the PCIe traffic generator +in all directions. + + Write y/1/on to enable, n/0/off to disable + + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./read + or +echo 0 > /sys/class/misc/dw-xdata-pcie./read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./read +199 + + The file is read and write. -- 2.7.4
[PATCH v10 0/4] misc: Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback - Replace module parameter by sysfs use. - Replace bit fields structure with macros and masks use. - Removed SET() and GET() macros by the writel() and readl(). - Removed some noisy info messages. V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback - Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback - Removed "default n" on Kconfig Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Added some explanatory comments for some steps - Added some bit defines instead of magic numbers V6: Rework driver according to Greg Kroah-Hartman' feedback - Squashed patches #2 and #3 - Removed units (MB/s) on the sys file - Reduced mutex scope on the functions called by sysfs Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Fix typo "DesignWare" V7: Rework driver according to Greg Kroah-Hartman' feedback - Created a sub device (misc device) that will be associated with the PCI driver - sysfs group is now associated with the misc drivers instead of the PCI driver V8: Rework driver according to Greg Kroah-Hartman' feedback - Added more detail to the version changes on the cover letter - Squashed patches #1 and #2 - Removed struct device from the dw_xdata_pcie structure - Replaced the pci_*() use by dev_*() - Added free call for the misc driver name allocation - Added reference counting - Removed snps_edda_data structure and their usage Rebased patches on top of v5.12-rc4 version V9: Squashed temporary development patch #5 into the driver patch #1 V10: Reworked the write_store() and read_store() to validate the input using kstrtobool() Removed stop_store() Update ABI documentation accordingly Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Gustavo Pimentel (4): misc: Add Synopsys DesignWare xData IP driver Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Documentation/ABI/testing/sysfs-driver-xdata | 49 Documentation/misc-devices/dw-xdata-pcie.rst | 40 +++ MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 420 +++ 6 files changed, 527 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
[PATCH v10 1/4] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/Kconfig | 10 ++
drivers/misc/Makefile| 1 +
drivers/misc/dw-xdata-pcie.c | 420 +++
3 files changed, 431 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f532c59..e6af9ff 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -402,6 +402,16 @@ config SRAM
config SRAM_EXEC
bool
+config DW_XDATA_PCIE
+ depends on PCI
+ tristate "Synopsys DesignWare xData PCIe driver"
+ help
+ This driver allows controlling Synopsys DesignWare PCIe traffic
+ generator IP also known as xData, present in Synopsys DesignWare
+ PCIe Endpoint prototype.
+
+ If unsure, say N.
+
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 99b6f15..5411996 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_CXL_BASE) += cxl/
+obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-$(CONFIG_BCM_VK) += bcm-vk/
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..257c25d
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+static DEFINE_IDA(xdata_ida);
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+ struct miscdevice misc_dev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
+{
+ return dw->rg_region.vaddr;
+}
+
+static void dw_xdata_stop(struct dw_xdata *dw)
+{
+ u32 burst;
+
+ mutex_lock(>mutex);
+
+ burst = readl(&(__dw_regs(dw)->burst_cnt));
+
+ if (burst & BURST_REPEAT) {
+ burst &= ~(u32)BURST_REPEAT;
+ writel(burst, &(__dw_regs(dw)->burst_cnt));
+ }
+
+ mutex_unlock(>mutex);
+}
+
+static void dw_xdata_start(struct dw_xdata *dw, bool write)
+{
+ struct device *dev = >pdev->dev;
+ u32 control, status;
+
+ /* S
RE: [PATCH v9 4/4] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
On Mon, Mar 29, 2021 at 11:40:28, Greg Kroah-Hartman wrote: > On Mon, Mar 29, 2021 at 10:25:25AM +0000, Gustavo Pimentel wrote: > > On Mon, Mar 29, 2021 at 11:8:11, Greg Kroah-Hartman > > wrote: > > > > > On Mon, Mar 29, 2021 at 11:59:40AM +0200, Gustavo Pimentel wrote: > > > > This patch describes the sysfs interface implemented on the > > > > dw-xdata-pcie > > > > driver. > > > > > > > > Signed-off-by: Gustavo Pimentel > > > > --- > > > > Documentation/ABI/testing/sysfs-driver-xdata | 46 > > > > > > > > 1 file changed, 46 insertions(+) > > > > create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata > > > > > > > > diff --git a/Documentation/ABI/testing/sysfs-driver-xdata > > > > b/Documentation/ABI/testing/sysfs-driver-xdata > > > > new file mode 100644 > > > > index ..66af19a > > > > --- /dev/null > > > > +++ b/Documentation/ABI/testing/sysfs-driver-xdata > > > > @@ -0,0 +1,46 @@ > > > > +What: /sys/class/misc/drivers/dw-xdata-pcie./write > > > > +Date: April 2021 > > > > +KernelVersion: 5.13 > > > > +Contact: Gustavo Pimentel > > > > +Description: Allows the user to enable the PCIe traffic generator > > > > which > > > > + will create write TLPs frames - from the Root Complex > > > > to the > > > > + Endpoint direction. > > > > + Usage e.g. > > > > +echo 1 > /sys/class/misc/dw-xdata-pcie./write > > > > > > Again, this does not match the code. Either fix the code (which I > > > recommend), or change this and the other sysfs descriptions of writing > > > values here. > > > > I've commented about this previously, but I didn't get feedback on it, > > therefore I assumed that justification was okay. > > I will change the code to accept only the "1" input on the *_store() > > Why not use the built-in function to parse "1/y/Y" that the kernel > provides for this type of thing? I found kstrtobool() just now. I'm adapting the code as we speak. After testing I will send the v10 as soon as possible. -Gustavo > > thanks, > > greg k-h
RE: [PATCH v9 4/4] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
On Mon, Mar 29, 2021 at 11:8:11, Greg Kroah-Hartman wrote: > On Mon, Mar 29, 2021 at 11:59:40AM +0200, Gustavo Pimentel wrote: > > This patch describes the sysfs interface implemented on the dw-xdata-pcie > > driver. > > > > Signed-off-by: Gustavo Pimentel > > --- > > Documentation/ABI/testing/sysfs-driver-xdata | 46 > > > > 1 file changed, 46 insertions(+) > > create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata > > > > diff --git a/Documentation/ABI/testing/sysfs-driver-xdata > > b/Documentation/ABI/testing/sysfs-driver-xdata > > new file mode 100644 > > index ..66af19a > > --- /dev/null > > +++ b/Documentation/ABI/testing/sysfs-driver-xdata > > @@ -0,0 +1,46 @@ > > +What: /sys/class/misc/drivers/dw-xdata-pcie./write > > +Date: April 2021 > > +KernelVersion: 5.13 > > +Contact: Gustavo Pimentel > > +Description: Allows the user to enable the PCIe traffic generator > > which > > + will create write TLPs frames - from the Root Complex to the > > + Endpoint direction. > > + Usage e.g. > > +echo 1 > /sys/class/misc/dw-xdata-pcie./write > > Again, this does not match the code. Either fix the code (which I > recommend), or change this and the other sysfs descriptions of writing > values here. I've commented about this previously, but I didn't get feedback on it, therefore I assumed that justification was okay. I will change the code to accept only the "1" input on the *_store() -Gustavo > > thanks, > > greg k-h
RE: [PATCH v8 5/5] FIX driver
On Mon, Mar 29, 2021 at 11:3:3, Willy Tarreau wrote: > On Mon, Mar 29, 2021 at 11:51:38AM +0200, Gustavo Pimentel wrote: > > Signed-off-by: Gustavo Pimentel > > Please make an effort, this is in no way an acceptable commit description > for a patch. The subject is already extremely vague "FIX driver" with no > context at all, and there is no description of the intent here. What is > someone supposed to think about the risk of keeping or reverting it if a > bisect section would end on this one ? Hi Willy, this patch was sent by mistake, it was already squashed on patch #1 on v9. Please check your inbox for the patch series v9, that was sent a few minutes ago. -Gustavo > > Thanks, > Willy
[PATCH v9 0/4] misc: Add Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback - Replace module parameter by sysfs use. - Replace bit fields structure with macros and masks use. - Removed SET() and GET() macros by the writel() and readl(). - Removed some noisy info messages. V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback - Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback - Removed "default n" on Kconfig Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Added some explanatory comments for some steps - Added some bit defines instead of magic numbers V6: Rework driver according to Greg Kroah-Hartman' feedback - Squashed patches #2 and #3 - Removed units (MB/s) on the sys file - Reduced mutex scope on the functions called by sysfs Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Fix typo "DesignWare" V7: Rework driver according to Greg Kroah-Hartman' feedback - Created a sub device (misc device) that will be associated with the PCI driver - sysfs group is now associated with the misc drivers instead of the PCI driver V8: Rework driver according to Greg Kroah-Hartman' feedback - Added more detail to the version changes on the cover letter - Squashed patches #1 and #2 - Removed struct device from the dw_xdata_pcie structure - Replaced the pci_*() use by dev_*() - Added free call for the misc driver name allocation - Added reference counting - Removed snps_edda_data structure and their usage Rebased patches on top of v5.12-rc4 version V9: Squashed temporary development patch into the driver patch #1 Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Gustavo Pimentel (4): misc: Add Synopsys DesignWare xData IP driver Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Documentation/ABI/testing/sysfs-driver-xdata | 46 +++ Documentation/misc-devices/dw-xdata-pcie.rst | 40 +++ MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 416 +++ 6 files changed, 520 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
[PATCH v9 4/4] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 46 1 file changed, 46 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..66af19a --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,46 @@ +What: /sys/class/misc/drivers/dw-xdata-pcie./write +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./write +204 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./read +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./read +199 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./stop +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to disable the PCIe traffic generator in all + directions. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./stop + + The file is write only. -- 2.7.4
[PATCH v9 1/4] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/Kconfig | 10 ++
drivers/misc/Makefile| 1 +
drivers/misc/dw-xdata-pcie.c | 416 +++
3 files changed, 427 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f532c59..e6af9ff 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -402,6 +402,16 @@ config SRAM
config SRAM_EXEC
bool
+config DW_XDATA_PCIE
+ depends on PCI
+ tristate "Synopsys DesignWare xData PCIe driver"
+ help
+ This driver allows controlling Synopsys DesignWare PCIe traffic
+ generator IP also known as xData, present in Synopsys DesignWare
+ PCIe Endpoint prototype.
+
+ If unsure, say N.
+
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 99b6f15..5411996 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_CXL_BASE) += cxl/
+obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-$(CONFIG_BCM_VK) += bcm-vk/
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..011516b
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+static DEFINE_IDA(xdata_ida);
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+ struct miscdevice misc_dev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
+{
+ return dw->rg_region.vaddr;
+}
+
+static void dw_xdata_stop(struct dw_xdata *dw)
+{
+ u32 burst;
+
+ mutex_lock(>mutex);
+
+ burst = readl(&(__dw_regs(dw)->burst_cnt));
+
+ if (burst & BURST_REPEAT) {
+ burst &= ~(u32)BURST_REPEAT;
+ writel(burst, &(__dw_regs(dw)->burst_cnt));
+ }
+
+ mutex_unlock(>mutex);
+}
+
+static void dw_xdata_start(struct dw_xdata *dw, bool write)
+{
+ struct device *dev = >pdev->dev;
+ u32 control, status;
+
+ /* S
[PATCH v9 2/4] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..fd75c93 --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/write + +Get write TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/write +- Output example: + 204 + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/read + +Get read TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/read +- Output example: + 199 + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/stop -- 2.7.4
[PATCH v9 3/4] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9e87692..36387b3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5099,6 +5099,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v8 4/5] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 46 1 file changed, 46 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..66af19a --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,46 @@ +What: /sys/class/misc/drivers/dw-xdata-pcie./write +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./write +204 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./read +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie./read +199 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie./stop +Date: April 2021 +KernelVersion: 5.13 +Contact: Gustavo Pimentel +Description: Allows the user to disable the PCIe traffic generator in all + directions. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie./stop + + The file is write only. -- 2.7.4
[PATCH v8 5/5] FIX driver
Signed-off-by: Gustavo Pimentel
---
drivers/misc/dw-xdata-pcie.c | 99 +---
1 file changed, 57 insertions(+), 42 deletions(-)
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
index 43fdd35..011516b 100644
--- a/drivers/misc/dw-xdata-pcie.c
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -21,19 +21,7 @@
#define DW_XDATA_EP_MEM_OFFSET 0x800
-struct dw_xdata_pcie_data {
- /* xData registers location */
- enum pci_barno rg_bar;
- off_t rg_off;
- size_t rg_sz;
-};
-
-static const struct dw_xdata_pcie_data snps_edda_data = {
- /* xData registers location */
- .rg_bar = BAR_0,
- .rg_off = 0x, /* 0 Kbytes */
- .rg_sz = 0x012c, /* 300 bytes */
-};
+static DEFINE_IDA(xdata_ida);
#define STATUS_DONEBIT(0)
@@ -71,7 +59,6 @@ struct dw_xdata_regs {
struct dw_xdata_region {
phys_addr_t paddr; /* physical address */
void __iomem *vaddr;/* virtual address */
- size_t sz; /* size */
};
struct dw_xdata {
@@ -80,7 +67,6 @@ struct dw_xdata {
size_t max_rd_len; /* max rd xfer len */
struct mutex mutex;
struct pci_dev *pdev;
- struct device *dev;
struct miscdevice misc_dev;
};
@@ -107,6 +93,7 @@ static void dw_xdata_stop(struct dw_xdata *dw)
static void dw_xdata_start(struct dw_xdata *dw, bool write)
{
+ struct device *dev = >pdev->dev;
u32 control, status;
/* Stop first if xfer in progress */
@@ -144,7 +131,7 @@ static void dw_xdata_start(struct dw_xdata *dw, bool write)
mutex_unlock(>mutex);
if (!(status & STATUS_DONE))
- pci_dbg(dw->pdev, "xData: started %s direction\n",
+ dev_dbg(dev, "xData: started %s direction\n",
write ? "write" : "read");
}
@@ -174,6 +161,7 @@ static u64 dw_xdata_perf_diff(u64 *m1, u64 *m2, u64 time)
static void dw_xdata_perf(struct dw_xdata *dw, u64 *rate, bool write)
{
+ struct device *dev = >pdev->dev;
u64 data[2], time[2], diff;
mutex_lock(>mutex);
@@ -206,7 +194,7 @@ static void dw_xdata_perf(struct dw_xdata *dw, u64 *rate,
bool write)
mutex_unlock(>mutex);
- pci_dbg(dw->pdev, "xData: time=%llu us, %s=%llu MB/s\n",
+ dev_dbg(dev, "xData: time=%llu us, %s=%llu MB/s\n",
diff, write ? "write" : "read", *rate);
}
@@ -233,7 +221,7 @@ static ssize_t write_store(struct device *dev, struct
device_attribute *attr,
struct miscdevice *misc_dev = dev_get_drvdata(dev);
struct dw_xdata *dw = misc_dev_to_dw(misc_dev);
- pci_dbg(dw->pdev, "xData: requested write transfer\n");
+ dev_dbg(dev, "xData: requested write transfer\n");
dw_xdata_start(dw, true);
@@ -260,7 +248,7 @@ static ssize_t read_store(struct device *dev, struct
device_attribute *attr,
struct miscdevice *misc_dev = dev_get_drvdata(dev);
struct dw_xdata *dw = misc_dev_to_dw(misc_dev);
- pci_dbg(dw->pdev, "xData: requested read transfer\n");
+ dev_dbg(dev, "xData: requested read transfer\n");
dw_xdata_start(dw, false);
@@ -275,7 +263,7 @@ static ssize_t stop_store(struct device *dev, struct
device_attribute *attr,
struct miscdevice *misc_dev = dev_get_drvdata(dev);
struct dw_xdata *dw = misc_dev_to_dw(misc_dev);
- pci_dbg(dw->pdev, "xData: requested stop any transfer\n");
+ dev_dbg(dev, "xData: requested stop any transfer\n");
dw_xdata_stop(dw);
@@ -296,43 +284,42 @@ ATTRIBUTE_GROUPS(xdata);
static int dw_xdata_pcie_probe(struct pci_dev *pdev,
const struct pci_device_id *pid)
{
- const struct dw_xdata_pcie_data *pdata = (void *)pid->driver_data;
+ struct device *dev = >dev;
struct dw_xdata *dw;
+ char name[24];
u64 addr;
int err;
+ int id;
/* Enable PCI device */
err = pcim_enable_device(pdev);
if (err) {
- pci_err(pdev, "enabling device failed\n");
+ dev_err(dev, "enabling device failed\n");
return err;
}
/* Mapping PCI BAR regions */
- err = pcim_iomap_regions(pdev, BIT(pdata->rg_bar), pci_name(pdev));
+ err = pcim_iomap_regions(pdev, BIT(BAR_0), pci_name(pdev));
if (err) {
- pci_err(pdev, "xData BAR I/O remapping failed\n");
+ d
[PATCH v8 1/5] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/Kconfig | 10 ++
drivers/misc/Makefile| 1 +
drivers/misc/dw-xdata-pcie.c | 401 +++
3 files changed, 412 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f532c59..e6af9ff 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -402,6 +402,16 @@ config SRAM
config SRAM_EXEC
bool
+config DW_XDATA_PCIE
+ depends on PCI
+ tristate "Synopsys DesignWare xData PCIe driver"
+ help
+ This driver allows controlling Synopsys DesignWare PCIe traffic
+ generator IP also known as xData, present in Synopsys DesignWare
+ PCIe Endpoint prototype.
+
+ If unsure, say N.
+
config PCI_ENDPOINT_TEST
depends on PCI
select CRC32
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 99b6f15..5411996 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-$(CONFIG_GENWQE) += genwqe/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_CXL_BASE) += cxl/
+obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o
obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-$(CONFIG_BCM_VK) += bcm-vk/
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..43fdd35
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,401 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+struct dw_xdata_pcie_data {
+ /* xData registers location */
+ enum pci_barno rg_bar;
+ off_t rg_off;
+ size_t rg_sz;
+};
+
+static const struct dw_xdata_pcie_data snps_edda_data = {
+ /* xData registers location */
+ .rg_bar = BAR_0,
+ .rg_off = 0x, /* 0 Kbytes */
+ .rg_sz = 0x012c, /* 300 bytes */
+};
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+ size_t sz; /* size */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+ struct device *dev;
+ struct miscdevice misc_dev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
[PATCH v8 3/5] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9e87692..36387b3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5099,6 +5099,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v8 2/5] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..fd75c93 --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/write + +Get write TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/write +- Output example: + 204 + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/read + +Get read TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/read +- Output example: + 199 + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/stop -- 2.7.4
[PATCH v8 0/5] misc: Add Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback - Replace module parameter by sysfs use. - Replace bit fields structure with macros and masks use. - Removed SET() and GET() macros by the writel() and readl(). - Removed some noisy info messages. V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback - Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback - Removed "default n" on Kconfig Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Added some explanatory comments for some steps - Added some bit defines instead of magic numbers V6: Rework driver according to Greg Kroah-Hartman' feedback - Squashed patches 2 and 3 - Removed units (MB/s) on the sys file - Reduced mutex scope on the functions called by sysfs Rework driver accordingly to Krzysztof Wilczy??ski' feedback - Fix typo "DesignWare" V7: Rework driver according to Greg Kroah-Hartman' feedback - Created a sub device (misc device) that will be associated with the PCI driver - sysfs group is now associated with the misc drivers instead of the PCI driver V8: Rework driver according to Greg Kroah-Hartman' feedback - Added more detail to the version changes on the cover letter - Squashed patches 1 and 2 - Removed struct device from the dw_xdata_pcie structure - Replaced the pci_*() use by dev_*() - Added free call for the misc driver name allocation - Added reference counting - Removed snps_edda_data structure and their usage Rebased patches on top of v5.12-rc4 version Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Gustavo Pimentel (5): misc: Add Synopsys DesignWare xData IP driver Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver FIX driver Documentation/ABI/testing/sysfs-driver-xdata | 46 +++ Documentation/misc-devices/dw-xdata-pcie.rst | 40 +++ MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 416 +++ 6 files changed, 520 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
RE: [PATCH v7 1/5] misc: Add Synopsys DesignWare xData IP driver
On Sun, Mar 28, 2021 at 13:49:13, Greg Kroah-Hartman
wrote:
> On Sat, Mar 27, 2021 at 04:06:51AM +0100, Gustavo Pimentel wrote:
> > Add Synopsys DesignWare xData IP driver. This driver enables/disables
> > the PCI traffic generator module pertain to the Synopsys DesignWare
> > prototype.
> >
> > Signed-off-by: Gustavo Pimentel
> > ---
> > drivers/misc/dw-xdata-pcie.c | 401
> > +++
> > 1 file changed, 401 insertions(+)
> > create mode 100644 drivers/misc/dw-xdata-pcie.c
> >
> > diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
> > new file mode 100644
> > index ..43fdd35
> > --- /dev/null
> > +++ b/drivers/misc/dw-xdata-pcie.c
> > @@ -0,0 +1,401 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
> > + * Synopsys DesignWare xData driver
> > + *
> > + * Author: Gustavo Pimentel
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
> > +
> > +#define DW_XDATA_EP_MEM_OFFSET 0x800
> > +
> > +struct dw_xdata_pcie_data {
> > + /* xData registers location */
> > + enum pci_barno rg_bar;
> > + off_t rg_off;
> > + size_t rg_sz;
> > +};
> > +
> > +static const struct dw_xdata_pcie_data snps_edda_data = {
> > + /* xData registers location */
> > + .rg_bar = BAR_0,
> > + .rg_off = 0x, /* 0 Kbytes */
> > + .rg_sz = 0x012c, /* 300 bytes */
> > +};
> > +
> > +#define STATUS_DONEBIT(0)
> > +
> > +#define CONTROL_DOORBELL BIT(0)
> > +#define CONTROL_IS_WRITE BIT(1)
> > +#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
> > +#define CONTROL_PATTERN_INCBIT(16)
> > +#define CONTROL_NO_ADDR_INCBIT(18)
> > +
> > +#define XPERF_CONTROL_ENABLE BIT(5)
> > +
> > +#define BURST_REPEAT BIT(31)
> > +#define BURST_VALUE0x1001
> > +
> > +#define PATTERN_VALUE 0x0
> > +
> > +struct dw_xdata_regs {
> > + u32 addr_lsb; /* 0x000 */
> > + u32 addr_msb; /* 0x004 */
> > + u32 burst_cnt; /* 0x008 */
> > + u32 control;/* 0x00c */
> > + u32 pattern;/* 0x010 */
> > + u32 status; /* 0x014 */
> > + u32 RAM_addr; /* 0x018 */
> > + u32 RAM_port; /* 0x01c */
> > + u32 _reserved0[14]; /* 0x020..0x054 */
> > + u32 perf_control; /* 0x058 */
> > + u32 _reserved1[41]; /* 0x05c..0x0fc */
> > + u32 wr_cnt_lsb; /* 0x100 */
> > + u32 wr_cnt_msb; /* 0x104 */
> > + u32 rd_cnt_lsb; /* 0x108 */
> > + u32 rd_cnt_msb; /* 0x10c */
> > +} __packed;
> > +
> > +struct dw_xdata_region {
> > + phys_addr_t paddr; /* physical address */
> > + void __iomem *vaddr;/* virtual address */
> > + size_t sz; /* size */
> > +};
> > +
> > +struct dw_xdata {
> > + struct dw_xdata_region rg_region; /* registers */
> > + size_t max_wr_len; /* max wr xfer len */
> > + size_t max_rd_len; /* max rd xfer len */
> > + struct mutex mutex;
> > + struct pci_dev *pdev;
> > + struct device *dev;
>
> You do not need this 'struct device' pointer at all, please don't store
> it as you are not handling any reference counting correctly.
Agreed.
>
> > + struct miscdevice misc_dev;
> > +};
> > +
> > +static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
> > +{
>
[PATCH v7 5/5] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 46 1 file changed, 46 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..cb3ab7e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,46 @@ +What: /sys/class/misc/drivers/dw-xdata-pcie/write +Date: April 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie/write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie/write +204 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie/read +Date: April 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie/read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/class/misc/dw-xdata-pcie/read +199 + + The file is read and write. + +What: /sys/class/misc/dw-xdata-pcie/stop +Date: April 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to disable the PCIe traffic generator in all + directions. + Usage e.g. +echo 1 > /sys/class/misc/dw-xdata-pcie/stop + + The file is write only. -- 2.7.4
[PATCH v7 4/5] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66..f9d681b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5061,6 +5061,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v7 1/5] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/dw-xdata-pcie.c | 401 +++
1 file changed, 401 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..43fdd35
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,401 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+struct dw_xdata_pcie_data {
+ /* xData registers location */
+ enum pci_barno rg_bar;
+ off_t rg_off;
+ size_t rg_sz;
+};
+
+static const struct dw_xdata_pcie_data snps_edda_data = {
+ /* xData registers location */
+ .rg_bar = BAR_0,
+ .rg_off = 0x, /* 0 Kbytes */
+ .rg_sz = 0x012c, /* 300 bytes */
+};
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+ size_t sz; /* size */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+ struct device *dev;
+ struct miscdevice misc_dev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
+{
+ return dw->rg_region.vaddr;
+}
+
+static void dw_xdata_stop(struct dw_xdata *dw)
+{
+ u32 burst;
+
+ mutex_lock(>mutex);
+
+ burst = readl(&(__dw_regs(dw)->burst_cnt));
+
+ if (burst & BURST_REPEAT) {
+ burst &= ~(u32)BURST_REPEAT;
+ writel(burst, &(__dw_regs(dw)->burst_cnt));
+ }
+
+ mutex_unlock(>mutex);
+}
+
+static void dw_xdata_start(struct dw_xdata *dw, bool write)
+{
+ u32 control, status;
+
+ /* Stop first if xfer in progress */
+ dw_xdata_stop(dw);
+
+ mutex_lock(>mutex);
+
+ /* Clear status register */
+ writel(0x0, &(__dw_regs(dw)->status));
+
+ /* Burst count register set for continuous until stopped */
+ writel(BURST_REPEAT | BURST_VALUE, &(__dw_regs(dw)->burst_cnt));
+
+ /* Pattern register */
+ writel(PATTERN_VALUE, &(__dw_regs(dw)->pattern));
+
+ /* Control register */
+ control = CONTROL_DOORBELL | CONTROL_PATTERN_INC | CONTROL_NO_ADDR_INC;
+ if (write) {
+ control |= CONTROL_IS_WRITE;
+ control |= CONTROL_LENGTH(dw->max_wr_len);
+ } else {
+ control
[PATCH v7 3/5] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..fd75c93 --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/write + +Get write TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/write +- Output example: + 204 + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/read + +Get read TLPs traffic link throughput in MB/s +- Command: +cat /sys/class/misc/dw-xdata-pcie/read +- Output example: + 199 + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/class/misc/dw-xdata-pcie/stop -- 2.7.4
[PATCH v7 0/5] misc: Add Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback Rework driver accordingly to Krzysztof Wilczy??ski' feedback V6: Rework driver according to Greg Kroah-Hartman' feedback Rework driver accordingly to Krzysztof Wilczy??ski' feedback Rework driver accordingly to Leon Romanovsky' feedback V7: Rework driver according to Greg Kroah-Hartman' feedback Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Gustavo Pimentel (5): misc: Add Synopsys DesignWare xData IP driver misc: Add Synopsys DesignWare xData IP driver to Makefile and Kconfig Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Documentation/ABI/testing/sysfs-driver-xdata | 46 +++ Documentation/misc-devices/dw-xdata-pcie.rst | 40 +++ MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 401 +++ 6 files changed, 505 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
[PATCH v7 2/5] misc: Add Synopsys DesignWare xData IP driver to Makefile and Kconfig
Add Synopsys DesignWare xData IP driver to Makefile and Kconfig. This driver enables/disables the PCIe traffic generator module pertain to the Synopsys DesignWare prototype. Signed-off-by: Gustavo Pimentel --- drivers/misc/Kconfig | 10 ++ drivers/misc/Makefile | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index fafa8b0..e42b171 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -423,6 +423,16 @@ config SRAM config SRAM_EXEC bool +config DW_XDATA_PCIE + depends on PCI + tristate "Synopsys DesignWare xData PCIe driver" + help + This driver allows controlling Synopsys DesignWare PCIe traffic + generator IP also known as xData, present in Synopsys DesignWare + PCIe Endpoint prototype. + + If unsure, say N. + config PCI_ENDPOINT_TEST depends on PCI select CRC32 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d23231e..bf22021 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o obj-$(CONFIG_GENWQE) += genwqe/ obj-$(CONFIG_ECHO) += echo/ obj-$(CONFIG_CXL_BASE) += cxl/ +obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ -- 2.7.4
RE: [PATCH v6 1/5] misc: Add Synopsys DesignWare xData IP driver
Hi Greg,
On Tue, Mar 23, 2021 at 13:0:4, Greg Kroah-Hartman
wrote:
> On Fri, Feb 12, 2021 at 06:28:03PM +0100, Gustavo Pimentel wrote:
> > +static const struct attribute_group xdata_attr_group = {
> > + .attrs = default_attrs,
> > + .name = DW_XDATA_DRIVER_NAME,
> > +};
>
> ATTRIBUTE_GROUPS()?
Nicely catched!
>
> > +static int dw_xdata_pcie_probe(struct pci_dev *pdev,
> > + const struct pci_device_id *pid)
> > +{
> > + const struct dw_xdata_pcie_data *pdata = (void *)pid->driver_data;
> > + struct dw_xdata *dw;
> > + u64 addr;
> > + int err;
> > +
> > + /* Enable PCI device */
> > + err = pcim_enable_device(pdev);
> > + if (err) {
> > + pci_err(pdev, "enabling device failed\n");
> > + return err;
> > + }
> > +
> > + /* Mapping PCI BAR regions */
> > + err = pcim_iomap_regions(pdev, BIT(pdata->rg_bar), pci_name(pdev));
> > + if (err) {
> > + pci_err(pdev, "xData BAR I/O remapping failed\n");
> > + return err;
> > + }
> > +
> > + pci_set_master(pdev);
> > +
> > + /* Allocate memory */
> > + dw = devm_kzalloc(>dev, sizeof(*dw), GFP_KERNEL);
> > + if (!dw)
> > + return -ENOMEM;
> > +
> > + /* Data structure initialization */
> > + mutex_init(>mutex);
> > +
> > + dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar];
> > + if (!dw->rg_region.vaddr)
> > + return -ENOMEM;
> > +
> > + dw->rg_region.vaddr += pdata->rg_off;
> > + dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start;
> > + dw->rg_region.paddr += pdata->rg_off;
> > + dw->rg_region.sz = pdata->rg_sz;
> > +
> > + dw->max_wr_len = pcie_get_mps(pdev);
> > + dw->max_wr_len >>= 2;
> > +
> > + dw->max_rd_len = pcie_get_readrq(pdev);
> > + dw->max_rd_len >>= 2;
> > +
> > + dw->pdev = pdev;
> > +
> > + writel(0x0, &(__dw_regs(dw)->RAM_addr));
> > + writel(0x0, &(__dw_regs(dw)->RAM_port));
> > +
> > + addr = dw->rg_region.paddr + DW_XDATA_EP_MEM_OFFSET;
> > + writel(lower_32_bits(addr), &(__dw_regs(dw)->addr_lsb));
> > + writel(upper_32_bits(addr), &(__dw_regs(dw)->addr_msb));
> > + pci_dbg(pdev, "xData: target address = 0x%.16llx\n", addr);
> > +
> > + pci_dbg(pdev, "xData: wr_len=%zu, rd_len=%zu\n",
> > + dw->max_wr_len * 4, dw->max_rd_len * 4);
> > +
> > + /* Saving data structure reference */
> > + pci_set_drvdata(pdev, dw);
> > +
> > + /* Sysfs */
> > + err = sysfs_create_group(>dev.kobj, _attr_group);
>
> You just raced with userspace and lost :(
>
> Have the driver core properly create/remove your sysfs files, set the
> default groups pointer in your driver and all will be fine.
I've gone around and around, searched in other drivers, but I'm not
understanding your PoV or what I should do. Can you throw me a bone here?
I'm starting to pull my hair off, lol
I would like to ask you about something, it's you the maintainer of misc
drivers right?
After fixing this issue, does this driver have a chance to be pulled on
5.13?
-Gustavo
>
> thanks,
>
> greg k-h
RE: [PATCH v7 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC
On Thu, Feb 18, 2021 at 19:27:30, Bjorn Helgaas
wrote:
> On Thu, Feb 18, 2021 at 08:03:58PM +0100, Gustavo Pimentel wrote:
> > Add pci_find_vsec_capability() to locate a Vendor-Specific Extended
> > Capability with the specified VSEC ID.
> >
> > The Vendor-Specific Extended Capability (VSEC) allows one or more
> > proprietary capabilities defined by the vendor which aren't standard
> > or shared between vendors.
> >
> > Signed-off-by: Gustavo Pimentel
>
> Beautiful, thanks!
>
> Acked-by: Bjorn Helgaas
>
> > ---
> > drivers/pci/pci.c | 30 ++
> > include/linux/pci.h | 1 +
> > 2 files changed, 31 insertions(+)
> >
> > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> > index b9fecc2..aef217c 100644
> > --- a/drivers/pci/pci.c
> > +++ b/drivers/pci/pci.c
> > @@ -693,6 +693,36 @@ u8 pci_find_ht_capability(struct pci_dev *dev, int
> > ht_cap)
> > EXPORT_SYMBOL_GPL(pci_find_ht_capability);
> >
> > /**
> > + * pci_find_vsec_capability - Find a vendor-specific extended capability
> > + * @dev: PCI device to query
> > + * @vendor: Vendor ID for which capability is defined
> > + * @cap: Vendor-specific capability ID
> > + *
> > + * If @dev has Vendor ID @vendor, search for a VSEC capability with
> > + * VSEC ID @cap. If found, return the capability offset in
> > + * config space; otherwise return 0.
> > + */
> > +u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap)
> > +{
> > + u16 vsec = 0;
> > + u32 header;
> > +
> > + if (vendor != dev->vendor)
> > + return 0;
> > +
> > + while ((vsec = pci_find_next_ext_capability(dev, vsec,
> > +PCI_EXT_CAP_ID_VNDR))) {
> > + if (pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER,
> > + ) == PCIBIOS_SUCCESSFUL &&
> > + PCI_VNDR_HEADER_ID(header) == cap)
> > + return vsec;
> > + }
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL_GPL(pci_find_vsec_capability);
> > +
> > +/**
> > * pci_find_parent_resource - return resource region of parent bus of given
> > * region
> > * @dev: PCI device structure contains resources to be searched
> > diff --git a/include/linux/pci.h b/include/linux/pci.h
> > index b32126d..814f814 100644
> > --- a/include/linux/pci.h
> > +++ b/include/linux/pci.h
> > @@ -1077,6 +1077,7 @@ u8 pci_find_next_ht_capability(struct pci_dev *dev,
> > u8 pos, int ht_cap);
> > u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
> > u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
> > struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
> > +u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap);
>
> If you do any updates for other reasons, slide this up one more line
> so we have:
>
> u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
> u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
> u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap);
>
> struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
>
> I don't know why pci_find_next_bus() got stuck with the capability
> things. It doesn't have anything to do with finding capabilities. It
> goes more with pci_get_device(), etc.
>
> But don't roll the series just for that.
Thanks, Bjorn.
I can those arrangements if some request comes along.
I can also move the pci_find_next_bus() next to the pci_get_device() if
you like.
-Gustavo
>
> > u64 pci_get_dsn(struct pci_dev *dev);
> >
> > --
> > 2.7.4
> >
[PATCH v7 02/15] dmaengine: dw-edma: Fix comments offset characters' alignment
Fix comments offset characters' alignment to follow the same structure
of similar comments.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-regs.h | 214 +-
1 file changed, 107 insertions(+), 107 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-regs.h
b/drivers/dma/dw-edma/dw-edma-v0-regs.h
index d07151d..e175f7b 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-regs.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-regs.h
@@ -25,177 +25,177 @@
#define EDMA_V0_CH_EVEN_MSI_DATA_MASK GENMASK(15, 0)
struct dw_edma_v0_ch_regs {
- u32 ch_control1;/* 0x000 */
- u32 ch_control2;/* 0x004 */
- u32 transfer_size; /* 0x008 */
+ u32 ch_control1;/* 0x */
+ u32 ch_control2;/* 0x0004 */
+ u32 transfer_size; /* 0x0008 */
union {
- u64 reg;/* 0x00c..0x010 */
+ u64 reg;/* 0x000c..0x0010 */
struct {
- u32 lsb;/* 0x00c */
- u32 msb;/* 0x010 */
+ u32 lsb;/* 0x000c */
+ u32 msb;/* 0x0010 */
};
} sar;
union {
- u64 reg;/* 0x014..0x018 */
+ u64 reg;/* 0x0014..0x0018 */
struct {
- u32 lsb;/* 0x014 */
- u32 msb;/* 0x018 */
+ u32 lsb;/* 0x0014 */
+ u32 msb;/* 0x0018 */
};
} dar;
union {
- u64 reg;/* 0x01c..0x020 */
+ u64 reg;/* 0x001c..0x0020 */
struct {
- u32 lsb;/* 0x01c */
- u32 msb;/* 0x020 */
+ u32 lsb;/* 0x001c */
+ u32 msb;/* 0x0020 */
};
} llp;
} __packed;
struct dw_edma_v0_ch {
- struct dw_edma_v0_ch_regs wr; /* 0x200 */
- u32 padding_1[55]; /* [0x224..0x2fc] */
- struct dw_edma_v0_ch_regs rd; /* 0x300 */
- u32 padding_2[55]; /* [0x324..0x3fc] */
+ struct dw_edma_v0_ch_regs wr; /* 0x0200 */
+ u32 padding_1[55]; /* 0x0224..0x02fc */
+ struct dw_edma_v0_ch_regs rd; /* 0x0300 */
+ u32 padding_2[55]; /* 0x0324..0x03fc */
} __packed;
struct dw_edma_v0_unroll {
- u32 padding_1; /* 0x0f8 */
- u32 wr_engine_chgroup; /* 0x100 */
- u32 rd_engine_chgroup; /* 0x104 */
+ u32 padding_1; /* 0x00f8 */
+ u32 wr_engine_chgroup; /* 0x0100 */
+ u32 rd_engine_chgroup; /* 0x0104 */
union {
- u64 reg;/* 0x108..0x10c */
+ u64 reg;/* 0x0108..0x010c */
struct {
- u32 lsb;/* 0x108 */
- u32 msb;/* 0x10c */
+ u32 lsb;/* 0x0108 */
+ u32 msb;/* 0x010c */
};
} wr_engine_hshake_cnt;
- u32 padding_2[2]; /* [0x110..0x114] */
+ u32 padding_2[2]; /* 0x0110..0x0114 */
union {
- u64 reg;/* 0x120..0x124 */
+ u64 reg;/* 0x0120..0x0124 */
struct {
- u32 lsb;/* 0x120 */
- u32 msb;/* 0x124 */
+ u32 lsb;/* 0x0120 */
+ u32 msb;/* 0x0124 */
};
} rd_engine_hshake_cnt;
- u32 padding_3[2]; /* [0x120..0x124] */
- u32 wr_ch0_pwr_en; /* 0x128 */
- u32 wr_ch1_pwr_en; /* 0x12c
[PATCH v7 07/15] dmaengine: dw-edma: Improve number of channels check
It was added some extra checks to ensure that the driver doesn't try to
use more DMA channels than actually are available in hardware.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 21 +
drivers/dma/dw-edma/dw-edma-core.h | 2 ++
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 1227a3e..cc39107 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -914,19 +914,16 @@ int dw_edma_probe(struct dw_edma_chip *chip)
raw_spin_lock_init(>lock);
- if (!dw->wr_ch_cnt) {
- /* Find out how many write channels are supported by hardware */
- dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
- if (!dw->wr_ch_cnt)
- return -EINVAL;
- }
+ dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt,
+ dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE));
+ dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH);
- if (!dw->rd_ch_cnt) {
- /* Find out how many read channels are supported by hardware */
- dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
- if (!dw->rd_ch_cnt)
- return -EINVAL;
- }
+ dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt,
+ dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ));
+ dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH);
+
+ if (!dw->wr_ch_cnt && !dw->rd_ch_cnt)
+ return -EINVAL;
dev_vdbg(dev, "Channels:\twrite=%d, read=%d\n",
dw->wr_ch_cnt, dw->rd_ch_cnt);
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index f72ebaa..650b1c7 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -15,6 +15,8 @@
#include "../virt-dma.h"
#define EDMA_LL_SZ 24
+#define EDMA_MAX_WR_CH 8
+#define EDMA_MAX_RD_CH 8
enum dw_edma_dir {
EDMA_DIR_WRITE = 0,
--
2.7.4
[PATCH v7 00/15] dmaengine: dw-edma: HDMA support
This patch series adds the HDMA support, as long the IP design has set the compatible register map parameter, which allows compatibility at some degree for the existing Synopsys DesignWare eDMA driver that is already available on the Kernel. The HDMA "Hyper-DMA" IP is an enhancement of the eDMA "embedded-DMA" IP. This new improvement comes with a PCI DVSEC that allows to the driver recognize and switch behavior if it's an eDMA or an HDMA, becoming retrocompatible, in the absence of this DVSEC, the driver will assume that is an eDMA IP. It also adds the interleaved support, since it will be similar to the current scatter-gather implementation. As well fixes/improves some abnormal behaviors not detected before, such as: - crash on loading/unloading driver - memory space definition for the data area and for the linked list space - scatter-gather address calculation on 32 bits platforms - minor comment and variable reordering Changes: V2: Applied changes based on Bjorn Helgaas' review Rebased patches on top of v5.11-rc1 version V3: Applied changes based on Lukas Wunner' review V4: Fix a typo detected by kernel test robot V5: Rework driver accordingly to Bjorn Helgaas's feedback V6: Rework driver accordingly to Krzysztof Wilczy??ski's feedback V7: Rework driver accordingly to Bjorn Helgaas's feedback Rebased patches on top of Bjorn Helgaas next branch due to the support of PCI_VNDR_* defines Cc: dmaeng...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Vinod Koul Cc: Dan Williams Cc: Bjorn Helgaas Cc: Krzysztof Wilczy??ski Cc: Lukas Wunner Gustavo Pimentel (15): dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures dmaengine: dw-edma: Fix comments offset characters' alignment dmaengine: dw-edma: Add support for the HDMA feature PCI: Add pci_find_vsec_capability() to find a specific VSEC dmaengine: dw-edma: Add PCIe VSEC data retrieval support dmaengine: dw-edma: Add device_prep_interleave_dma() support dmaengine: dw-edma: Improve number of channels check dmaengine: dw-edma: Reorder variables to keep consistency dmaengine: dw-edma: Improve the linked list and data blocks definition dmaengine: dw-edma: Change linked list and data blocks offset and sizes dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct dmaengine: dw-edma: Fix crash on loading/unloading driver dmaengine: dw-edma: Change DMA abreviation from lower into upper case dmaengine: dw-edma: Revert fix scatter-gather address calculation dmaengine: dw-edma: Add pcim_iomap_table return check drivers/dma/dw-edma/dw-edma-core.c | 178 +++--- drivers/dma/dw-edma/dw-edma-core.h | 37 ++-- drivers/dma/dw-edma/dw-edma-pcie.c | 277 +--- drivers/dma/dw-edma/dw-edma-v0-core.c| 300 --- drivers/dma/dw-edma/dw-edma-v0-core.h| 2 +- drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 77 drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 4 +- drivers/dma/dw-edma/dw-edma-v0-regs.h| 291 +++--- drivers/pci/pci.c| 30 include/linux/pci.h | 1 + 10 files changed, 842 insertions(+), 355 deletions(-) -- 2.7.4
[PATCH v7 11/15] dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct
Move struct dentry variable from static definition (dw-edma-v0-debugfs.c)
into dw_edma struct (dw-edma-core.h)
Also the variable was renamed from base_dir to debugfs.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 2 +-
drivers/dma/dw-edma/dw-edma-core.h | 3 +++
drivers/dma/dw-edma/dw-edma-v0-core.c| 4 ++--
drivers/dma/dw-edma/dw-edma-v0-core.h| 2 +-
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 22 +-
drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 4 ++--
6 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 552b5f9..bc94c8d 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -1003,7 +1003,7 @@ int dw_edma_remove(struct dw_edma_chip *chip)
dma_async_device_unregister(>rd_edma);
/* Turn debugfs off */
- dw_edma_v0_core_debugfs_off();
+ dw_edma_v0_core_debugfs_off(chip);
return 0;
}
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index cba5436..60316d4 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -137,6 +137,9 @@ struct dw_edma {
const struct dw_edma_core_ops *ops;
raw_spinlock_t lock; /* Only for legacy */
+#ifdef CONFIG_DEBUG_FS
+ struct dentry *debugfs;
+#endif /* CONFIG_DEBUG_FS */
};
struct dw_edma_sg {
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 5b0541a..329fc2e 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -506,7 +506,7 @@ void dw_edma_v0_core_debugfs_on(struct dw_edma_chip *chip)
dw_edma_v0_debugfs_on(chip);
}
-void dw_edma_v0_core_debugfs_off(void)
+void dw_edma_v0_core_debugfs_off(struct dw_edma_chip *chip)
{
- dw_edma_v0_debugfs_off();
+ dw_edma_v0_debugfs_off(chip);
}
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.h
b/drivers/dma/dw-edma/dw-edma-v0-core.h
index abae152..2afa626 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.h
@@ -23,6 +23,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool
first);
int dw_edma_v0_core_device_config(struct dw_edma_chan *chan);
/* eDMA debug fs callbacks */
void dw_edma_v0_core_debugfs_on(struct dw_edma_chip *chip);
-void dw_edma_v0_core_debugfs_off(void);
+void dw_edma_v0_core_debugfs_off(struct dw_edma_chip *chip);
#endif /* _DW_EDMA_V0_CORE_H */
diff --git a/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
b/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
index 157dfc2..4b3bcff 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
@@ -38,7 +38,6 @@
#define CHANNEL_STR"channel"
#define REGISTERS_STR "registers"
-static struct dentry *base_dir;
static struct dw_edma *dw;
static struct dw_edma_v0_regs __iomem *regs;
@@ -272,7 +271,7 @@ static void dw_edma_debugfs_regs(void)
struct dentry *regs_dir;
int nr_entries;
- regs_dir = debugfs_create_dir(REGISTERS_STR, base_dir);
+ regs_dir = debugfs_create_dir(REGISTERS_STR, dw->debugfs);
if (!regs_dir)
return;
@@ -293,18 +292,23 @@ void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip)
if (!regs)
return;
- base_dir = debugfs_create_dir(dw->name, NULL);
- if (!base_dir)
+ dw->debugfs = debugfs_create_dir(dw->name, NULL);
+ if (!dw->debugfs)
return;
- debugfs_create_u32("mf", 0444, base_dir, >mf);
- debugfs_create_u16("wr_ch_cnt", 0444, base_dir, >wr_ch_cnt);
- debugfs_create_u16("rd_ch_cnt", 0444, base_dir, >rd_ch_cnt);
+ debugfs_create_u32("mf", 0444, dw->debugfs, >mf);
+ debugfs_create_u16("wr_ch_cnt", 0444, dw->debugfs, >wr_ch_cnt);
+ debugfs_create_u16("rd_ch_cnt", 0444, dw->debugfs, >rd_ch_cnt);
dw_edma_debugfs_regs();
}
-void dw_edma_v0_debugfs_off(void)
+void dw_edma_v0_debugfs_off(struct dw_edma_chip *chip)
{
- debugfs_remove_recursive(base_dir);
+ dw = chip->dw;
+ if (!dw)
+ return;
+
+ debugfs_remove_recursive(dw->debugfs);
+ dw->debugfs = NULL;
}
diff --git a/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
b/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
index 5450a0a..d0ff25a 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
@@ -13,13 +13,13 @@
#ifdef CONFIG_DEBUG_FS
void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip);
-void dw_edma_v0_debugfs_off(void);
+void dw_edma_
[PATCH v7 03/15] dmaengine: dw-edma: Add support for the HDMA feature
Add support for the HDMA feature.
This new feature enables the current eDMA IP to use a deeper prefetch
of the linked list, which reduces the algorithm execution latency
observed when loading the elements of the list, causing more stable
and higher data transfer.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.h | 10
drivers/dma/dw-edma/dw-edma-pcie.c | 23 -
drivers/dma/dw-edma/dw-edma-v0-core.c| 42 +---
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 9 +++
4 files changed, 60 insertions(+), 24 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index 31fc50d..3f9593e 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -21,9 +21,10 @@ enum dw_edma_dir {
EDMA_DIR_READ
};
-enum dw_edma_mode {
- EDMA_MODE_LEGACY = 0,
- EDMA_MODE_UNROLL
+enum dw_edma_map_format {
+ EDMA_MF_EDMA_LEGACY = 0x0,
+ EDMA_MF_EDMA_UNROLL = 0x1,
+ EDMA_MF_HDMA_COMPAT = 0x5
};
enum dw_edma_request {
@@ -123,8 +124,7 @@ struct dw_edma {
struct dw_edma_irq *irq;
int nr_irqs;
- u32 version;
- enum dw_edma_mode mode;
+ enum dw_edma_map_format mf;
struct dw_edma_chan *chan;
const struct dw_edma_core_ops *ops;
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 1eafc60..c130549 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -30,8 +30,7 @@ struct dw_edma_pcie_data {
off_t dt_off;
size_t dt_sz;
/* Other */
- u32 version;
- enum dw_edma_mode mode;
+ enum dw_edma_map_format mf;
u8 irqs;
};
@@ -49,8 +48,7 @@ static const struct dw_edma_pcie_data snps_edda_data = {
.dt_off = 0x0080, /* 8 Mbytes */
.dt_sz = 0x0380, /* 56 Mbytes */
/* Other */
- .version= 0,
- .mode = EDMA_MODE_UNROLL,
+ .mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
};
@@ -69,8 +67,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
const struct dw_edma_pcie_data *pdata = (void *)pid->driver_data;
struct device *dev = >dev;
struct dw_edma_chip *chip;
- int err, nr_irqs;
struct dw_edma *dw;
+ int err, nr_irqs;
/* Enable PCI device */
err = pcim_enable_device(pdev);
@@ -157,16 +155,19 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->dt_region.paddr += pdata->dt_off;
dw->dt_region.sz = pdata->dt_sz;
- dw->version = pdata->version;
- dw->mode = pdata->mode;
+ dw->mf = pdata->mf;
dw->nr_irqs = nr_irqs;
dw->ops = _edma_pcie_core_ops;
/* Debug info */
- pci_dbg(pdev, "Version:\t%u\n", dw->version);
-
- pci_dbg(pdev, "Mode:\t%s\n",
- dw->mode == EDMA_MODE_LEGACY ? "Legacy" : "Unroll");
+ if (dw->mf == EDMA_MF_EDMA_LEGACY)
+ pci_dbg(pdev, "Version:\teDMA Port Logic (0x%x)\n", dw->mf);
+ else if (dw->mf == EDMA_MF_EDMA_UNROLL)
+ pci_dbg(pdev, "Version:\teDMA Unroll (0x%x)\n", dw->mf);
+ else if (dw->mf == EDMA_MF_HDMA_COMPAT)
+ pci_dbg(pdev, "Version:\tHDMA Compatible (0x%x)\n", dw->mf);
+ else
+ pci_dbg(pdev, "Version:\tUnknown (0x%x)\n", dw->mf);
pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes,
addr(v=%p, p=%pa)\n",
pdata->rg_bar, pdata->rg_off, pdata->rg_sz,
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 7888eda..5b0541a 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -96,7 +96,7 @@ static inline struct dw_edma_v0_regs __iomem
*__dw_regs(struct dw_edma *dw)
static inline struct dw_edma_v0_ch_regs __iomem *
__dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch)
{
- if (dw->mode == EDMA_MODE_LEGACY)
+ if (dw->mf == EDMA_MF_EDMA_LEGACY)
return &(__dw_regs(dw)->type.legacy.ch);
if (dir == EDMA_DIR_WRITE)
@@ -108,7 +108,7 @@ __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16
ch)
static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
u32 value, void __iomem *addr)
{
-
[PATCH v7 06/15] dmaengine: dw-edma: Add device_prep_interleave_dma() support
Add device_prep_interleave_dma() support to Synopsys DMA driver.
This feature implements a similar data transfer mechanism to the
scatter-gather implementation.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 85 ++
drivers/dma/dw-edma/dw-edma-core.h | 13 --
2 files changed, 78 insertions(+), 20 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 18a2878..1227a3e 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -329,7 +329,7 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
struct dw_edma_chunk *chunk;
struct dw_edma_burst *burst;
struct dw_edma_desc *desc;
- u32 cnt;
+ u32 cnt = 0;
int i;
if (!chan->configured)
@@ -352,12 +352,19 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
return NULL;
}
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
if (!xfer->xfer.cyclic.len || !xfer->xfer.cyclic.cnt)
return NULL;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
if (xfer->xfer.sg.len < 1)
return NULL;
+ } else if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ if (!xfer->xfer.il->numf)
+ return NULL;
+ if (xfer->xfer.il->numf > 0 && xfer->xfer.il->frame_size > 0)
+ return NULL;
+ } else {
+ return NULL;
}
desc = dw_edma_alloc_desc(chan);
@@ -368,18 +375,28 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (unlikely(!chunk))
goto err_alloc;
- src_addr = chan->config.src_addr;
- dst_addr = chan->config.dst_addr;
+ if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ src_addr = xfer->xfer.il->src_start;
+ dst_addr = xfer->xfer.il->dst_start;
+ } else {
+ src_addr = chan->config.src_addr;
+ dst_addr = chan->config.dst_addr;
+ }
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
cnt = xfer->xfer.cyclic.cnt;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
cnt = xfer->xfer.sg.len;
sg = xfer->xfer.sg.sgl;
+ } else if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ if (xfer->xfer.il->numf > 0)
+ cnt = xfer->xfer.il->numf;
+ else
+ cnt = xfer->xfer.il->frame_size;
}
for (i = 0; i < cnt; i++) {
- if (!xfer->cyclic && !sg)
+ if (xfer->type == EDMA_XFER_SCATTER_GATHER && !sg)
break;
if (chunk->bursts_alloc == chan->ll_max) {
@@ -392,19 +409,21 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (unlikely(!burst))
goto err_alloc;
- if (xfer->cyclic)
+ if (xfer->type == EDMA_XFER_CYCLIC)
burst->sz = xfer->xfer.cyclic.len;
- else
+ else if (xfer->type == EDMA_XFER_SCATTER_GATHER)
burst->sz = sg_dma_len(sg);
+ else if (xfer->type == EDMA_XFER_INTERLEAVED)
+ burst->sz = xfer->xfer.il->sgl[i].size;
chunk->ll_region.sz += burst->sz;
desc->alloc_sz += burst->sz;
if (chan->dir == EDMA_DIR_WRITE) {
burst->sar = src_addr;
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
burst->dar = xfer->xfer.cyclic.paddr;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
burst->dar = dst_addr;
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
@@ -416,9 +435,9 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
}
} else {
burst->dar = dst_addr;
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
burst->sar = xfer->xfer.cyclic.paddr;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
burst->sar = src_addr;
/* Unlike the typic
[PATCH v7 05/15] dmaengine: dw-edma: Add PCIe VSEC data retrieval support
The latest eDMA IP development implements a Vendor-Specific Extended
Capability that contains the eDMA BAR, offset, map format, and the
number of read/write channels available.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 20 ---
drivers/dma/dw-edma/dw-edma-pcie.c | 116 -
2 files changed, 101 insertions(+), 35 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 08d71da..18a2878 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -863,15 +863,19 @@ int dw_edma_probe(struct dw_edma_chip *chip)
raw_spin_lock_init(>lock);
- /* Find out how many write channels are supported by hardware */
- dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
- if (!dw->wr_ch_cnt)
- return -EINVAL;
+ if (!dw->wr_ch_cnt) {
+ /* Find out how many write channels are supported by hardware */
+ dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
+ if (!dw->wr_ch_cnt)
+ return -EINVAL;
+ }
- /* Find out how many read channels are supported by hardware */
- dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
- if (!dw->rd_ch_cnt)
- return -EINVAL;
+ if (!dw->rd_ch_cnt) {
+ /* Find out how many read channels are supported by hardware */
+ dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
+ if (!dw->rd_ch_cnt)
+ return -EINVAL;
+ }
dev_vdbg(dev, "Channels:\twrite=%d, read=%d\n",
dw->wr_ch_cnt, dw->rd_ch_cnt);
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index c130549..eb6f8b3 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -13,9 +13,16 @@
#include
#include
#include
+#include
#include "dw-edma-core.h"
+#define DW_PCIE_VSEC_DMA_ID0x6
+#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
+#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
+#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+
struct dw_edma_pcie_data {
/* eDMA registers location */
enum pci_barno rg_bar;
@@ -32,6 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
+ u16 rd_ch_cnt;
+ u16 wr_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -50,6 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
+ .rd_ch_cnt = 0,
+ .wr_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -61,10 +72,51 @@ static const struct dw_edma_core_ops dw_edma_pcie_core_ops
= {
.irq_vector = dw_edma_pcie_irq_vector,
};
+static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev *pdev,
+ struct dw_edma_pcie_data *pdata)
+{
+ u32 val, map;
+ u16 vsec;
+ u64 off;
+
+ vsec = pci_find_vsec_capability(pdev, PCI_VENDOR_ID_SYNOPSYS,
+ DW_PCIE_VSEC_DMA_ID);
+ if (!vsec)
+ return;
+
+ pci_read_config_dword(pdev, vsec + PCI_VNDR_HEADER, );
+ if (PCI_VNDR_HEADER_REV(val) != 0x00 ||
+ PCI_VNDR_HEADER_LEN(val) != 0x18)
+ return;
+
+ pci_dbg(pdev, "Detected PCIe Vendor-Specific Extended Capability
DMA\n");
+ pci_read_config_dword(pdev, vsec + 0x8, );
+ map = FIELD_GET(DW_PCIE_VSEC_DMA_MAP, val);
+ if (map != EDMA_MF_EDMA_LEGACY &&
+ map != EDMA_MF_EDMA_UNROLL &&
+ map != EDMA_MF_HDMA_COMPAT)
+ return;
+
+ pdata->mf = map;
+ pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
+
+ pci_read_config_dword(pdev, vsec + 0xc, );
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
+ pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+
+ pci_read_config_dword(pdev, vsec + 0x14, );
+ off = val;
+ pci_read_config_dword(pdev, vsec + 0x10, );
+ off <<= 32;
+ off |= val;
+ pdata->rg_off = off;
+}
+
static int dw_edma_pcie_probe(struct pci_dev *pdev,
const struct pci_device_id *pid)
{
- const struct dw_edma_pcie_data *pdata = (void *)pid->driver_data;
+ struct dw
[PATCH v7 09/15] dmaengine: dw-edma: Improve the linked list and data blocks definition
In the previous implementation, the driver assumed that there existed
only two memory spaces that would equally distribute the amount of
read/write channels.
This might not be the case on some other implementations, therefore this
patch change this requirement so that each write/read channel has
its own linked list and data space well defined, which allows
different sizes and locations.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 51 +-
drivers/dma/dw-edma/dw-edma-core.h | 9 +-
drivers/dma/dw-edma/dw-edma-pcie.c | 185 ++---
3 files changed, 160 insertions(+), 85 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index cc39107..552b5f9 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -81,8 +81,13 @@ static struct dw_edma_chunk *dw_edma_alloc_chunk(struct
dw_edma_desc *desc)
* - Even chunks originate CB equal to 1
*/
chunk->cb = !(desc->chunks_alloc % 2);
- chunk->ll_region.paddr = dw->ll_region.paddr + chan->ll_off;
- chunk->ll_region.vaddr = dw->ll_region.vaddr + chan->ll_off;
+ if (chan->dir == EDMA_DIR_WRITE) {
+ chunk->ll_region.paddr = dw->ll_region_wr[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_wr[chan->id].vaddr;
+ } else {
+ chunk->ll_region.paddr = dw->ll_region_rd[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_rd[chan->id].vaddr;
+ }
if (desc->chunk) {
/* Create and add new element into the linked list */
@@ -691,24 +696,13 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
struct device *dev = chip->dev;
struct dw_edma *dw = chip->dw;
struct dw_edma_chan *chan;
- size_t ll_chunk, dt_chunk;
struct dw_edma_irq *irq;
struct dma_device *dma;
- u32 i, j, cnt, ch_cnt;
u32 alloc, off_alloc;
+ u32 i, j, cnt;
int err = 0;
u32 pos;
- ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
- ll_chunk = dw->ll_region.sz;
- dt_chunk = dw->dt_region.sz;
-
- /* Calculate linked list chunk for each channel */
- ll_chunk /= roundup_pow_of_two(ch_cnt);
-
- /* Calculate linked list chunk for each channel */
- dt_chunk /= roundup_pow_of_two(ch_cnt);
-
if (write) {
i = 0;
cnt = dw->wr_ch_cnt;
@@ -740,14 +734,14 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->request = EDMA_REQ_NONE;
chan->status = EDMA_ST_IDLE;
- chan->ll_off = (ll_chunk * i);
- chan->ll_max = (ll_chunk / EDMA_LL_SZ) - 1;
-
- chan->dt_off = (dt_chunk * i);
+ if (write)
+ chan->ll_max = (dw->ll_region_wr[j].sz / EDMA_LL_SZ);
+ else
+ chan->ll_max = (dw->ll_region_rd[j].sz / EDMA_LL_SZ);
+ chan->ll_max -= 1;
- dev_vdbg(dev, "L. List:\tChannel %s[%u] off=0x%.8lx,
max_cnt=%u\n",
-write ? "write" : "read", j,
-chan->ll_off, chan->ll_max);
+ dev_vdbg(dev, "L. List:\tChannel %s[%u] max_cnt=%u\n",
+write ? "write" : "read", j, chan->ll_max);
if (dw->nr_irqs == 1)
pos = 0;
@@ -772,12 +766,15 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->vc.desc_free = vchan_free_desc;
vchan_init(>vc, dma);
- dt_region->paddr = dw->dt_region.paddr + chan->dt_off;
- dt_region->vaddr = dw->dt_region.vaddr + chan->dt_off;
- dt_region->sz = dt_chunk;
-
- dev_vdbg(dev, "Data:\tChannel %s[%u] off=0x%.8lx\n",
-write ? "write" : "read", j, chan->dt_off);
+ if (write) {
+ dt_region->paddr = dw->dt_region_wr[j].paddr;
+ dt_region->vaddr = dw->dt_region_wr[j].vaddr;
+ dt_region->sz = dw->dt_region_wr[j].sz;
+ } else {
+ dt_region->paddr = dw->dt_region_rd[j].paddr;
+ dt_region->vaddr = dw->dt_region_rd[j].vaddr;
+ dt_region->sz = dw->dt_region_rd[j].sz;
+ }
dw_edma_v0_core_device_config(chan);
}
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index 650b1c7..cba
[PATCH v7 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC
Add pci_find_vsec_capability() to locate a Vendor-Specific Extended
Capability with the specified VSEC ID.
The Vendor-Specific Extended Capability (VSEC) allows one or more
proprietary capabilities defined by the vendor which aren't standard
or shared between vendors.
Signed-off-by: Gustavo Pimentel
---
drivers/pci/pci.c | 30 ++
include/linux/pci.h | 1 +
2 files changed, 31 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b9fecc2..aef217c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -693,6 +693,36 @@ u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
EXPORT_SYMBOL_GPL(pci_find_ht_capability);
/**
+ * pci_find_vsec_capability - Find a vendor-specific extended capability
+ * @dev: PCI device to query
+ * @vendor: Vendor ID for which capability is defined
+ * @cap: Vendor-specific capability ID
+ *
+ * If @dev has Vendor ID @vendor, search for a VSEC capability with
+ * VSEC ID @cap. If found, return the capability offset in
+ * config space; otherwise return 0.
+ */
+u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap)
+{
+ u16 vsec = 0;
+ u32 header;
+
+ if (vendor != dev->vendor)
+ return 0;
+
+ while ((vsec = pci_find_next_ext_capability(dev, vsec,
+PCI_EXT_CAP_ID_VNDR))) {
+ if (pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER,
+ ) == PCIBIOS_SUCCESSFUL &&
+ PCI_VNDR_HEADER_ID(header) == cap)
+ return vsec;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pci_find_vsec_capability);
+
+/**
* pci_find_parent_resource - return resource region of parent bus of given
* region
* @dev: PCI device structure contains resources to be searched
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b32126d..814f814 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1077,6 +1077,7 @@ u8 pci_find_next_ht_capability(struct pci_dev *dev, u8
pos, int ht_cap);
u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
+u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap);
u64 pci_get_dsn(struct pci_dev *dev);
--
2.7.4
[PATCH v7 14/15] dmaengine: dw-edma: Revert fix scatter-gather address calculation
Reverting the applied patch because it caused a regression on
ARC700 platform (32 bits).
Fixes: 05655541c950 ("dmaengine: dw-edma: Fix scatter-gather address
calculation")
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 0793df1..5328992 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -429,7 +429,8 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (xfer->type == EDMA_XFER_CYCLIC) {
burst->dar = xfer->xfer.cyclic.paddr;
} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- burst->dar = dst_addr;
+ src_addr += sg_dma_len(sg);
+ burst->dar = sg_dma_address(sg);
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
* a FIFO memory, in this case, it's a
@@ -443,7 +444,8 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (xfer->type == EDMA_XFER_CYCLIC) {
burst->sar = xfer->xfer.cyclic.paddr;
} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- burst->sar = src_addr;
+ dst_addr += sg_dma_len(sg);
+ burst->sar = sg_dma_address(sg);
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
* a FIFO memory, in this case, it's a
@@ -455,8 +457,6 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
}
if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- src_addr += sg_dma_len(sg);
- dst_addr += sg_dma_len(sg);
sg = sg_next(sg);
} else if (xfer->type == EDMA_XFER_INTERLEAVED &&
xfer->xfer.il->frame_size > 0) {
--
2.7.4
[PATCH v7 01/15] dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures
Add writeq() and readq() for 64 bits architures support.
Supporting these two functions will allow the write or the read of eDMA
64 bits registers at once instead of having two consecutive operations.
Also, this improvement will allow the PCI optimization transaction
messages, which will generate a 64 bits message instead of two messages
of 32 bits.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-core.c| 254 +++
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 48 +++---
drivers/dma/dw-edma/dw-edma-v0-regs.h| 149 +-
3 files changed, 326 insertions(+), 125 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 692de47..7888eda 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -28,29 +28,69 @@ static inline struct dw_edma_v0_regs __iomem
*__dw_regs(struct dw_edma *dw)
return dw->rg_region.vaddr;
}
-#define SET(dw, name, value) \
+#define SET_32(dw, name, value)\
writel(value, &(__dw_regs(dw)->name))
-#define GET(dw, name) \
+#define GET_32(dw, name) \
readl(&(__dw_regs(dw)->name))
-#define SET_RW(dw, dir, name, value) \
+#define SET_RW_32(dw, dir, name, value)\
do {\
if ((dir) == EDMA_DIR_WRITE)\
- SET(dw, wr_##name, value); \
+ SET_32(dw, wr_##name, value); \
else\
- SET(dw, rd_##name, value); \
+ SET_32(dw, rd_##name, value); \
} while (0)
-#define GET_RW(dw, dir, name) \
+#define GET_RW_32(dw, dir, name) \
((dir) == EDMA_DIR_WRITE\
- ? GET(dw, wr_##name) \
- : GET(dw, rd_##name))
+ ? GET_32(dw, wr_##name) \
+ : GET_32(dw, rd_##name))
-#define SET_BOTH(dw, name, value) \
+#define SET_BOTH_32(dw, name, value) \
do {\
- SET(dw, wr_##name, value); \
- SET(dw, rd_##name, value); \
+ SET_32(dw, wr_##name, value); \
+ SET_32(dw, rd_##name, value); \
+ } while (0)
+
+#ifdef CONFIG_64BIT
+
+#define SET_64(dw, name, value)\
+ writeq(value, &(__dw_regs(dw)->name))
+
+#define GET_64(dw, name) \
+ readq(&(__dw_regs(dw)->name))
+
+#define SET_RW_64(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_64(dw, wr_##name, value); \
+ else\
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#define GET_RW_64(dw, dir, name) \
+ ((dir) == EDMA_DIR_WRITE\
+ ? GET_64(dw, wr_##name) \
+ : GET_64(dw, rd_##name))
+
+#define SET_BOTH_64(dw, name, value) \
+ do {\
+ SET_64(dw, wr_##name, value); \
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#endif /* CONFIG_64BIT */
+
+#define SET_COMPAT(dw, name, value)\
+ writel(value, &(__dw_regs(dw)->type.unroll.name))
+
+#define SET_RW_COMPAT(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_COMPAT(dw, wr_##name, value); \
+ else\
+ SET_COMPAT(dw, rd_##name, value); \
} while (0)
static inline struct dw_edma_v0_ch_regs __iomem *
@@ -115,21 +155,86 @@ static inline u32 readl_ch(struct dw_edma *dw, enum
dw_edma_dir dir, u16 ch,
return value;
}
-#define SET_CH(dw, dir, ch, name, value) \
+#define SET_CH_32(dw, dir, ch, name, value) \
writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
-#define GET_CH(dw, dir, ch, name) \
+#define GET_CH_32(dw, dir, ch, name) \
readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
-#define SET_LL(ll, value) \
+#define SET_LL_32(ll, value) \
writel(value, ll)
+#ifdef CONFIG_64BIT
+
+static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
[PATCH v7 10/15] dmaengine: dw-edma: Change linked list and data blocks offset and sizes
Changes the linked list and data blocks offset and sizes to follow the
recommendation given by the hardware team for the IPK solution.
Although the previous data blocks offset and sizes are still valid and
functional, using them that might present some issues related to the IPK
solution, since this solution is based on FPGA and might be subjected to
timmings constrains.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 1055fdb..fa66e03 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -59,29 +59,29 @@ static const struct dw_edma_pcie_data snps_edda_data = {
.rg.sz = 0x2000, /* 8 Kbytes */
/* eDMA memory linked list location */
.ll_wr = {
- /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x, 0x0020)
- /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0020, 0x0020)
+ /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x, 0x0800)
+ /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0020, 0x0800)
},
.ll_rd = {
- /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0040, 0x0020)
- /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0060, 0x0020)
+ /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0040, 0x0800)
+ /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0060, 0x0800)
},
/* eDMA memory data location */
.dt_wr = {
- /* Channel 0 - BAR 2, offset 8 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0080, 0x00e0)
- /* Channel 1 - BAR 2, offset 22 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0160, 0x00e0)
+ /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0080, 0x0800)
+ /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0090, 0x0800)
},
.dt_rd = {
- /* Channel 0 - BAR 2, offset 36 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0240, 0x00e0)
- /* Channel 1 - BAR 2, offset 50 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0320, 0x00e0)
+ /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x00a0, 0x0800)
+ /* Channel 1 - BAR 2, offset 11 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x00b0, 0x0800)
},
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
--
2.7.4
[PATCH v7 13/15] dmaengine: dw-edma: Change DMA abreviation from lower into upper case
To keep code consistent, some comments with dma keyword written in lower
case are now in upper case.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index a26d0d5..0793df1 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -341,15 +341,15 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
return NULL;
switch (chan->config.direction) {
- case DMA_DEV_TO_MEM: /* local dma */
+ case DMA_DEV_TO_MEM: /* local DMA */
if (dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_READ)
break;
return NULL;
- case DMA_MEM_TO_DEV: /* local dma */
+ case DMA_MEM_TO_DEV: /* local DMA */
if (dir == DMA_MEM_TO_DEV && chan->dir == EDMA_DIR_WRITE)
break;
return NULL;
- default: /* remote dma */
+ default: /* remote DMA */
if (dir == DMA_MEM_TO_DEV && chan->dir == EDMA_DIR_READ)
break;
if (dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_WRITE)
--
2.7.4
[PATCH v7 08/15] dmaengine: dw-edma: Reorder variables to keep consistency
In the driver code structure, I tried to keep the code style consistency
by writing the write channels instructions first, and then follow by the
read channels instructions, mimicking the hardware implementation.
However, this code style failed in some cases. This patch fixes that and
no functional changes are expected.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index eb6f8b3..63c62e1 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -20,8 +20,8 @@
#define DW_PCIE_VSEC_DMA_ID0x6
#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
-#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
struct dw_edma_pcie_data {
/* eDMA registers location */
@@ -39,8 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
- u16 rd_ch_cnt;
u16 wr_ch_cnt;
+ u16 rd_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -59,8 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
- .rd_ch_cnt = 0,
.wr_ch_cnt = 0,
+ .rd_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -101,8 +101,8 @@ static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev
*pdev,
pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
pci_read_config_dword(pdev, vsec + 0xc, );
- pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pci_read_config_dword(pdev, vsec + 0x14, );
off = val;
@@ -218,8 +218,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->mf = vsec_data.mf;
dw->nr_irqs = nr_irqs;
dw->ops = _edma_pcie_core_ops;
- dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->wr_ch_cnt = vsec_data.wr_ch_cnt;
+ dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
/* Debug info */
if (dw->mf == EDMA_MF_EDMA_LEGACY)
--
2.7.4
[PATCH v7 12/15] dmaengine: dw-edma: Fix crash on loading/unloading driver
When the driver is compiled as a module and loaded if we try to unload
it, the Kernel shows a crash log. This Kernel crash is due to the
dma_async_device_unregister() call done after deleting the channels,
this patch fixes this issue.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index bc94c8d..a26d0d5 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -986,22 +986,21 @@ int dw_edma_remove(struct dw_edma_chip *chip)
/* Power management */
pm_runtime_disable(dev);
+ /* Deregister eDMA device */
+ dma_async_device_unregister(>wr_edma);
list_for_each_entry_safe(chan, _chan, >wr_edma.channels,
vc.chan.device_node) {
- list_del(>vc.chan.device_node);
tasklet_kill(>vc.task);
+ list_del(>vc.chan.device_node);
}
+ dma_async_device_unregister(>rd_edma);
list_for_each_entry_safe(chan, _chan, >rd_edma.channels,
vc.chan.device_node) {
- list_del(>vc.chan.device_node);
tasklet_kill(>vc.task);
+ list_del(>vc.chan.device_node);
}
- /* Deregister eDMA device */
- dma_async_device_unregister(>wr_edma);
- dma_async_device_unregister(>rd_edma);
-
/* Turn debugfs off */
dw_edma_v0_core_debugfs_off(chip);
--
2.7.4
[PATCH v7 15/15] dmaengine: dw-edma: Add pcim_iomap_table return check
Currently, is missing a null check on a pcim_iomap_table() return value
and this can lead to a null pointer dereference if the desired BAR
wasn't mapped previously.
Fix this by adding a null check and returning -ENOMEM.
Addresses-Coverity: ("Dereference null return")
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index fa66e03..44f6e09 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -240,6 +240,9 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->rg_region.vaddr = pcim_iomap_table(pdev)[vsec_data.rg.bar];
+ if (!dw->rg_region.vaddr)
+ return -ENOMEM;
+
dw->rg_region.vaddr += vsec_data.rg.off;
dw->rg_region.paddr = pdev->resource[vsec_data.rg.bar].start;
dw->rg_region.paddr += vsec_data.rg.off;
@@ -252,12 +255,18 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
struct dw_edma_block *dt_block = _data.dt_wr[i];
ll_region->vaddr = pcim_iomap_table(pdev)[ll_block->bar];
+ if (!ll_region->vaddr)
+ return -ENOMEM;
+
ll_region->vaddr += ll_block->off;
ll_region->paddr = pdev->resource[ll_block->bar].start;
ll_region->paddr += ll_block->off;
ll_region->sz = ll_block->sz;
dt_region->vaddr = pcim_iomap_table(pdev)[dt_block->bar];
+ if (!dt_region->vaddr)
+ return -ENOMEM;
+
dt_region->vaddr += dt_block->off;
dt_region->paddr = pdev->resource[dt_block->bar].start;
dt_region->paddr += dt_block->off;
@@ -271,12 +280,18 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
struct dw_edma_block *dt_block = _data.dt_rd[i];
ll_region->vaddr = pcim_iomap_table(pdev)[ll_block->bar];
+ if (!ll_region->vaddr)
+ return -ENOMEM;
+
ll_region->vaddr += ll_block->off;
ll_region->paddr = pdev->resource[ll_block->bar].start;
ll_region->paddr += ll_block->off;
ll_region->sz = ll_block->sz;
dt_region->vaddr = pcim_iomap_table(pdev)[dt_block->bar];
+ if (!dt_region->vaddr)
+ return -ENOMEM;
+
dt_region->vaddr += dt_block->off;
dt_region->paddr = pdev->resource[dt_block->bar].start;
dt_region->paddr += dt_block->off;
--
2.7.4
RE: [PATCH v6 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC
On Wed, Feb 17, 2021 at 22:27:38, Bjorn Helgaas
wrote:
> [+cc Krzysztof, since he commented on a previous version]
> [+cc Lukas, who previously proposed exactly what I suggest below,
> sorry for repeating. I think Lukas was right to propose passing in
> the vendor ID because it makes it easier to read the caller.]
>
> When you post new versions of a series, please cc people who commented
> on previous versions.
Noted.
>
> On Fri, Feb 12, 2021 at 06:37:39PM +0100, Gustavo Pimentel wrote:
> > Adds another helper to ones that already exist called
> > pci_find_vsec_capability. This helper crawls through the device PCI
> > config space searching for a specific ID on the Vendor-Specific Extended
> > Capabilities section.
>
> Add pci_find_vsec_capability() to locate a Vendor-Specific Extended
> Capability with the specified VSEC ID.
> >
> > The Vendor-Specific Extended Capability (VSEC) is a special PCI
> > capability (acts like container) defined by PCI-SIG that allows the one
> > or more proprietary capabilities defined by the vendor which aren't
> > standard or shared between the manufactures.
>
> s/is a special ... by PCI-SIG that//
> s/allows the one/allows one/
> s/the manufactures/manufacturers/ (or maybe "vendors" to match previous use)
Ok, I'll include those changes.
>
> > Signed-off-by: Gustavo Pimentel
> > ---
> > drivers/pci/pci.c | 34 ++
> > include/linux/pci.h | 2 ++
> > include/uapi/linux/pci_regs.h | 6 ++
> > 3 files changed, 42 insertions(+)
> >
> > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> > index b9fecc2..628aa9f 100644
> > --- a/drivers/pci/pci.c
> > +++ b/drivers/pci/pci.c
> > @@ -693,6 +693,40 @@ u8 pci_find_ht_capability(struct pci_dev *dev, int
> > ht_cap)
> > EXPORT_SYMBOL_GPL(pci_find_ht_capability);
> >
> > /**
> > + * pci_find_vsec_capability - Find a vendor-specific extended capability
> > + * @dev: PCI device to query
> > + * @cap: vendor-specific capability ID code
> > + *
> > + * Typically this function will be called by the PCI driver, which passes
> > + * through argument the 'struct pci_dev *' already pointing for the device
> > + * config space that is associated with the vendor and device ID which will
> > + * know which ID to search and what to do with it, however, there might be
> > + * cases that this function could be called outside of this scope and
> > + * therefore is the caller responsibility to check the vendor and/or
> > + * device ID first.
>
> This is important because it's a bit subtle. IIUC, each vendor
> (identified by Vendor ID at 0x00 in config space) can define its own
> VSEC IDs, so it can define up to 2^16 == 64K VSEC structures.
>
> Of course there's not room for that many in config space; but the
> point is that the vendor chooses its own VSEC IDs and doesn't need to
> coordinate with anybody.
>
> So a VSEC ID 0x0006 in a Synopsys device (Vendor ID 0x16c3) has
> nothing to do with a VSEC ID 0x0006 in an Intel device (Vendor ID
> 0x8086), and it's up to the caller to make sure it's using the correct
> one.
>
> I wonder if it would help avoid mistakes if we made the interface look
> like this:
>
> u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int
> vsec_cap_id)
> {
> if (vendor != dev->vendor)
> return 0;
>
> while ((vsec = ...))
> ...
> }
>
> so calls would look like this:
>
> vsec = pci_find_vsec_capability(dev, PCI_VENDOR_ID_SYNOPSYS,
> DW_PCIE_VSEC_DMA_ID);
>
> which would make it more obvious that DW_PCIE_VSEC_DMA_ID is only
> valid in a Synopsys device.
>
> The function comment could be something like this:
>
> pci_find_vsec_capability - Find a vendor-specific extended capability
> @dev: PCI device to query
> @vendor: Vendor ID for which capability is defined
> @vsec_cap_id: Vendor-specific capability ID
>
> If @dev has Vendor ID @vendor, search for a VSEC capability with
> VSEC ID @vsec_cap_id. If found, return the capability offset in
> config space; otherwise return 0.
>
> Or maybe it's even more subtle than I thought, and I'm missing
> something :)
Okay, seems reasonable.
>
> > + * Returns the address of the vendor-specific structure that matches the
> > + * requested capability ID code within the device's PCI configuration space
> > + * or 0 if it does not find a match.
> > + */
> > +u16 pci_find_vsec_capability(struct pci_dev *dev, int vsec_cap_id)
> > +{
> > + u16 vsec = 0;
> > + u32 he
RE: [PATCH 2/3] dmaengine: dw-edma: Add missing call to 'pci_free_irq_vectors()' in probe function
On Sun, Feb 14, 2021 at 13:21:52, Dejin Zheng
wrote:
> Call to 'pci_free_irq_vectors()' is missing in the error handling path
> of the probe function, So add it.
>
> Fixes: 41aaff2a2ac01c5 ("dmaengine: Add Synopsys eDMA IP PCIe glue-logic")
> Signed-off-by: Dejin Zheng
> ---
> drivers/dma/dw-edma/dw-edma-pcie.c | 15 +++
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
> b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 1eafc602e17e..c1e796bd3ee9 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> @@ -185,24 +185,31 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
> /* Validating if PCI interrupts were enabled */
> if (!pci_dev_msi_enabled(pdev)) {
> pci_err(pdev, "enable interrupt failed\n");
> - return -EPERM;
> + err = -EPERM;
> + goto err_free_irq;
> }
>
> dw->irq = devm_kcalloc(dev, nr_irqs, sizeof(*dw->irq), GFP_KERNEL);
> - if (!dw->irq)
> - return -ENOMEM;
> + if (!dw->irq) {
> + err = -ENOMEM;
> + goto err_free_irq;
> + }
>
> /* Starting eDMA driver */
> err = dw_edma_probe(chip);
> if (err) {
> pci_err(pdev, "eDMA probe failed\n");
> - return err;
> + goto err_free_irq;
> }
>
> /* Saving data structure reference */
> pci_set_drvdata(pdev, chip);
>
> return 0;
> +
> +err_free_irq:
> + pci_free_irq_vectors(pdev);
> + return err;
> }
>
> static void dw_edma_pcie_remove(struct pci_dev *pdev)
> --
> 2.25.0
Acked-by: Gustavo Pimentel
[PATCH v6 15/15] dmaengine: dw-edma: Add pcim_iomap_table return check
Currently, is missing a null check on a pcim_iomap_table() return value
and this can lead to a null pointer dereference if the desired BAR
wasn't mapped previously.
Fix this by adding a null check and returning -ENOMEM.
Addresses-Coverity: ("Dereference null return")
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 502de71..70d0d08 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -238,6 +238,9 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->rg_region.vaddr = pcim_iomap_table(pdev)[vsec_data.rg.bar];
+ if (!dw->rg_region.vaddr)
+ return -ENOMEM;
+
dw->rg_region.vaddr += vsec_data.rg.off;
dw->rg_region.paddr = pdev->resource[vsec_data.rg.bar].start;
dw->rg_region.paddr += vsec_data.rg.off;
@@ -250,12 +253,18 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
struct dw_edma_block *dt_block = _data.dt_wr[i];
ll_region->vaddr = pcim_iomap_table(pdev)[ll_block->bar];
+ if (!ll_region->vaddr)
+ return -ENOMEM;
+
ll_region->vaddr += ll_block->off;
ll_region->paddr = pdev->resource[ll_block->bar].start;
ll_region->paddr += ll_block->off;
ll_region->sz = ll_block->sz;
dt_region->vaddr = pcim_iomap_table(pdev)[dt_block->bar];
+ if (!dt_region->vaddr)
+ return -ENOMEM;
+
dt_region->vaddr += dt_block->off;
dt_region->paddr = pdev->resource[dt_block->bar].start;
dt_region->paddr += dt_block->off;
@@ -269,12 +278,18 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
struct dw_edma_block *dt_block = _data.dt_rd[i];
ll_region->vaddr = pcim_iomap_table(pdev)[ll_block->bar];
+ if (!ll_region->vaddr)
+ return -ENOMEM;
+
ll_region->vaddr += ll_block->off;
ll_region->paddr = pdev->resource[ll_block->bar].start;
ll_region->paddr += ll_block->off;
ll_region->sz = ll_block->sz;
dt_region->vaddr = pcim_iomap_table(pdev)[dt_block->bar];
+ if (!dt_region->vaddr)
+ return -ENOMEM;
+
dt_region->vaddr += dt_block->off;
dt_region->paddr = pdev->resource[dt_block->bar].start;
dt_region->paddr += dt_block->off;
--
2.7.4
[PATCH v6 14/15] dmaengine: dw-edma: Revert fix scatter-gather address calculation
Reverting the applied patch because it caused a regression on
ARC700 platform (32 bits).
Fixes: 05655541c950 ("dmaengine: dw-edma: Fix scatter-gather address
calculation")
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index a299eed..c198451 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -429,7 +429,8 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (xfer->type == EDMA_XFER_CYCLIC) {
burst->dar = xfer->xfer.cyclic.paddr;
} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- burst->dar = dst_addr;
+ src_addr += sg_dma_len(sg);
+ burst->dar = sg_dma_address(sg);
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
* a FIFO memory, in this case, it's a
@@ -443,7 +444,8 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (xfer->type == EDMA_XFER_CYCLIC) {
burst->sar = xfer->xfer.cyclic.paddr;
} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- burst->sar = src_addr;
+ dst_addr += sg_dma_len(sg);
+ burst->sar = sg_dma_address(sg);
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
* a FIFO memory, in this case, it's a
@@ -455,8 +457,6 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
}
if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
- src_addr += sg_dma_len(sg);
- dst_addr += sg_dma_len(sg);
sg = sg_next(sg);
} else if (xfer->type == EDMA_XFER_INTERLEAVED &&
xfer->xfer.il->frame_size > 0) {
--
2.7.4
[PATCH v6 13/15] dmaengine: dw-edma: Change DMA abreviation from lower into upper case
To keep code consistent, some comments with dma keyword written in lower
case are now in upper case.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index f7a1930..a299eed 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -341,15 +341,15 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
return NULL;
switch (chan->config.direction) {
- case DMA_DEV_TO_MEM: /* local dma */
+ case DMA_DEV_TO_MEM: /* local DMA */
if (dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_READ)
break;
return NULL;
- case DMA_MEM_TO_DEV: /* local dma */
+ case DMA_MEM_TO_DEV: /* local DMA */
if (dir == DMA_MEM_TO_DEV && chan->dir == EDMA_DIR_WRITE)
break;
return NULL;
- default: /* remote dma */
+ default: /* remote DMA */
if (dir == DMA_MEM_TO_DEV && chan->dir == EDMA_DIR_READ)
break;
if (dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_WRITE)
--
2.7.4
[PATCH v6 12/15] dmaengine: dw-edma: Fix crash on loading/unloading driver
When the driver is compiled as a module and loaded if we try to unload
it, the Kernel shows a crash log. This Kernel crash is due to the
dma_async_device_unregister() call done after deleting the channels,
this patch fixes this issue.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 8d8292e..f7a1930 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -986,22 +986,21 @@ int dw_edma_remove(struct dw_edma_chip *chip)
/* Power management */
pm_runtime_disable(dev);
+ /* Deregister eDMA device */
+ dma_async_device_unregister(>wr_edma);
list_for_each_entry_safe(chan, _chan, >wr_edma.channels,
vc.chan.device_node) {
- list_del(>vc.chan.device_node);
tasklet_kill(>vc.task);
+ list_del(>vc.chan.device_node);
}
+ dma_async_device_unregister(>rd_edma);
list_for_each_entry_safe(chan, _chan, >rd_edma.channels,
vc.chan.device_node) {
- list_del(>vc.chan.device_node);
tasklet_kill(>vc.task);
+ list_del(>vc.chan.device_node);
}
- /* Deregister eDMA device */
- dma_async_device_unregister(>wr_edma);
- dma_async_device_unregister(>rd_edma);
-
/* Turn debugfs off */
dw_edma_v0_core_debugfs_off(chip);
--
2.7.4
[PATCH v6 09/15] dmaengine: dw-edma: Improve the linked list and data blocks definition
In the previous implementation, the driver assumed that there existed
only two memory spaces that would equally distribute the amount of
read/write channels.
This might not be the case on some other implementations, therefore this
patch change this requirement so that each write/read channel has
its own linked list and data space well defined, which allows
different sizes and locations.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 51 +-
drivers/dma/dw-edma/dw-edma-core.h | 9 +-
drivers/dma/dw-edma/dw-edma-pcie.c | 185 ++---
3 files changed, 160 insertions(+), 85 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 5495cf7..48887b5 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -81,8 +81,13 @@ static struct dw_edma_chunk *dw_edma_alloc_chunk(struct
dw_edma_desc *desc)
* - Even chunks originate CB equal to 1
*/
chunk->cb = !(desc->chunks_alloc % 2);
- chunk->ll_region.paddr = dw->ll_region.paddr + chan->ll_off;
- chunk->ll_region.vaddr = dw->ll_region.vaddr + chan->ll_off;
+ if (chan->dir == EDMA_DIR_WRITE) {
+ chunk->ll_region.paddr = dw->ll_region_wr[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_wr[chan->id].vaddr;
+ } else {
+ chunk->ll_region.paddr = dw->ll_region_rd[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_rd[chan->id].vaddr;
+ }
if (desc->chunk) {
/* Create and add new element into the linked list */
@@ -691,24 +696,13 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
struct device *dev = chip->dev;
struct dw_edma *dw = chip->dw;
struct dw_edma_chan *chan;
- size_t ll_chunk, dt_chunk;
struct dw_edma_irq *irq;
struct dma_device *dma;
- u32 i, j, cnt, ch_cnt;
u32 alloc, off_alloc;
+ u32 i, j, cnt;
int err = 0;
u32 pos;
- ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
- ll_chunk = dw->ll_region.sz;
- dt_chunk = dw->dt_region.sz;
-
- /* Calculate linked list chunk for each channel */
- ll_chunk /= roundup_pow_of_two(ch_cnt);
-
- /* Calculate linked list chunk for each channel */
- dt_chunk /= roundup_pow_of_two(ch_cnt);
-
if (write) {
i = 0;
cnt = dw->wr_ch_cnt;
@@ -740,14 +734,14 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->request = EDMA_REQ_NONE;
chan->status = EDMA_ST_IDLE;
- chan->ll_off = (ll_chunk * i);
- chan->ll_max = (ll_chunk / EDMA_LL_SZ) - 1;
-
- chan->dt_off = (dt_chunk * i);
+ if (write)
+ chan->ll_max = (dw->ll_region_wr[j].sz / EDMA_LL_SZ);
+ else
+ chan->ll_max = (dw->ll_region_rd[j].sz / EDMA_LL_SZ);
+ chan->ll_max -= 1;
- dev_vdbg(dev, "L. List:\tChannel %s[%u] off=0x%.8lx,
max_cnt=%u\n",
-write ? "write" : "read", j,
-chan->ll_off, chan->ll_max);
+ dev_vdbg(dev, "L. List:\tChannel %s[%u] max_cnt=%u\n",
+write ? "write" : "read", j, chan->ll_max);
if (dw->nr_irqs == 1)
pos = 0;
@@ -772,12 +766,15 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->vc.desc_free = vchan_free_desc;
vchan_init(>vc, dma);
- dt_region->paddr = dw->dt_region.paddr + chan->dt_off;
- dt_region->vaddr = dw->dt_region.vaddr + chan->dt_off;
- dt_region->sz = dt_chunk;
-
- dev_vdbg(dev, "Data:\tChannel %s[%u] off=0x%.8lx\n",
-write ? "write" : "read", j, chan->dt_off);
+ if (write) {
+ dt_region->paddr = dw->dt_region_wr[j].paddr;
+ dt_region->vaddr = dw->dt_region_wr[j].vaddr;
+ dt_region->sz = dw->dt_region_wr[j].sz;
+ } else {
+ dt_region->paddr = dw->dt_region_rd[j].paddr;
+ dt_region->vaddr = dw->dt_region_rd[j].vaddr;
+ dt_region->sz = dw->dt_region_rd[j].sz;
+ }
dw_edma_v0_core_device_config(chan);
}
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index 650b1c7..cba
[PATCH v6 11/15] dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct
Move struct dentry variable from static definition (dw-edma-v0-debugfs.c)
into dw_edma struct (dw-edma-core.h)
Also the variable was renamed from base_dir to debugfs.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 2 +-
drivers/dma/dw-edma/dw-edma-core.h | 3 +++
drivers/dma/dw-edma/dw-edma-v0-core.c| 4 ++--
drivers/dma/dw-edma/dw-edma-v0-core.h| 2 +-
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 22 +-
drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 4 ++--
6 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 48887b5..8d8292e 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -1003,7 +1003,7 @@ int dw_edma_remove(struct dw_edma_chip *chip)
dma_async_device_unregister(>rd_edma);
/* Turn debugfs off */
- dw_edma_v0_core_debugfs_off();
+ dw_edma_v0_core_debugfs_off(chip);
return 0;
}
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index cba5436..60316d4 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -137,6 +137,9 @@ struct dw_edma {
const struct dw_edma_core_ops *ops;
raw_spinlock_t lock; /* Only for legacy */
+#ifdef CONFIG_DEBUG_FS
+ struct dentry *debugfs;
+#endif /* CONFIG_DEBUG_FS */
};
struct dw_edma_sg {
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 5b0541a..329fc2e 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -506,7 +506,7 @@ void dw_edma_v0_core_debugfs_on(struct dw_edma_chip *chip)
dw_edma_v0_debugfs_on(chip);
}
-void dw_edma_v0_core_debugfs_off(void)
+void dw_edma_v0_core_debugfs_off(struct dw_edma_chip *chip)
{
- dw_edma_v0_debugfs_off();
+ dw_edma_v0_debugfs_off(chip);
}
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.h
b/drivers/dma/dw-edma/dw-edma-v0-core.h
index abae152..2afa626 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.h
@@ -23,6 +23,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool
first);
int dw_edma_v0_core_device_config(struct dw_edma_chan *chan);
/* eDMA debug fs callbacks */
void dw_edma_v0_core_debugfs_on(struct dw_edma_chip *chip);
-void dw_edma_v0_core_debugfs_off(void);
+void dw_edma_v0_core_debugfs_off(struct dw_edma_chip *chip);
#endif /* _DW_EDMA_V0_CORE_H */
diff --git a/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
b/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
index 157dfc2..4b3bcff 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-debugfs.c
@@ -38,7 +38,6 @@
#define CHANNEL_STR"channel"
#define REGISTERS_STR "registers"
-static struct dentry *base_dir;
static struct dw_edma *dw;
static struct dw_edma_v0_regs __iomem *regs;
@@ -272,7 +271,7 @@ static void dw_edma_debugfs_regs(void)
struct dentry *regs_dir;
int nr_entries;
- regs_dir = debugfs_create_dir(REGISTERS_STR, base_dir);
+ regs_dir = debugfs_create_dir(REGISTERS_STR, dw->debugfs);
if (!regs_dir)
return;
@@ -293,18 +292,23 @@ void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip)
if (!regs)
return;
- base_dir = debugfs_create_dir(dw->name, NULL);
- if (!base_dir)
+ dw->debugfs = debugfs_create_dir(dw->name, NULL);
+ if (!dw->debugfs)
return;
- debugfs_create_u32("mf", 0444, base_dir, >mf);
- debugfs_create_u16("wr_ch_cnt", 0444, base_dir, >wr_ch_cnt);
- debugfs_create_u16("rd_ch_cnt", 0444, base_dir, >rd_ch_cnt);
+ debugfs_create_u32("mf", 0444, dw->debugfs, >mf);
+ debugfs_create_u16("wr_ch_cnt", 0444, dw->debugfs, >wr_ch_cnt);
+ debugfs_create_u16("rd_ch_cnt", 0444, dw->debugfs, >rd_ch_cnt);
dw_edma_debugfs_regs();
}
-void dw_edma_v0_debugfs_off(void)
+void dw_edma_v0_debugfs_off(struct dw_edma_chip *chip)
{
- debugfs_remove_recursive(base_dir);
+ dw = chip->dw;
+ if (!dw)
+ return;
+
+ debugfs_remove_recursive(dw->debugfs);
+ dw->debugfs = NULL;
}
diff --git a/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
b/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
index 5450a0a..d0ff25a 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-debugfs.h
@@ -13,13 +13,13 @@
#ifdef CONFIG_DEBUG_FS
void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip);
-void dw_edma_v0_debugfs_off(void);
+void dw_edma_
[PATCH v6 10/15] dmaengine: dw-edma: Change linked list and data blocks offset and sizes
Changes the linked list and data blocks offset and sizes to follow the
recommendation given by the hardware team for the IPK solution.
Although the previous data blocks offset and sizes are still valid and
functional, using them that might present some issues related to the IPK
solution, since this solution is based on FPGA and might be subjected to
timmings constrains.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 4e404f9..502de71 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -59,29 +59,29 @@ static const struct dw_edma_pcie_data snps_edda_data = {
.rg.sz = 0x2000, /* 8 Kbytes */
/* eDMA memory linked list location */
.ll_wr = {
- /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x, 0x0020)
- /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0020, 0x0020)
+ /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x, 0x0800)
+ /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0020, 0x0800)
},
.ll_rd = {
- /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0040, 0x0020)
- /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Mbytes */
- DW_BLOCK(BAR_2, 0x0060, 0x0020)
+ /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0040, 0x0800)
+ /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0060, 0x0800)
},
/* eDMA memory data location */
.dt_wr = {
- /* Channel 0 - BAR 2, offset 8 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0080, 0x00e0)
- /* Channel 1 - BAR 2, offset 22 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0160, 0x00e0)
+ /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0080, 0x0800)
+ /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x0090, 0x0800)
},
.dt_rd = {
- /* Channel 0 - BAR 2, offset 36 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0240, 0x00e0)
- /* Channel 1 - BAR 2, offset 50 Mbytes, size 14 Mbytes */
- DW_BLOCK(BAR_2, 0x0320, 0x00e0)
+ /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x00a0, 0x0800)
+ /* Channel 1 - BAR 2, offset 11 Mbytes, size 2 Kbytes */
+ DW_BLOCK(BAR_2, 0x00b0, 0x0800)
},
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
--
2.7.4
[PATCH v6 08/15] dmaengine: dw-edma: Reorder variables to keep consistency
In the driver code structure, I tried to keep the code style consistency
by writing the write channels instructions first, and then follow by the
read channels instructions, mimicking the hardware implementation.
However, this code style failed in some cases. This patch fixes that and
no functional changes are expected.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 1ddea34..41384ff 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -20,8 +20,8 @@
#define DW_PCIE_VSEC_DMA_ID0x6
#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
-#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
struct dw_edma_pcie_data {
/* eDMA registers location */
@@ -39,8 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
- u16 rd_ch_cnt;
u16 wr_ch_cnt;
+ u16 rd_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -59,8 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
- .rd_ch_cnt = 0,
.wr_ch_cnt = 0,
+ .rd_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -99,8 +99,8 @@ static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev
*pdev,
pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
pci_read_config_dword(pdev, vsec + 0xc, );
- pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pci_read_config_dword(pdev, vsec + 0x14, );
off = val;
@@ -216,8 +216,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->mf = vsec_data.mf;
dw->nr_irqs = nr_irqs;
dw->ops = _edma_pcie_core_ops;
- dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->wr_ch_cnt = vsec_data.wr_ch_cnt;
+ dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
/* Debug info */
if (dw->mf == EDMA_MF_EDMA_LEGACY)
--
2.7.4
[PATCH v6 07/15] dmaengine: dw-edma: Improve number of channels check
It was added some extra checks to ensure that the driver doesn't try to
use more DMA channels than actually are available in hardware.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 21 +
drivers/dma/dw-edma/dw-edma-core.h | 2 ++
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 0fe3835..5495cf7 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -914,19 +914,16 @@ int dw_edma_probe(struct dw_edma_chip *chip)
raw_spin_lock_init(>lock);
- if (!dw->wr_ch_cnt) {
- /* Find out how many write channels are supported by hardware */
- dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
- if (!dw->wr_ch_cnt)
- return -EINVAL;
- }
+ dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt,
+ dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE));
+ dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH);
- if (!dw->rd_ch_cnt) {
- /* Find out how many read channels are supported by hardware */
- dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
- if (!dw->rd_ch_cnt)
- return -EINVAL;
- }
+ dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt,
+ dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ));
+ dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH);
+
+ if (!dw->wr_ch_cnt && !dw->rd_ch_cnt)
+ return -EINVAL;
dev_vdbg(dev, "Channels:\twrite=%d, read=%d\n",
dw->wr_ch_cnt, dw->rd_ch_cnt);
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index f72ebaa..650b1c7 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -15,6 +15,8 @@
#include "../virt-dma.h"
#define EDMA_LL_SZ 24
+#define EDMA_MAX_WR_CH 8
+#define EDMA_MAX_RD_CH 8
enum dw_edma_dir {
EDMA_DIR_WRITE = 0,
--
2.7.4
[PATCH v6 06/15] dmaengine: dw-edma: Add device_prep_interleave_dma() support
Add device_prep_interleave_dma() support to Synopsys DMA driver.
This feature implements a similar data transfer mechanism to the
scatter-gather implementation.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 85 ++
drivers/dma/dw-edma/dw-edma-core.h | 13 --
2 files changed, 78 insertions(+), 20 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index b65c32e1..0fe3835 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -329,7 +329,7 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
struct dw_edma_chunk *chunk;
struct dw_edma_burst *burst;
struct dw_edma_desc *desc;
- u32 cnt;
+ u32 cnt = 0;
int i;
if (!chan->configured)
@@ -352,12 +352,19 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
return NULL;
}
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
if (!xfer->xfer.cyclic.len || !xfer->xfer.cyclic.cnt)
return NULL;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
if (xfer->xfer.sg.len < 1)
return NULL;
+ } else if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ if (!xfer->xfer.il->numf)
+ return NULL;
+ if (xfer->xfer.il->numf > 0 && xfer->xfer.il->frame_size > 0)
+ return NULL;
+ } else {
+ return NULL;
}
desc = dw_edma_alloc_desc(chan);
@@ -368,18 +375,28 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (unlikely(!chunk))
goto err_alloc;
- src_addr = chan->config.src_addr;
- dst_addr = chan->config.dst_addr;
+ if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ src_addr = xfer->xfer.il->src_start;
+ dst_addr = xfer->xfer.il->dst_start;
+ } else {
+ src_addr = chan->config.src_addr;
+ dst_addr = chan->config.dst_addr;
+ }
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
cnt = xfer->xfer.cyclic.cnt;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
cnt = xfer->xfer.sg.len;
sg = xfer->xfer.sg.sgl;
+ } else if (xfer->type == EDMA_XFER_INTERLEAVED) {
+ if (xfer->xfer.il->numf > 0)
+ cnt = xfer->xfer.il->numf;
+ else
+ cnt = xfer->xfer.il->frame_size;
}
for (i = 0; i < cnt; i++) {
- if (!xfer->cyclic && !sg)
+ if (xfer->type == EDMA_XFER_SCATTER_GATHER && !sg)
break;
if (chunk->bursts_alloc == chan->ll_max) {
@@ -392,19 +409,21 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
if (unlikely(!burst))
goto err_alloc;
- if (xfer->cyclic)
+ if (xfer->type == EDMA_XFER_CYCLIC)
burst->sz = xfer->xfer.cyclic.len;
- else
+ else if (xfer->type == EDMA_XFER_SCATTER_GATHER)
burst->sz = sg_dma_len(sg);
+ else if (xfer->type == EDMA_XFER_INTERLEAVED)
+ burst->sz = xfer->xfer.il->sgl[i].size;
chunk->ll_region.sz += burst->sz;
desc->alloc_sz += burst->sz;
if (chan->dir == EDMA_DIR_WRITE) {
burst->sar = src_addr;
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
burst->dar = xfer->xfer.cyclic.paddr;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
burst->dar = dst_addr;
/* Unlike the typical assumption by other
* drivers/IPs the peripheral memory isn't
@@ -416,9 +435,9 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
}
} else {
burst->dar = dst_addr;
- if (xfer->cyclic) {
+ if (xfer->type == EDMA_XFER_CYCLIC) {
burst->sar = xfer->xfer.cyclic.paddr;
- } else {
+ } else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
burst->sar = src_addr;
/* Unlike the typic
[PATCH v6 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC
Adds another helper to ones that already exist called
pci_find_vsec_capability. This helper crawls through the device PCI
config space searching for a specific ID on the Vendor-Specific Extended
Capabilities section.
The Vendor-Specific Extended Capability (VSEC) is a special PCI
capability (acts like container) defined by PCI-SIG that allows the one
or more proprietary capabilities defined by the vendor which aren't
standard or shared between the manufactures.
Signed-off-by: Gustavo Pimentel
---
drivers/pci/pci.c | 34 ++
include/linux/pci.h | 2 ++
include/uapi/linux/pci_regs.h | 6 ++
3 files changed, 42 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b9fecc2..628aa9f 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -693,6 +693,40 @@ u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
EXPORT_SYMBOL_GPL(pci_find_ht_capability);
/**
+ * pci_find_vsec_capability - Find a vendor-specific extended capability
+ * @dev: PCI device to query
+ * @cap: vendor-specific capability ID code
+ *
+ * Typically this function will be called by the PCI driver, which passes
+ * through argument the 'struct pci_dev *' already pointing for the device
+ * config space that is associated with the vendor and device ID which will
+ * know which ID to search and what to do with it, however, there might be
+ * cases that this function could be called outside of this scope and
+ * therefore is the caller responsibility to check the vendor and/or
+ * device ID first.
+ *
+ * Returns the address of the vendor-specific structure that matches the
+ * requested capability ID code within the device's PCI configuration space
+ * or 0 if it does not find a match.
+ */
+u16 pci_find_vsec_capability(struct pci_dev *dev, int vsec_cap_id)
+{
+ u16 vsec = 0;
+ u32 header;
+
+ while ((vsec = pci_find_next_ext_capability(dev, vsec,
+PCI_EXT_CAP_ID_VNDR))) {
+ if (pci_read_config_dword(dev, vsec + PCI_VSEC_HDR,
+ ) == PCIBIOS_SUCCESSFUL &&
+ PCI_VSEC_CAP_ID(header) == vsec_cap_id)
+ return vsec;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pci_find_vsec_capability);
+
+/**
* pci_find_parent_resource - return resource region of parent bus of given
* region
* @dev: PCI device structure contains resources to be searched
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b32126d..da6ab6a 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1080,6 +1080,8 @@ struct pci_bus *pci_find_next_bus(const struct pci_bus
*from);
u64 pci_get_dsn(struct pci_dev *dev);
+u16 pci_find_vsec_capability(struct pci_dev *dev, int vsec_cap_id);
+
struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
struct pci_dev *from);
struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index e709ae8..deae275 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -983,6 +983,12 @@
#define PCI_VSEC_HDR 4 /* extended cap - vendor-specific */
#define PCI_VSEC_HDR_LEN_SHIFT20 /* shift for length field */
+/* Vendor-Specific Extended Capabilities */
+#define PCI_VSEC_HEADER4 /* Vendor-Specific Header */
+#define PCI_VSEC_CAP_ID(x)((x) & 0x)
+#define PCI_VSEC_CAP_REV(x) (((x) >> 16) & 0xf)
+#define PCI_VSEC_CAP_LEN(x) (((x) >> 20) & 0xfff)
+
/* SATA capability */
#define PCI_SATA_REGS 4 /* SATA REGs specifier */
#define PCI_SATA_REGS_MASK0xF /* location - BAR#/inline */
--
2.7.4
[PATCH v6 05/15] dmaengine: dw-edma: Add PCIe VSEC data retrieval support
The latest eDMA IP development implements a Vendor-Specific Extended
Capability that contains the eDMA BAR, offset, map format, and the
number of read/write channels available.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 20 ---
drivers/dma/dw-edma/dw-edma-pcie.c | 114 -
2 files changed, 99 insertions(+), 35 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index b971505..b65c32e1 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -863,15 +863,19 @@ int dw_edma_probe(struct dw_edma_chip *chip)
raw_spin_lock_init(>lock);
- /* Find out how many write channels are supported by hardware */
- dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
- if (!dw->wr_ch_cnt)
- return -EINVAL;
+ if (!dw->wr_ch_cnt) {
+ /* Find out how many write channels are supported by hardware */
+ dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
+ if (!dw->wr_ch_cnt)
+ return -EINVAL;
+ }
- /* Find out how many read channels are supported by hardware */
- dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
- if (!dw->rd_ch_cnt)
- return -EINVAL;
+ if (!dw->rd_ch_cnt) {
+ /* Find out how many read channels are supported by hardware */
+ dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
+ if (!dw->rd_ch_cnt)
+ return -EINVAL;
+ }
dev_vdbg(dev, "Channels:\twrite=%d, read=%d\n",
dw->wr_ch_cnt, dw->rd_ch_cnt);
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index c130549..1ddea34 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -13,9 +13,16 @@
#include
#include
#include
+#include
#include "dw-edma-core.h"
+#define DW_PCIE_VSEC_DMA_ID0x6
+#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
+#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
+#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+
struct dw_edma_pcie_data {
/* eDMA registers location */
enum pci_barno rg_bar;
@@ -32,6 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
+ u16 rd_ch_cnt;
+ u16 wr_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -50,6 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
+ .rd_ch_cnt = 0,
+ .wr_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -61,10 +72,49 @@ static const struct dw_edma_core_ops dw_edma_pcie_core_ops
= {
.irq_vector = dw_edma_pcie_irq_vector,
};
+static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev *pdev,
+ struct dw_edma_pcie_data *pdata)
+{
+ u32 val, map;
+ u16 vsec;
+ u64 off;
+
+ vsec = pci_find_vsec_capability(pdev, DW_PCIE_VSEC_DMA_ID);
+ if (!vsec)
+ return;
+
+ pci_read_config_dword(pdev, vsec + PCI_VSEC_HEADER, );
+ if (PCI_VSEC_CAP_REV(val) != 0x00 || PCI_VSEC_CAP_LEN(val) != 0x18)
+ return;
+
+ pci_dbg(pdev, "Detected PCIe Vendor-Specific Extended Capability
DMA\n");
+ pci_read_config_dword(pdev, vsec + 0x8, );
+ map = FIELD_GET(DW_PCIE_VSEC_DMA_MAP, val);
+ if (map != EDMA_MF_EDMA_LEGACY &&
+ map != EDMA_MF_EDMA_UNROLL &&
+ map != EDMA_MF_HDMA_COMPAT)
+ return;
+
+ pdata->mf = map;
+ pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
+
+ pci_read_config_dword(pdev, vsec + 0xc, );
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
+ pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+
+ pci_read_config_dword(pdev, vsec + 0x14, );
+ off = val;
+ pci_read_config_dword(pdev, vsec + 0x10, );
+ off <<= 32;
+ off |= val;
+ pdata->rg_off = off;
+}
+
static int dw_edma_pcie_probe(struct pci_dev *pdev,
const struct pci_device_id *pid)
{
- const struct dw_edma_pcie_data *pdata = (void *)pid->driver_data;
+ struct dw_edma_pcie_data *pdata = (void *)pid->driver_data;
+ struct dw_edma_pcie_
[PATCH v6 03/15] dmaengine: dw-edma: Add support for the HDMA feature
Add support for the HDMA feature.
This new feature enables the current eDMA IP to use a deeper prefetch
of the linked list, which reduces the algorithm execution latency
observed when loading the elements of the list, causing more stable
and higher data transfer.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.h | 10
drivers/dma/dw-edma/dw-edma-pcie.c | 23 -
drivers/dma/dw-edma/dw-edma-v0-core.c| 42 +---
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 9 +++
4 files changed, 60 insertions(+), 24 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index 31fc50d..3f9593e 100644
--- a/drivers/dma/dw-edma/dw-edma-core.h
+++ b/drivers/dma/dw-edma/dw-edma-core.h
@@ -21,9 +21,10 @@ enum dw_edma_dir {
EDMA_DIR_READ
};
-enum dw_edma_mode {
- EDMA_MODE_LEGACY = 0,
- EDMA_MODE_UNROLL
+enum dw_edma_map_format {
+ EDMA_MF_EDMA_LEGACY = 0x0,
+ EDMA_MF_EDMA_UNROLL = 0x1,
+ EDMA_MF_HDMA_COMPAT = 0x5
};
enum dw_edma_request {
@@ -123,8 +124,7 @@ struct dw_edma {
struct dw_edma_irq *irq;
int nr_irqs;
- u32 version;
- enum dw_edma_mode mode;
+ enum dw_edma_map_format mf;
struct dw_edma_chan *chan;
const struct dw_edma_core_ops *ops;
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 1eafc60..c130549 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -30,8 +30,7 @@ struct dw_edma_pcie_data {
off_t dt_off;
size_t dt_sz;
/* Other */
- u32 version;
- enum dw_edma_mode mode;
+ enum dw_edma_map_format mf;
u8 irqs;
};
@@ -49,8 +48,7 @@ static const struct dw_edma_pcie_data snps_edda_data = {
.dt_off = 0x0080, /* 8 Mbytes */
.dt_sz = 0x0380, /* 56 Mbytes */
/* Other */
- .version= 0,
- .mode = EDMA_MODE_UNROLL,
+ .mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
};
@@ -69,8 +67,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
const struct dw_edma_pcie_data *pdata = (void *)pid->driver_data;
struct device *dev = >dev;
struct dw_edma_chip *chip;
- int err, nr_irqs;
struct dw_edma *dw;
+ int err, nr_irqs;
/* Enable PCI device */
err = pcim_enable_device(pdev);
@@ -157,16 +155,19 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->dt_region.paddr += pdata->dt_off;
dw->dt_region.sz = pdata->dt_sz;
- dw->version = pdata->version;
- dw->mode = pdata->mode;
+ dw->mf = pdata->mf;
dw->nr_irqs = nr_irqs;
dw->ops = _edma_pcie_core_ops;
/* Debug info */
- pci_dbg(pdev, "Version:\t%u\n", dw->version);
-
- pci_dbg(pdev, "Mode:\t%s\n",
- dw->mode == EDMA_MODE_LEGACY ? "Legacy" : "Unroll");
+ if (dw->mf == EDMA_MF_EDMA_LEGACY)
+ pci_dbg(pdev, "Version:\teDMA Port Logic (0x%x)\n", dw->mf);
+ else if (dw->mf == EDMA_MF_EDMA_UNROLL)
+ pci_dbg(pdev, "Version:\teDMA Unroll (0x%x)\n", dw->mf);
+ else if (dw->mf == EDMA_MF_HDMA_COMPAT)
+ pci_dbg(pdev, "Version:\tHDMA Compatible (0x%x)\n", dw->mf);
+ else
+ pci_dbg(pdev, "Version:\tUnknown (0x%x)\n", dw->mf);
pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes,
addr(v=%p, p=%pa)\n",
pdata->rg_bar, pdata->rg_off, pdata->rg_sz,
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 7888eda..5b0541a 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -96,7 +96,7 @@ static inline struct dw_edma_v0_regs __iomem
*__dw_regs(struct dw_edma *dw)
static inline struct dw_edma_v0_ch_regs __iomem *
__dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch)
{
- if (dw->mode == EDMA_MODE_LEGACY)
+ if (dw->mf == EDMA_MF_EDMA_LEGACY)
return &(__dw_regs(dw)->type.legacy.ch);
if (dir == EDMA_DIR_WRITE)
@@ -108,7 +108,7 @@ __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16
ch)
static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
u32 value, void __iomem *addr)
{
-
[PATCH v6 02/15] dmaengine: dw-edma: Fix comments offset characters' alignment
Fix comments offset characters' alignment to follow the same structure
of similar comments.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-regs.h | 214 +-
1 file changed, 107 insertions(+), 107 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-regs.h
b/drivers/dma/dw-edma/dw-edma-v0-regs.h
index d07151d..e175f7b 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-regs.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-regs.h
@@ -25,177 +25,177 @@
#define EDMA_V0_CH_EVEN_MSI_DATA_MASK GENMASK(15, 0)
struct dw_edma_v0_ch_regs {
- u32 ch_control1;/* 0x000 */
- u32 ch_control2;/* 0x004 */
- u32 transfer_size; /* 0x008 */
+ u32 ch_control1;/* 0x */
+ u32 ch_control2;/* 0x0004 */
+ u32 transfer_size; /* 0x0008 */
union {
- u64 reg;/* 0x00c..0x010 */
+ u64 reg;/* 0x000c..0x0010 */
struct {
- u32 lsb;/* 0x00c */
- u32 msb;/* 0x010 */
+ u32 lsb;/* 0x000c */
+ u32 msb;/* 0x0010 */
};
} sar;
union {
- u64 reg;/* 0x014..0x018 */
+ u64 reg;/* 0x0014..0x0018 */
struct {
- u32 lsb;/* 0x014 */
- u32 msb;/* 0x018 */
+ u32 lsb;/* 0x0014 */
+ u32 msb;/* 0x0018 */
};
} dar;
union {
- u64 reg;/* 0x01c..0x020 */
+ u64 reg;/* 0x001c..0x0020 */
struct {
- u32 lsb;/* 0x01c */
- u32 msb;/* 0x020 */
+ u32 lsb;/* 0x001c */
+ u32 msb;/* 0x0020 */
};
} llp;
} __packed;
struct dw_edma_v0_ch {
- struct dw_edma_v0_ch_regs wr; /* 0x200 */
- u32 padding_1[55]; /* [0x224..0x2fc] */
- struct dw_edma_v0_ch_regs rd; /* 0x300 */
- u32 padding_2[55]; /* [0x324..0x3fc] */
+ struct dw_edma_v0_ch_regs wr; /* 0x0200 */
+ u32 padding_1[55]; /* 0x0224..0x02fc */
+ struct dw_edma_v0_ch_regs rd; /* 0x0300 */
+ u32 padding_2[55]; /* 0x0324..0x03fc */
} __packed;
struct dw_edma_v0_unroll {
- u32 padding_1; /* 0x0f8 */
- u32 wr_engine_chgroup; /* 0x100 */
- u32 rd_engine_chgroup; /* 0x104 */
+ u32 padding_1; /* 0x00f8 */
+ u32 wr_engine_chgroup; /* 0x0100 */
+ u32 rd_engine_chgroup; /* 0x0104 */
union {
- u64 reg;/* 0x108..0x10c */
+ u64 reg;/* 0x0108..0x010c */
struct {
- u32 lsb;/* 0x108 */
- u32 msb;/* 0x10c */
+ u32 lsb;/* 0x0108 */
+ u32 msb;/* 0x010c */
};
} wr_engine_hshake_cnt;
- u32 padding_2[2]; /* [0x110..0x114] */
+ u32 padding_2[2]; /* 0x0110..0x0114 */
union {
- u64 reg;/* 0x120..0x124 */
+ u64 reg;/* 0x0120..0x0124 */
struct {
- u32 lsb;/* 0x120 */
- u32 msb;/* 0x124 */
+ u32 lsb;/* 0x0120 */
+ u32 msb;/* 0x0124 */
};
} rd_engine_hshake_cnt;
- u32 padding_3[2]; /* [0x120..0x124] */
- u32 wr_ch0_pwr_en; /* 0x128 */
- u32 wr_ch1_pwr_en; /* 0x12c
[PATCH v6 01/15] dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures
Add writeq() and readq() for 64 bits architures support.
Supporting these two functions will allow the write or the read of eDMA
64 bits registers at once instead of having two consecutive operations.
Also, this improvement will allow the PCI optimization transaction
messages, which will generate a 64 bits message instead of two messages
of 32 bits.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-core.c| 254 +++
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 48 +++---
drivers/dma/dw-edma/dw-edma-v0-regs.h| 149 +-
3 files changed, 326 insertions(+), 125 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 692de47..7888eda 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -28,29 +28,69 @@ static inline struct dw_edma_v0_regs __iomem
*__dw_regs(struct dw_edma *dw)
return dw->rg_region.vaddr;
}
-#define SET(dw, name, value) \
+#define SET_32(dw, name, value)\
writel(value, &(__dw_regs(dw)->name))
-#define GET(dw, name) \
+#define GET_32(dw, name) \
readl(&(__dw_regs(dw)->name))
-#define SET_RW(dw, dir, name, value) \
+#define SET_RW_32(dw, dir, name, value)\
do {\
if ((dir) == EDMA_DIR_WRITE)\
- SET(dw, wr_##name, value); \
+ SET_32(dw, wr_##name, value); \
else\
- SET(dw, rd_##name, value); \
+ SET_32(dw, rd_##name, value); \
} while (0)
-#define GET_RW(dw, dir, name) \
+#define GET_RW_32(dw, dir, name) \
((dir) == EDMA_DIR_WRITE\
- ? GET(dw, wr_##name) \
- : GET(dw, rd_##name))
+ ? GET_32(dw, wr_##name) \
+ : GET_32(dw, rd_##name))
-#define SET_BOTH(dw, name, value) \
+#define SET_BOTH_32(dw, name, value) \
do {\
- SET(dw, wr_##name, value); \
- SET(dw, rd_##name, value); \
+ SET_32(dw, wr_##name, value); \
+ SET_32(dw, rd_##name, value); \
+ } while (0)
+
+#ifdef CONFIG_64BIT
+
+#define SET_64(dw, name, value)\
+ writeq(value, &(__dw_regs(dw)->name))
+
+#define GET_64(dw, name) \
+ readq(&(__dw_regs(dw)->name))
+
+#define SET_RW_64(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_64(dw, wr_##name, value); \
+ else\
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#define GET_RW_64(dw, dir, name) \
+ ((dir) == EDMA_DIR_WRITE\
+ ? GET_64(dw, wr_##name) \
+ : GET_64(dw, rd_##name))
+
+#define SET_BOTH_64(dw, name, value) \
+ do {\
+ SET_64(dw, wr_##name, value); \
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#endif /* CONFIG_64BIT */
+
+#define SET_COMPAT(dw, name, value)\
+ writel(value, &(__dw_regs(dw)->type.unroll.name))
+
+#define SET_RW_COMPAT(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_COMPAT(dw, wr_##name, value); \
+ else\
+ SET_COMPAT(dw, rd_##name, value); \
} while (0)
static inline struct dw_edma_v0_ch_regs __iomem *
@@ -115,21 +155,86 @@ static inline u32 readl_ch(struct dw_edma *dw, enum
dw_edma_dir dir, u16 ch,
return value;
}
-#define SET_CH(dw, dir, ch, name, value) \
+#define SET_CH_32(dw, dir, ch, name, value) \
writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
-#define GET_CH(dw, dir, ch, name) \
+#define GET_CH_32(dw, dir, ch, name) \
readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
-#define SET_LL(ll, value) \
+#define SET_LL_32(ll, value) \
writel(value, ll)
+#ifdef CONFIG_64BIT
+
+static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
[PATCH v6 00/15] dmaengine: dw-edma: HDMA support
This patch series adds the HDMA support, as long the IP design has set the compatible register map parameter, which allows compatibility at some degree for the existing Synopsys DesignWare eDMA driver that is already available on the Kernel. The HDMA "Hyper-DMA" IP is an enhancement of the eDMA "embedded-DMA" IP. This new improvement comes with a PCI DVSEC that allows to the driver recognize and switch behavior if it's an eDMA or an HDMA, becoming retrocompatible, in the absence of this DVSEC, the driver will assume that is an eDMA IP. It also adds the interleaved support, since it will be similar to the current scatter-gather implementation. As well fixes/improves some abnormal behaviors not detected before, such as: - crash on loading/unloading driver - memory space definition for the data area and for the linked list space - scatter-gather address calculation on 32 bits platforms - minor comment and variable reordering Changes: V2: Applied changes based on Bjorn Helgaas' review Rebased patches on top of v5.11-rc1 version V3: Applied changes based on Lukas Wunner' review V4: Fix a typo detected by kernel test robot V5: Rework driver accordingly to Bjorn Helgaas's feedback V6: Rework driver accordingly to Krzysztof Wilczy??ski's feedback Cc: Vinod Koul Cc: Dan Williams Cc: Bjorn Helgaas Cc: dmaeng...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-...@vger.kernel.org Gustavo Pimentel (15): dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures dmaengine: dw-edma: Fix comments offset characters' alignment dmaengine: dw-edma: Add support for the HDMA feature PCI: Add pci_find_vsec_capability() to find a specific VSEC dmaengine: dw-edma: Add PCIe VSEC data retrieval support dmaengine: dw-edma: Add device_prep_interleave_dma() support dmaengine: dw-edma: Improve number of channels check dmaengine: dw-edma: Reorder variables to keep consistency dmaengine: dw-edma: Improve the linked list and data blocks definition dmaengine: dw-edma: Change linked list and data blocks offset and sizes dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct dmaengine: dw-edma: Fix crash on loading/unloading driver dmaengine: dw-edma: Change DMA abreviation from lower into upper case dmaengine: dw-edma: Revert fix scatter-gather address calculation dmaengine: dw-edma: Add pcim_iomap_table return check drivers/dma/dw-edma/dw-edma-core.c | 178 +++--- drivers/dma/dw-edma/dw-edma-core.h | 37 ++-- drivers/dma/dw-edma/dw-edma-pcie.c | 275 +--- drivers/dma/dw-edma/dw-edma-v0-core.c| 300 --- drivers/dma/dw-edma/dw-edma-v0-core.h| 2 +- drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 77 drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 4 +- drivers/dma/dw-edma/dw-edma-v0-regs.h| 291 +++--- drivers/pci/pci.c| 34 include/linux/pci.h | 2 + include/uapi/linux/pci_regs.h| 6 + 11 files changed, 851 insertions(+), 355 deletions(-) -- 2.7.4
[PATCH v6 5/5] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver
This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 46 1 file changed, 46 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index ..09d38e1 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,46 @@ +What: /sys/bus/pci/drivers/dw-xdata-pcie/.../write +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction. + Usage e.g. +echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../write + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/bus/pci/drivers/dw-xdata-pcie/.../write +204 + + The file is read and write. + +What: /sys/bus/pci/drivers/dw-xdata-pcie/.../read +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction. + Usage e.g. +echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../read + + The user can read the current PCIe link throughput generated + through this generator in MB/s. + Usage e.g. +cat /sys/bus/pci/drivers/dw-xdata-pcie/.../read +199 + + The file is read and write. + +What: /sys/bus/pci/drivers/dw-xdata-pcie/.../stop +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to disable the PCIe traffic generator in all + directions. + Usage e.g. +echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../stop + + The file is write only. -- 2.7.4
[PATCH v6 4/5] MAINTAINERS: Add Synopsys xData IP driver maintainer
Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66..f9d681b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5061,6 +5061,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-...@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-...@vger.kernel.org -- 2.7.4
[PATCH v6 2/5] misc: Add Synopsys DesignWare xData IP driver to Makefile and Kconfig
Add Synopsys DesignWare xData IP driver to Makefile and Kconfig. This driver enables/disables the PCIe traffic generator module pertain to the Synopsys DesignWare prototype. Signed-off-by: Gustavo Pimentel --- drivers/misc/Kconfig | 10 ++ drivers/misc/Makefile | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index fafa8b0..e42b171 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -423,6 +423,16 @@ config SRAM config SRAM_EXEC bool +config DW_XDATA_PCIE + depends on PCI + tristate "Synopsys DesignWare xData PCIe driver" + help + This driver allows controlling Synopsys DesignWare PCIe traffic + generator IP also known as xData, present in Synopsys DesignWare + PCIe Endpoint prototype. + + If unsure, say N. + config PCI_ENDPOINT_TEST depends on PCI select CRC32 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d23231e..bf22021 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o obj-$(CONFIG_GENWQE) += genwqe/ obj-$(CONFIG_ECHO) += echo/ obj-$(CONFIG_CXL_BASE) += cxl/ +obj-$(CONFIG_DW_XDATA_PCIE)+= dw-xdata-pcie.o obj-$(CONFIG_PCI_ENDPOINT_TEST)+= pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ -- 2.7.4
[PATCH v6 3/5] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver
Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index ..3d241ae --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../write + +Get write TLPs traffic link throughput in MB/s +- Command: +cat /sys/bus/pci/drivers/dw-xdata-pcie/.../write +- Output example: + 204 + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../read + +Get read TLPs traffic link throughput in MB/s +- Command: +cat /sys/bus/pci/drivers/dw-xdata-pcie/.../read +- Output example: + 199 + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/bus/pci/drivers/dw-xdata-pcie/.../stop -- 2.7.4
[PATCH v6 0/5] misc: Add Add Synopsys DesignWare xData IP driver
This patch series adds a new driver called xData-pcie for the Synopsys DesignWare PCIe prototype. The driver configures and enables the Synopsys DesignWare PCIe traffic generator IP inside of prototype Endpoint which will generate upstream and downstream PCIe traffic. This allows to quickly test the PCIe link throughput speed and check is the prototype solution has some limitation or not. Changes: V2: Rework driver according to Greg Kroah-Hartman' feedback V3: Fixed issues detected while running on 64 bits platforms Rebased patches on top of v5.11-rc1 version V4: Rework driver according to Greg Kroah-Hartman' feedback Add the ABI doc related to the sysfs implemented on this driver V5: Rework driver accordingly to Leon Romanovsky' feedback Rework driver accordingly to Krzysztof Wilczy??ski' feedback V6: Rework driver according to Greg Kroah-Hartman' feedback Rework driver accordingly to Krzysztof Wilczy??ski' feedback Rework driver accordingly to Leon Romanovsky' feedback Cc: Derek Kiernan Cc: Dragan Cvetic Cc: Arnd Bergmann Cc: Andrew Morton Cc: Greg Kroah-Hartman Cc: Jonathan Corbet Cc: Bjorn Helgaas Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Gustavo Pimentel (5): misc: Add Synopsys DesignWare xData IP driver misc: Add Synopsys DesignWare xData IP driver to Makefile and Kconfig Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver MAINTAINERS: Add Synopsys xData IP driver maintainer docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Documentation/ABI/testing/sysfs-driver-xdata | 46 Documentation/misc-devices/dw-xdata-pcie.rst | 40 +++ MAINTAINERS | 7 + drivers/misc/Kconfig | 10 + drivers/misc/Makefile| 1 + drivers/misc/dw-xdata-pcie.c | 390 +++ 6 files changed, 494 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst create mode 100644 drivers/misc/dw-xdata-pcie.c -- 2.7.4
[PATCH v6 1/5] misc: Add Synopsys DesignWare xData IP driver
Add Synopsys DesignWare xData IP driver. This driver enables/disables
the PCI traffic generator module pertain to the Synopsys DesignWare
prototype.
Signed-off-by: Gustavo Pimentel
---
drivers/misc/dw-xdata-pcie.c | 390 +++
1 file changed, 390 insertions(+)
create mode 100644 drivers/misc/dw-xdata-pcie.c
diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c
new file mode 100644
index ..62c6fa9
--- /dev/null
+++ b/drivers/misc/dw-xdata-pcie.c
@@ -0,0 +1,390 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates.
+ * Synopsys DesignWare xData driver
+ *
+ * Author: Gustavo Pimentel
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
+
+#define DW_XDATA_EP_MEM_OFFSET 0x800
+
+struct dw_xdata_pcie_data {
+ /* xData registers location */
+ enum pci_barno rg_bar;
+ off_t rg_off;
+ size_t rg_sz;
+};
+
+static const struct dw_xdata_pcie_data snps_edda_data = {
+ /* xData registers location */
+ .rg_bar = BAR_0,
+ .rg_off = 0x, /* 0 Kbytes */
+ .rg_sz = 0x012c, /* 300 bytes */
+};
+
+#define STATUS_DONEBIT(0)
+
+#define CONTROL_DOORBELL BIT(0)
+#define CONTROL_IS_WRITE BIT(1)
+#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)
+#define CONTROL_PATTERN_INCBIT(16)
+#define CONTROL_NO_ADDR_INCBIT(18)
+
+#define XPERF_CONTROL_ENABLE BIT(5)
+
+#define BURST_REPEAT BIT(31)
+#define BURST_VALUE0x1001
+
+#define PATTERN_VALUE 0x0
+
+struct dw_xdata_regs {
+ u32 addr_lsb; /* 0x000 */
+ u32 addr_msb; /* 0x004 */
+ u32 burst_cnt; /* 0x008 */
+ u32 control;/* 0x00c */
+ u32 pattern;/* 0x010 */
+ u32 status; /* 0x014 */
+ u32 RAM_addr; /* 0x018 */
+ u32 RAM_port; /* 0x01c */
+ u32 _reserved0[14]; /* 0x020..0x054 */
+ u32 perf_control; /* 0x058 */
+ u32 _reserved1[41]; /* 0x05c..0x0fc */
+ u32 wr_cnt_lsb; /* 0x100 */
+ u32 wr_cnt_msb; /* 0x104 */
+ u32 rd_cnt_lsb; /* 0x108 */
+ u32 rd_cnt_msb; /* 0x10c */
+} __packed;
+
+struct dw_xdata_region {
+ phys_addr_t paddr; /* physical address */
+ void __iomem *vaddr;/* virtual address */
+ size_t sz; /* size */
+};
+
+struct dw_xdata {
+ struct dw_xdata_region rg_region; /* registers */
+ size_t max_wr_len; /* max wr xfer len */
+ size_t max_rd_len; /* max rd xfer len */
+ struct mutex mutex;
+ struct pci_dev *pdev;
+};
+
+static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
+{
+ return dw->rg_region.vaddr;
+}
+
+static void dw_xdata_stop(struct dw_xdata *dw)
+{
+ u32 burst;
+
+ mutex_lock(>mutex);
+
+ burst = readl(&(__dw_regs(dw)->burst_cnt));
+
+ if (burst & BURST_REPEAT) {
+ burst &= ~(u32)BURST_REPEAT;
+ writel(burst, &(__dw_regs(dw)->burst_cnt));
+ }
+
+ mutex_unlock(>mutex);
+}
+
+static void dw_xdata_start(struct dw_xdata *dw, bool write)
+{
+ u32 control, status;
+
+ /* Stop first if xfer in progress */
+ dw_xdata_stop(dw);
+
+ mutex_lock(>mutex);
+
+ /* Clear status register */
+ writel(0x0, &(__dw_regs(dw)->status));
+
+ /* Burst count register set for continuous until stopped */
+ writel(BURST_REPEAT | BURST_VALUE, &(__dw_regs(dw)->burst_cnt));
+
+ /* Pattern register */
+ writel(PATTERN_VALUE, &(__dw_regs(dw)->pattern));
+
+ /* Control register */
+ control = CONTROL_DOORBELL | CONTROL_PATTERN_INC | CONTROL_NO_ADDR_INC;
+ if (write) {
+ control |= CONTROL_IS_WRITE;
+ control |= CONTROL_LENGTH(dw->max_wr_len);
+ } else {
+ control |= CONTROL_LENGTH(dw->max_rd_len);
+ }
+ writel(control, &(__dw_
RE: [PATCH v5 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC
On Thu, Feb 11, 2021 at 12:50:46, Krzysztof Wilczyński wrote: > Hi Gustavo, > > [...] > > + * Typically this function will be called by the pci driver, which passes > > It would be "PCI" here. Nicely catch. > > > + * through argument the 'struct pci_dev *' already pointing for the device > > + * config space that is associated with the vendor and device ID which will > > + * know which ID to search and what to do with it, however, it might be > > Probably "there might be". I've rephrased it. > > > + * cases that this function could be called outside of this scope and > > + * therefore is the caller responsibility to check the vendor and/or > [...] > > A suggestion. This commit message is a little hard to read and could be > improved. > > It might just be me (by and large, and I am not a native English > speaker), but it's actually easier to figure out what the function does > after reading the implementation that from the comment. :) I have also rephrased it. I hope it would be better, but I don't see how. "Adds another helper to ones that already exist called pci_find_vsec_capability. This helper crawls through the device PCI config space searching for a specific ID on the Vendor-Specific Extended Capabilities section. The Vendor-Specific Extended Capability (VSEC) is a special PCI capability (acts like container) defined by PCI-SIG that allows the one or more proprietary capabilities defined by the vendor which aren't standard or shared between the manufactures. -Gustavo > > Krzysztof
RE: [PATCH v5 05/15] dmaengine: dw-edma: Add PCIe VSEC data retrieval support
On Thu, Feb 11, 2021 at 12:59:48, Krzysztof Wilczyński wrote: > Hi Gustavo, > > > + /* > > +* Tries to find if exists a PCIe Vendor-Specific Extended Capability > > +* for the DMA, if exists one, then reconfigures with the new data > [...] > > What about "if one exists" and "then reconfigures it". Missing period > at the end of the sentence. That would be better. Thanks. > > Krzysztof
RE: [PATCH v5 3/6] misc: Add Synopsys DesignWare xData IP driver to Kconfig
On Thu, Feb 11, 2021 at 11:29:43, Krzysztof Wilczyński wrote: > Hi Gustavo, > > [...] > > +config DW_XDATA_PCIE > > + depends on PCI > > + tristate "Synopsys DesignWare xData PCIe driver" > > + help > > + This driver allows controlling Synopsys DesignWare PCIe traffic > > + generator IP also known as xData, present in Synopsys Designware > > + PCIe Endpoint prototype. > [...] > > To be consistent. It would be "DesignWare" in the sentence above. Nicely catch. Thanks. > > Krzysztof
RE: [PATCH v5 1/6] misc: Add Synopsys DesignWare xData IP driver
On Thu, Feb 11, 2021 at 10:33:25, Greg Kroah-Hartman
wrote:
> On Thu, Feb 11, 2021 at 10:21:07AM +0000, Gustavo Pimentel wrote:
> > On Thu, Feb 11, 2021 at 9:59:26, Greg Kroah-Hartman
> > wrote:
> >
> > > On Thu, Feb 11, 2021 at 09:50:33AM +, Gustavo Pimentel wrote:
> > > > On Thu, Feb 11, 2021 at 9:30:16, Greg Kroah-Hartman
> > > > wrote:
> > > >
> > > > > On Thu, Feb 11, 2021 at 10:08:38AM +0100, Gustavo Pimentel wrote:
> > > > > > +static ssize_t write_show(struct device *dev, struct
> > > > > > device_attribute *attr,
> > > > > > + char *buf)
> > > > > > +{
> > > > > > + struct pci_dev *pdev = to_pci_dev(dev);
> > > > > > + struct dw_xdata *dw = pci_get_drvdata(pdev);
> > > > > > + u64 rate;
> > > > > > +
> > > > > > + mutex_lock(>mutex);
> > > > > > + dw_xdata_perf(dw, , true);
> > > > > > + mutex_unlock(>mutex);
> > > > > > +
> > > > > > + return sysfs_emit(buf, "%llu MB/s\n", rate);
> > > > >
> > > > > Do not put units in a sysfs file, that should be in the documentation,
> > > > > otherwise this forces userspace to "parse" the units which is a mess.
> > > >
> > > > Okay.
> > > >
> > > > >
> > > > > Same for the other sysfs file.
> > > > >
> > > > > And why do you need a lock for this show function?
> > > >
> > > > Maybe I understood it wrongly, please correct me in that case. The
> > > > dw_xdata_perf() is called on the write_show() and read_show(), to avoid
> > > > a
> > > > possible race condition between those calls, I have added this mutex.
> > >
> > > What race? If the value changes with a write right after a read, what
> > > does it matter?
> > >
> > > What exactly are you trying to protect with this lock?
> >
> > The write_store() does a procedure to enable the traffic on the write
> > direction, however, the write_show() does a different procedure to
> > calculate the link throughput speed, which uses a different set of
> > registers on the HW.
> >
> > Similar happens on the read_store() (which enable the traffic on the read
> > direction) and on the read_show()
> >
> > To summarize write_store() follows the same approach of read_store() and
> > the write_show() of the read_show(). I added the mutex on those functions
> > for instance to avoid while during the write_show() call the possibility
> > of been called the read_show() messing up the link throughput speed
> > calculation.
> > Or while during the write_store() call to be called the read_store or
> > even the write_show() for the same reasons.
>
> If you need to protect these types of things, but the lock down in the
> function that does this, not above it which forces people to audit
> everything and manually try to determine what lock is doing what for
> what.
>
> Make it impossible to get wrong, as it is, you have to do extra work
> here to keep things working properly, always a bad idea in an api.
I think I understood what you mean, I will *reduce* the mutex scope to
the basic functions that are called by the sysfs *_store() and *_show().
-Gustavo
>
> thanks,
>
> greg k-h
RE: [PATCH v5 1/6] misc: Add Synopsys DesignWare xData IP driver
On Thu, Feb 11, 2021 at 9:59:26, Greg Kroah-Hartman
wrote:
> On Thu, Feb 11, 2021 at 09:50:33AM +0000, Gustavo Pimentel wrote:
> > On Thu, Feb 11, 2021 at 9:30:16, Greg Kroah-Hartman
> > wrote:
> >
> > > On Thu, Feb 11, 2021 at 10:08:38AM +0100, Gustavo Pimentel wrote:
> > > > +static ssize_t write_show(struct device *dev, struct device_attribute
> > > > *attr,
> > > > + char *buf)
> > > > +{
> > > > + struct pci_dev *pdev = to_pci_dev(dev);
> > > > + struct dw_xdata *dw = pci_get_drvdata(pdev);
> > > > + u64 rate;
> > > > +
> > > > + mutex_lock(>mutex);
> > > > + dw_xdata_perf(dw, , true);
> > > > + mutex_unlock(>mutex);
> > > > +
> > > > + return sysfs_emit(buf, "%llu MB/s\n", rate);
> > >
> > > Do not put units in a sysfs file, that should be in the documentation,
> > > otherwise this forces userspace to "parse" the units which is a mess.
> >
> > Okay.
> >
> > >
> > > Same for the other sysfs file.
> > >
> > > And why do you need a lock for this show function?
> >
> > Maybe I understood it wrongly, please correct me in that case. The
> > dw_xdata_perf() is called on the write_show() and read_show(), to avoid a
> > possible race condition between those calls, I have added this mutex.
>
> What race? If the value changes with a write right after a read, what
> does it matter?
>
> What exactly are you trying to protect with this lock?
The write_store() does a procedure to enable the traffic on the write
direction, however, the write_show() does a different procedure to
calculate the link throughput speed, which uses a different set of
registers on the HW.
Similar happens on the read_store() (which enable the traffic on the read
direction) and on the read_show()
To summarize write_store() follows the same approach of read_store() and
the write_show() of the read_show(). I added the mutex on those functions
for instance to avoid while during the write_show() call the possibility
of been called the read_show() messing up the link throughput speed
calculation.
Or while during the write_store() call to be called the read_store or
even the write_show() for the same reasons.
This is the reason why I added those mutexes, maybe this isn't necessary
and it's overkill. Please advise me if a different approach can be done.
-Gustavo
>
> thanks,
>
> greg k-h
RE: [PATCH v5 1/6] misc: Add Synopsys DesignWare xData IP driver
On Thu, Feb 11, 2021 at 9:30:16, Greg Kroah-Hartman
wrote:
> On Thu, Feb 11, 2021 at 10:08:38AM +0100, Gustavo Pimentel wrote:
> > +static ssize_t write_show(struct device *dev, struct device_attribute
> > *attr,
> > + char *buf)
> > +{
> > + struct pci_dev *pdev = to_pci_dev(dev);
> > + struct dw_xdata *dw = pci_get_drvdata(pdev);
> > + u64 rate;
> > +
> > + mutex_lock(>mutex);
> > + dw_xdata_perf(dw, , true);
> > + mutex_unlock(>mutex);
> > +
> > + return sysfs_emit(buf, "%llu MB/s\n", rate);
>
> Do not put units in a sysfs file, that should be in the documentation,
> otherwise this forces userspace to "parse" the units which is a mess.
Okay.
>
> Same for the other sysfs file.
>
> And why do you need a lock for this show function?
Maybe I understood it wrongly, please correct me in that case. The
dw_xdata_perf() is called on the write_show() and read_show(), to avoid a
possible race condition between those calls, I have added this mutex.
Thanks.
-Gustavo
>
> thanks,
>
> greg k-h
RE: [PATCH v5 2/6] misc: Add Synopsys DesignWare xData IP driver to Makefile
On Thu, Feb 11, 2021 at 9:28:9, Greg Kroah-Hartman wrote: > On Thu, Feb 11, 2021 at 10:08:39AM +0100, Gustavo Pimentel wrote: > > Add Synopsys DesignWare xData IP driver to Makefile. > > > > This driver enables/disables the PCIe traffic generator module > > pertain to the Synopsys DesignWare prototype. > > > > Signed-off-by: Gustavo Pimentel > > --- > > drivers/misc/Makefile | 1 + > > 1 file changed, 1 insertion(+) > > I said patch 2 and 3 should be merged into 1 before, right? Why ignore > that suggestion? Otherwise build errors/issues will get attributed to > the wrong commit... I didn't saw that suggestion, sorry. I can do that, no problem. > > greg k-h
[PATCH v5 01/15] dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures
Add writeq() and readq() for 64 bits architures support.
Supporting these two functions will allow the write or the read of eDMA
64 bits registers at once instead of having two consecutive operations.
Also, this improvement will allow the PCI optimization transaction
messages, which will generate a 64 bits message instead of two messages
of 32 bits.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-core.c| 254 +++
drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 48 +++---
drivers/dma/dw-edma/dw-edma-v0-regs.h| 149 +-
3 files changed, 326 insertions(+), 125 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c
b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 692de47..7888eda 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -28,29 +28,69 @@ static inline struct dw_edma_v0_regs __iomem
*__dw_regs(struct dw_edma *dw)
return dw->rg_region.vaddr;
}
-#define SET(dw, name, value) \
+#define SET_32(dw, name, value)\
writel(value, &(__dw_regs(dw)->name))
-#define GET(dw, name) \
+#define GET_32(dw, name) \
readl(&(__dw_regs(dw)->name))
-#define SET_RW(dw, dir, name, value) \
+#define SET_RW_32(dw, dir, name, value)\
do {\
if ((dir) == EDMA_DIR_WRITE)\
- SET(dw, wr_##name, value); \
+ SET_32(dw, wr_##name, value); \
else\
- SET(dw, rd_##name, value); \
+ SET_32(dw, rd_##name, value); \
} while (0)
-#define GET_RW(dw, dir, name) \
+#define GET_RW_32(dw, dir, name) \
((dir) == EDMA_DIR_WRITE\
- ? GET(dw, wr_##name) \
- : GET(dw, rd_##name))
+ ? GET_32(dw, wr_##name) \
+ : GET_32(dw, rd_##name))
-#define SET_BOTH(dw, name, value) \
+#define SET_BOTH_32(dw, name, value) \
do {\
- SET(dw, wr_##name, value); \
- SET(dw, rd_##name, value); \
+ SET_32(dw, wr_##name, value); \
+ SET_32(dw, rd_##name, value); \
+ } while (0)
+
+#ifdef CONFIG_64BIT
+
+#define SET_64(dw, name, value)\
+ writeq(value, &(__dw_regs(dw)->name))
+
+#define GET_64(dw, name) \
+ readq(&(__dw_regs(dw)->name))
+
+#define SET_RW_64(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_64(dw, wr_##name, value); \
+ else\
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#define GET_RW_64(dw, dir, name) \
+ ((dir) == EDMA_DIR_WRITE\
+ ? GET_64(dw, wr_##name) \
+ : GET_64(dw, rd_##name))
+
+#define SET_BOTH_64(dw, name, value) \
+ do {\
+ SET_64(dw, wr_##name, value); \
+ SET_64(dw, rd_##name, value); \
+ } while (0)
+
+#endif /* CONFIG_64BIT */
+
+#define SET_COMPAT(dw, name, value)\
+ writel(value, &(__dw_regs(dw)->type.unroll.name))
+
+#define SET_RW_COMPAT(dw, dir, name, value)\
+ do {\
+ if ((dir) == EDMA_DIR_WRITE)\
+ SET_COMPAT(dw, wr_##name, value); \
+ else\
+ SET_COMPAT(dw, rd_##name, value); \
} while (0)
static inline struct dw_edma_v0_ch_regs __iomem *
@@ -115,21 +155,86 @@ static inline u32 readl_ch(struct dw_edma *dw, enum
dw_edma_dir dir, u16 ch,
return value;
}
-#define SET_CH(dw, dir, ch, name, value) \
+#define SET_CH_32(dw, dir, ch, name, value) \
writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
-#define GET_CH(dw, dir, ch, name) \
+#define GET_CH_32(dw, dir, ch, name) \
readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
-#define SET_LL(ll, value) \
+#define SET_LL_32(ll, value) \
writel(value, ll)
+#ifdef CONFIG_64BIT
+
+static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
[PATCH v5 08/15] dmaengine: dw-edma: Reorder variables to keep consistency
In the driver code structure, I tried to keep the code style consistency
by writing the write channels instructions first, and then follow by the
read channels instructions, mimicking the hardware implementation.
However, this code style failed in some cases. This patch fixes that and
no functional changes are expected.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-pcie.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c
b/drivers/dma/dw-edma/dw-edma-pcie.c
index 7077d79..9e79eb5 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -20,8 +20,8 @@
#define DW_PCIE_VSEC_DMA_ID0x6
#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
-#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
struct dw_edma_pcie_data {
/* eDMA registers location */
@@ -39,8 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
- u16 rd_ch_cnt;
u16 wr_ch_cnt;
+ u16 rd_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -59,8 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
- .rd_ch_cnt = 0,
.wr_ch_cnt = 0,
+ .rd_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -99,8 +99,8 @@ static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev
*pdev,
pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
pci_read_config_dword(pdev, vsec + 0xc, );
- pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pci_read_config_dword(pdev, vsec + 0x14, );
off = val;
@@ -216,8 +216,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->mf = vsec_data.mf;
dw->nr_irqs = nr_irqs;
dw->ops = _edma_pcie_core_ops;
- dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->wr_ch_cnt = vsec_data.wr_ch_cnt;
+ dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
/* Debug info */
if (dw->mf == EDMA_MF_EDMA_LEGACY)
--
2.7.4
[PATCH v5 00/15] dmaengine: dw-edma: HDMA support
This patch series adds the HDMA support, as long the IP design has set the compatible register map parameter, which allows compatibility at some degree for the existing Synopsys DesignWare eDMA driver that is already available on the Kernel. The HDMA "Hyper-DMA" IP is an enhancement of the eDMA "embedded-DMA" IP. This new improvement comes with a PCI DVSEC that allows to the driver recognize and switch behavior if it's an eDMA or an HDMA, becoming retrocompatible, in the absence of this DVSEC, the driver will assume that is an eDMA IP. It also adds the interleaved support, since it will be similar to the current scatter-gather implementation. As well fixes/improves some abnormal behaviors not detected before, such as: - crash on loading/unloading driver - memory space definition for the data area and for the linked list space - scatter-gather address calculation on 32 bits platforms - minor comment and variable reordering Changes: V2: Applied changes based on Bjorn Helgaas' review Rebased patches on top of v5.11-rc1 version V3: Applied changes based on Lukas Wunner' review V4: Fix a typo detected by kernel test robot V5: Rework driver accordingly to Bjorn Helgaas's feedback Gustavo Pimentel (15): dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures dmaengine: dw-edma: Fix comments offset characters' alignment dmaengine: dw-edma: Add support for the HDMA feature PCI: Add pci_find_vsec_capability() to find a specific VSEC dmaengine: dw-edma: Add PCIe VSEC data retrieval support dmaengine: dw-edma: Add device_prep_interleave_dma() support dmaengine: dw-edma: Improve number of channels check dmaengine: dw-edma: Reorder variables to keep consistency dmaengine: dw-edma: Improve the linked list and data blocks definition dmaengine: dw-edma: Change linked list and data blocks offset and sizes dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct dmaengine: dw-edma: Fix crash on loading/unloading driver dmaengine: dw-edma: Change DMA abreviation from lower into upper case dmaengine: dw-edma: Revert fix scatter-gather address calculation dmaengine: dw-edma: Add pcim_iomap_table return check drivers/dma/dw-edma/dw-edma-core.c | 178 +++--- drivers/dma/dw-edma/dw-edma-core.h | 37 ++-- drivers/dma/dw-edma/dw-edma-pcie.c | 275 +--- drivers/dma/dw-edma/dw-edma-v0-core.c| 300 --- drivers/dma/dw-edma/dw-edma-v0-core.h| 2 +- drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 77 drivers/dma/dw-edma/dw-edma-v0-debugfs.h | 4 +- drivers/dma/dw-edma/dw-edma-v0-regs.h| 291 +++--- drivers/pci/pci.c| 34 include/linux/pci.h | 2 + include/uapi/linux/pci_regs.h| 6 + 11 files changed, 851 insertions(+), 355 deletions(-) -- 2.7.4
[PATCH v5 02/15] dmaengine: dw-edma: Fix comments offset characters' alignment
Fix comments offset characters' alignment to follow the same structure
of similar comments.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-v0-regs.h | 214 +-
1 file changed, 107 insertions(+), 107 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-v0-regs.h
b/drivers/dma/dw-edma/dw-edma-v0-regs.h
index d07151d..e175f7b 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-regs.h
+++ b/drivers/dma/dw-edma/dw-edma-v0-regs.h
@@ -25,177 +25,177 @@
#define EDMA_V0_CH_EVEN_MSI_DATA_MASK GENMASK(15, 0)
struct dw_edma_v0_ch_regs {
- u32 ch_control1;/* 0x000 */
- u32 ch_control2;/* 0x004 */
- u32 transfer_size; /* 0x008 */
+ u32 ch_control1;/* 0x */
+ u32 ch_control2;/* 0x0004 */
+ u32 transfer_size; /* 0x0008 */
union {
- u64 reg;/* 0x00c..0x010 */
+ u64 reg;/* 0x000c..0x0010 */
struct {
- u32 lsb;/* 0x00c */
- u32 msb;/* 0x010 */
+ u32 lsb;/* 0x000c */
+ u32 msb;/* 0x0010 */
};
} sar;
union {
- u64 reg;/* 0x014..0x018 */
+ u64 reg;/* 0x0014..0x0018 */
struct {
- u32 lsb;/* 0x014 */
- u32 msb;/* 0x018 */
+ u32 lsb;/* 0x0014 */
+ u32 msb;/* 0x0018 */
};
} dar;
union {
- u64 reg;/* 0x01c..0x020 */
+ u64 reg;/* 0x001c..0x0020 */
struct {
- u32 lsb;/* 0x01c */
- u32 msb;/* 0x020 */
+ u32 lsb;/* 0x001c */
+ u32 msb;/* 0x0020 */
};
} llp;
} __packed;
struct dw_edma_v0_ch {
- struct dw_edma_v0_ch_regs wr; /* 0x200 */
- u32 padding_1[55]; /* [0x224..0x2fc] */
- struct dw_edma_v0_ch_regs rd; /* 0x300 */
- u32 padding_2[55]; /* [0x324..0x3fc] */
+ struct dw_edma_v0_ch_regs wr; /* 0x0200 */
+ u32 padding_1[55]; /* 0x0224..0x02fc */
+ struct dw_edma_v0_ch_regs rd; /* 0x0300 */
+ u32 padding_2[55]; /* 0x0324..0x03fc */
} __packed;
struct dw_edma_v0_unroll {
- u32 padding_1; /* 0x0f8 */
- u32 wr_engine_chgroup; /* 0x100 */
- u32 rd_engine_chgroup; /* 0x104 */
+ u32 padding_1; /* 0x00f8 */
+ u32 wr_engine_chgroup; /* 0x0100 */
+ u32 rd_engine_chgroup; /* 0x0104 */
union {
- u64 reg;/* 0x108..0x10c */
+ u64 reg;/* 0x0108..0x010c */
struct {
- u32 lsb;/* 0x108 */
- u32 msb;/* 0x10c */
+ u32 lsb;/* 0x0108 */
+ u32 msb;/* 0x010c */
};
} wr_engine_hshake_cnt;
- u32 padding_2[2]; /* [0x110..0x114] */
+ u32 padding_2[2]; /* 0x0110..0x0114 */
union {
- u64 reg;/* 0x120..0x124 */
+ u64 reg;/* 0x0120..0x0124 */
struct {
- u32 lsb;/* 0x120 */
- u32 msb;/* 0x124 */
+ u32 lsb;/* 0x0120 */
+ u32 msb;/* 0x0124 */
};
} rd_engine_hshake_cnt;
- u32 padding_3[2]; /* [0x120..0x124] */
- u32 wr_ch0_pwr_en; /* 0x128 */
- u32 wr_ch1_pwr_en; /* 0x12c
[PATCH v5 09/15] dmaengine: dw-edma: Improve the linked list and data blocks definition
In the previous implementation the driver assumes that only existed 2
memory spaces that would be equal distributed amount the write/read
channels.
This might not be the case on some other implementations, therefore this
patches changes this requirement so that each write/read channel has
their own linked list and data space well defined, which allows
different sizes and locations.
Signed-off-by: Gustavo Pimentel
---
drivers/dma/dw-edma/dw-edma-core.c | 51 +-
drivers/dma/dw-edma/dw-edma-core.h | 9 +-
drivers/dma/dw-edma/dw-edma-pcie.c | 185 ++---
3 files changed, 160 insertions(+), 85 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c
b/drivers/dma/dw-edma/dw-edma-core.c
index 5495cf7..48887b5 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -81,8 +81,13 @@ static struct dw_edma_chunk *dw_edma_alloc_chunk(struct
dw_edma_desc *desc)
* - Even chunks originate CB equal to 1
*/
chunk->cb = !(desc->chunks_alloc % 2);
- chunk->ll_region.paddr = dw->ll_region.paddr + chan->ll_off;
- chunk->ll_region.vaddr = dw->ll_region.vaddr + chan->ll_off;
+ if (chan->dir == EDMA_DIR_WRITE) {
+ chunk->ll_region.paddr = dw->ll_region_wr[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_wr[chan->id].vaddr;
+ } else {
+ chunk->ll_region.paddr = dw->ll_region_rd[chan->id].paddr;
+ chunk->ll_region.vaddr = dw->ll_region_rd[chan->id].vaddr;
+ }
if (desc->chunk) {
/* Create and add new element into the linked list */
@@ -691,24 +696,13 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
struct device *dev = chip->dev;
struct dw_edma *dw = chip->dw;
struct dw_edma_chan *chan;
- size_t ll_chunk, dt_chunk;
struct dw_edma_irq *irq;
struct dma_device *dma;
- u32 i, j, cnt, ch_cnt;
u32 alloc, off_alloc;
+ u32 i, j, cnt;
int err = 0;
u32 pos;
- ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
- ll_chunk = dw->ll_region.sz;
- dt_chunk = dw->dt_region.sz;
-
- /* Calculate linked list chunk for each channel */
- ll_chunk /= roundup_pow_of_two(ch_cnt);
-
- /* Calculate linked list chunk for each channel */
- dt_chunk /= roundup_pow_of_two(ch_cnt);
-
if (write) {
i = 0;
cnt = dw->wr_ch_cnt;
@@ -740,14 +734,14 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->request = EDMA_REQ_NONE;
chan->status = EDMA_ST_IDLE;
- chan->ll_off = (ll_chunk * i);
- chan->ll_max = (ll_chunk / EDMA_LL_SZ) - 1;
-
- chan->dt_off = (dt_chunk * i);
+ if (write)
+ chan->ll_max = (dw->ll_region_wr[j].sz / EDMA_LL_SZ);
+ else
+ chan->ll_max = (dw->ll_region_rd[j].sz / EDMA_LL_SZ);
+ chan->ll_max -= 1;
- dev_vdbg(dev, "L. List:\tChannel %s[%u] off=0x%.8lx,
max_cnt=%u\n",
-write ? "write" : "read", j,
-chan->ll_off, chan->ll_max);
+ dev_vdbg(dev, "L. List:\tChannel %s[%u] max_cnt=%u\n",
+write ? "write" : "read", j, chan->ll_max);
if (dw->nr_irqs == 1)
pos = 0;
@@ -772,12 +766,15 @@ static int dw_edma_channel_setup(struct dw_edma_chip
*chip, bool write,
chan->vc.desc_free = vchan_free_desc;
vchan_init(>vc, dma);
- dt_region->paddr = dw->dt_region.paddr + chan->dt_off;
- dt_region->vaddr = dw->dt_region.vaddr + chan->dt_off;
- dt_region->sz = dt_chunk;
-
- dev_vdbg(dev, "Data:\tChannel %s[%u] off=0x%.8lx\n",
-write ? "write" : "read", j, chan->dt_off);
+ if (write) {
+ dt_region->paddr = dw->dt_region_wr[j].paddr;
+ dt_region->vaddr = dw->dt_region_wr[j].vaddr;
+ dt_region->sz = dw->dt_region_wr[j].sz;
+ } else {
+ dt_region->paddr = dw->dt_region_rd[j].paddr;
+ dt_region->vaddr = dw->dt_region_rd[j].vaddr;
+ dt_region->sz = dw->dt_region_rd[j].sz;
+ }
dw_edma_v0_core_device_config(chan);
}
diff --git a/drivers/dma/dw-edma/dw-edma-core.h
b/drivers/dma/dw-edma/dw-edma-core.h
index 650b1c7..cba5436 100644
--- a/drivers/dma/dw-ed
