On Fri, Oct 18, 2019 at 12:43:49AM +0100, Will Deacon wrote:
> Hi Linus,
>
> Please pull these arm64 fixes for -rc4. The main thing here is a
> long-awaited workaround for a CPU erratum on ThunderX2 which we have
> developed in conjunction with engineers from Cavium/Marvell. At the moment,
> the
On Mon, Sep 30, 2019 at 03:34:10PM -0500, Bjorn Helgaas wrote:
> [+cc Vadim, Manish]
Manish and Vadim are no longer with Cavium, adding Robert for
ThunderX1 and Sunil for Cavium networking processors.
> On Thu, Sep 19, 2019 at 02:43:34AM +, George Cherian wrote:
> > Enhance the ACS quirk for
On Wed, Jul 24, 2019 at 01:55:35PM -0500, Bjorn Helgaas wrote:
> See
> https://lkml.kernel.org/r/20171026223701.ga25...@bhelgaas-glaptop.roam.corp.google.com
> for incidental hints (subject, commit log, commit reference). Your
> patch basically extends that commit, so the subject should be very
>
On Mon, Jun 17, 2019 at 06:26:20PM +0100, Will Deacon wrote:
> On Mon, Jun 17, 2019 at 01:33:19PM +0200, Ard Biesheuvel wrote:
> > On Sun, 16 Jun 2019 at 23:31, Kees Cook wrote:
> > > On Sat, Jun 15, 2019 at 04:18:21PM +0200, Ard Biesheuvel wrote:
> > > > Yes, I am using the same saturation point
On Wed, Jun 12, 2019 at 10:31:53AM +0100, Will Deacon wrote:
> Hi JC,
>
> On Wed, Jun 12, 2019 at 04:10:20AM +, Jayachandran Chandrasekharan Nair
> wrote:
> > On Wed, May 22, 2019 at 05:04:17PM +0100, Will Deacon wrote:
> > > On Sat, May 18, 2019 at 12:00:34PM
On Wed, May 22, 2019 at 05:04:17PM +0100, Will Deacon wrote:
> On Sat, May 18, 2019 at 12:00:34PM +0200, Ard Biesheuvel wrote:
> > On Sat, 18 May 2019 at 06:25, Jayachandran Chandrasekharan Nair
> > wrote:
> > >
> > > On Mon, May 06, 2019 at 07:10:40PM +0100,
On Mon, May 06, 2019 at 07:10:40PM +0100, Will Deacon wrote:
> On Mon, May 06, 2019 at 06:13:12AM +0000, Jayachandran Chandrasekharan Nair
> wrote:
> > Perhaps someone from ARM can chime in here how the cas/yield combo
> > is expected to work when there is contention. Thunder
On Fri, May 03, 2019 at 12:40:34PM -0700, Linus Torvalds wrote:
> On Thu, May 2, 2019 at 4:19 PM Jayachandran Chandrasekharan Nair
> wrote:
> >>
> > I don't really see the point your are making about hardware. If you
> > look at the test case, you have about 64
On Thu, May 02, 2019 at 09:12:18AM -0700, Linus Torvalds wrote:
> On Thu, May 2, 2019 at 1:27 AM Jan Glauber wrote:
> >
> > I'll see how x86 runs the same testcase, I thought that playing
> > cacheline ping-pong is not the optimal use case for any CPU.
>
> Oh, ping-pong is always bad.
>
> But
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