Re: [PATCH v6 1/3] fork: Add generic vmalloced stack support

On Tue, Aug 30, 2016 at 03:01:51PM -0700, Andy Lutomirski wrote: > On Wed, Aug 24, 2016 at 9:51 AM, Josh Cartwright <jo...@ni.com> wrote: [..] > >> diff --git a/kernel/fork.c b/kernel/fork.c > >> index 52e725d4a866..05f7ef796fb4 100644 > >> --- a/ke

Re: [PATCH v6 1/3] fork: Add generic vmalloced stack support

On Tue, Aug 30, 2016 at 03:01:51PM -0700, Andy Lutomirski wrote: > On Wed, Aug 24, 2016 at 9:51 AM, Josh Cartwright wrote: [..] > >> diff --git a/kernel/fork.c b/kernel/fork.c > >> index 52e725d4a866..05f7ef796fb4 100644 > >> --- a/kernel/fork.c > >> +++

Re: [PATCH v6 1/3] fork: Add generic vmalloced stack support

Hey Andy- Small non-critical/potential future optimization comment below: On Thu, Aug 11, 2016 at 02:35:21AM -0700, Andy Lutomirski wrote: > If CONFIG_VMAP_STACK is selected, kernel stacks are allocated with > vmalloc_node. > > grsecurity has had a similar feature (called >

Re: [PATCH v6 1/3] fork: Add generic vmalloced stack support

Hey Andy- Small non-critical/potential future optimization comment below: On Thu, Aug 11, 2016 at 02:35:21AM -0700, Andy Lutomirski wrote: > If CONFIG_VMAP_STACK is selected, kernel stacks are allocated with > vmalloc_node. > > grsecurity has had a similar feature (called >

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Mon, May 02, 2016 at 12:08:50PM -0700, Florian Fainelli wrote: > On 02/05/16 11:36, Josh Cartwright wrote: > > On Fri, Apr 29, 2016 at 02:40:53PM +0200, Nicolas Ferre wrote: > > [..] > >>> static int macb_mii_init(struct macb *bp) > >>> { &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Mon, May 02, 2016 at 12:08:50PM -0700, Florian Fainelli wrote: > On 02/05/16 11:36, Josh Cartwright wrote: > > On Fri, Apr 29, 2016 at 02:40:53PM +0200, Nicolas Ferre wrote: > > [..] > >>> static int macb_mii_init(struct macb *bp) > >>> { &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Fri, Apr 29, 2016 at 02:40:53PM +0200, Nicolas Ferre wrote: [..] > > static int macb_mii_init(struct macb *bp) > > { > > struct macb_platform_data *pdata; > > struct device_node *np; > > - int err = -ENXIO, i; > > + int err = -ENXIO; > > > > /* Enable management port */ > >

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Fri, Apr 29, 2016 at 02:40:53PM +0200, Nicolas Ferre wrote: [..] > > static int macb_mii_init(struct macb *bp) > > { > > struct macb_platform_data *pdata; > > struct device_node *np; > > - int err = -ENXIO, i; > > + int err = -ENXIO; > > > > /* Enable management port */ > >

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 07:34:59PM -0500, Josh Cartwright wrote: > On Thu, Apr 28, 2016 at 11:23:15PM +0200, Andrew Lunn wrote: > > On Thu, Apr 28, 2016 at 04:03:57PM -0500, Josh Cartwright wrote: > > > On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > > > &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 07:34:59PM -0500, Josh Cartwright wrote: > On Thu, Apr 28, 2016 at 11:23:15PM +0200, Andrew Lunn wrote: > > On Thu, Apr 28, 2016 at 04:03:57PM -0500, Josh Cartwright wrote: > > > On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > > > &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 11:23:15PM +0200, Andrew Lunn wrote: > On Thu, Apr 28, 2016 at 04:03:57PM -0500, Josh Cartwright wrote: > > On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > > > On Thu, Apr 28, 2016 at 01:55:27PM -0500, Nathan Sullivan wrote: > > > &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 11:23:15PM +0200, Andrew Lunn wrote: > On Thu, Apr 28, 2016 at 04:03:57PM -0500, Josh Cartwright wrote: > > On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > > > On Thu, Apr 28, 2016 at 01:55:27PM -0500, Nathan Sullivan wrote: > > > &

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > On Thu, Apr 28, 2016 at 01:55:27PM -0500, Nathan Sullivan wrote: > > On Thu, Apr 28, 2016 at 08:43:03PM +0200, Andrew Lunn wrote: > > > > I agree that is a valid fix for AT91, however it won't solve our > > > > problem, since > > > >

Re: [PATCH v2] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 08:59:32PM +0200, Andrew Lunn wrote: > On Thu, Apr 28, 2016 at 01:55:27PM -0500, Nathan Sullivan wrote: > > On Thu, Apr 28, 2016 at 08:43:03PM +0200, Andrew Lunn wrote: > > > > I agree that is a valid fix for AT91, however it won't solve our > > > > problem, since > > > >

Re: [PATCH] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 09:19:47AM -0500, Nathan Sullivan wrote: > Since of_mdiobus_register and mdiobus_register will scan automatically, This is only partially true. of_mdiobus_register() only scans for PHYs with device tree presence (starting with nodes which specify an address, then

Re: [PATCH] net: macb: do not scan PHYs manually

On Thu, Apr 28, 2016 at 09:19:47AM -0500, Nathan Sullivan wrote: > Since of_mdiobus_register and mdiobus_register will scan automatically, This is only partially true. of_mdiobus_register() only scans for PHYs with device tree presence (starting with nodes which specify an address, then

Re: Issue with ioremap

On Fri, Apr 01, 2016 at 01:13:06AM +0530, punnaiah choudary kalluri wrote: > Hi, > > We are using the pl353 smc controller for interfacing the nand in our zynq > SOC. > The driver for this controller is currently under mainline review. > Recently we are moved to 4.4 kernel and observing issues

Re: Issue with ioremap

On Fri, Apr 01, 2016 at 01:13:06AM +0530, punnaiah choudary kalluri wrote: > Hi, > > We are using the pl353 smc controller for interfacing the nand in our zynq > SOC. > The driver for this controller is currently under mainline review. > Recently we are moved to 4.4 kernel and observing issues

Re: [ANNOUNCE] 3.14.64-rt67

On Tue, Mar 15, 2016 at 10:50:31PM -0400, Paul Gortmaker wrote: > On Tue, Mar 15, 2016 at 7:25 PM, Paul Gortmaker > wrote: > > On Tue, Mar 15, 2016 at 5:45 PM, Paul Gortmaker > > wrote: > >> On Mon, Mar 14, 2016 at 11:49 AM, Steven

Re: [ANNOUNCE] 3.14.64-rt67

On Tue, Mar 15, 2016 at 10:50:31PM -0400, Paul Gortmaker wrote: > On Tue, Mar 15, 2016 at 7:25 PM, Paul Gortmaker > wrote: > > On Tue, Mar 15, 2016 at 5:45 PM, Paul Gortmaker > > wrote: > >> On Mon, Mar 14, 2016 at 11:49 AM, Steven Rostedt > >> wrote: > >>> > >>> Dear RT Folks, > >>> > >>>

Re: [PATCH 2/2] misc: nirtfeatures: physical interface elements

Hey Kyle- On Mon, Mar 14, 2016 at 04:55:08PM -0500, Kyle Roeschley wrote: > From: Gratian Crisan From what I understand, this was mostly Aaron's work, so he should get authorship. I could be wrong, though, but you'll want to check. > These changes add support for PIEs

Re: [PATCH 2/2] misc: nirtfeatures: physical interface elements

Hey Kyle- On Mon, Mar 14, 2016 at 04:55:08PM -0500, Kyle Roeschley wrote: > From: Gratian Crisan From what I understand, this was mostly Aaron's work, so he should get authorship. I could be wrong, though, but you'll want to check. > These changes add support for PIEs (physical interface

Re: [PATCH 1/2] misc: add nirtfeatures driver

On Mon, Mar 14, 2016 at 03:05:59PM -0700, Greg KH wrote: > On Mon, Mar 14, 2016 at 04:54:32PM -0500, Kyle Roeschley wrote: > > From: Jeff Westfahl > > > > This driver introduces support for hardware features of National > > Instruments real-time controllers. This is an ACPI

Re: [PATCH 1/2] misc: add nirtfeatures driver

On Mon, Mar 14, 2016 at 03:05:59PM -0700, Greg KH wrote: > On Mon, Mar 14, 2016 at 04:54:32PM -0500, Kyle Roeschley wrote: > > From: Jeff Westfahl > > > > This driver introduces support for hardware features of National > > Instruments real-time controllers. This is an ACPI device that exposes >

Re: [RFC v0] Use swait in completion

On Tue, Mar 08, 2016 at 06:52:06PM +0100, Sebastian Andrzej Siewior wrote: > * Daniel Wagner | 2016-03-08 16:59:13 [+0100]: > > >Hi, > Hi, > > >As Peter correctly pointed out in [1] a simple conversion from > >wait to swait in completion.c wont work. I played a bit around and > >came up with

Re: [RFC v0] Use swait in completion

On Tue, Mar 08, 2016 at 06:52:06PM +0100, Sebastian Andrzej Siewior wrote: > * Daniel Wagner | 2016-03-08 16:59:13 [+0100]: > > >Hi, > Hi, > > >As Peter correctly pointed out in [1] a simple conversion from > >wait to swait in completion.c wont work. I played a bit around and > >came up with

[PATCH] sc16is7xx: drop bogus use of IRQF_ONESHOT

) (kthread_worker_fn) from (kthread+0xd0/0xe8) (kthread) from (ret_from_fork+0x14/0x2c) Reported-by: Sean Nyekjaer <sean.nyekj...@prevas.dk> Fixes: 9e6f4ca3e567 ("sc16is7xx: use kthread_worker for tx_work and irq") Cc: sta...@vger.kernel.org # v4.1+ Signed-off-by: Josh Cartwright <jo...@ni.co

[PATCH] sc16is7xx: drop bogus use of IRQF_ONESHOT

) (kthread_worker_fn) from (kthread+0xd0/0xe8) (kthread) from (ret_from_fork+0x14/0x2c) Reported-by: Sean Nyekjaer Fixes: 9e6f4ca3e567 ("sc16is7xx: use kthread_worker for tx_work and irq") Cc: sta...@vger.kernel.org # v4.1+ Signed-off-by: Josh Cartwright --- drivers/tty/serial/sc16is7xx.c | 2

Re: [PATCH v16 1/6] fpga: add bindings document for fpga region

Hey Alan- First off, thanks for all of your (and others') work on this. On Fri, Feb 05, 2016 at 03:29:58PM -0600, at...@opensource.altera.com wrote: > From: Alan Tull > > New bindings document for FPGA Region to support programming > FPGA's under Device Tree control > > Signed-off-by: Alan

Re: [PATCH v16 1/6] fpga: add bindings document for fpga region

Hey Alan- First off, thanks for all of your (and others') work on this. On Fri, Feb 05, 2016 at 03:29:58PM -0600, at...@opensource.altera.com wrote: > From: Alan Tull > > New bindings document for FPGA Region to support programming > FPGA's under Device Tree

[PATCH 2/2] ARM: zynq: address L2 cache data corruption

reserved. It is added in the Zynq-7000 AP SoC Technical Reference Manual (TRM) v1.5 as "Reserved". Thanks to Jaeden Amero for initial debugging and triage efforts. Signed-off-by: Josh Cartwright --- arch/arm/mach-zynq/slcr.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm

[PATCH 0/2] ARM: zynq: address silent L2 cache corruption

it to the proper value prior to bringing up L2. You can find more information about this bug in AR#54190[1]. 1: http://www.xilinx.com/support/answers/54190.html Josh Cartwright (2): ARM: zynq: initialize slcr mapping earlier ARM: zynq: address L2 cache data corruption arch/arm/mach-zynq/common.c

[PATCH 1/2] ARM: zynq: initialize slcr mapping earlier

In preparation for performing additional configuration prior to bringing up L2, move the slcr initialization earlier in the boot process. Signed-off-by: Josh Cartwright --- arch/arm/mach-zynq/common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-zynq

[PATCH 2/2] ARM: zynq: address L2 cache data corruption

reserved. It is added in the Zynq-7000 AP SoC Technical Reference Manual (TRM) v1.5 as "Reserved". Thanks to Jaeden Amero for initial debugging and triage efforts. Signed-off-by: Josh Cartwright <jo...@ni.com> --- arch/arm/mach-zynq/slcr.c | 4 1 file changed, 4 insertions(+) d

[PATCH 1/2] ARM: zynq: initialize slcr mapping earlier

In preparation for performing additional configuration prior to bringing up L2, move the slcr initialization earlier in the boot process. Signed-off-by: Josh Cartwright <jo...@ni.com> --- arch/arm/mach-zynq/common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/ar

[PATCH 0/2] ARM: zynq: address silent L2 cache corruption

it to the proper value prior to bringing up L2. You can find more information about this bug in AR#54190[1]. 1: http://www.xilinx.com/support/answers/54190.html Josh Cartwright (2): ARM: zynq: initialize slcr mapping earlier ARM: zynq: address L2 cache data corruption arch/arm/mach-zynq/common.c

Re: [PATCH net 1/2] net: cadence: macb: Disable USRIO register on some platforms

On Mon, Dec 07, 2015 at 11:58:33AM +0100, Neil Armstrong wrote: > On some platforms, the macb integration does not use the USRIO > register to configure the (R)MII port and clocks. > When the register is not implemented and the MACB error signal > is connected to the bus error, reading or writing

Re: [PATCH net 1/2] net: cadence: macb: Disable USRIO register on some platforms

On Mon, Dec 07, 2015 at 11:58:33AM +0100, Neil Armstrong wrote: > On some platforms, the macb integration does not use the USRIO > register to configure the (R)MII port and clocks. > When the register is not implemented and the MACB error signal > is connected to the bus error, reading or writing

Re: [PATCH] hid: usbhid: hid-core: fix recursive deadlock

On Wed, Nov 18, 2015 at 11:05:44PM +0200, Ioan-Adrian Ratiu wrote: > On Wed, 18 Nov 2015 21:37:42 +0100 (CET) > Jiri Kosina wrote: > > > On Wed, 18 Nov 2015, Ioan-Adrian Ratiu wrote: > > > > > The critical section protected by usbhid->lock in hid_ctrl() is too > > > big and in rare cases causes

Re: [PATCH] hid: usbhid: hid-core: fix recursive deadlock

On Wed, Nov 18, 2015 at 11:05:44PM +0200, Ioan-Adrian Ratiu wrote: > On Wed, 18 Nov 2015 21:37:42 +0100 (CET) > Jiri Kosina wrote: > > > On Wed, 18 Nov 2015, Ioan-Adrian Ratiu wrote: > > > > > The critical section protected by usbhid->lock in hid_ctrl() is too > > > big and in

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 12:59:16PM -0500, Josh Cartwright wrote: > On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote: > > On Wed, 28 Oct 2015, Moritz Fischer wrote: > > > > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote: > > > > On Wed, Oct

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote: > On Wed, 28 Oct 2015, Moritz Fischer wrote: > > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright wrote: > > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote: > > >> On Wed, Oct 28, 2015 a

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote: > On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright wrote: > > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote: > >> From: Alan Tull > >> > >> The Simple FPGA

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > The Simple FPGA bus uses the FPGA Manager Framework and the > FPGA Bridge Framework to provide a manufactorer-agnostic > interface for reprogramming FPGAs that is Device Tree > Overlays-based. Do

Re: [PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

On Tue, Oct 27, 2015 at 04:15:59PM -0700, Paul E. McKenney wrote: > On Tue, Oct 27, 2015 at 08:27:53AM -0700, Eric Dumazet wrote: > > On Tue, 2015-10-27 at 12:02 -0300, Arnaldo Carvalho de Melo wrote: [..] > > > The first suggestion, with it disabled by default seems to be the most > > > flexible

Re: [PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

On Tue, Oct 27, 2015 at 04:15:59PM -0700, Paul E. McKenney wrote: > On Tue, Oct 27, 2015 at 08:27:53AM -0700, Eric Dumazet wrote: > > On Tue, 2015-10-27 at 12:02 -0300, Arnaldo Carvalho de Melo wrote: [..] > > > The first suggestion, with it disabled by default seems to be the most > > > flexible

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > The Simple FPGA bus uses the FPGA Manager Framework and the > FPGA Bridge Framework to provide a manufactorer-agnostic > interface for reprogramming FPGAs that is

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote: > On Wed, Oct 28, 2015 at 3:07 AM, Josh Cartwright <jo...@ni.com> wrote: > > On Tue, Oct 27, 2015 at 05:09:12PM -0500, at...@opensource.altera.com wrote: > >> From: Alan Tull <at...@opensource.altera.com>

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote: > On Wed, 28 Oct 2015, Moritz Fischer wrote: > > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright <jo...@ni.com> wrote: > > > On Wed, Oct 28, 2015 at 08:37:51AM -0700, Moritz Fischer wrote: > > >>

Re: [PATCH v12 3/6] fpga: add simple-fpga-bus

On Wed, Oct 28, 2015 at 12:59:16PM -0500, Josh Cartwright wrote: > On Wed, Oct 28, 2015 at 12:03:41PM -0500, atull wrote: > > On Wed, 28 Oct 2015, Moritz Fischer wrote: > > > > > On Wed, Oct 28, 2015 at 9:18 AM, Josh Cartwright <jo...@ni.com> wrote: > > &g

Re: [PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

On Mon, Oct 26, 2015 at 05:44:22PM -0700, Paul E. McKenney wrote: > On Mon, Oct 26, 2015 at 02:14:55PM -0500, Josh Cartwright wrote: > > This reverts commit be3fc413da9eb17cce0991f214ab019d16c88c41. > > > > While the use of synchronize_rcu_expedited() might make > >

Re: [PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

On Mon, Oct 26, 2015 at 05:44:22PM -0700, Paul E. McKenney wrote: > On Mon, Oct 26, 2015 at 02:14:55PM -0500, Josh Cartwright wrote: > > This reverts commit be3fc413da9eb17cce0991f214ab019d16c88c41. > > > > While the use of synchronize_rcu_expedited() might make > >

[PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

op_machine() mechanism). Without be3fc413da9e reverted, we can observe a latency spike up to 30us with cyclictest by rapidly unplugging/reestablishing an ethernet link. Cc: Eric Dumazet Cc: Paul E. McKenney Cc: David S. Miller Signed-off-by: Josh Cartwright --- net/core/dev.c | 5 + 1 file

[PATCH -rt] Revert "net: use synchronize_rcu_expedited()"

davemloft.net> Signed-off-by: Josh Cartwright <jo...@ni.com> --- net/core/dev.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/net/core/dev.c b/net/core/dev.c index f8c23de..869ef62 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -6969,10 +6969,7 @@ EXPORT_SYMBOL(f

Re: [RFC] fpga: socfpga: Fix check of return value of devm_request_irq

likely be the easiest way for him to pick it up. Feel free to add by Reviewed-by as well: Reviewed-by: Josh Cartwright Thanks, Josh > > --- > > drivers/fpga/socfpga.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/fpga/so

Re: [RFC] fpga: socfpga: Fix check of return value of devm_request_irq

ou'll want to make sure he's at least CC'd. A proper resend would likely be the easiest way for him to pick it up. Feel free to add by Reviewed-by as well: Reviewed-by: Josh Cartwright <jo...@eso.teric.us> Thanks, Josh > > --- > > drivers/fpga/socfpga.c | 2 +- > > 1

Re: [PATCHv2] fpga: zynq-fpga: Change fw format to handle bin instead of bit.

On Tue, Oct 20, 2015 at 10:19:56AM -0700, Moritz Fischer wrote: > This gets rid of the code to strip away the header and byteswap, > as well as the check for the sync word. > > Signed-off-by: Moritz Fischer Simpler is better. Reviewed-by: Josh Cartwright Josh -- To unsu

Re: [PATCHv2] fpga: zynq-fpga: Change fw format to handle bin instead of bit.

On Tue, Oct 20, 2015 at 10:19:56AM -0700, Moritz Fischer wrote: > This gets rid of the code to strip away the header and byteswap, > as well as the check for the sync word. > > Signed-off-by: Moritz Fischer <moritz.fisc...@ettus.com> Simpler is better. Reviewed-by: Josh Cartwr

Re: [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

On Mon, Oct 19, 2015 at 04:09:09PM +0200, Michal Simek wrote: > On 10/18/2015 07:53 PM, Josh Cartwright wrote: > > On Fri, Oct 16, 2015 at 03:42:29PM -0700, Moritz Fischer wrote: [..] > >> @@ -294,6 +294,11 @@ > >>devcfg: devcfg@f8007000 { > >>

Re: [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

On Mon, Oct 19, 2015 at 04:09:09PM +0200, Michal Simek wrote: > On 10/18/2015 07:53 PM, Josh Cartwright wrote: > > On Fri, Oct 16, 2015 at 03:42:29PM -0700, Moritz Fischer wrote: [..] > >> @@ -294,6 +294,11 @@ > >>devcfg: devcfg@f8007000 { > >>

Re: [PATCHv2 0/3] Adding FPGA Manager support for Xilinx Zynq

On Fri, Oct 16, 2015 at 03:42:27PM -0700, Moritz Fischer wrote: > Hi all, > > I've tried to address most of the feedback that was brought up, > the one thing I haven't looked at was the firmware format part, > since that was still in discussion. > So I'm still open to suggestions on how to handle

Re: [PATCHv2 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

Hey Moritz- On Fri, Oct 16, 2015 at 03:42:30PM -0700, Moritz Fischer wrote: > This commit adds FPGA Manager support for the Xilinx Zynq chip. > The code borrows some from the xdevcfg driver in Xilinx' > vendor tree. > > Signed-off-by: Moritz Fischer > --- > > v2: > - Replaced locking error

Re: [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

On Fri, Oct 16, 2015 at 03:42:29PM -0700, Moritz Fischer wrote: > Added addtional nodes required for FPGA Manager operation > of the Xilinx Zynq Devc configuration interface. > > Reviewed-by: Sören Brinkmann > Signed-off-by: Moritz Fischer > --- > > v2: No changes > > --- >

Re: [PATCHv2 1/3] ARM: dt: fpga: Added binding docs for Xilinx Zynq FPGA manager.

contain "xlnx,zynq-devcfg-1.0" > +- reg: base address and size for memory mapped io > +- interrupts:interrupt for the FPGA manager device > +- clocks:phandle for clocks required operation Technically a "clock specifier", but

Re: [PATCH v4] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

Hello, I've got a few comments below. On Sat, Oct 17, 2015 at 12:52:18PM +0530, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Added MSI domain implementation for

Re: [PATCHv2 0/3] Adding FPGA Manager support for Xilinx Zynq

On Fri, Oct 16, 2015 at 03:42:27PM -0700, Moritz Fischer wrote: > Hi all, > > I've tried to address most of the feedback that was brought up, > the one thing I haven't looked at was the firmware format part, > since that was still in discussion. > So I'm still open to suggestions on how to handle

Re: [PATCH v4] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

Hello, I've got a few comments below. On Sat, Oct 17, 2015 at 12:52:18PM +0530, Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > ---

Re: [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

On Fri, Oct 16, 2015 at 03:42:29PM -0700, Moritz Fischer wrote: > Added addtional nodes required for FPGA Manager operation > of the Xilinx Zynq Devc configuration interface. > > Reviewed-by: Sören Brinkmann > Signed-off-by: Moritz Fischer >

Re: [PATCHv2 1/3] ARM: dt: fpga: Added binding docs for Xilinx Zynq FPGA manager.

> +- compatible:should contain "xlnx,zynq-devcfg-1.0" > +- reg: base address and size for memory mapped io > +- interrupts:interrupt for the FPGA manager device > +- clocks:phandle for clocks required operation Techni

Re: [PATCHv2 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

Hey Moritz- On Fri, Oct 16, 2015 at 03:42:30PM -0700, Moritz Fischer wrote: > This commit adds FPGA Manager support for the Xilinx Zynq chip. > The code borrows some from the xdevcfg driver in Xilinx' > vendor tree. > > Signed-off-by: Moritz Fischer > --- > > v2: > -

Re: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

On Wed, Oct 07, 2015 at 03:33:50AM +, Anup Patel wrote: > From: Florian Fainelli [mailto:f.faine...@gmail.com] > > On 06/10/15 15:25, Scott Branden wrote: [..] > > Then instead of adding a "reset flag" to Device Tree, another approach > > could be > > to put the desired or currently

Re: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

On Wed, Oct 07, 2015 at 03:33:50AM +, Anup Patel wrote: > From: Florian Fainelli [mailto:f.faine...@gmail.com] > > On 06/10/15 15:25, Scott Branden wrote: [..] > > Then instead of adding a "reset flag" to Device Tree, another approach > > could be > > to put the desired or currently

Re: [PATCH 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

Hey Moritz- On Fri, Oct 09, 2015 at 12:45:07AM +0200, Moritz Fischer wrote: > This commit adds FPGA Manager support for the Xilinx Zynq chip. > The code heavily borrows from the xdevcfg driver in Xilinx' > vendor tree. > > Signed-off-by: Moritz Fischer [..] > +++ b/drivers/fpga/zynq-fpga.c [..]

Re: [PATCH 1/3] doc: dt: fpga: Added Documentation for Xilinx Zynq FPGA manager.

On Fri, Oct 09, 2015 at 12:45:05AM +0200, Moritz Fischer wrote: > Signed-off-by: Moritz Fischer > --- > .../bindings/fpga/xilinx-zynq-fpga-mgr.txt | 26 > ++ > 1 file changed, 26 insertions(+) > create mode 100644 >

Re: [PATCH 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

Hey Moritz- On Fri, Oct 09, 2015 at 12:45:07AM +0200, Moritz Fischer wrote: > This commit adds FPGA Manager support for the Xilinx Zynq chip. > The code heavily borrows from the xdevcfg driver in Xilinx' > vendor tree. > > Signed-off-by: Moritz Fischer [..] > +++

Re: [PATCH 1/3] doc: dt: fpga: Added Documentation for Xilinx Zynq FPGA manager.

On Fri, Oct 09, 2015 at 12:45:05AM +0200, Moritz Fischer wrote: > Signed-off-by: Moritz Fischer > --- > .../bindings/fpga/xilinx-zynq-fpga-mgr.txt | 26 > ++ > 1 file changed, 26 insertions(+) > create mode 100644 >

Re: [PATCH v2 1/3] leds: add device activity LED triggers

On Fri, Oct 02, 2015 at 09:45:37AM +0200, Maciek Borzecki wrote: > On 10/01 09:47, Josh Cartwright wrote: > > On Thu, Oct 01, 2015 at 04:04:31PM +0200, Maciek Borzecki wrote: > > > The patch adds LED triggers for indicating an activity on a selected > > > device. The

Re: [PATCH v2 1/3] leds: add device activity LED triggers

On Fri, Oct 02, 2015 at 09:45:37AM +0200, Maciek Borzecki wrote: > On 10/01 09:47, Josh Cartwright wrote: > > On Thu, Oct 01, 2015 at 04:04:31PM +0200, Maciek Borzecki wrote: > > > The patch adds LED triggers for indicating an activity on a selected > > > device. The

Re: [PATCH v2 1/3] leds: add device activity LED triggers

Hello Maciek- Some architectural questions below: On Thu, Oct 01, 2015 at 04:04:31PM +0200, Maciek Borzecki wrote: > The patch adds LED triggers for indicating an activity on a selected > device. The drivers that intend to use triggers need to register > respective devices using

Re: [PATCH v2 1/3] leds: add device activity LED triggers

Hello Maciek- Some architectural questions below: On Thu, Oct 01, 2015 at 04:04:31PM +0200, Maciek Borzecki wrote: > The patch adds LED triggers for indicating an activity on a selected > device. The drivers that intend to use triggers need to register > respective devices using

Re: [PATCH] mtd: cmdlinepart: allow fill-up partition at any point

On Tue, Sep 29, 2015 at 01:00:45PM -0700, Brian Norris wrote: > On Tue, Sep 29, 2015 at 12:55:39PM -0700, Brian Norris wrote: > > ... > > Seems Ben Shelton has moved on to other things... He has, but there are others paying attention who want this feature :). Josh signature.asc

Re: [PATCH] mtd: cmdlinepart: allow fill-up partition at any point

On Tue, Sep 29, 2015 at 01:00:45PM -0700, Brian Norris wrote: > On Tue, Sep 29, 2015 at 12:55:39PM -0700, Brian Norris wrote: > > ... > > Seems Ben Shelton has moved on to other things... He has, but there are others paying attention who want this feature :). Josh signature.asc

Re: [PATCH] rtc: Add a driver for Micro Crystal RV8803

Hello Alexandre- Few comments below. On Sat, Sep 26, 2015 at 03:54:39PM +0200, Alexandre Belloni wrote: > This driver supports the following functions: > - reading and settings time > - alarms when connected to an IRQ > - reading and clearing the voltage low flags > - nvram > >

Re: [PATCH] rtc: Add a driver for Micro Crystal RV8803

Hello Alexandre- Few comments below. On Sat, Sep 26, 2015 at 03:54:39PM +0200, Alexandre Belloni wrote: > This driver supports the following functions: > - reading and settings time > - alarms when connected to an IRQ > - reading and clearing the voltage low flags > - nvram > >

Re: [PATCH v11 3/4] add FPGA manager core

On Wed, Sep 23, 2015 at 12:10:13PM -0500, atull wrote: > On Tue, 22 Sep 2015, Josh Cartwright wrote: [..] > > > +struct fpga_manager *of_fpga_mgr_get(struct device_node *node) > > > +{ > > > + struct fpga_manager *mgr; > > > + struct device *dev; > >

Re: [PATCH v11 3/4] add FPGA manager core

On Wed, Sep 23, 2015 at 12:10:13PM -0500, atull wrote: > On Tue, 22 Sep 2015, Josh Cartwright wrote: [..] > > > +struct fpga_manager *of_fpga_mgr_get(struct device_node *node) > > > +{ > > > + struct fpga_manager *mgr; > > > + struct device *dev; > >

Re: [PATCH v11 4/4] fpga manager: add driver for socfpga fpga manager

On Tue, Sep 22, 2015 at 10:21:11AM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > Add driver to fpga manager framework to allow configuration > of FPGA in Altera SoCFPGA parts. > > Signed-off-by: Alan Tull > Acked-by: Michal Simek > Acked-by: Moritz Fischer [..] > +++

Re: [PATCH v11 3/4] add FPGA manager core

On Tue, Sep 22, 2015 at 10:21:10AM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > API to support programming FPGA's. > > The following functions are exported as GPL: > * fpga_mgr_buf_load >Load fpga from image in buffer > > * fpga_mgr_firmware_load >Request firmware

Re: [PATCH v11 3/4] add FPGA manager core

On Tue, Sep 22, 2015 at 10:21:10AM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > API to support programming FPGA's. > > The following functions are exported as GPL: > * fpga_mgr_buf_load >Load fpga from image in buffer > > *

Re: [PATCH v11 4/4] fpga manager: add driver for socfpga fpga manager

On Tue, Sep 22, 2015 at 10:21:11AM -0500, at...@opensource.altera.com wrote: > From: Alan Tull > > Add driver to fpga manager framework to allow configuration > of FPGA in Altera SoCFPGA parts. > > Signed-off-by: Alan Tull > Acked-by:

Re: [PATCH 1/2] ubifs: Remove dead xattr code

On Thu, Aug 20, 2015 at 10:48:38AM +0800, Dongsheng Yang wrote: > On 08/20/2015 04:35 AM, Richard Weinberger wrote: > >This is a partial revert of commit d7f0b70d30ffb9bbe6b8a3e1035cf0b79965ef53 > >("UBIFS: Add security.* XATTR support for the UBIFS"). > > Hi Richard, > What about a full

Re: [PATCH 1/2] ubifs: Remove dead xattr code

On Thu, Aug 20, 2015 at 10:48:38AM +0800, Dongsheng Yang wrote: On 08/20/2015 04:35 AM, Richard Weinberger wrote: This is a partial revert of commit d7f0b70d30ffb9bbe6b8a3e1035cf0b79965ef53 (UBIFS: Add security.* XATTR support for the UBIFS). Hi Richard, What about a full reverting of

Re: [PATCH v2] nohz: prevent tilegx network driver interrupts

On Fri, Jul 10, 2015 at 07:06:23PM -0400, Chris Metcalf wrote: > On 7/10/2015 6:45 PM, Josh Cartwright wrote: > >>+static inline const struct cpumask *housekeeping_cpumask(void) > >>>+{ > >>>+#ifdef CONFIG_NO_HZ_FULL > >>>+ if (tick_nohz_full_ena

Re: [PATCH v2] nohz: prevent tilegx network driver interrupts

On Fri, Jul 10, 2015 at 03:37:25PM -0400, Chris Metcalf wrote: > Normally the tilegx networking shim sends irqs to all the cores > to distribute the load of processing incoming-packet interrupts, > so that you can get to multiple Gb's of traffic inbound. > > However, in nohz_full mode we don't

Re: [PATCH v2] nohz: prevent tilegx network driver interrupts

On Fri, Jul 10, 2015 at 03:37:25PM -0400, Chris Metcalf wrote: Normally the tilegx networking shim sends irqs to all the cores to distribute the load of processing incoming-packet interrupts, so that you can get to multiple Gb's of traffic inbound. However, in nohz_full mode we don't want to

Re: [PATCH v2] nohz: prevent tilegx network driver interrupts

On Fri, Jul 10, 2015 at 07:06:23PM -0400, Chris Metcalf wrote: On 7/10/2015 6:45 PM, Josh Cartwright wrote: +static inline const struct cpumask *housekeeping_cpumask(void) +{ +#ifdef CONFIG_NO_HZ_FULL + if (tick_nohz_full_enabled()) + return housekeeping_mask; +#endif Just

Re: [PATCH v7 0/3] Add arm pl353 smc nand driver for xilinx zynq soc

On Mon, Jun 08, 2015 at 11:38:35PM +0530, Punnaiah Choudary Kalluri wrote: > The following patches add arm pl353 static memory controller driver for > xilinx zynq soc. The arm pl353 smc supports two interfaces i.e nand and > nor/sram memory interfaces. The current implementation supports only a >

Re: [PATCH v2 1/1] Added additional callback to ptp_clock_info:

On Wed, Jul 08, 2015 at 01:54:34PM +0200, Richard Cochran wrote: > On Mon, Jul 06, 2015 at 03:44:58PM -0500, Josh Cartwright wrote: > > It's difficult to make too many judgements without seeing how a driver > > might implement this; is there another patchset that shows how a driver

Re: [PATCH v2 1/1] Added additional callback to ptp_clock_info:

On Wed, Jul 08, 2015 at 01:54:34PM +0200, Richard Cochran wrote: On Mon, Jul 06, 2015 at 03:44:58PM -0500, Josh Cartwright wrote: It's difficult to make too many judgements without seeing how a driver might implement this; is there another patchset that shows how a driver implements

Re: [PATCH v7 0/3] Add arm pl353 smc nand driver for xilinx zynq soc

On Mon, Jun 08, 2015 at 11:38:35PM +0530, Punnaiah Choudary Kalluri wrote: The following patches add arm pl353 static memory controller driver for xilinx zynq soc. The arm pl353 smc supports two interfaces i.e nand and nor/sram memory interfaces. The current implementation supports only a

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