Re: [PATCH] perf: qcom_l2_pmu: don't allow guest access

On 12/7/2017 8:38 AM, Will Deacon wrote: > On Wed, Dec 06, 2017 at 04:19:24PM -0500, Leeder, Neil wrote: >> On 12/6/2017 11:11 AM, Mark Rutland wrote: >>> On Wed, Dec 06, 2017 at 10:55:33AM -0500, Neil Leeder wrote: >>>> Guests cannot access IMPDEF sy

Re: [PATCH] perf: qcom_l2_pmu: don't allow guest access

On 12/7/2017 8:38 AM, Will Deacon wrote: > On Wed, Dec 06, 2017 at 04:19:24PM -0500, Leeder, Neil wrote: >> On 12/6/2017 11:11 AM, Mark Rutland wrote: >>> On Wed, Dec 06, 2017 at 10:55:33AM -0500, Neil Leeder wrote: >>>> Guests cannot access IMPDEF sy

Re: [PATCH] perf: qcom_l2_pmu: don't allow guest access

On 12/6/2017 11:11 AM, Mark Rutland wrote: > On Wed, Dec 06, 2017 at 10:55:33AM -0500, Neil Leeder wrote: >> Guests cannot access IMPDEF system registers, which are used >> by this driver. Disable the driver if it's running in a guest VM. >> >> Signed-off-by: Neil Leeder

Re: [PATCH] perf: qcom_l2_pmu: don't allow guest access

On 12/6/2017 11:11 AM, Mark Rutland wrote: > On Wed, Dec 06, 2017 at 10:55:33AM -0500, Neil Leeder wrote: >> Guests cannot access IMPDEF system registers, which are used >> by this driver. Disable the driver if it's running in a guest VM. >> >> Signed-off-by: Neil Leeder >> --- >>

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

Hi Yury, On 10/31/2017 7:33 PM, Yury Norov wrote: > Hi Neil, > > On Fri, Aug 04, 2017 at 03:59:12PM -0400, Neil Leeder wrote: >> This adds a driver for the SMMUv3 PMU into the perf framework. >> It includes an IORT update to support PM Counter Groups. >> >> IORT has no mechanism for determining

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

Hi Yury, On 10/31/2017 7:33 PM, Yury Norov wrote: > Hi Neil, > > On Fri, Aug 04, 2017 at 03:59:12PM -0400, Neil Leeder wrote: >> This adds a driver for the SMMUv3 PMU into the perf framework. >> It includes an IORT update to support PM Counter Groups. >> >> IORT has no mechanism for determining

Re: [PATCH] perf: qcom_l2_pmu: add event names

On 9/25/2017 11:08 AM, Will Deacon wrote: > On Thu, Sep 14, 2017 at 03:30:13PM -0400, Neil Leeder wrote: >> Add event names so that common events can be >> specified symbolically, for example: >> >> l2cache_0/total-reads/,l2cache_0/cycles/ >> >> Event names are displayed in 'perf list'. >> >>

Re: [PATCH] perf: qcom_l2_pmu: add event names

On 9/25/2017 11:08 AM, Will Deacon wrote: > On Thu, Sep 14, 2017 at 03:30:13PM -0400, Neil Leeder wrote: >> Add event names so that common events can be >> specified symbolically, for example: >> >> l2cache_0/total-reads/,l2cache_0/cycles/ >> >> Event names are displayed in 'perf list'. >> >>

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

On 8/9/2017 9:26 PM, Hanjun Guo wrote: > On 2017/8/9 23:48, Leeder, Neil wrote: >>>>drivers/perf/Kconfig | 9 + >>>>drivers/perf/Makefile | 1 + >>>>drivers/perf/arm_smmuv3_pmu.c | 823 >>>> +

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

On 8/9/2017 9:26 PM, Hanjun Guo wrote: > On 2017/8/9 23:48, Leeder, Neil wrote: >>>>drivers/perf/Kconfig | 9 + >>>>drivers/perf/Makefile | 1 + >>>>drivers/perf/arm_smmuv3_pmu.c | 823 >>>> +

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

Hi Hanjun, On 8/9/2017 3:56 AM, Hanjun Guo wrote: > Hi Neil, > > On 2017/8/5 3:59, Neil Leeder wrote: >> This adds a driver for the SMMUv3 PMU into the perf framework. >> It includes an IORT update to support PM Counter Groups. >> >> IORT has no mechanism for determining device names so PMUs >>

Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support

Hi Hanjun, On 8/9/2017 3:56 AM, Hanjun Guo wrote: > Hi Neil, > > On 2017/8/5 3:59, Neil Leeder wrote: >> This adds a driver for the SMMUv3 PMU into the perf framework. >> It includes an IORT update to support PM Counter Groups. >> >> IORT has no mechanism for determining device names so PMUs >>

Re: [PATCH 2/2] perf: add arm64 smmuv3 pmu driver

Hi Robin, Thank you for your comments. On 8/7/2017 10:31 AM, Robin Murphy wrote: > On 04/08/17 20:59, Neil Leeder wrote: >> PMUs are named smmu_0_ where >> is the physical page address of the SMMU PMCG. >> For example, the SMMU PMCG at 0xff8884 is named smmu_0_ff88840 > > This seems a bit

Re: [PATCH 2/2] perf: add arm64 smmuv3 pmu driver

Hi Robin, Thank you for your comments. On 8/7/2017 10:31 AM, Robin Murphy wrote: > On 04/08/17 20:59, Neil Leeder wrote: >> PMUs are named smmu_0_ where >> is the physical page address of the SMMU PMCG. >> For example, the SMMU PMCG at 0xff8884 is named smmu_0_ff88840 > > This seems a bit

Re: [PATCH 1/2] acpi: arm64: add iort support for PMCG

Hi Lorenzo, On 8/7/2017 12:44 PM, Lorenzo Pieralisi wrote: > On Fri, Aug 04, 2017 at 03:59:13PM -0400, Neil Leeder wrote: [...] >> +} else if (iort_node->type == ACPI_IORT_NODE_PMCG) { >> +if (iort_add_smmu_platform_device(iort_node)) >> +

Re: [PATCH 1/2] acpi: arm64: add iort support for PMCG

Hi Lorenzo, On 8/7/2017 12:44 PM, Lorenzo Pieralisi wrote: > On Fri, Aug 04, 2017 at 03:59:13PM -0400, Neil Leeder wrote: [...] >> +} else if (iort_node->type == ACPI_IORT_NODE_PMCG) { >> +if (iort_add_smmu_platform_device(iort_node)) >> +

Re: [PATCH 1/2] acpi: arm64: add iort support for PMCG

Hi Robin, Thank you for the review. On 8/7/2017 7:17 AM, Robin Murphy wrote: > Hi Neil, > > On 04/08/17 20:59, Neil Leeder wrote: [...] >> +res[1].start = pmcg->base_address + SZ_64K; > > Ugh, I see there's a nasty spec hole here - IORT only defines one base > address, but SMMUv3 says

Re: [PATCH 1/2] acpi: arm64: add iort support for PMCG

Hi Robin, Thank you for the review. On 8/7/2017 7:17 AM, Robin Murphy wrote: > Hi Neil, > > On 04/08/17 20:59, Neil Leeder wrote: [...] >> +res[1].start = pmcg->base_address + SZ_64K; > > Ugh, I see there's a nasty spec hole here - IORT only defines one base > address, but SMMUv3 says

Re: [PATCH] perf: qcom_l2: fix column exclusion check

On 7/25/2017 1:01 PM, Mark Rutland wrote: > On Mon, Jul 24, 2017 at 05:17:02PM -0400, Neil Leeder wrote: >> The check for column exclusion did not verify that the event being >> checked was an L2 event, and not a software event. >> Software events should not be checked for column exclusion. >>

Re: [PATCH] perf: qcom_l2: fix column exclusion check

On 7/25/2017 1:01 PM, Mark Rutland wrote: > On Mon, Jul 24, 2017 at 05:17:02PM -0400, Neil Leeder wrote: >> The check for column exclusion did not verify that the event being >> checked was an L2 event, and not a software event. >> Software events should not be checked for column exclusion. >>

Re: [PATCH/RFC] arm64: pmu: add Qualcomm Technologies extensions

Hi Mark Z., On 3/2/2017 4:05 AM, Marc Zyngier wrote: On 01/03/17 21:36, Leeder, Neil wrote: On 3/1/2017 1:10 PM, Mark Rutland wrote: KVM already has (architected) PMU support, and without a corresponding KVM patch this is at best insufficient. I don't imagine the KVM folk will be too thrilled

Re: [PATCH/RFC] arm64: pmu: add Qualcomm Technologies extensions

Hi Mark Z., On 3/2/2017 4:05 AM, Marc Zyngier wrote: On 01/03/17 21:36, Leeder, Neil wrote: On 3/1/2017 1:10 PM, Mark Rutland wrote: KVM already has (architected) PMU support, and without a corresponding KVM patch this is at best insufficient. I don't imagine the KVM folk will be too thrilled

Re: [PATCH/RFC] arm64: pmu: add Qualcomm Technologies extensions

Hi Mark, Thanks for the quick response. On 3/1/2017 1:10 PM, Mark Rutland wrote: Hi Neil, On Wed, Mar 01, 2017 at 11:18:05AM -0500, Neil Leeder wrote: Adds CPU PMU perf events support for Qualcomm Technologies' Falkor CPU. The Qualcomm Technologies CPU PMU is named qcom_pmuv3 and provides

Re: [PATCH/RFC] arm64: pmu: add Qualcomm Technologies extensions

Hi Mark, Thanks for the quick response. On 3/1/2017 1:10 PM, Mark Rutland wrote: Hi Neil, On Wed, Mar 01, 2017 at 11:18:05AM -0500, Neil Leeder wrote: Adds CPU PMU perf events support for Qualcomm Technologies' Falkor CPU. The Qualcomm Technologies CPU PMU is named qcom_pmuv3 and provides

Re: [PATCH v9] perf: add qcom l2 cache perf events driver

Hi Mark, Thanks for those comments - I'll add the fixes. On 2/6/2017 10:48 AM, Mark Rutland wrote: I'm still concerned by this use of the filter_match callback, because it depends on the set of other active events, and can change as other events are scheduled in and out. When we schedule in

Re: [PATCH v9] perf: add qcom l2 cache perf events driver

Hi Mark, Thanks for those comments - I'll add the fixes. On 2/6/2017 10:48 AM, Mark Rutland wrote: I'm still concerned by this use of the filter_match callback, because it depends on the set of other active events, and can change as other events are scheduled in and out. When we schedule in

Re: [PATCH v8] perf: add qcom l2 cache perf events driver

Mark, Thanks for all the comments and code samples. I will update the patch and repost. On 1/30/2017 10:19 AM, Mark Rutland wrote: On Mon, Jan 16, 2017 at 01:52:47PM -0500, Neil Leeder wrote: This is fine as is, but just for my understanding, I take it that the locking is only strictly

Re: [PATCH v8] perf: add qcom l2 cache perf events driver

Mark, Thanks for all the comments and code samples. I will update the patch and repost. On 1/30/2017 10:19 AM, Mark Rutland wrote: On Mon, Jan 16, 2017 at 01:52:47PM -0500, Neil Leeder wrote: This is fine as is, but just for my understanding, I take it that the locking is only strictly

Re: [PATCH v8] perf: add qcom l2 cache perf events driver

Has anyone had a chance to look at this yet - I'd appreciate any comments. Thanks, Neil On 1/16/2017 1:52 PM, Neil Leeder wrote: Adds perf events support for L2 cache PMU. The L2 cache PMU driver is named 'l2cache_0' and can be used with perf events to profile L2 events such as cache hits and

Re: [PATCH v8] perf: add qcom l2 cache perf events driver

Has anyone had a chance to look at this yet - I'd appreciate any comments. Thanks, Neil On 1/16/2017 1:52 PM, Neil Leeder wrote: Adds perf events support for L2 cache PMU. The L2 cache PMU driver is named 'l2cache_0' and can be used with perf events to profile L2 events such as cache hits and

Re: [PATCH v7] soc: qcom: add l2 cache perf events driver

Hi Will, On 11/9/2016 1:16 PM, Will Deacon wrote: On Wed, Nov 09, 2016 at 05:54:13PM +, Mark Rutland wrote: On Fri, Oct 28, 2016 at 04:50:13PM -0400, Neil Leeder wrote: + struct perf_event *events[MAX_L2_CTRS]; + struct l2cache_pmu *l2cache_pmu; +

Re: [PATCH v7] soc: qcom: add l2 cache perf events driver

Hi Will, On 11/9/2016 1:16 PM, Will Deacon wrote: On Wed, Nov 09, 2016 at 05:54:13PM +, Mark Rutland wrote: On Fri, Oct 28, 2016 at 04:50:13PM -0400, Neil Leeder wrote: + struct perf_event *events[MAX_L2_CTRS]; + struct l2cache_pmu *l2cache_pmu; +

Re: [PATCH v7] soc: qcom: add l2 cache perf events driver

Hi Mark, Thanks for the review. I'll handle all the syntactic comments, so I won't reply to them all individually here. For the aggregation, I'll reply separately to Will's post to keep all those comments together. On 11/9/2016 12:54 PM, Mark Rutland wrote: + +/* + * The cache is made up of

Re: [PATCH v7] soc: qcom: add l2 cache perf events driver

Hi Mark, Thanks for the review. I'll handle all the syntactic comments, so I won't reply to them all individually here. For the aggregation, I'll reply separately to Will's post to keep all those comments together. On 11/9/2016 12:54 PM, Mark Rutland wrote: + +/* + * The cache is made up of

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

On 10/28/2016 12:02 PM, Will Deacon wrote: On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote: Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer. Did the fuzzer explode, or do you have a new version you can post? Will Hi Will, I was delayed by some logistical

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

On 10/28/2016 12:02 PM, Will Deacon wrote: On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote: Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer. Did the fuzzer explode, or do you have a new version you can post? Will Hi Will, I was delayed by some logistical