On 9/19/2020 7:32 AM, Bhaumik Bhatt wrote:
> Clients on the host may see the device in an active state for a short
> period of time after the host detects a device error or power down.
What scenario is referred as 'device error' here?
And power down is the non-graceful power_down by controller?
On 9/19/2020 7:32 AM, Bhaumik Bhatt wrote:
> If MHI were to attempt a device shutdown following an assumption
> that the device is inaccessible, the host currently moves to a state
> where device register accesses are allowed when they should not be.
> This would end up allowing accesses to the
Hi
On 9/19/2020 7:32 AM, Bhaumik Bhatt wrote:
> While powering down, the device may or may not acknowledge the MHI
> RESET issued by host for graceful shutdown scenario which can lead
> to a rogue device sending an interrupt after the clean-up has been
> done. This can result in a tasklet being
Hi,
On 6/11/2020 7:58 PM, Sandeep Maheswaram wrote:
> Avoiding phy powerdown in host mode so that it can be wake up by devices.
> Set usb controller wakeup capable when wakeup capable devices are
> connected to the host.
>
> Signed-off-by: Sandeep Maheswaram
> ---
> drivers/usb/dwc3/core.c
Hi,
On 5/15/2020 9:27 AM, Viresh Kumar wrote:
> On Fri, 15 May 2020 at 02:33, Georgi Djakov wrote:
>
>> ---8<---
>> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
>> index 206caa0ea1c6..6661788b1a76 100644
>> --- a/drivers/usb/dwc3/Kconfig
>> +++ b/drivers/usb/dwc3/Kconfig
>>
Hi,
On 1/11/2019 2:51 PM, Felipe Balbi wrote:
> Hi,
>
> Manu Gautam writes:
>>> Manu Gautam writes:
>>>> If a function driver tries to re-submit an already queued request,
>>>> it can results in corruption of pending/started request lists.
>&
Hi,
On 1/11/2019 1:13 PM, Felipe Balbi wrote:
> Hi,
>
> Manu Gautam writes:
>> If a function driver tries to re-submit an already queued request,
>> it can results in corruption of pending/started request lists.
>> Catch such conditions and fail the request submissi
If a function driver tries to re-submit an already queued request,
it can results in corruption of pending/started request lists.
Catch such conditions and fail the request submission to DCD.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/gadget.c | 6 ++
1 file changed, 6 insertions
and
dwc3 core already takes care of explicitly suspending PHY
during suspend if quirks are specified.
Signed-off-by: Manu Gautam
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996
Hi,
On 12/20/2018 4:39 PM, Shawn Guo wrote:
> Hi Manu,
>
> On Thu, Dec 20, 2018 at 09:33:43AM +0530, mgau...@codeaurora.org wrote:
>> Hi Shawn,
>>
>> On 2018-12-20 06:31, Shawn Guo wrote:
>>> It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
Correct address for pcs_misc register region of USB3 QMP UNI PHY.
These registers are used during runtime-suspend/resume routines
of phy.
Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Signed-off-by: Manu Gautam
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2
Correct address for pcs_misc register region of USB3 QMP UNI PHY.
These registers are used during runtime-suspend/resume routines
of phy.
Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes")
Signed-off-by: Manu Gautam
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2
Tune1 register on sdm845 is used to update HSTX_TRIM with fused
setting. Enable same by specifying update_tune1_with_efuse flag
for sdm845, otherwise driver ends up programming tune2 register.
Fixes: ef17f6e212ca ("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845")
Signed-off-by: M
Tune1 register on sdm845 is used to update HSTX_TRIM with fused
setting. Enable same by specifying update_tune1_with_efuse flag
for sdm845, otherwise driver ends up programming tune2 register.
Fixes: ef17f6e212ca ("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845")
Signed-off-by: M
Fix HSTX_TRIM tuning logic which instead of using fused value
as HSTX_TRIM, incorrectly performs bitwise OR operation with
existing default value.
Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips")
Signed-off-by: Manu Gautam
Reviewed-by: Dougla
Fix HSTX_TRIM tuning logic which instead of using fused value
as HSTX_TRIM, incorrectly performs bitwise OR operation with
existing default value.
Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips")
Signed-off-by: Manu Gautam
Reviewed-by: Dougla
performs bitwise OR
operation with existing default value.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index
performs bitwise OR
operation with existing default value.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index
Hi,
On 9/5/2018 3:04 AM, Prakruthi Deepak Heragu wrote:
> Add support for control peripheral of EUD (Embedded USB Debugger) to
> listen to events such as USB attach/detach, charger enable/disable, pet
> EUD to indicate software is functional.
>
> Signed-off-by: Satya Durga Srinivasu Prabhala
>
Hi,
On 9/5/2018 3:04 AM, Prakruthi Deepak Heragu wrote:
> Add support for control peripheral of EUD (Embedded USB Debugger) to
> listen to events such as USB attach/detach, charger enable/disable, pet
> EUD to indicate software is functional.
>
> Signed-off-by: Satya Durga Srinivasu Prabhala
>
+---
> 1 file changed, 12 insertions(+), 7 deletions(-)
Reviewed-by: Manu Gautam
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
+---
> 1 file changed, 12 insertions(+), 7 deletions(-)
Reviewed-by: Manu Gautam
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
++---
> 1 file changed, 14 insertions(+), 11 deletions(-)
Reviewed-by: Manu Gautam
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
++---
> 1 file changed, 14 insertions(+), 11 deletions(-)
Reviewed-by: Manu Gautam
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
troller from ufs-qcom
driver.
PHY driver can then assert/de-assert as per UFS PHY requirement
in init() function itself and there won't be any need to have
poweron() routine for UFS as init can perform complete PHY
initialization without any dependency on ufs-qcom glue driver.
-Manu
--
QUALCOMM INDIA,
troller from ufs-qcom
driver.
PHY driver can then assert/de-assert as per UFS PHY requirement
in init() function itself and there won't be any need to have
poweron() routine for UFS as init can perform complete PHY
initialization without any dependency on ufs-qcom glue driver.
-Manu
--
QUALCOMM INDIA,
Hi,
On 5/29/2018 10:07 AM, Can Guo wrote:
> All PHYs should be powered on before register configuration starts. And
> only PCIe PHYs need an extra power control before deasserts reset state.
>
> Signed-off-by: Can Guo
> ---
> drivers/phy/qualcomm/phy-qcom-qmp.c | 5 -
> 1 file changed, 4
Hi,
On 5/29/2018 10:07 AM, Can Guo wrote:
> All PHYs should be powered on before register configuration starts. And
> only PCIe PHYs need an extra power control before deasserts reset state.
>
> Signed-off-by: Can Guo
> ---
> drivers/phy/qualcomm/phy-qcom-qmp.c | 5 -
> 1 file changed, 4
Hi,
On 5/26/2018 3:37 AM, Douglas Anderson wrote:
> It appears that a "#define DEBUG" was left in on the recent patch
> landed for the Qualcomm DWC3 glue driver. Let's remove it.
>
> Fixes: a4333c3a6ba9 ("usb: dwc3: Add Qualcomm DWC3 glue driver")
> Signed-off-by: Douglas Anderson
Hi,
On 5/26/2018 3:37 AM, Douglas Anderson wrote:
> It appears that a "#define DEBUG" was left in on the recent patch
> landed for the Qualcomm DWC3 glue driver. Let's remove it.
>
> Fixes: a4333c3a6ba9 ("usb: dwc3: Add Qualcomm DWC3 glue driver")
> Signed-off-by: Douglas Anderson
> ---
>
>
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
Reviewed-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/usb/qcom,dwc3.txt
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam
Reviewed-by: Rob Herring
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 85 --
1 file changed, 63 insertions(+), 22
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 del
assert in driver probe to ensure core registers
are reset to POR value in case of any initalization by boot code.
Manu Gautam (3):
dt-bindings: usb: Update documentation for Qualcomm DWC3 driver
usb: dwc3: Add Qualcomm DWC3 glue driver
usb: dwc3: core: Suspend PHYs on runtime suspend in host
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers
assert in driver probe to ensure core registers
are reset to POR value in case of any initalization by boot code.
Manu Gautam (3):
dt-bindings: usb: Update documentation for Qualcomm DWC3 driver
usb: dwc3: Add Qualcomm DWC3 glue driver
usb: dwc3: core: Suspend PHYs on runtime suspend in host
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam <mgau...@codeaurora.
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/Kconfig
On 5/5/2018 12:18 AM, Manu Gautam wrote:
> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
> Some of its uses are described below resulting in need to
> have a separate glue driver instead of using dwc3-of-simple:
> - It exposes register interface to override v
On 5/5/2018 12:18 AM, Manu Gautam wrote:
> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
> Some of its uses are described below resulting in need to
> have a separate glue driver instead of using dwc3-of-simple:
> - It exposes register interface to override v
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam <mgau...@codeaurora.
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/Kconfig
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 del
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 85 --
1 file changed, 63 insertions(
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 85 --
1 file changed, 63 insertions(+), 22 deletions(-)
diff --git
value in case of any initalization by boot code.
Manu Gautam (3):
dt-bindings: usb: Update documentation for Qualcomm DWC3 driver
usb: dwc3: Add Qualcomm DWC3 glue driver
usb: dwc3: core: Suspend PHYs on runtime suspend in host mode
.../devicetree/bindings/usb/qcom,dwc3.txt | 85
value in case of any initalization by boot code.
Manu Gautam (3):
dt-bindings: usb: Update documentation for Qualcomm DWC3 driver
usb: dwc3: Add Qualcomm DWC3 glue driver
usb: dwc3: core: Suspend PHYs on runtime suspend in host mode
.../devicetree/bindings/usb/qcom,dwc3.txt | 85
or disabling
the clocks. It allows to simplify PHY client driver code which
is both user and source of the pipe_clk and avoid error logging
related status check on clk_disable/enable.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/clk/qcom/gcc-msm8996.c | 4
1 file chan
or disabling
the clocks. It allows to simplify PHY client driver code which
is both user and source of the pipe_clk and avoid error logging
related status check on clk_disable/enable.
Signed-off-by: Manu Gautam
---
drivers/clk/qcom/gcc-msm8996.c | 4
1 file changed, 4 insertions(+)
diff --git
vek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Evan Green <evgr...@chromium.org>
Cc: stable <sta...@vger.kernel.org> # 4.14+
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4
1 file changed, 4 insertions(+)
diff --g
vek Gautam
Reviewed-by: Evan Green
Cc: stable # 4.14+
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c
b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 94afeac..40fdef8 100644
--- a/d
e wouldn't be any user of same.
Reviewed-by: Douglas Anderson <diand...@chromium.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/device
e wouldn't be any user of same.
Reviewed-by: Douglas Anderson
Signed-off-by: Manu Gautam
---
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
b/Documentation/devicetre
ring which
was earlier added for sdm845 only as there wouldn't be
any user of same.
While at it, fix has_pwrdn_delay attribute for USB-DP
PHY configuration and.
Reviewed-by: Evan Green <evgr...@chromium.org>
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcom
There are two QUSB2 PHYs present on sdm845. In order
to improve eye diagram for both the PHYs some parameters
need to be changed. Provide device tree properties to
override these from board specific device tree files.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qu
ring which
was earlier added for sdm845 only as there wouldn't be
any user of same.
While at it, fix has_pwrdn_delay attribute for USB-DP
PHY configuration and.
Reviewed-by: Evan Green
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 147 +++-
d
There are two QUSB2 PHYs present on sdm845. In order
to improve eye diagram for both the PHYs some parameters
need to be changed. Provide device tree properties to
override these from board specific device tree files.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 126
-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 6470c5d..fddb1c9 100644
--- a/drive
-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 6470c5d..fddb1c9 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b
as earlier added for
sdm845 only.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
.../devicetree/bindings/phy/qcom-qusb2-phy.txt | 23 +-
include/dt-bindings/phy/phy-qcom-qusb2.h | 37 ++
2 files changed, 59 insertions(+), 1 deletion
as earlier added for
sdm845 only.
Signed-off-by: Manu Gautam
---
.../devicetree/bindings/phy/qcom-qusb2-phy.txt | 23 +-
include/dt-bindings/phy/phy-qcom-qusb2.h | 37 ++
2 files changed, 59 insertions(+), 1 deletion(-)
create mode 100644 include/d
review comments from Stephen.
Changes since v1:
- Updated qusb2 compatibility name as per comment from Vivek.
Manu Gautam (7):
clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
phy: qcom-qmp: Enable pipe_clk before PHY initialization
phy: qcom-qusb2: Fix crash if nvmem cell
review comments from Stephen.
Changes since v1:
- Updated qusb2 compatibility name as per comment from Vivek.
Manu Gautam (7):
clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
phy: qcom-qmp: Enable pipe_clk before PHY initialization
phy: qcom-qusb2: Fix crash if nvmem cell
review comments from Stephen.
Changes since v1:
- Updated qusb2 compatibility name as per comment from Vivek.
Manu Gautam (7):
clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
phy: qcom-qmp: Enable pipe_clk before PHY initialization
phy: qcom-qusb2: Fix crash if nvmem cell
review comments from Stephen.
Changes since v1:
- Updated qusb2 compatibility name as per comment from Vivek.
Manu Gautam (7):
clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
phy: qcom-qmp: Enable pipe_clk before PHY initialization
phy: qcom-qusb2: Fix crash if nvmem cell
HI,
On 4/19/2018 4:03 AM, Masahiro Yamada wrote:
> In the current design of DWC3 driver,
> the DT typically becomes a nested structure like follows:
>
> dwc3-glue {
> compatible = "foo,dwc3";
> ...
>
> dwc3 {
> compatible = "snps,dwc3";
>
HI,
On 4/19/2018 4:03 AM, Masahiro Yamada wrote:
> In the current design of DWC3 driver,
> the DT typically becomes a nested structure like follows:
>
> dwc3-glue {
> compatible = "foo,dwc3";
> ...
>
> dwc3 {
> compatible = "snps,dwc3";
>
Hi Amit,
On 4/18/2018 6:33 PM, Amit Nischal wrote:
>>> + /* Disable the GPLL0 active input to MMSS and GPU via MISC
>>> registers */
>>> + regmap_update_bits(regmap, 0x09ffc, 0x3, 0x3);
>>> + regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
>>
>> I think we'll have to throw in
Hi Amit,
On 4/18/2018 6:33 PM, Amit Nischal wrote:
>>> + /* Disable the GPLL0 active input to MMSS and GPU via MISC
>>> registers */
>>> + regmap_update_bits(regmap, 0x09ffc, 0x3, 0x3);
>>> + regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
>>
>> I think we'll have to throw in
Hi Rob,
On 4/17/2018 2:08 AM, Rob Herring wrote:
> On Fri, Apr 13, 2018 at 10:21:22PM +0530, Manu Gautam wrote:
>> Existing documentation has lot of incorrect information as it
>> was originally added for a driver that no longer exists.
>>
>> Signed-off-by: Manu Gau
Hi Rob,
On 4/17/2018 2:08 AM, Rob Herring wrote:
> On Fri, Apr 13, 2018 at 10:21:22PM +0530, Manu Gautam wrote:
>> Existing documentation has lot of incorrect information as it
>> was originally added for a driver that no longer exists.
>>
>> Signed-off-by: Manu Gautam
Hi,
On 4/13/2018 2:17 AM, Doug Anderson wrote:
>> Thanks for review Rob. I too agree with both the viewpoints.
>> Doug, if it is not of much concern then can I stick with current approach?
> I certainly would appreciate the #defines and believe they add to the
> readability, but if you're dead
Hi,
On 4/13/2018 2:17 AM, Doug Anderson wrote:
>> Thanks for review Rob. I too agree with both the viewpoints.
>> Doug, if it is not of much concern then can I stick with current approach?
> I certainly would appreciate the #defines and believe they add to the
> readability, but if you're dead
Hi Kishon,
On 3/20/2018 11:31 AM, Manu Gautam wrote:
> phy_init() and phy_exit() calls, and phy_power_on() and
> phy_power_off() already accept NULL as valid PHY reference
> and act as NOP. Extend same concept to phy runtime_pm APIs
> to keep drivers (e.g. dwc3) code simple w
Hi Kishon,
On 3/20/2018 11:31 AM, Manu Gautam wrote:
> phy_init() and phy_exit() calls, and phy_power_on() and
> phy_power_off() already accept NULL as valid PHY reference
> and act as NOP. Extend same concept to phy runtime_pm APIs
> to keep drivers (e.g. dwc3) code simple w
Hi Jack,
On 4/13/2018 11:03 PM, Jack Pham wrote:
> Hi Manu,
>
> On Fri, Apr 13, 2018 at 10:21:23PM +0530, Manu Gautam wrote:
>> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
>> Some of its uses are described below resulting in need to
>> have a separate g
Hi Jack,
On 4/13/2018 11:03 PM, Jack Pham wrote:
> Hi Manu,
>
> On Fri, Apr 13, 2018 at 10:21:23PM +0530, Manu Gautam wrote:
>> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
>> Some of its uses are described below resulting in need to
>> have a separate g
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 del
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam <mgau...@codeaurora.
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 78 --
1 file changed, 57 insertions(
platform glue drivers e.g.
dwc3-qcom handle remote wakeup during bus suspend by waking up
devices on receiving wakeup event from PHY.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/core.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers
.
- Support for wakeup interrupts lines that are asserted whenever
there is any wakeup event on USB3 or USB2 bus.
- Support to replace pip3 clock going to DWC3 with utmi clock
for hardware configuration where SSPHY is not used with DWC3.
Signed-off-by: Manu Gautam
---
drivers/usb/dwc3/Kconfig
Existing documentation has lot of incorrect information as it
was originally added for a driver that no longer exists.
Signed-off-by: Manu Gautam
---
.../devicetree/bindings/usb/qcom,dwc3.txt | 78 --
1 file changed, 57 insertions(+), 21 deletions(-)
diff --git
review comment from Felipe.
- Addressed other review comments from Felipe and Rob.
- Some other minor code changes related to redability.
- Add reset_control assert in driver probe to ensure core registers
are reset to POR value in case of any initalization by boot code.
Manu Gautam (3):
dt
review comment from Felipe.
- Addressed other review comments from Felipe and Rob.
- Some other minor code changes related to redability.
- Add reset_control assert in driver probe to ensure core registers
are reset to POR value in case of any initalization by boot code.
Manu Gautam (3):
dt
Hi,
On 4/13/2018 2:08 AM, Stephen Boyd wrote:
> Quoting Manu Gautam (2018-04-11 08:37:38)
>>> I ask because it may be easier to never expose these clks in Linux, hit
>>> the enable bits in the branches during clk driver probe, and then act
>>> like they never exi
Hi,
On 4/13/2018 2:08 AM, Stephen Boyd wrote:
> Quoting Manu Gautam (2018-04-11 08:37:38)
>>> I ask because it may be easier to never expose these clks in Linux, hit
>>> the enable bits in the branches during clk driver probe, and then act
>>> like they never exi
Hi,
On 4/11/2018 12:02 AM, Stephen Boyd wrote:
> Quoting Doug Anderson (2018-04-10 08:05:27)
>> On Mon, Apr 9, 2018 at 11:36 PM, Manu Gautam <mgau...@codeaurora.org> wrote:
>>> On 3/30/2018 2:24 AM, Doug Anderson wrote:
>>>> Oh! This is what you did
Hi,
On 4/11/2018 12:02 AM, Stephen Boyd wrote:
> Quoting Doug Anderson (2018-04-10 08:05:27)
>> On Mon, Apr 9, 2018 at 11:36 PM, Manu Gautam wrote:
>>> On 3/30/2018 2:24 AM, Doug Anderson wrote:
>>>> Oh! This is what you did in the previous version of
On 4/10/2018 1:48 AM, Rob Herring wrote:
> On Thu, Mar 29, 2018 at 01:38:23PM -0700, Doug Anderson wrote:
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam <mgau...@codeaurora.org> wrote:
>>> To improve eye diagram for PHYs on different boards of sa
On 4/10/2018 1:48 AM, Rob Herring wrote:
> On Thu, Mar 29, 2018 at 01:38:23PM -0700, Doug Anderson wrote:
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote:
>>> To improve eye diagram for PHYs on different boards of same SOC,
>>> some par
Hi,
On 3/30/2018 2:08 AM, Doug Anderson wrote:
> Hi,
>
> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam <mgau...@codeaurora.org> wrote:
>> @@ -241,6 +252,18 @@ struct qusb2_phy_cfg {
>> * @tcsr: TCSR syscon register map
>> * @cell: nvmem
Hi,
On 3/30/2018 2:08 AM, Doug Anderson wrote:
> Hi,
>
> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote:
>> @@ -241,6 +252,18 @@ struct qusb2_phy_cfg {
>> * @tcsr: TCSR syscon register map
>> * @cell: nvmem cell containing phy tuning value
>> *
>
Hi,
On 4/6/2018 1:37 AM, Stephen Boyd wrote:
> Quoting Doug Anderson (2018-03-29 13:55:55)
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam <mgau...@codeaurora.org> wrote:
>>> The USB and PCIE pipe clocks are sourced from external clocks
>&g
Hi,
On 4/6/2018 1:37 AM, Stephen Boyd wrote:
> Quoting Doug Anderson (2018-03-29 13:55:55)
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote:
>>> The USB and PCIE pipe clocks are sourced from external clocks
>>> inside the QMP USB/PCIE
Hi,
On 3/30/2018 2:24 AM, Doug Anderson wrote:
> Hi,
>
> On Thu, Mar 29, 2018 at 11:44 AM, Doug Anderson <diand...@chromium.org> wrote:
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam <mgau...@codeaurora.org> wrote:
>>> QMP PHY for USB/
Hi,
On 3/30/2018 2:24 AM, Doug Anderson wrote:
> Hi,
>
> On Thu, Mar 29, 2018 at 11:44 AM, Doug Anderson wrote:
>> Hi,
>>
>> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote:
>>> QMP PHY for USB/PCIE requires pipe_clk for locking of
>>> retime
There are two QUSB2 PHYs present on sdm845. In order
to improve eye diagram for both the PHYs some parameters
need to be changed. Provide device tree properties to
override these from board specific device tree files.
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qu
vek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Evan Green <evgr...@chromium.org>
Cc: stable <sta...@vger.kernel.org> # 4.14+
Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4
1 file changed, 4 insertions(+)
diff --g
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