Re: [PATCH v6 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
Hi Liu On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote: > On Tue, 2021-03-23 at 01:03 +0000, Marcel Ziswiler wrote: > > Hi Liu > > > > Some further discrepancy with them binding examples: > > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): > > /dpu@5618:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): > > /syscon@56221000:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): > > /phy@56228300:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): > > /pixel-combiner@5602:reg: > > property has invalid length (8 bytes) (#address-cells == 2, #size-cells == > > 2) > > > > And with that I am unable to bring it up: > > > > [ 1.714498] imx8qxp-ldb 562210001000.syscon:ldb: > > [drm:ldb_init_helper] *ERROR* failed to get regmap: - > > 12 > > [ 1.724441] imx8qxp-ldb: probe of 562210001000.syscon:ldb failed > > with error -12 > > [ 1.734983] imx8qxp-pixel-combiner 56020001.pixel-combiner: > > invalid resource > > [ 1.742830] imx8qxp-pixel-combiner: probe of > > 56020001.pixel-combiner failed with error -22 > > [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: > > [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* > > failed > > to get pixel link node alias id: -19 > > [ 1.769626] imx8qxp-pxl2dpi 562210001000.syscon:pxl2dpi: > > [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* > > failed to get regmap: -12 > > [ 1.781397] imx8qxp-pxl2dpi: probe of 562210001000.syscon:pxl2dpi > > failed with error -12 > > [ 1.840547] imx8qxp-lpcg-clk 5958.clock-controller: deferred probe > > timeout, ignoring dependency > > [ 1.840571] imx8qxp-lpcg-clk: probe of 5958.clock-controller failed > > with error -110 > > > > Any suggestions welcome. Thanks! > > Please reference the patch set I shared in my last reply and see how it > goes. Thanks. Thank you very much. After a little bit of fiddling I can confirm that this also works fine on a Toradex Colibri iMX8X [1] with either a Capacitive Touch Display 10.1" LVDS which has a Logic Technologies LT170410- 2WHC [2] single-channel panel inside or a dual-channel LG LP156WF1 full HD panel. During boot I noticed quite some clocking/power domain related messages: [0.537965] gpt0_clk: failed to attached the power domain -2 [0.562372] dc1_disp0_clk: failed to attached the power domain -2 [0.562800] dc1_disp0_clk: failed to get clock parent -22 [0.562858] dc1_disp0_clk: failed to get clock rate -22 [0.563059] dc1_disp1_clk: failed to attached the power domain -2 [0.563463] dc1_disp1_clk: failed to get clock parent -22 [0.563514] dc1_disp1_clk: failed to get clock rate -22 [0.563773] dc1_pll0_clk: failed to attached the power domain -2 [0.564174] dc1_pll0_clk: failed to get clock rate -22 [0.564413] dc1_pll1_clk: failed to attached the power domain -2 [0.564838] dc1_pll1_clk: failed to get clock rate -22 [0.565099] dc1_bypass0_clk: failed to attached the power domain -2 [0.565516] dc1_bypass0_clk: failed to get clock rate -22 [0.565755] dc1_bypass1_clk: failed to attached the power domain -2 [0.566159] dc1_bypass1_clk: failed to get clock rate -22 [0.574493] lvds0_i2c0_clk: failed to attached the power domain -2 [0.574894] lvds0_i2c0_clk: failed to get clock rate -22 [0.575134] lvds0_i2c1_clk: failed to attached the power domain -2 [0.575526] lvds0_i2c1_clk: failed to get clock rate -22 [0.575785] lvds0_pwm0_clk: failed to attached the power domain -2 [0.576189] lvds0_pwm0_clk: failed to get clock rate -22 [0.576417] lvds1_i2c0_clk: failed to attached the power domain -2 [0.576854] lvds1_i2c0_clk: failed to get clock rate -22 [0.577129] lvds1_i2c1_clk: failed to attached the power domain -2 [0.577554] lvds1_i2c1_clk: failed to get clock rate -22 [0.577787] lvds1_pwm0_clk: failed to attached the power domain -2 [0.578198] lvds1_pwm0_clk: failed to get clock rate -22 [0.578464] mipi_csi0_core_clk: failed to attached the power domain -2 [0.579104] mipi_csi0_esc_clk: failed to attached the power domain -2 [0.579738] mipi_csi0_i2c0_clk: failed to attached the power domain -2 [0.580368] mipi_csi0_pwm0_clk: failed to attached the power domain -2 And the following repeats a couple dozens of times: [4.391495] dc1_disp0_clk: fai
Re: [PATCH v6 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
Hi Liu
Some further discrepancy with them binding examples:
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format):
/dpu@5618:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format):
/syscon@56221000:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format):
/phy@56228300:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format):
/pixel-combiner@5602:reg:
property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
And with that I am unable to bring it up:
[1.714498] imx8qxp-ldb 562210001000.syscon:ldb: [drm:ldb_init_helper]
*ERROR* failed to get regmap: -12
[1.724441] imx8qxp-ldb: probe of 562210001000.syscon:ldb failed with
error -12
[1.734983] imx8qxp-pixel-combiner 56020001.pixel-combiner: invalid
resource
[1.742830] imx8qxp-pixel-combiner: probe of 56020001.pixel-combiner
failed with error -22
[1.754040] imx8qxp-display-pixel-link dc0-pixel-link0:
[drm:imx8qxp_pixel_link_bridge_probe] *ERROR* failed
to get pixel link node alias id: -19
[1.769626] imx8qxp-pxl2dpi 562210001000.syscon:pxl2dpi:
[drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR*
failed to get regmap: -12
[1.781397] imx8qxp-pxl2dpi: probe of 562210001000.syscon:pxl2dpi failed
with error -12
[1.840547] imx8qxp-lpcg-clk 5958.clock-controller: deferred probe
timeout, ignoring dependency
[1.840571] imx8qxp-lpcg-clk: probe of 5958.clock-controller failed with
error -110
Any suggestions welcome. Thanks!
Cheers
Marcel
On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote:
> Hi,
>
> This is the v6 series to add some DRM bridge drivers support
> for i.MX8qm/qxp SoCs.
>
> The bridges may chain one by one to form display pipes to support
> LVDS displays. The relevant display controller is DPU embedded in
> i.MX8qm/qxp SoCs.
>
> The DPU KMS driver can be found at:
> https://www.spinics.net/lists/arm-kernel/msg878542.html
>
> This series supports the following display pipes:
> 1) i.MX8qxp:
> prefetch eng -> DPU -> pixel combiner -> pixel link ->
> pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB)
>
> 2) i.MX8qm:
> prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display
> bridge(LDB)
>
>
> This series dropped the patch 'phy: Add LVDS configuration options', as
> suggested by Robert Foss, because it has already been sent with the following
> series to add Mixel combo PHY found in i.MX8qxp:
> https://www.spinics.net/lists/arm-kernel/msg879957.html
>
> So, this version depends on that series.
>
>
> Patch 1/14 and 2/14 add bus formats used by pixel combiner.
>
> Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon
> used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas.
>
> Patch 10/14 adds a helper for LDB bridge drivers.
>
> Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and
> dt-bindings support for the bridges.
>
> Patch 14/14 updates MAINTAINERS.
>
>
> I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and
> a LVDS to HDMI bridge(with a downstream drm bridge driver).
>
>
> Welcome comments, thanks.
>
> v5->v6:
> * Fix data organizations in documentation(patch 2/14) for
> MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent)
> * Add Laurent's R-b tags on patch 1/14 and 2/14.
> * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14).
> (Rob)
> * Add Rob's R-b tag on patch 8/14.
>
> v4->v5:
> * Drop the patch 'phy: Add LVDS configuration options'. (Robert)
> * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14.
> * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner
> bridge
> driver(patch 4/14). (Robert)
> * Make a comment occupy a line in the pixel link bridge driver(patch 6/14).
> (Robert)
> * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status
> Registers module. (Rob)
> * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge
> driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly,
> rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert)
> * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'.
> (Robert)
> * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'.
>
> v3->v4:
> * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with
> the PXL2DPI instance instead of using alias ID. (Rob)
> * Add Rob's R-b tag on patch 11/14.
>
> v2->v3:
> * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and
> fsl,imx8qxp-pxl2dpi.yaml. (Rob)
> * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and
> fsl,imx8q
Re: [PATCH v6 05/14] dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding
On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qm/qxp display pixel link.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Liu Ying
> ---
> v5->v6:
> * No change.
>
> v4->v5:
> * No change.
>
> v3->v4:
> * No change.
>
> v2->v3:
> * Add Rob's R-b tag.
>
> v1->v2:
> * Use graph schema. (Laurent)
> * Require all four pixel link output ports. (Laurent)
> * Mention pixel link is accessed via SCU firmware. (Rob)
>
> .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106
> +
> 1 file changed, 106 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
> b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
> new file mode 100644
> index ..3af67cc
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml
> @@ -0,0 +1,106 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qm/qxp Display Pixel Link
> +
> +maintainers:
> + - Liu Ying
> +
> +description: |
> + The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
> + asynchronous linkage between pixel sources(display controller or
> + camera module) and pixel consumers(imaging or displays).
> + It consists of two distinct functions, a pixel transfer function and a
> + control interface. Multiple pixel channels can exist per one control
> channel.
> + This binding documentation is only for pixel links whose pixel sources are
> + display controllers.
> +
> + The i.MX8qm/qxp Display Pixel Link is accessed via System Controller
> Unit(SCU)
> + firmware.
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,imx8qm-dc-pixel-link
> + - fsl,imx8qxp-dc-pixel-link
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: The pixel link input port node from upstream video
> source.
> +
> + patternProperties:
> + "^port@[1-4]$":
> + $ref: /schemas/graph.yaml#/properties/port
> + description: The pixel link output port node to downstream bridge.
> +
> + required:
> + - port@0
> + - port@1
> + - port@2
> + - port@3
> + - port@4
> +
> +required:
> + - compatible
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dc0-pixel-link0 {
> + compatible = "fsl,imx8qxp-dc-pixel-link";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* from dc0 pixel combiner channel0 */
> + port@0 {
> + reg = <0>;
> +
> + dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint {
> + remote-endpoint =
> <&dc0_pixel_combiner_ch0_dc0_pixel_link0>;
> + };
> + };
> +
> + /* to PXL2DPIs in MIPI/LVDS combo subsystems */
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&mipi_lvds_0_pxl2dpi_dc0_pixel_link0>;
> + };
> +
> + dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&mipi_lvds_1_pxl2dpi_dc0_pixel_link0>;
Those also seem absent from other examples.
> + };
> + };
> +
> + /* unused */
> + port@2 {
> + reg = <2>;
> + };
> +
> + /* unused */
> + port@3 {
> + reg = <3>;
> + };
> +
> + /* to imaging subsystem */
> + port@4 {
> + reg = <4>;
> + };
> + };
> + };
Re: [PATCH v6 03/14] dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding
On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qm/qxp pixel combiner.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Liu Ying
> ---
> v5->v6:
> * No change.
>
> v4->v5:
> * No change.
>
> v3->v4:
> * No change.
>
> v2->v3:
> * Add Rob's R-b tag.
>
> v1->v2:
> * Use graph schema. (Laurent)
> * Use enum instead of oneOf + const for the reg property of pixel combiner
> channels. (Rob)
>
> .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 144
> +
> 1 file changed, 144 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> new file mode 100644
> index ..50bae21
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> @@ -0,0 +1,144 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qm/qxp Pixel Combiner
> +
> +maintainers:
> + - Liu Ying
> +
> +description: |
> + The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
> + single display controller and manipulates the two streams to support a
> number
> + of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
> + either one screen, two screens, or virtual screens. The pixel combiner is
> + also responsible for generating some of the control signals for the pixel
> link
> + output channel.
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,imx8qm-pixel-combiner
> + - fsl,imx8qxp-pixel-combiner
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: apb
> +
> + power-domains:
> + maxItems: 1
> +
> +patternProperties:
> + "^channel@[0-1]$":
> + type: object
> + description: Represents a display stream of pixel combiner.
> +
> + properties:
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + reg:
> + description: The display stream index.
> + enum: [ 0, 1 ]
> +
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Input endpoint of the display stream.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output endpoint of the display stream.
> +
> + required:
> + - "#address-cells"
> + - "#size-cells"
> + - reg
> + - port@0
> + - port@1
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - "#address-cells"
> + - "#size-cells"
> + - reg
> + - clocks
> + - clock-names
> + - power-domains
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include
> + #include
> + pixel-combiner@5602 {
> + compatible = "fsl,imx8qxp-pixel-combiner";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x5602 0x1>;
> + clocks = <&dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4>;
> + clock-names = "apb";
> + power-domains = <&pd IMX_SC_R_DC_0>;
> +
> + channel@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint {
> + remote-endpoint =
> <&dc0_dpu_disp0_dc0_pixel_combiner_ch0>;
While I acknowledge this just being an example you seem to call these as
follows elsewhere:
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
dc0_dpu_disp0_dc0_pixel_combiner_ch0
pixel_combiner0_ch0_dpu0_disp0
Or am I just missing something?
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint {
> + remote-endpoint =
> <&dc0_pixel_link0_dc0_pixel_combiner_ch0>;
> + };
> + };
> + };
> +
> + channel@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint {
> + remote-endpoint =
> <&dc0_dpu_disp1_dc0_pixel_combiner_ch1>;
ditto
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint {
> + remote-en
Re: [PATCH v6 01/14] media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner
On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote: > This patch adds RGB666_1X30_CPADLO, RGB888_1X30_CPADLO, RGB666_1X36_CPADLO > and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp pixel combiner. > The RGB pixels with padding low per component are transmitted on a 30-bit > input bus(10-bit per component) from a display controller or a 36-bit > output bus(12-bit per component) to a pixel link. > > Reviewed-by: Robert Foss > Reviewed-by: Laurent Pinchart > > Signed-off-by: Liu Ying > --- > v5->v6: > * Add Laurent's R-b tag. > > v4->v5: > * Add Robert's R-b tag. > > v3->v4: > * No change. > > v2->v3: > * No change. > > v1->v2: > * No change. > > include/uapi/linux/media-bus-format.h | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/include/uapi/linux/media-bus-format.h > b/include/uapi/linux/media-bus-format.h > index 0dfc11e..ec3323d 100644 > --- a/include/uapi/linux/media-bus-format.h > +++ b/include/uapi/linux/media-bus-format.h > @@ -34,7 +34,7 @@ > > #define MEDIA_BUS_FMT_FIXED0x0001 > > -/* RGB - next is 0x101e */ > +/* RGB - next is 0x1022 */ > #define MEDIA_BUS_FMT_RGB444_1X12 0x1016 > #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001 > #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002 > @@ -59,9 +59,13 @@ > #define MEDIA_BUS_FMT_RGB888_3X8_DELTA 0x101d > #define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG0x1011 > #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012 > +#define MEDIA_BUS_FMT_RGB666_1X30_CPADLO 0x101e > +#define MEDIA_BUS_FMT_RGB888_1X30_CPADLO 0x101f > #define MEDIA_BUS_FMT_ARGB_1X320x100d > #define MEDIA_BUS_FMT_RGB888_1X32_PADHI0x100f > #define MEDIA_BUS_FMT_RGB101010_1X30 0x1018 > +#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x1020 > +#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021 > #define MEDIA_BUS_FMT_RGB121212_1X36 0x1019 > #define MEDIA_BUS_FMT_RGB161616_1X48 0x101a I haven't figured out what exactly the idea of this strange ordering of things is about? Could you enlighten me?
Re: [PATCH v6 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
Hi Liu
I gave this a try however I believe I am still missing some piece as it throws
the following during compilation
of the device tree:
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_irqsteer"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpu_lpcg"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpu_lpcg"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_disp_lpcg"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_disp_lpcg"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr1_channel1"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr1_channel2"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr1_channel3"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr2_channel1"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr2_channel2"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_dpr2_channel3"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:501.38-591.3: ERROR
(phandle_references): /syscon@56221000:
Reference to non-existent node or label "mipi_lvds_0_di_mipi_lvds_regs_lpcg"
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:603.29-656.7: ERROR
(phandle_references): /pixel-combiner@5602:
Reference to non-existent node or label "dc0_pixel_combiner_lpcg"
For now I just put all the examples from the various
Documentation/devicetree/bindings/*/imx8qxp-*.yaml files
directly into arch/arm64/boot/dts/freescale/imx8qxp.dtsi. Maybe you do have the
various device tree parts
available somewhere as well?
Any suggestions? Do you by any chance have a git tree available anywhere which
includes all dependencies and
everything which one could try?
Thanks!
Cheers
Marcel
On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote:
> Hi,
>
> This is the v6 series to add some DRM bridge drivers support
> for i.MX8qm/qxp SoCs.
>
> The bridges may chain one by one to form display pipes to support
> LVDS displays. The relevant display controller is DPU embedded in
> i.MX8qm/qxp SoCs.
>
> The DPU KMS driver can be found at:
> https://www.spinics.net/lists/arm-kernel/msg878542.html
>
> This series supports the following display pipes:
> 1) i.MX8qxp:
> prefetch eng -> DPU -> pixel combiner -> pixel link ->
> pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB)
>
> 2) i.MX8qm:
> prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display
> bridge(LDB)
>
>
> This series dropped the patch 'phy: Add LVDS configuration options', as
> suggested by Robert Foss, because it has already been sent with the following
> series to add Mixel combo PHY found in i.MX8qxp:
> https://www.spinics.net/lists/arm-kernel/msg879957.html
>
> So, this version depends on that series.
>
>
> Patch 1/14 and 2/14 add bus formats used by pixel combiner.
>
> Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon
> used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas.
>
> Patch 10/14 adds a helper for LDB bridge drivers.
>
> Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and
> dt-bindings support for the bridges.
>
> Patch 14/14 updates MAINTAINERS.
>
>
> I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and
> a LVDS to HDMI bridge(with a downstream drm bridge driver).
>
>
> Welcome comments, thanks.
>
> v5->v6:
> * Fix data organizations in documentation(patch 2/14) for
> MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent)
> * Add Laurent's R-b tags on patch 1/14 and 2/14.
> * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14).
> (Rob)
> * Add Rob's R-b tag on patch 8/14.
>
> v4->v5:
> * Drop the patch 'phy: Add LVDS configuration options'. (Robert)
> * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14.
> * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner
> bridge
> driver(patch 4/14). (Robert)
> * Make a comment occupy a line in the pixel link bridge driver(patch 6/14).
> (Robert)
> * Introduce a new patch(patch 7/14) to add dt-b
Re: [PATCH 1/2] arm64: boot: dts: add new dts for hellcat & petra
Hi Daniel
Is it just me or something looks rather askew with the indentation of your dts'
(e.g. tabs vs. spaces)?
Cheers
Marcel
On Thu, 2021-01-21 at 15:12 -0800, Daniel Walker wrote:
> Add Petra and Hellcat dts file. These platforms are based on
> the Xilinx Zynqmp platform.
>
> Signed-off-by: Daniel Walker
> Cc: xe-linux-exter...@cisco.com
> ---
> arch/arm64/boot/dts/xilinx/Makefile | 2 +
> .../boot/dts/xilinx/zynqmp-petra-hellcat.dts | 856 ++
> arch/arm64/boot/dts/xilinx/zynqmp-petra.dts | 847 +
> 3 files changed, 1705 insertions(+)
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-petra-hellcat.dts
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-petra.dts
>
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile
> b/arch/arm64/boot/dts/xilinx/Makefile
> index 60f5443f3ef4..d9eacb3c60e5 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -15,3 +15,5 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
> dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
> dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
> dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-petra.dts
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-petra-hellcat.dts
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-petra-hellcat.dts
> b/arch/arm64/boot/dts/xilinx/zynqmp-petra-
> hellcat.dts
> new file mode 100644
> index ..87e23c1cac65
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-petra-hellcat.dts
> @@ -0,0 +1,856 @@
> +/*
> + * dts file for Cisco Petra-Hellcat Switching IOT platform
> + *
> + * (C) Copyright 2016-2018, Cisco Systems, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +#include "zynqmp.dtsi"
> +#include "zynqmp-clk-ccf.dtsi"
> +
> +/*
> + * PL *
> + */
> +
> +/ {
> + reserved-memory {
> + #address-cells = <0x2>;
> + #size-cells = <0x2>;
> + ranges;
> +
> + rproc@3ed0 {
> + no-map;
> + reg = <0x0 0x3ed0 0x0 0x100>;
> + };
> + zynqmp_sha_reserved: buffer@0 {
> + compatible = "shared-dma-pool";
> + no-map;
> + reg = <0x0 0x7800 0x0 0x0002>;
> + };
> + };
> +
> + sha384 {
> + compatible = "xlnx,zynqmp-keccak-384";
> + memory-region = <&zynqmp_sha_reserved>;
> + };
> +
> + amba_pl: amba_pl@0 {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges ;
> + design_1_i_axi_iic_BP: i2c@80104000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <0x3 0x47>;
Spaces above vs. tabs before.
> ...
Re: [PATCH 1/2] arm64: dts: Add the Kontron i.MX8M-Mini SoMs and baseboards
Hi Frieder
Nice to see some more i.MX 8M Mini action. Much appreciated!
On Thu, 2020-07-02 at 16:33 +0200, Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> Kontron Electronics GmbH offers small and powerful SoMs based on the
> i.MX8MM
To avoid much confusion in NXP's nomenclature I would recommend writing this
always as i.MX 8M Mini. Of course,
in code, using imx8mm is fine.
> including PMIC, LPDDR4-RAM, eMMC and SPI NOR.
>
> The matching baseboards have the same form factor and similar interfaces
> as the other boards from the Kontron "Board-Line" family, including
> SD card, 1G Ethernet, 100M Ethernet, USB Host/OTG, digital IOs, RS232,
> RS485, CAN, LVDS or HDMI, RTC and much more.
>
> Signed-off-by: Frieder Schrempf
> ---
> .../dts/freescale/imx8mm-kontron-n8010-s.dts | 15 +
> .../freescale/imx8mm-kontron-n8010-som.dtsi | 16 +
> .../dts/freescale/imx8mm-kontron-n8011-s.dts | 15 +
> .../freescale/imx8mm-kontron-n8011-som.dtsi | 16 +
> .../dts/freescale/imx8mm-kontron-n801x-s.dtsi | 326 ++
> .../freescale/imx8mm-kontron-n801x-som.dtsi | 281 +++
> 6 files changed, 669 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-s.dts
> create mode 100644
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-som.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-s.dts
> create mode 100644
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-som.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtsi
> create mode 100644
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-s.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-
> kontron-n8010-s.dts
> new file mode 100644
> index ..0911f2d0555b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-s.dts
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: GPL-2.0
Don't you want to use the more common GPL-2.0+ OR MIT variant which allows for
more freedom? At least NXP's
imx8mm.dtsi also uses that.
> +/*
> + * Copyright (C) 2019 Kontron Electronics GmbH
I know that there is much about 2020 to rather be ignored.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mm-kontron-n8010-som.dtsi"
> +#include "imx8mm-kontron-n801x-s.dtsi"
> +
> +/ {
> + model = "Kontron i.MX8MM N8010 S";
> + compatible = "kontron,imx8mm-n8010-s", "kontron,imx8mm-n8010-som",
> + "fsl,imx8mm";
I believe now with Linux having dropped the strict 80-column line length coding
style limit we are allowed to
go up to 100 (;-p).
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-som.dtsi
> new file mode 100644
> index ..5b178ce4ce1b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8010-som.dtsi
> @@ -0,0 +1,16 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019 Kontron Electronics GmbH
> + */
> +
> +#include "imx8mm-kontron-n801x-som.dtsi"
> +
> +/ {
> + model = "Kontron i.MX8MM N8010 SoM";
> + compatible = "kontron,imx8mm-n8010-som", "fsl,imx8mm";
> +
> + memory@4000 {
> + device_type = "memory";
> + reg = <0x0 0x4000 0 0x8000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-s.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-
> kontron-n8011-s.dts
> new file mode 100644
> index ..5c44bd77ed32
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-s.dts
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019 Kontron Electronics GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mm-kontron-n8011-som.dtsi"
> +#include "imx8mm-kontron-n801x-s.dtsi"
> +
> +/ {
> + model = "Kontron i.MX8MM N8011 S";
> + compatible = "kontron,imx8mm-n8011-s", "kontron,imx8mm-n8011-som",
> + "fsl,imx8mm";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-som.dtsi
> new file mode 100644
> index ..303594867b8f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n8011-som.dtsi
> @@ -0,0 +1,16 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019 Kontron Electronics GmbH
> + */
> +
> +#include "imx8mm-kontron-n801x-som.dtsi"
> +
> +/ {
> + model = "Kontron i.MX8MM N8011 SoM";
> + compatible = "kontron,imx8mm-n8011-som", "fsl,imx8mm";
> +
> + memory@4000 {
> + device_type = "memory";
> + reg = <0x0 0x4000 0 0xC000>;
> + };
Isn't the boot loader supposed to filling that in?
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtsi
> new file mode 100644
> index ..d825e52e0be
[PATCH v1] arm64: dts: freescale: add initial support for colibri imx8x
From: Marcel Ziswiler
This patch adds the device tree to support Toradex Colibri iMX8X a
computer on module which can be used on different carrier boards.
The module consists of a NXP i.MX 8X family SoC (either i.MX 8DualX or
8QuadXPlus), a PF8100 PMIC, a FastEthernet PHY, 1 or 2 GB of LPDDR4
RAM, some level shifters, a Micron eMMC, a USB hub, an AD7879 resistive
touch controller, a SGTL5000 audio codec and on-module CSI as well as
DSI-LVDS FFC receptacles plus an optional Bluetooth/Wi-Fi module.
Anything that is not self-contained on the module is disabled by
default.
The device tree for the Colibri Evaluation Board includes the module's
device tree and enables the supported peripherals of the carrier board
(the Colibri Evaluation Board supports almost all of them).
So far there is no display or USB functionality supported at all but
basic console UART, eMMC and Ethernet functionality work fine.
Signed-off-by: Marcel Ziswiler
---
arch/arm64/boot/dts/freescale/Makefile| 1 +
.../dts/freescale/imx8qxp-colibri-eval-v3.dts | 15 +
.../freescale/imx8qxp-colibri-eval-v3.dtsi| 62 ++
.../boot/dts/freescale/imx8qxp-colibri.dtsi | 592 ++
4 files changed, 670 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
diff --git a/arch/arm64/boot/dts/freescale/Makefile
b/arch/arm64/boot/dts/freescale/Makefile
index 93fce8f0c66d..bd3764e52cfd 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -31,4 +31,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
new file mode 100644
index ..85fc800c348f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+#include "imx8qxp-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri-imx8qxp-eval-v3",
+"toradex,colibri-imx8qxp", "fsl,imx8qxp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
new file mode 100644
index ..f5e4f380755c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex
+ */
+
+#include "dt-bindings/input/linux-event-codes.h"
+
+/ {
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = &rtc;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ power {
+ label = "Wake-Up";
+ gpios = <&lsio_gpio3 10 GPIO_ACTIVE_HIGH>;
+ linux,code = ;
+ debounce-interval = <10>;
+ gpio-key,wakeup;
+ };
+ };
+};
+
+/* Colibri Ethernet */
+&fec1 {
+ status = "okay";
+};
+
+&adma_i2c1 {
+ status = "okay";
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+/* Colibri UART_B */
+&adma_lpuart0 {
+ status= "okay";
+};
+
+/* Colibri UART_C */
+&adma_lpuart2 {
+ status= "okay";
+};
+
+/* Colibri UART_A */
+&adma_lpuart3 {
+ status= "okay";
+};
+
+/* Colibri SDCard */
+&usdhc2 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
new file mode 100644
index ..efdc332d082e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
@@ -0,0 +1,592 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex
+ */
+
+#include "imx8qxp.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP/DX Module";
+ compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
+
+ chosen {
+ std
Re: [PATCH v3 21/21] ARM: dts: imx7-colibri: Add UHS support to eval board
Hi Philippe
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This commit adds UHS capability to Toradex Eval Boards
How about any other carrier board?
> Signed-off-by: Philippe Schenker
>
> ---
>
> Changes in v3:
> - New patch to make use of ARM: dts: imx7-colibri: fix 1.8V/UHS
> support
>
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> index 576dec9ff81c..90121fbe561f 100644
> --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> @@ -210,9 +210,16 @@
> };
>
> &usdhc1 {
> - keep-power-in-suspend;
> - wakeup-source;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
> + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
> + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
> vmmc-supply = <®_3v3>;
> + vqmmc-supply = <®_LDO2>;
> + cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + enable-sdio-wakeup;
> + keep-power-in-suspend;
> status = "okay";
> };
>
> --
> 2.22.0
Cheers
Marcel
Re: [PATCH v3 20/21] ARM: dts: imx6ull-colibri: Add touchscreen used with Eval Board
Hi Philippe
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This adds the common touchscreen that is used with Toradex's
> Eval Boards.
Is that really Eval Board specific?
> Signed-off-by: Philippe Schenker
>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Removed f0710a, that is downstream only
> - Changed to generic node name
> - Better comment
>
> .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 24
> +++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> index d3c4809f140e..78e74bfeca1b 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> @@ -112,6 +112,21 @@
> &i2c1 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpiotouch>;
> + reg = <0x4a>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <16 IRQ_TYPE_EDGE_FALLING>;/* SODIMM 28
> */
> + reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /*
> SODIMM 30 */
> + status = "disabled";
> + };
> +
> /* M41T0M6 real time clock on carrier board */
> m41t0m6: rtc@68 {
> compatible = "st,m41t0";
> @@ -188,3 +203,12 @@
> sd-uhs-sdr104;
> status = "okay";
> };
> +
> +&iomuxc {
> + pinctrl_gpiotouch: touchgpios {
> + fsl,pins = <
> + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x74
> + MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x14
> + >;
> + };
> +};
I guess that could also be moved to the module's dtsi for any carrier board to
potentially profit from.
Cheers
Marcel
Re: [PATCH v3 19/21] ARM: dts: imx6/7-colibri: switch dr_mode to otg
Hi Philippe
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> In order for the otg ports, that these modules support, it is needed
> that dr_mode is on otg. Switch to use that feature.
Isn't further extcon integration required for this to truly work?
> Signed-off-by: Philippe Schenker
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 +-
> arch/arm/boot/dts/imx7-colibri.dtsi| 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 9a63debab0b5..6674198346d2 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -388,7 +388,7 @@
> &usbotg {
> pinctrl-names = "default";
> disable-over-current;
> - dr_mode = "peripheral";
> + dr_mode = "otg";
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index 67f5e0c87fdc..42478f1aa146 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -320,7 +320,7 @@
> };
>
> &usbotg1 {
> - dr_mode = "host";
> + dr_mode = "otg";
> };
>
> &usdhc1 {
Cheers
Marcel
Re: [PATCH v3 18/21] ARM: dts: imx6ull-colibri: Add general wakeup key used on Colibri
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This adds the possibility to wake the module with an external signal
> as defined in the Colibri standard
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> index 3bee37c75aa6..d3c4809f140e 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> @@ -8,6 +8,20 @@
> stdout-path = "serial0:115200n8";
> };
>
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
> +
> + power {
> + label = "Wake-Up";
> + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> + };
> +
> /* fixed crystal dedicated to mcp2515 */
> clk16m: clk16m {
> compatible = "fixed-clock";
Re: [PATCH v3 17/21] ARM: dts: imx6ull: improve can templates
Hi Philippe
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Max Krummenacher
>
> Add the pinmuxing and a inactive node for flexcan1 on SODIMM 55/63
> and move the inactive flexcan nodes to imx6ull-colibri-eval-v3.dtsi
> where they belong.
>
> Note that this commit does not enable flexcan functionality, but
> rather
> eases the effort needed to do so.
>
> Signed-off-by: Max Krummenacher
> Signed-off-by: Philippe Schenker
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 12
> arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 2 +-
> arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi| 2 +-
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 16 ++--
> 4 files changed, 28 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> index b6147c76d159..3bee37c75aa6 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> @@ -83,6 +83,18 @@
> };
> };
>
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "disabled";
> +};
> +
> +&can2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "disabled";
> +};
As those don't really have anything to do with the eval board directly,
wouldn't it make more sense to rather move them into the module's dtsi
just like the pin muxing further below?
> &i2c1 {
> status = "okay";
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
> index fb213bec4654..95a11b8bcbdb 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
> @@ -15,7 +15,7 @@
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> - &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6>;
> + &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6
> &pinctrl_gpio7>;
> };
>
> &iomuxc_snvs {
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
> index 038d8c90f6df..a0545431b3dc 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
> @@ -26,7 +26,7 @@
> &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> - &pinctrl_gpio4 &pinctrl_gpio5>;
> + &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio7>;
>
> };
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index e3220298dd6f..553d4c1f80e9 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -256,6 +256,13 @@
> >;
> };
>
> + pinctrl_flexcan1: flexcan1-grp {
> + fsl,pins = <
> + MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b0
> 20
> + MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b0
> 20
> + >;
> + };
> +
> pinctrl_flexcan2: flexcan2-grp {
> fsl,pins = <
> MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b0
> 20
> @@ -271,8 +278,6 @@
>
> pinctrl_gpio1: gpio1-grp {
> fsl,pins = <
> - MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO000x74
> /* SODIMM 55 */
> - MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO010x74
> /* SODIMM 63 */
> MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14
> /* SODIMM 77 */
> MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14
> /* SODIMM 99 */
> MX6UL_PAD_NAND_CE1_B__GPIO4_IO140x14 /*
> SODIMM 133 */
> @@ -325,6 +330,13 @@
> >;
> };
>
> + pinctrl_gpio7: gpio7-grp { /* CAN1 */
> + fsl,pins = <
> + MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO000x74
> /* SODIMM 55 */
> + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO010x74
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_gpmi_nand: gpmi-nand-grp {
> fsl,pins = <
> MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100
> a9
Cheers
Marcel
Re: [PATCH v3 16/21] ARM: dts: imx6ull-colibri: Add watchdog
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This patch adds the watchdog to the imx6ull-colibri devicetree
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index 1f112ec55e5c..e3220298dd6f 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -199,6 +199,12 @@
> assigned-clock-rates = <0>, <19800>;
> };
>
> +&wdog1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> +};
> +
> &iomuxc {
> pinctrl_can_int: canint-grp {
> fsl,pins = <
> @@ -506,6 +512,12 @@
> MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT0x14
> >;
> };
> +
> + pinctrl_wdog: wdog-grp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY0x30b0
> + >;
> + };
> };
>
> &iomuxc_snvs {
Re: [PATCH v3 15/21] ARM: dts: imx6ull-colibri: reduce v_batt current in power off
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Max Krummenacher
>
> Reduce the current drawn from VCC_BATT when the main power on the 3V3
> pins to the module are switched off.
>
> This switches off SoC internal pull resistors which are provided on
> the
> module for TAMPER7 and TAMPER9 SoC pin and switches on a pull down
> instead of a pullup for the USBC_DET module pin (TAMPER2).
>
> Signed-off-by: Max Krummenacher
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index 1019ce69a242..1f112ec55e5c 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -533,19 +533,19 @@
>
> pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH
> Interrupt */
> fsl,pins = <
> - MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0
> b0
> + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100
> b0
> >;
> };
>
> pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
> fsl,pins = <
> - MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400
> 1b8b0
> + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400
> 100b0
> >;
> };
>
> pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
> fsl,pins = <
> - MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0
> b0
> + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130
> b0
> >;
> };
Re: [PATCH v3 14/21] ARM: dts: imx6ull-colibri: Add sleep mode to fec
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Do not change the clock as the power for this phy is switched
> with that clock.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index d56728f03c35..1019ce69a242 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -62,8 +62,9 @@
> };
>
> &fec2 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "sleep";
> pinctrl-0 = <&pinctrl_enet2>;
> + pinctrl-1 = <&pinctrl_enet2_sleep>;
> phy-mode = "rmii";
> phy-handle = <ðphy1>;
> status = "okay";
> @@ -220,6 +221,21 @@
> >;
> };
>
> + pinctrl_enet2_sleep: enet2sleepgrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO06__GPIO1_IO060x0
> + MX6UL_PAD_GPIO1_IO07__GPIO1_IO070x0
> + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO080x0
> + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO090x0
> + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x0
> + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x0
> + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x400
> 1b031
> + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO110x0
> + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO120x0
> + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x0
> + >;
> + };
> +
> pinctrl_ecspi1_cs: ecspi1-cs-grp {
> fsl,pins = <
> MX6UL_PAD_LCD_DATA21__GPIO3_IO260x000a0
Re: [PATCH v3 13/21] ARM: dts: imx6-colibri: Add missing pinmuxing to Toradex eval board
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This patch adds some missing pinmuxing that is in the colibri
> standard to the dts.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2:
> - Commit title
>
> arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> index 763fb5e90bd3..e7a2d8c3b2d4 100644
> --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> @@ -191,6 +191,14 @@
> };
>
> &iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <
> + &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
> + &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
> + &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
> + &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
> + >;
> +
> pinctrl_pcap_1: pcap-1 {
> fsl,pins = <
> MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /*
> SODIMM 28 */
Re: [PATCH v3 12/21] ARM: dts: imx6-apalis: Add touchscreens used on Toradex eval boards
Hi Philippe
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This commit adds the touchscreens from Toradex so one can enable it.
>
> Signed-off-by: Philippe Schenker
>
> ---
>
> Changes in v3:
> - Fix commit title to "...imx6-apalis:..."
>
> Changes in v2:
> - Deleted touchrevolution downstream stuff
> - Use generic node name
> - Put a better comment in there
>
> arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 31
> +++
> arch/arm/boot/dts/imx6q-apalis-eval.dts | 13
> arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 13
> arch/arm/boot/dts/imx6q-apalis-ixora.dts | 13
> 4 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> index 9a5d6c94cca4..763fb5e90bd3 100644
> --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> @@ -168,6 +168,21 @@
> &i2c3 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcap_1>;
> + reg = <0x4a>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /*
> SODIMM 28 */
> + reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; /*
> SODIMM 30 */
> + status = "disabled";
> + };
> +
> /* M41T0M6 real time clock on carrier board */
> rtc_i2c: rtc@68 {
> compatible = "st,m41t0";
> @@ -175,6 +190,22 @@
> };
> };
>
> +&iomuxc {
> + pinctrl_pcap_1: pcap-1 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /*
> SODIMM 28 */
> + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /*
> SODIMM 30 */
> + >;
> + };
What exactly are the above which get used further up vs. the below
which do not seem to get used anywhere?
> + pinctrl_mxt_ts: mxt-ts {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /*
> SODIMM 107 */
> + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /*
> SODIMM 106 */
> + >;
> + };
> +};
> +
> &ipu1_di0_disp0 {
> remote-endpoint = <&lcd_display_in>;
> };
> diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts
> b/arch/arm/boot/dts/imx6q-apalis-eval.dts
> index 0edd3043d9c1..4665e15b196d 100644
> --- a/arch/arm/boot/dts/imx6q-apalis-eval.dts
> +++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
> @@ -167,6 +167,19 @@
> &i2c1 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> + reg = <0x4a>;
> + interrupt-parent = <&gpio6>;
> + interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13
> */
Wouldn't above two pins also need resp. pinctrl entries?
> + status = "disabled";
> + };
> +
> pcie-switch@58 {
> compatible = "plx,pex8605";
> reg = <0x58>;
> diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
> b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
> index b94bb687be6b..a3fa04a97d81 100644
> --- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
> +++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
> @@ -172,6 +172,19 @@
> &i2c1 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> + reg = <0x4a>;
> + interrupt-parent = <&gpio6>;
> + interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> + reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13
> */
Ditto.
> + status = "disabled";
> + };
> +
> /* M41T0M6 real time clock on carrier board */
> rtc_i2c: rtc@68 {
> compatible = "st,m41t0";
> diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> index 302fd6adc8a7..5ba49d0f4880 100644
> --- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> +++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
> @@ -171,6 +171,19 @@
> &i2c1 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> +
Re: [PATCH v3 11/21] ARM: dts: imx6qdl-apalis: Add sleep state to can interfaces
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This patch prepares the devicetree for the new Ixora V1.2 where we
> are
> able to turn off the supply of the can transceiver. This implies to
> use
> a sleep state on transmission pins in order to prevent backfeeding.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2:
> - Changed commit title to '...imx6qdl-apalis:...'
>
> arch/arm/boot/dts/imx6qdl-apalis.dtsi | 27 +--
>
> 1 file changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> index 7c4ad541c3f5..59ed2e4a1fd1 100644
> --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> @@ -148,14 +148,16 @@
> };
>
> &can1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_flexcan1>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_flexcan1_default>;
> + pinctrl-1 = <&pinctrl_flexcan1_sleep>;
> status = "disabled";
> };
>
> &can2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_flexcan2>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_flexcan2_default>;
> + pinctrl-1 = <&pinctrl_flexcan2_sleep>;
> status = "disabled";
> };
>
> @@ -599,19 +601,32 @@
> >;
> };
>
> - pinctrl_flexcan1: flexcan1grp {
> + pinctrl_flexcan1_default: flexcan1defgrp {
> fsl,pins = <
> MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
> MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
> >;
> };
>
> - pinctrl_flexcan2: flexcan2grp {
> + pinctrl_flexcan1_sleep: flexcan1slpgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0
> + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0
> + >;
> + };
> +
> + pinctrl_flexcan2_default: flexcan2defgrp {
> fsl,pins = <
> MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
> MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
> >;
> };
> + pinctrl_flexcan2_sleep: flexcan2slpgrp {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0
> + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0
> + >;
> + };
>
> pinctrl_gpio_bl_on: gpioblon {
> fsl,pins = <
Re: [PATCH v3 10/21] ARM: dts: imx6qdl-colibri: Add missing pin declaration in iomuxc
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> This adds the muxing for the optional pins usb-oc (overcurrent) and
> usb-id.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6qdl-colibri.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 019dda6b88ad..9a63debab0b5 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -615,6 +615,13 @@
> >;
> };
>
> + pinctrl_usbh_oc_1: usbh_oc-1 {
> + fsl,pins = <
> + /* USBH_OC */
> + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0
> b0
> + >;
> + };
> +
> pinctrl_spdif: spdifgrp {
> fsl,pins = <
> MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
> @@ -681,6 +688,13 @@
> >;
> };
>
> + pinctrl_usbc_id_1: usbc_id-1 {
> + fsl,pins = <
> + /* USBC_ID */
> + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0
> b0
> + >;
> + };
> +
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
Re: [PATCH v3 09/21] ARM: dts: imx6qdl-colibri: add phy to fec
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Add the phy-node and mdio bus to the fec-node, represented as is on
> hardware.
> This commit includes micrel,led-mode that is set to the default
> value, prepared for someone who wants to change this.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6qdl-colibri.dtsi | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 1beac22266ed..019dda6b88ad 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -140,7 +140,18 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> phy-mode = "rmii";
> + phy-handle = <ðphy>;
> status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy: ethernet-phy@0 {
> + reg = <0>;
> + micrel,led-mode = <0>;
> + };
> + };
> };
>
> &hdmi {
Re: [PATCH v3 08/21] ARM: dts: imx7-colibri: Add touch controllers
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Add touch controller that is connected over an I2C bus.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3:
> - Fix commit message
>
> Changes in v2:
> - Deleted touchrevolution downstream stuff
> - Use generic node name
> - Better comment
>
> arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 24
> +
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> index d4dbc4fc1adf..576dec9ff81c 100644
> --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> @@ -145,6 +145,21 @@
> &i2c4 {
> status = "okay";
>
> + /*
> + * Touchscreen is using SODIMM 28/30, also used for PWM,
> PWM,
> + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> pwms
> + */
> + touchscreen@4a {
> + compatible = "atmel,maxtouch";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpiotouch>;
> + reg = <0x4a>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /*
> SODIMM 28 */
> + reset-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; /*
> SODIMM 30 */
> + status = "disabled";
> + };
> +
> /* M41T0M6 real time clock on carrier board */
> rtc: m41t0m6@68 {
> compatible = "st,m41t0";
> @@ -200,3 +215,12 @@
> vmmc-supply = <®_3v3>;
> status = "okay";
> };
> +
> +&iomuxc {
> + pinctrl_gpiotouch: touchgpios {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74
> + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14
> + >;
> + };
> +};
Re: [PATCH v3 07/21] ARM: dts: imx7-colibri: fix 1.8V/UHS support
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Stefan Agner
>
> Add pinmuxing and do not specify voltage restrictions for the usdhc
> instance available on the modules edge connector. This allows to use
> SD-cards with higher transfer modes if supported by the carrier
> board.
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3:
> - Add new commit message from Stefan's proposal on ML
>
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 23 ++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index 16d1a1ed1aff..67f5e0c87fdc 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -326,7 +326,6 @@
> &usdhc1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
> - no-1-8-v;
> cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
> disable-wp;
> vqmmc-supply = <®_LDO2>;
> @@ -671,6 +670,28 @@
> >;
> };
>
> + pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
> + fsl,pins = <
> + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
> + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
> + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
> + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
> + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
> + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
> + >;
> + };
> +
> + pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
> + fsl,pins = <
> + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
> + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
> + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
> + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
> + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
> + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
> + >;
> + };
> +
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
Re: [PATCH v3 06/21] ARM: dts: imx7-colibri: add GPIO wakeup key
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Stefan Agner
>
> Add wakeup GPIO key which is able to wake the system from sleep
> modes (e.g. Suspend-to-Memory).
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 14 ++
> arch/arm/boot/dts/imx7-colibri.dtsi | 7 ++-
> 2 files changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> index 3f2746169181..d4dbc4fc1adf 100644
> --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
> @@ -52,6 +52,20 @@
> clock-frequency = <1600>;
> };
>
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpiokeys>;
> +
> + power {
> + label = "Wake-Up";
> + gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> + linux,code = ;
> + debounce-interval = <10>;
> + gpio-key,wakeup;
> + };
> + };
> +
> panel: panel {
> compatible = "edt,et057090dhu";
> backlight = <&bl>;
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index 2480623c92ff..16d1a1ed1aff 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -741,12 +741,17 @@
>
> pinctrl_gpio_lpsr: gpio1-grp {
> fsl,pins = <
> - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x59
> MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59
> MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59
> >;
> };
>
> + pinctrl_gpiokeys: gpiokeysgrp {
> + fsl,pins = <
> + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19
> + >;
> + };
> +
> pinctrl_i2c1: i2c1-grp {
> fsl,pins = <
> MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x400
> 0007f
Re: [PATCH v3 05/21] ARM: dts: add recovery for I2C for iMX7
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Oleksandr Suvorov
>
> - add recovery mode for applicable i2c buses for
> Colibri iMX7 module.
>
> Signed-off-by: Oleksandr Suvorov
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 25 +++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index a8d992f3e897..2480623c92ff 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -140,8 +140,12 @@
>
> &i2c1 {
> clock-frequency = <10>;
> - pinctrl-names = "default";
> + pinctrl-names = "default", "gpio";
> pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
> + pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>;
> + scl-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
> + sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
> +
> status = "okay";
>
> codec: sgtl5000@a {
> @@ -242,8 +246,11 @@
>
> &i2c4 {
> clock-frequency = <10>;
> - pinctrl-names = "default";
> + pinctrl-names = "default", "gpio";
> pinctrl-0 = <&pinctrl_i2c4>;
> + pinctrl-1 = <&pinctrl_i2c4_recovery>;
> + scl-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
> + sda-gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
> };
>
> &lcdif {
> @@ -540,6 +547,13 @@
> >;
> };
>
> + pinctrl_i2c4_recovery: i2c4-recoverygrp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x400
> 0007f
> + MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x400
> 0007f
> + >;
> + };
> +
> pinctrl_lcdif_dat: lcdif-dat-grp {
> fsl,pins = <
> MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
> @@ -740,6 +754,13 @@
> >;
> };
>
> + pinctrl_i2c1_recovery: i2c1-recoverygrp {
> + fsl,pins = <
> + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x400
> 0007f
> + MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x400
> 0007f
> + >;
> + };
> +
> pinctrl_cd_usdhc1: usdhc1-cd-grp {
> fsl,pins = <
> MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59
> /* CD */
Re: [PATCH v3 04/21] ARM: dts: imx7-colibri: Add sleep mode to ethernet
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Add sleep pinmux to the fec so it can properly sleep.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 19 ++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index 52046085ce6f..a8d992f3e897 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -101,8 +101,9 @@
> };
>
> &fec1 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "sleep";
> pinctrl-0 = <&pinctrl_enet1>;
> + pinctrl-1 = <&pinctrl_enet1_sleep>;
> clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
> <&clks IMX7D_ENET_AXI_ROOT_CLK>,
> <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
> @@ -463,6 +464,22 @@
> >;
> };
>
> + pinctrl_enet1_sleep: enet1sleepgrp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4
> 0x0
> + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0
> 0x0
> + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1
> 0x0
> + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5
> 0x0
> +
> + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10
> 0x0
> + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6
> 0x0
> + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7
> 0x0
> + MX7D_PAD_GPIO1_IO12__GPIO1_IO12
> 0x0
> + MX7D_PAD_SD2_CD_B__GPIO5_IO9
> 0x0
> + MX7D_PAD_SD2_WP__GPIO5_IO10
> 0x0
> + >;
> + };
> +
> pinctrl_ecspi3_cs: ecspi3-cs-grp {
> fsl,pins = <
> MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14
Re: [PATCH v3 03/21] ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
> compatible for CAN bus use with several modules from the Colibri
> family.
> Add Better drivestrength and also add flexcan2.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 35 ---
> --
> 1 file changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index f7c9ce5bed47..52046085ce6f 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -117,6 +117,18 @@
> fsl,magic-packet;
> };
>
> +&flexcan1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "disabled";
> +};
> +
> +&flexcan2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "disabled";
> +};
> +
> &gpmi {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gpmi_nand>;
> @@ -330,12 +342,11 @@
>
> &iomuxc {
> pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4>;
> + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4
> + &pinctrl_gpio7>;
>
> pinctrl_gpio1: gpio1-grp {
> fsl,pins = <
> - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74
> /* SODIMM 55 */
> - MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74
> /* SODIMM 63 */
> MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /*
> SODIMM 77 */
> MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14
> /* SODIMM 89 */
> MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74
> /* SODIMM 91 */
> @@ -416,6 +427,13 @@
> >;
> };
>
> + pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
> fsl,pins = <
> MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
> @@ -459,10 +477,17 @@
> >;
> };
>
> + pinctrl_flexcan1: flexcan1-grp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_flexcan2: flexcan2-grp {
> fsl,pins = <
> - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX0x59
> - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX0x59
> + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX0x79 /*
> SODIMM 188 */
> + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX0x79 /*
> SODIMM 178 */
> >;
> };
Re: [PATCH v3 02/21] ARM: dts: imx7-colibri: disable HS400
On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> From: Stefan Agner
>
> Force HS200 by masking bit 63 of the SDHCI capability register.
> The i.MX ESDHC driver uses SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. With
> that the stack checks bit 63 to descide whether HS400 is available.
> Using sdhci-caps-mask allows to mask bit 63. The stack then selects
> HS200 as operating mode.
>
> This prevents rare communication errors with minimal effect on
> performance:
> sdhci-esdhc-imx 30b6.usdhc: warning! HS400 strobe DLL
> status REF not lock!
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index f1c1971f2160..f7c9ce5bed47 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -325,6 +325,7 @@
> vmmc-supply = <®_module_3v3>;
> vqmmc-supply = <®_DCDC3>;
> non-removable;
> + sdhci-caps-mask = <0x8000 0x0>;
> };
>
> &iomuxc {
Re: [PATCH v2 1/1] ARM: dts: colibri: introduce dts with UHS-I support enabled
Hi Marco On Tue, 2019-07-02 at 14:51 +0200, Marco Felsch wrote: > Hi Igor, > > On 19-07-02 09:42, Igor Opaniuk wrote: > > Hi Marco, > > > > On Tue, Jul 2, 2019 at 10:27 AM Marco Felsch < > > m.fel...@pengutronix.de> wrote: > > > Hi Igor, > > > > > > On 19-05-14 17:38, Igor Opaniuk wrote: > > > > Introduce DTS for Colibri iMX6S/DL V1.1x re-design, where UHS-I > > > > support was > > > > added. Provide proper configuration for VGEN3, which allows > > > > that rail to > > > > be automatically switched to 1.8 volts for proper UHS-I > > > > operation mode. > > > > > > > > Signed-off-by: Igor Opaniuk > > > > --- > > > > > > > > v2: > > > > - rework hierarchy of dts files, and a separate dtsi for > > > > Colibri > > > > iMX6S/DL V1.1x re-design, where UHS-I was added > > > > - add comments about vgen3 power rail > > > > - fix other minor issues, addressing Marcel's comments. > > > > > > > > arch/arm/boot/dts/Makefile| 1 + > > > > .../boot/dts/imx6dl-colibri-v1.1-eval-v3.dts | 220 + > > > > arch/arm/boot/dts/imx6qdl-colibri-v1.1.dtsi | 852 > > > > ++ > > > > 3 files changed, 1073 insertions(+) > > > > create mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1.1-eval- > > > > v3.dts > > > > create mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1.1.dtsi > > > > > > > > diff --git a/arch/arm/boot/dts/Makefile > > > > b/arch/arm/boot/dts/Makefile > > > > index dab2914fa293..dc4ea05c8e2a 100644 > > > > --- a/arch/arm/boot/dts/Makefile > > > > +++ b/arch/arm/boot/dts/Makefile > > > > @@ -401,6 +401,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ > > > > imx6dl-aristainetos2_4.dtb \ > > > > imx6dl-aristainetos2_7.dtb \ > > > > imx6dl-colibri-eval-v3.dtb \ > > > > + imx6dl-colibri-v1.1-eval-v3.dtb \ > > > > > > I don't know the style convention but xxx-v1.1-eval-v3.dtb seems > > > weird > > > to me. Absolutely nothing weird about it at all. See e.g. other mainline device trees of us: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts etc. > > This was done intentionally. The first version (v1.1) is for SoM, > > the > > second one (v3) > > is for a carrier board. There is an explanation below. > > I mean the point between the v1.1 maybe this should be v11 or v1_1. No, not at all. That's really how hardware gets version-controlled e.g. see: https://developer.toradex.com/products/colibri-imx6#revision-history What's wrong with that dot? > > > > imx6dl-cubox-i.dtb \ > > > > imx6dl-cubox-i-emmc-som-v15.dtb \ > > > > imx6dl-cubox-i-som-v15.dtb \ > > > > diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts > > > > b/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts > > > > new file mode 100644 > > > > index ..8ed7a528e7c7 > > > > --- /dev/null > > > > +++ b/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts > > > > @@ -0,0 +1,220 @@ > > > > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > > > > +/* > > > > + * Copyright 2019 Toradex AG > > > > + */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +#include > > > > +#include > > > > +#include "imx6dl.dtsi" > > > > +#include "imx6qdl-colibri-v1.1.dtsi" > > > > > > Same here.. > > > > > > Why you don't use the exsiting "imx6qdl-colibri.dtsi"? The > > > "imx6qdl-colibri-v1.1.dtsi" would be a lot of boilerplate code. > > > Instead > > > you can use the existing one and apply your changes. I don't know > > > why > > > the vgen3 node isn't available currently but you can add them > > > without > > > worries. Just drop the boot-default-on property within the the > > > dtsi. Why > > > do you need this at all? > > > > > > I checked the v1.1 and the v1 DTS to and this is exactly the same > > > code. > > > So you can avoid even more code and improve maintainability. > > > > > > I would do something like this: > > > > This was done already for v1, and there was a discussion about that > > [1]. > > The problem is that it brakes the earlier defined hierarchy of > > device tree > > sources [2]. > > Can you provide me the link please? You mean this one? https://developer.toradex.com/device-tree-customization > > Currently we have 3 levels: > > 1. SoC level: imx6qdl.dtsi(all iMX6 SoCs) and imx6dl.dtsi (iMX6DL/S > > SoCs), > > that contain CPU/GPU configuration, all common peripherals > > configuration. > > 2. SoM level: imx6qdl-colibri.dtsi common configuration (pinmuxes, > > UART), > > common on module peripherals > > 3. Carrier board level: imx6dl-colibri-v1.1-eval-v3.dts specific > > carrier board > > configuration (where eval-v3 is the name and the version of a > > carrier board) > > I know that kind of hierarchy ;) Sure. > > The UHS-I feature was not present on V1.0x Colibri iMX6 modules > > but got only added later as part of the V1.1x re-design. For this > > purposes I added > > im
Re: [PATCH v1 1/6] ASoC: sgtl5000: Fix definition of VAG Ramp Control
On Wed, 2019-06-19 at 10:00 +, Oleksandr Suvorov wrote: > > > > From: Marcel Ziswiler > > Sent: Thursday, June 13, 2019 12:05 > > To: feste...@gmail.com; Oleksandr Suvorov > > Cc: Igor Opaniuk; linux-kernel@vger.kernel.org; > > alsa-de...@alsa-project.org > > Subject: Re: [PATCH v1 1/6] ASoC: sgtl5000: Fix definition of VAG > > Ramp Control > > > > On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote: > > > SGTL5000_SMALL_POP is a bit mask, not a value. Usage of > > > correct definition makes device probing code more clear. > > > > > > Signed-off-by: Oleksandr Suvorov > > > > Reviewed-by: Marcel Ziswiler > > > > > --- > > > > > > sound/soc/codecs/sgtl5000.c | 2 +- > > > sound/soc/codecs/sgtl5000.h | 2 +- > > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git sound/soc/codecs/sgtl5000.c > > > sound/soc/codecs/sgtl5000.c > > > > I'm not sure how exactly you generated this patch set but usually > > git > > format-patch inserts an additional folder level called a/b which is > > what git am accepts by default e.g. > > I just used patman to generate this set of patches. But my .gitconfig > included diff option "noprefix". > Thanks for pointing me! Fixed. Should I resent regenerated patchset > with the prefix? I guess but more importantly also make sure to actually send valid emails concerning SPF/DKIM configuration. > > diff --git a/sound/soc/codecs/sgtl5000.c > > b/sound/soc/codecs/sgtl5000.c > > > > > index a6a4748c97f9..5e49523ee0b6 100644 > > > --- sound/soc/codecs/sgtl5000.c > > > +++ sound/soc/codecs/sgtl5000.c > > > > Of course, the same a/b stuff applies here: > > > > --- a/sound/soc/codecs/sgtl5000.c > > +++ b/sound/soc/codecs/sgtl5000.c > > > > > @@ -1296,7 +1296,7 @@ static int sgtl5000_probe(struct > > > snd_soc_component *component) > > > > > > /* enable small pop, introduce 400ms delay in turning off > > > */ > > > snd_soc_component_update_bits(component, > > > SGTL5000_CHIP_REF_CTRL, > > > - SGTL5000_SMALL_POP, 1); > > > + SGTL5000_SMALL_POP, > > > SGTL5000_SMALL_POP); > > > > > > /* disable short cut detector */ > > > snd_soc_component_write(component, > > > SGTL5000_CHIP_SHORT_CTRL, > > > 0); > > > diff --git sound/soc/codecs/sgtl5000.h > > > sound/soc/codecs/sgtl5000.h > > > index 18cae08bbd3a..a4bf4bca95bf 100644 > > > --- sound/soc/codecs/sgtl5000.h > > > +++ sound/soc/codecs/sgtl5000.h > > > @@ -273,7 +273,7 @@ > > > #define SGTL5000_BIAS_CTRL_MASK 0x000e > > > #define SGTL5000_BIAS_CTRL_SHIFT 1 > > > #define SGTL5000_BIAS_CTRL_WIDTH 3 > > > -#define SGTL5000_SMALL_POP 1 > > > +#define SGTL5000_SMALL_POP 0x0001 > > > > > > /* > > > * SGTL5000_CHIP_MIC_CTRL > > > -- > > > 2.20.1
Re: [PATCH v1 2/6] ASoC: sgtl5000: add ADC mute control
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote:
> This control mute/unmute the ADC input of SGTL5000
> using its CHIP_ANA_CTRL register.
>
> Signed-off-by: Oleksandr Suvorov
Reviewed-by: Marcel Ziswiler
> ---
>
> sound/soc/codecs/sgtl5000.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git sound/soc/codecs/sgtl5000.c sound/soc/codecs/sgtl5000.c
> index 5e49523ee0b6..bb58c997c691 100644
> --- sound/soc/codecs/sgtl5000.c
> +++ sound/soc/codecs/sgtl5000.c
> @@ -556,6 +556,7 @@ static const struct snd_kcontrol_new
> sgtl5000_snd_controls[] = {
> SGTL5000_CHIP_ANA_ADC_CTRL,
> 8, 1, 0, capture_6db_attenuate),
> SOC_SINGLE("Capture ZC Switch", SGTL5000_CHIP_ANA_CTRL, 1, 1,
> 0),
> + SOC_SINGLE("Capture Switch", SGTL5000_CHIP_ANA_CTRL, 0, 1, 1),
>
> SOC_DOUBLE_TLV("Headphone Playback Volume",
> SGTL5000_CHIP_ANA_HP_CTRL,
> --
> 2.20.1
Re: [PATCH v1 1/6] ASoC: sgtl5000: Fix definition of VAG Ramp Control
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote: > SGTL5000_SMALL_POP is a bit mask, not a value. Usage of > correct definition makes device probing code more clear. > > Signed-off-by: Oleksandr Suvorov Reviewed-by: Marcel Ziswiler > --- > > sound/soc/codecs/sgtl5000.c | 2 +- > sound/soc/codecs/sgtl5000.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git sound/soc/codecs/sgtl5000.c sound/soc/codecs/sgtl5000.c I'm not sure how exactly you generated this patch set but usually git format-patch inserts an additional folder level called a/b which is what git am accepts by default e.g. diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c > index a6a4748c97f9..5e49523ee0b6 100644 > --- sound/soc/codecs/sgtl5000.c > +++ sound/soc/codecs/sgtl5000.c Of course, the same a/b stuff applies here: --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c > @@ -1296,7 +1296,7 @@ static int sgtl5000_probe(struct > snd_soc_component *component) > > /* enable small pop, introduce 400ms delay in turning off */ > snd_soc_component_update_bits(component, > SGTL5000_CHIP_REF_CTRL, > - SGTL5000_SMALL_POP, 1); > + SGTL5000_SMALL_POP, > SGTL5000_SMALL_POP); > > /* disable short cut detector */ > snd_soc_component_write(component, SGTL5000_CHIP_SHORT_CTRL, > 0); > diff --git sound/soc/codecs/sgtl5000.h sound/soc/codecs/sgtl5000.h > index 18cae08bbd3a..a4bf4bca95bf 100644 > --- sound/soc/codecs/sgtl5000.h > +++ sound/soc/codecs/sgtl5000.h > @@ -273,7 +273,7 @@ > #define SGTL5000_BIAS_CTRL_MASK 0x000e > #define SGTL5000_BIAS_CTRL_SHIFT 1 > #define SGTL5000_BIAS_CTRL_WIDTH 3 > -#define SGTL5000_SMALL_POP 1 > +#define SGTL5000_SMALL_POP 0x0001 > > /* > * SGTL5000_CHIP_MIC_CTRL > -- > 2.20.1
Re: [PATCH v1 3/6] ASoC: sgtl5000: Fix of unmute outputs on probe
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote: > To enable "zero cross detect" for ADC/HP, change > HP_ZCD_EN/ADC_ZCD_EN bits only instead of writing the whole > CHIP_ANA_CTRL register. > > Signed-off-by: Oleksandr Suvorov Reviewed-by: Marcel Ziswiler > --- > > sound/soc/codecs/sgtl5000.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git sound/soc/codecs/sgtl5000.c sound/soc/codecs/sgtl5000.c > index bb58c997c691..e813a37910af 100644 > --- sound/soc/codecs/sgtl5000.c > +++ sound/soc/codecs/sgtl5000.c > @@ -1289,6 +1289,7 @@ static int sgtl5000_probe(struct > snd_soc_component *component) > int ret; > u16 reg; > struct sgtl5000_priv *sgtl5000 = > snd_soc_component_get_drvdata(component); > + unsigned int zcd_mask = SGTL5000_HP_ZCD_EN | > SGTL5000_ADC_ZCD_EN; > > /* power up sgtl5000 */ > ret = sgtl5000_set_power_regs(component); > @@ -1316,9 +1317,8 @@ static int sgtl5000_probe(struct > snd_soc_component *component) > 0x1f); > snd_soc_component_write(component, SGTL5000_CHIP_PAD_STRENGTH, > reg); > > - snd_soc_component_write(component, SGTL5000_CHIP_ANA_CTRL, > - SGTL5000_HP_ZCD_EN | > - SGTL5000_ADC_ZCD_EN); > + snd_soc_component_update_bits(component, > SGTL5000_CHIP_ANA_CTRL, > + zcd_mask, zcd_mask); > > snd_soc_component_update_bits(component, > SGTL5000_CHIP_MIC_CTRL, > SGTL5000_BIAS_R_MASK, > -- > 2.20.1
Re: [PATCH v1 5/6] ASoC: Define a set of DAPM pre/post-up events
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote: > Prepare to use SND_SOC_DAPM_PRE_POST_PMU definition to > reduce coming code size and make it more readable. > > Signed-off-by: Oleksandr Suvorov Reviewed-by: Marcel Ziswiler > --- > > include/sound/soc-dapm.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git include/sound/soc-dapm.h include/sound/soc-dapm.h > index c00a0b8ade08..6c6694160130 100644 > --- include/sound/soc-dapm.h > +++ include/sound/soc-dapm.h > @@ -353,6 +353,8 @@ struct device; > #define SND_SOC_DAPM_WILL_PMD 0x80/* called at start of > sequence */ > #define SND_SOC_DAPM_PRE_POST_PMD \ > (SND_SOC_DAPM_PRE_PMD | > SND_SOC_DAPM_POST_PMD) > +#define SND_SOC_DAPM_PRE_POST_PMU \ > + (SND_SOC_DAPM_PRE_PMU | > SND_SOC_DAPM_POST_PMU) > > /* convenience event type detection */ > #define SND_SOC_DAPM_EVENT_ON(e) \ > -- > 2.20.1
Re: [PATCH v1 6/6] ASoC: sgtl5000: Improve VAG power and mute control
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote:
> Change VAG power on/off control according to the following algorithm:
> - turn VAG power ON on the 1st incoming event.
> - keep it ON if there is any active VAG consumer (ADC/DAC/HP/Line-
> In).
> - turn VAG power OFF when there is the latest consumer's pre-down
> event
> come.
> - always delay after VAG power OFF to avoid pop.
> - delay after VAG power ON if the initiative consumer is Line-In,
> this
> prevents pop during line-in muxing.
>
> Also, according to the manual, to avoid any pops/clicks,
> the outputs should be muted during input/output
> routing changes.
>
> Signed-off-by: Oleksandr Suvorov
Reviewed-by: Marcel Ziswiler
> ---
>
> sound/soc/codecs/sgtl5000.c | 227 +++---
> --
> 1 file changed, 195 insertions(+), 32 deletions(-)
>
> diff --git sound/soc/codecs/sgtl5000.c sound/soc/codecs/sgtl5000.c
> index ee1e4bf61322..acfbd5cdf936 100644
> --- sound/soc/codecs/sgtl5000.c
> +++ sound/soc/codecs/sgtl5000.c
> @@ -31,6 +31,13 @@
> #define SGTL5000_DAP_REG_OFFSET 0x0100
> #define SGTL5000_MAX_REG_OFFSET 0x013A
>
> +/* Delay for the VAG ramp up */
> +#define SGTL5000_VAG_POWERUP_DELAY 500 /* ms */
> +/* Delay for the VAG ramp down */
> +#define SGTL5000_VAG_POWERDOWN_DELAY 500 /* ms */
> +
> +#define SGTL5000_OUTPUTS_MUTE (SGTL5000_HP_MUTE |
> SGTL5000_LINE_OUT_MUTE)
> +
> /* default value of sgtl5000 registers */
> static const struct reg_default sgtl5000_reg_defaults[] = {
> { SGTL5000_CHIP_DIG_POWER, 0x },
> @@ -123,6 +130,18 @@ enum {
> I2S_SCLK_STRENGTH_HIGH,
> };
>
> +enum {
> + HP_POWER_EVENT,
> + DAC_POWER_EVENT,
> + ADC_POWER_EVENT
> +};
> +
> +struct sgtl5000_mute_state {
> + u16 hp_event;
> + u16 dac_event;
> + u16 adc_event;
> +};
> +
> /* sgtl5000 private structure in codec */
> struct sgtl5000_priv {
> int sysclk; /* sysclk rate */
> @@ -137,8 +156,109 @@ struct sgtl5000_priv {
> u8 micbias_voltage;
> u8 lrclk_strength;
> u8 sclk_strength;
> + struct sgtl5000_mute_state mute_state;
> };
>
> +static inline int hp_sel_input(struct snd_soc_component *component)
> +{
> + return (snd_soc_component_read32(component,
> SGTL5000_CHIP_ANA_CTRL) &
> + SGTL5000_HP_SEL_MASK) >> SGTL5000_HP_SEL_SHIFT;
> +}
> +
> +static inline u16 mute_output(struct snd_soc_component *component,
> + u16 mute_mask)
> +{
> + u16 mute_reg = snd_soc_component_read32(component,
> + SGTL5000_CHIP_ANA_CTRL);
> +
> + snd_soc_component_update_bits(component,
> SGTL5000_CHIP_ANA_CTRL,
> + mute_mask, mute_mask);
> + return mute_reg;
> +}
> +
> +static inline void restore_output(struct snd_soc_component
> *component,
> + u16 mute_mask, u16 mute_reg)
> +{
> + snd_soc_component_update_bits(component,
> SGTL5000_CHIP_ANA_CTRL,
> + mute_mask, mute_reg);
> +}
> +
> +static void vag_power_on(struct snd_soc_component *component, u32
> source)
> +{
> + if (snd_soc_component_read32(component,
> SGTL5000_CHIP_ANA_POWER) &
> + SGTL5000_VAG_POWERUP)
> + return;
> +
> + snd_soc_component_update_bits(component,
> SGTL5000_CHIP_ANA_POWER,
> + SGTL5000_VAG_POWERUP,
> SGTL5000_VAG_POWERUP);
> +
> + /* When VAG powering on to get local loop from Line-In, the
> sleep
> + * is required to avoid loud pop.
> + */
> + if (hp_sel_input(component) == SGTL5000_HP_SEL_LINE_IN &&
> + source == HP_POWER_EVENT)
> + msleep(SGTL5000_VAG_POWERUP_DELAY);
> +}
> +
> +static int vag_power_consumers(struct snd_soc_component *component,
> +u16 ana_pwr_reg, u32 source)
> +{
> + int consumers = 0;
> +
> + /* count dac/adc consumers unconditional */
> + if (ana_pwr_reg & SGTL5000_DAC_POWERUP)
> + consumers++;
> + if (ana_pwr_reg & SGTL5000_ADC_POWERUP)
> + consumers++;
> +
> + /*
> + * If the event comes from HP and Line-In is selected,
> + * current action is 'DAC to be powered down'.
> + * As HP_POWERUP is not set when HP muxed to line-in,
> + * we need to keep VAG power ON.
> + */
> + if (source == HP_POWER_EVENT) {
> + if (hp_sel_input(component) == SGTL5000_HP_SEL_LINE_IN)
> + consumers++;
> + } else {
> +
Re: [PATCH v1 4/6] ASoC: sgtl5000: Fix charge pump source assignment
On Tue, 2019-05-21 at 13:36 +0300, Oleksandr Suvorov wrote:
> If VDDA != VDDIO and any of them is greater than 3.1V, charge pump
> source can be assigned automatically.
>
> Signed-off-by: Oleksandr Suvorov
Reviewed-by: Marcel Ziswiler
> ---
>
> sound/soc/codecs/sgtl5000.c | 14 +-
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git sound/soc/codecs/sgtl5000.c sound/soc/codecs/sgtl5000.c
> index e813a37910af..ee1e4bf61322 100644
> --- sound/soc/codecs/sgtl5000.c
> +++ sound/soc/codecs/sgtl5000.c
> @@ -1174,12 +1174,16 @@ static int sgtl5000_set_power_regs(struct
> snd_soc_component *component)
> SGTL5000_INT_OSC_EN);
> /* Enable VDDC charge pump */
> ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP;
> - } else if (vddio >= 3100 && vdda >= 3100) {
> + } else {
> ana_pwr &= ~SGTL5000_VDDC_CHRGPMP_POWERUP;
> - /* VDDC use VDDIO rail */
> - lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
> - lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
> - SGTL5000_VDDC_MAN_ASSN_SHIFT;
> + /* if vddio == vdda the source of charge pump should be
> + * assigned manually to VDDIO
> + */
> + if (vddio == vdda) {
> + lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
> + lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
> + SGTL5000_VDDC_MAN_ASSN_SHIFT;
> + }
> }
>
> snd_soc_component_write(component, SGTL5000_CHIP_LINREG_CTRL,
> lreg_ctrl);
> --
> 2.20.1
Re: [PATCH 1/1] ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1
On Thu, 2019-06-06 at 12:06 +0300, Igor Opaniuk wrote:
> From: Igor Opaniuk
>
> Allows to use the SD interface at a higher speed mode if the card
> supports it. For this the signaling voltage is switched from 3.3V to
> 1.8V under the usdhc1's drivers control.
>
> Signed-off-by: Igor Opaniuk
Reviewed-by: Marcel Ziswiler
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 4
> arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 11 +--
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 6 ++
> 3 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi
> b/arch/arm/boot/dts/imx6ul.dtsi
> index fc388b84bf22..91a0ced44e27 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -857,6 +857,8 @@
><&clks IMX6UL_CLK_USDHC1>,
><&clks IMX6UL_CLK_USDHC1>;
> clock-names = "ipg", "ahb", "per";
> + fsl,tuning-step= <2>;
> + fsl,tuning-start-tap = <20>;
> bus-width = <4>;
> status = "disabled";
> };
> @@ -870,6 +872,8 @@
><&clks IMX6UL_CLK_USDHC2>;
> clock-names = "ipg", "ahb", "per";
> bus-width = <4>;
> + fsl,tuning-step= <2>;
> + fsl,tuning-start-tap = <20>;
> status = "disabled";
> };
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> index 006690ea98c0..7dc7770cf52c 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> @@ -145,13 +145,20 @@
> };
>
> &usdhc1 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "state_100mhz", "state_200mhz",
> "sleep";
> pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>;
> - no-1-8-v;
> + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
> + pinctrl-2 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>;
> + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>;
> cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
> disable-wp;
> wakeup-source;
> keep-power-in-suspend;
> vmmc-supply = <®_3v3>;
> + vqmmc-supply = <®_sd1_vmmc>;
> + sd-uhs-sdr12;
> + sd-uhs-sdr25;
> + sd-uhs-sdr50;
> + sd-uhs-sdr104;
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index 9ad1da159768..d56728f03c35 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -545,6 +545,12 @@
> >;
> };
>
> + pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
> + fsl,pins = <
> + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0
> + >;
> + };
> +
> pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
> fsl,pins = <
> MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14
Re: [PATCH v2 1/1] ARM: dts: colibri: introduce dts with UHS-I support enabled
On Tue, 2019-05-14 at 17:38 +0300, Igor Opaniuk wrote:
> Introduce DTS for Colibri iMX6S/DL V1.1x re-design, where UHS-I
> support was
> added. Provide proper configuration for VGEN3, which allows that rail
> to
> be automatically switched to 1.8 volts for proper UHS-I operation
> mode.
>
> Signed-off-by: Igor Opaniuk
Acked-by: Marcel Ziswiler
> ---
>
> v2:
> - rework hierarchy of dts files, and a separate dtsi for Colibri
> iMX6S/DL V1.1x re-design, where UHS-I was added
> - add comments about vgen3 power rail
> - fix other minor issues, addressing Marcel's comments.
>
> arch/arm/boot/dts/Makefile| 1 +
> .../boot/dts/imx6dl-colibri-v1.1-eval-v3.dts | 220 +
> arch/arm/boot/dts/imx6qdl-colibri-v1.1.dtsi | 852
> ++
> 3 files changed, 1073 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1.1.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index dab2914fa293..dc4ea05c8e2a 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -401,6 +401,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6dl-aristainetos2_4.dtb \
> imx6dl-aristainetos2_7.dtb \
> imx6dl-colibri-eval-v3.dtb \
> + imx6dl-colibri-v1.1-eval-v3.dtb \
> imx6dl-cubox-i.dtb \
> imx6dl-cubox-i-emmc-som-v15.dtb \
> imx6dl-cubox-i-som-v15.dtb \
> diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts
> b/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts
> new file mode 100644
> index ..8ed7a528e7c7
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-colibri-v1.1-eval-v3.dts
> @@ -0,0 +1,220 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2019 Toradex AG
> + */
> +
> +/dts-v1/;
> +
> +#include
> +#include
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-colibri-v1.1.dtsi"
> +
> +/ {
> + model = "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation
> Board V3";
> + compatible = "toradex,colibri_imx6dl-eval-v3",
> "toradex,colibri_imx6dl",
> + "fsl,imx6dl";
> +
> + /* Will be filled by the bootloader */
> + memory@1000 {
> + device_type = "memory";
> + reg = <0x1000 0>;
> + };
> +
> + aliases {
> + i2c0 = &i2c2;
> + i2c1 = &i2c3;
> + };
> +
> + aliases {
> + rtc0 = &rtc_i2c;
> + rtc1 = &snvs_rtc;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + /* Fixed crystal dedicated to mcp251x */
> + clk16m: clock-16m {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1600>;
> + clock-output-names = "clk16m";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_keys>;
> +
> + wakeup {
> + label = "Wake-Up";
> + gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM
> 45 */
> + linux,code = ;
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> + };
> +
> + lcd_display: disp0 {
> + compatible = "fsl,imx-parallel-display";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interface-pix-fmt = "bgr666";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ipu1_lcdif>;
> + status = "okay";
> +
> + port@0 {
> + reg = <0>;
> +
> + lcd_display_in: endpoint {
> + remote-endpoint = <&ipu1_di0_disp0>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + lcd_display_out: endpoint {
> + remote-endpoint = <&lcd_panel_in>;
> + };
> + };
> + };
> +
> + panel: panel {
> + /*
> + * edt,et057090dhu: EDT 5.7" LCD TFT
> + * edt,et070080dh6: EDT 7.0" LCD TFT
> +
Re: [PATCH v1 1/1] ARM: dts: colibri: introduce dts with UHS-I support enabled
Hi Igor On Mon, 2019-05-06 at 11:51 +, Igor Opaniuk wrote: > Hi Marcel, > > On Thu, Apr 25, 2019 at 11:47 AM Marcel Ziswiler > wrote: > > Hi Igor > > > > Sorry, for my late reply but this one got stuck in my private > > email. > > > > On Thu, 2019-04-04 at 11:19 +0200, Igor Opaniuk wrote: > > > Introduce DTS for Colibri iMX6DL with proper configuration for > > > VGEN3, > > > which allows that rail to be automatically switched to 1.8 volts > > > for > > > proper UHS-I operation mode. > > > > In general, this looks very good. However, thinking some more about > > the > > whole thing I see two issues: the UHS-I feature was not present on > > V1.0x Colibri iMX6 modules but got only added later as part of the > > V1.1x re-design [1]. Maybe it would therefore make more sense to > > name > > it accordingly e.g. imx6dl-colibri-v1.1.dtsi et. al. similar to > > what I > > did for Apalis T30 V1.1x [2]. Whether or not to keep the uhs > > postfix is > > a good question but me personally I would just drop it. Another > > issue > > are the 3.3 volt pull-ups on all our Colibri carrier boards. While > > those seem not to cause any issues with most any SD resp. micro SD > > card > > we do know that SDIO devices are quite sensitive in that regard and > > may > > fail in various ways unless they get removed. I would at least add > > a > > note indicating that the pull-ups on our carrier boards may still > > need > > removing for fully compliant operation. > > Ok, will do! > > > [1] > > https://developer.toradex.com/products/colibri-imx6#revision-history > > [2] > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=b57d6b996ebe25e7f1e92de0abc7a2da42005454 > > > > > Signed-off-by: Igor Opaniuk > > > --- > > > arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 245 +--- > > > > > > -- > > > arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtsi | 213 > > > +++ > > > .../boot/dts/imx6dl-colibri-uhs-eval-v3.dts | 29 +++ > > > arch/arm/boot/dts/imx6qdl-colibri.dtsi| 36 ++- > > > 4 files changed, 278 insertions(+), 245 deletions(-) > > > create mode 100644 arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtsi > > > create mode 100644 arch/arm/boot/dts/imx6dl-colibri-uhs-eval- > > > v3.dts > > > > > > diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts > > > b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts > > > index 9a5d6c94cca4..14d7f359d8d6 100644 > > > --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts > > > +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts > > > @@ -1,258 +1,19 @@ > > > +// SPDX-License-Identifier: GPL-2.0 OR X11 > > > /* > > > - * Copyright 2014-2016 Toradex AG > > > - * Copyright 2012 Freescale Semiconductor, Inc. > > > - * Copyright 2011 Linaro Ltd. > > > - * > > > - * This file is dual-licensed: you can use it either under the > > > terms > > > - * of the GPL or the X11 license, at your option. Note that this > > > dual > > > - * licensing only applies to this file, and not this project as > > > a > > > - * whole. > > > - * > > > - * a) This file is free software; you can redistribute it > > > and/or > > > - * modify it under the terms of the GNU General Public > > > License > > > - * version 2 as published by the Free Software Foundation. > > > - * > > > - * This file is distributed in the hope that it will be > > > useful, > > > - * but WITHOUT ANY WARRANTY; without even the implied > > > warranty > > > of > > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See > > > the > > > - * GNU General Public License for more details. > > > - * > > > - * Or, alternatively, > > > - * > > > - * b) Permission is hereby granted, free of charge, to any > > > person > > > - * obtaining a copy of this software and associated > > > documentation > > > - * files (the "Software"), to deal in the Software without > > > - * restriction, including without limitation the rights to > > > use, > > > - * copy, modify, merge, publish, distribute, sublicense, > > > and/or > > > - * sell copies of the Software, and to permit persons to > > > whom > > > the >
Re: [PATCH v1 1/1] ARM: dts: colibri: introduce dts with UHS-I support enabled
Hi Igor
Sorry, for my late reply but this one got stuck in my private email.
On Thu, 2019-04-04 at 11:19 +0200, Igor Opaniuk wrote:
> Introduce DTS for Colibri iMX6DL with proper configuration for VGEN3,
> which allows that rail to be automatically switched to 1.8 volts for
> proper UHS-I operation mode.
In general, this looks very good. However, thinking some more about the
whole thing I see two issues: the UHS-I feature was not present on
V1.0x Colibri iMX6 modules but got only added later as part of the
V1.1x re-design [1]. Maybe it would therefore make more sense to name
it accordingly e.g. imx6dl-colibri-v1.1.dtsi et. al. similar to what I
did for Apalis T30 V1.1x [2]. Whether or not to keep the uhs postfix is
a good question but me personally I would just drop it. Another issue
are the 3.3 volt pull-ups on all our Colibri carrier boards. While
those seem not to cause any issues with most any SD resp. micro SD card
we do know that SDIO devices are quite sensitive in that regard and may
fail in various ways unless they get removed. I would at least add a
note indicating that the pull-ups on our carrier boards may still need
removing for fully compliant operation.
[1]
https://developer.toradex.com/products/colibri-imx6#revision-history
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=b57d6b996ebe25e7f1e92de0abc7a2da42005454
> Signed-off-by: Igor Opaniuk
> ---
> arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 245 +---
> --
> arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtsi | 213 +++
> .../boot/dts/imx6dl-colibri-uhs-eval-v3.dts | 29 +++
> arch/arm/boot/dts/imx6qdl-colibri.dtsi| 36 ++-
> 4 files changed, 278 insertions(+), 245 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtsi
> create mode 100644 arch/arm/boot/dts/imx6dl-colibri-uhs-eval-v3.dts
>
> diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> index 9a5d6c94cca4..14d7f359d8d6 100644
> --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
> @@ -1,258 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0 OR X11
> /*
> - * Copyright 2014-2016 Toradex AG
> - * Copyright 2012 Freescale Semiconductor, Inc.
> - * Copyright 2011 Linaro Ltd.
> - *
> - * This file is dual-licensed: you can use it either under the terms
> - * of the GPL or the X11 license, at your option. Note that this
> dual
> - * licensing only applies to this file, and not this project as a
> - * whole.
> - *
> - * a) This file is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License
> - * version 2 as published by the Free Software Foundation.
> - *
> - * This file is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - * Or, alternatively,
> - *
> - * b) Permission is hereby granted, free of charge, to any person
> - * obtaining a copy of this software and associated
> documentation
> - * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use,
> - * copy, modify, merge, publish, distribute, sublicense, and/or
> - * sell copies of the Software, and to permit persons to whom
> the
> - * Software is furnished to do so, subject to the following
> - * conditions:
> - *
> - * The above copyright notice and this permission notice shall
> be
> - * included in all copies or substantial portions of the
> Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
> KIND,
> - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> WARRANTIES
> - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> + * Copyright 2019 Toradex AG
> */
>
> /dts-v1/;
>
> -#include
> -#include
> -#include "imx6dl.dtsi"
> -#include "imx6qdl-colibri.dtsi"
> +#include "imx6dl-colibri-eval-v3.dtsi"
>
> / {
> model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board
> V3";
> compatible = "toradex,colibri_imx6dl-eval-v3",
> "toradex,colibri_imx6dl",
>"fsl,imx6dl";
> -
> - /* Will be filled by the bootloader */
> - memory@1000 {
> - device_type = "memory";
> - reg = <0x1000 0>;
> - };
> -
> - aliases {
> - i2c0 = &i2c2;
> - i2c1 = &i2c3;
> - };
> -
> - aliase
Re: [PATCH v2 2/2] ARM: dts: tegra124-apalis: convert to SPDX license tags
On Wed, 2019-04-17 at 10:54 +0200, Thierry Reding wrote:
> On Wed, Apr 17, 2019 at 08:13:51AM +0200, Marcel Ziswiler wrote:
> > +// SPDX-License-Identifier: (GPL-2.0 OR X11)
> >
> > I believe the parentheses don't really server any purpose here.
> > With that:
> >
> > Acked-by: Marcel Ziswiler
> >
> > On April 10, 2019 9:10:07 AM GMT+02:00, Igor Opaniuk <
> > igor.opan...@toradex.com> wrote:
> > > Replace boiler plate licenses texts with the SPDX license
> > > identifiers in Colibri/Apalis DTS files.
> > >
> > > Signed-off-by: Igor Opaniuk
> > > ---
> > > arch/arm/boot/dts/tegra124-apalis-emc.dtsi | 39 ++---
> > >
> > > arch/arm/boot/dts/tegra124-apalis-eval.dts | 40 ++---
> > > -
> > > arch/arm/boot/dts/tegra124-apalis.dtsi | 40 ++---
> > > -
> > > 3 files changed, 6 insertions(+), 113 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> > > b/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> > > index ca2c3a557895..36211f876e33 100644
> > > --- a/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> > > +++ b/arch/arm/boot/dts/tegra124-apalis-emc.dtsi
> > > @@ -1,42 +1,7 @@
> > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
>
> The old text below says that this was supposed to be GPL-2.0 OR X11.
> Do
> you want me to fix that while applying?
Yes, please.
> Thierry
Thanks, Thierry.
Cheers
Marcel
> > > /*
> > > - * Copyright 2016 Toradex AG
> > > + * Copyright 2016-2019 Toradex AG
> > > *
> > > - * This file is dual-licensed: you can use it either under the
> > > terms
> > > - * of the GPL or the X11 license, at your option. Note that this
> > > dual
> > > - * licensing only applies to this file, and not this project as
> > > a
> > > - * whole.
> > > - *
> > > - * a) This file is free software; you can redistribute it
> > > and/or
> > > - * modify it under the terms of the GNU General Public
> > > License
> > > - * version 2 as published by the Free Software Foundation.
> > > - *
> > > - * This file is distributed in the hope that it will be
> > > useful
> > > - * but WITHOUT ANY WARRANTY; without even the implied
> > > warranty of
> > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
> > > the
> > > - * GNU General Public License for more details.
> > > - *
> > > - * Or, alternatively
> > > - *
> > > - * b) Permission is hereby granted, free of charge, to any
> > > person
> > > - * obtaining a copy of this software and associated
> > > documentation
> > > - * files (the "Software"), to deal in the Software without
> > > - * restriction, including without limitation the rights to
> > > use
> > > - * copy, modify, merge, publish, distribute, sublicense,
> > > and/or
> > > - * sell copies of the Software, and to permit persons to
> > > whom the
> > > - * Software is furnished to do so, subject to the following
> > > - * conditions:
> > > - *
> > > - * The above copyright notice and this permission notice
> > > shall be
> > > - * included in all copies or substantial portions of the
> > > Software.
> > > - *
> > > - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> > > - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> > > WARRANTIES
> > > - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > > - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
> > > COPYRIGHT
> > > - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > LIABILITY
> > > - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > ARISING
> > > - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
> > > USE OR
> > > - * OTHER DEALINGS IN THE SOFTWARE.
> > > */
> > >
> > > / {
> > > diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts
> > > b/arch/arm/boot/dts/tegra124-apalis-eval.dts
> > > index eaee10ef6512..e2388368d635 100644
> > > --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
> > > +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
> > > @@ -1,42 +1,6 @@
> > > +// SPDX-License-Identifier: (GPL-2.0 OR X11)
> >
Re: [PATCH] net: usb: asix: ax88772_bind return error when hw_reset fail
On Thu, 2019-01-24 at 13:48 +0800, Zhang Run wrote:
> The ax88772_bind() should return error code immediately when the PHY
> was not reset properly through ax88772a_hw_reset().
> Otherwise, The asix_get_phyid() will block when get the PHY
> Identifier from the PHYSID1 MII registers through asix_mdio_read()
> due to the PHY isn't ready. Furthermore, it will produce a lot of
> error message cause system crash.As follows:
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write
> reg index 0x: -71
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to send
> software reset: ffb9
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write
> reg index 0x: -71
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to enable
> software MII access
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to read
> reg index 0x: -71
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write
> reg index 0x: -71
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to enable
> software MII access
> asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to read
> reg index 0x: -71
> ...
>
> Signed-off-by: Zhang Run
> Reviewed-by: Yang Wei
Tested-by: Marcel Ziswiler
> ---
> drivers/net/usb/asix_devices.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/usb/asix_devices.c
> b/drivers/net/usb/asix_devices.c
> index b654f05..3d93993 100644
> --- a/drivers/net/usb/asix_devices.c
> +++ b/drivers/net/usb/asix_devices.c
> @@ -739,8 +739,13 @@ static int ax88772_bind(struct usbnet *dev,
> struct usb_interface *intf)
> asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode,
> 0);
> chipcode &= AX_CHIPCODE_MASK;
>
> - (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
> - ax88772a_hw_reset(dev, 0);
> + ret = (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev,
> 0) :
> + ax88772a_hw_reset(dev
> , 0);
> +
> + if (ret < 0) {
> + netdev_dbg(dev->net, "Failed to reset AX88772: %d\n",
> ret);
> + return ret;
> + }
>
> /* Read PHYID register *AFTER* the PHY was reset properly */
> phyid = asix_get_phyid(dev);
Re: [PATCH] net: fec: get regulator optional
On Mon, 2019-01-21 at 15:58 +0100, Stefan Agner wrote:
> According to the device tree binding the phy-supply property is
> optional. Use the regulator_get_optional API accordingly. The
> code already handles NULL just fine.
>
> This gets rid of the following warning:
> fec 2188000.ethernet: 2188000.ethernet supply phy not found, using
> dummy regulator
>
> Signed-off-by: Stefan Agner
Reviewed-by: Marcel Ziswiler
> ---
> drivers/net/ethernet/freescale/fec_main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/freescale/fec_main.c
> b/drivers/net/ethernet/freescale/fec_main.c
> index 6db69ba30dcd..c8315d880c8c 100644
> --- a/drivers/net/ethernet/freescale/fec_main.c
> +++ b/drivers/net/ethernet/freescale/fec_main.c
> @@ -3479,7 +3479,7 @@ fec_probe(struct platform_device *pdev)
> if (ret)
> goto failed_clk_ipg;
>
> - fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
> + fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy");
> if (!IS_ERR(fep->reg_phy)) {
> ret = regulator_enable(fep->reg_phy);
> if (ret) {
Re: [PATCH v5 8/8] ARM: dts: Add stmpe-adc DT node to Toradex T30 modules
On Fri, 2018-12-21 at 14:46 +0100, Philippe Schenker wrote:
> From: Philippe Schenker
>
> Add the stmpe-adc DT node as found on Toradex T30 modules
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v5: None
> Changes in v4:
> - New separate commit to hold T30 devicetree changes
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/tegra30-apalis.dtsi | 22 ++
> arch/arm/boot/dts/tegra30-colibri.dtsi | 22 ++
> 2 files changed, 28 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
> b/arch/arm/boot/dts/tegra30-apalis.dtsi
> index 7f112f192fe9..850b0d13549a 100644
> --- a/arch/arm/boot/dts/tegra30-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
> @@ -976,11 +976,18 @@
> id = <0>;
> blocks = <0x5>;
> irq-trigger = <0x1>;
> + /* 3.25 MHz ADC clock speed */
> + st,adc-freq = <1>;
> + /* 12-bit ADC */
> + st,mod-12b = <1>;
> + /* internal ADC reference */
> + st,ref-sel = <0>;
> + /* ADC converstion time: 80 clocks */
> + st,sample-time = <4>;
> + /* forbid to use ADC channels 3-0 (touch) */
>
> stmpe_touchscreen {
> compatible = "st,stmpe-ts";
> - /* 3.25 MHz ADC clock speed */
> - st,adc-freq = <1>;
> /* 8 sample average control */
> st,ave-ctrl = <3>;
> /* 7 length fractional part in z */
> @@ -990,17 +997,16 @@
>* current limit value
>*/
> st,i-drive = <1>;
> - /* 12-bit ADC */
> - st,mod-12b = <1>;
> - /* internal ADC reference */
> - st,ref-sel = <0>;
> - /* ADC converstion time: 80 clocks */
> - st,sample-time = <4>;
> /* 1 ms panel driver settling time */
> st,settling = <3>;
> /* 5 ms touch detect interrupt delay */
> st,touch-det-delay = <5>;
> };
> +
> + stmpe_adc {
> + compatible = "st,stmpe-adc";
> + st,norequest-mask = <0x0F>;
> + };
> };
>
> /*
> diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
> b/arch/arm/boot/dts/tegra30-colibri.dtsi
> index 35af03ca9e90..1f9198bb24ff 100644
> --- a/arch/arm/boot/dts/tegra30-colibri.dtsi
> +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
> @@ -845,11 +845,18 @@
> id = <0>;
> blocks = <0x5>;
> irq-trigger = <0x1>;
> + /* 3.25 MHz ADC clock speed */
> + st,adc-freq = <1>;
> + /* 12-bit ADC */
> + st,mod-12b = <1>;
> + /* internal ADC reference */
> + st,ref-sel = <0>;
> + /* ADC converstion time: 80 clocks */
> + st,sample-time = <4>;
> + /* forbid to use ADC channels 3-0 (touch) */
>
> stmpe_touchscreen {
> compatible = "st,stmpe-ts";
> - /* 3.25 MHz ADC clock speed */
> - st,adc-freq = <1>;
> /* 8 sample average control */
> st,ave-ctrl = <3>;
> /* 7 length fractional part in z */
> @@ -859,17 +866,16 @@
>* current limit value
>*/
> st,i-drive = <1>;
> - /* 12-bit ADC */
> - st,mod-12b = <1>;
> - /* internal ADC reference */
> - st,ref-sel = <0>;
> - /* ADC converstion time: 80 clocks */
> - st,sample-time = <4>;
> /* 1 ms panel driver settling time */
> st,settling = <3>;
> /* 5 ms touch detect interrupt delay */
> st,touch-det-delay = <5>;
> };
> +
> + stmpe_adc {
> + compatible = "st,stmpe-adc";
> + st,norequest-mask = <0x0F>;
> + };
> };
>
> /*
Re: [PATCH v5 7/8] ARM: dts: Add stmpe-adc DT node to Toradex iMX6 modules
On Fri, 2018-12-21 at 14:46 +0100, Philippe Schenker wrote:
> From: Philippe Schenker
>
> Add the stmpe-adc DT node as found on Toradex iMX6 modules
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v5: None
> Changes in v4:
> - Moved T30 devicetree settings to separate commit
>
> Changes in v3:
> - None
>
> Changes in v2:
> - Put common ADC settings in mfd
>
> arch/arm/boot/dts/imx6qdl-apalis.dtsi | 22 ++
> arch/arm/boot/dts/imx6qdl-colibri.dtsi | 23 +++
> 2 files changed, 29 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> index 3dc99dd8dde1..8db476d8978d 100644
> --- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> @@ -331,11 +331,18 @@
> id = <0>;
> blocks = <0x5>;
> irq-trigger = <0x1>;
> + /* 3.25 MHz ADC clock speed */
> + st,adc-freq = <1>;
> + /* 12-bit ADC */
> + st,mod-12b = <1>;
> + /* internal ADC reference */
> + st,ref-sel = <0>;
> + /* ADC converstion time: 80 clocks */
> + st,sample-time = <4>;
> + /* forbid to use ADC channels 3-0 (touch) */
>
> stmpe_touchscreen {
> compatible = "st,stmpe-ts";
> - /* 3.25 MHz ADC clock speed */
> - st,adc-freq = <1>;
> /* 8 sample average control */
> st,ave-ctrl = <3>;
> /* 7 length fractional part in z */
> @@ -345,17 +352,16 @@
>* current limit value
>*/
> st,i-drive = <1>;
> - /* 12-bit ADC */
> - st,mod-12b = <1>;
> - /* internal ADC reference */
> - st,ref-sel = <0>;
> - /* ADC converstion time: 80 clocks */
> - st,sample-time = <4>;
> /* 1 ms panel driver settling time */
> st,settling = <3>;
> /* 5 ms touch detect interrupt delay */
> st,touch-det-delay = <5>;
> };
> +
> + stmpe_adc {
> + compatible = "st,stmpe-adc";
> + st,norequest-mask = <0x0F>;
> + };
> };
> };
>
> diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> index 87e15e7cb32b..2e303d79c7f8 100644
> --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
> @@ -262,11 +262,18 @@
> id = <0>;
> blocks = <0x5>;
> irq-trigger = <0x1>;
> + /* 3.25 MHz ADC clock speed */
> + st,adc-freq = <1>;
> + /* 12-bit ADC */
> + st,mod-12b = <1>;
> + /* internal ADC reference */
> + st,ref-sel = <0>;
> + /* ADC converstion time: 80 clocks */
> + st,sample-time = <4>;
> + /* forbid to use ADC channels 3-0 (touch) */
>
> stmpe_touchscreen {
> compatible = "st,stmpe-ts";
> - /* 3.25 MHz ADC clock speed */
> - st,adc-freq = <1>;
> /* 8 sample average control */
> st,ave-ctrl = <3>;
> /* 7 length fractional part in z */
> @@ -276,17 +283,17 @@
>* current limit value
>*/
> st,i-drive = <1>;
> - /* 12-bit ADC */
> - st,mod-12b = <1>;
> - /* internal ADC reference */
> - st,ref-sel = <0>;
> - /* ADC converstion time: 80 clocks */
> - st,sample-time = <4>;
> /* 1 ms panel driver settling time */
> st,settling = <3>;
> /* 5 ms touch detect interrupt delay */
> st,touch-det-delay = <5>;
> };
> +
> + stmpe_adc {
> + compatible = "st,stmpe-adc";
> + /* 3.25 MHz ADC clock speed */
> + st,norequest-mask = <0x0F>;
> + };
> };
> };
Re: [REGRESSION] imx_v6_v7_defconfig: undefined reference to `__hyp_stub_vectors'
On Wed, 2018-12-19 at 12:20 -0200, Fabio Estevam wrote: > Hi Daniel, > > On Wed, Dec 19, 2018 at 11:32 AM Daniel Baluta < > daniel.bal...@gmail.com> wrote: > > On Wed, Dec 19, 2018 at 3:17 PM Daniel Baluta < > > daniel.bal...@nxp.com> wrote: > > > > > > On Wed, 2018-12-19 at 12:42 +, Marcel Ziswiler wrote: > > > > Hi there > > > > > > > > I noticed that at least today's and yesterdays -next won't > > > > build with > > > > the imx_v6_v7_defconfig giving the following error: > > > > > > > > LD arch/arm/boot/compressed/vmlinux > > > > arch/arm/boot/compressed/head.o: In function `restart': > > > > (.text+0xa8): undefined reference to `__hyp_stub_vectors' > > > > (.text+0xac): undefined reference to `__hyp_stub_vectors' > > > > > > > > Has anybody seen that as well and knows what is going on? > > > > > > Hmm, works for me. > > Yes, I haven't seen build failures reported by the autobuilders: > http://kisskb.ellerman.id.au/kisskb/target/7464/ Hm, strange. A clean re-build using ARM's latest gcc 8.2.1 now worked fine as well. Sorry, for the noise. > > On the other hand I'm getting this warning: > > > > arch/arm/boot/dts/vfxxx.dtsi:550.24-563.6: Warning > > (spi_bus_bridge): > > /soc/aips-bus@4008/spi@400ad000: incorrect #address-cells for > > SPI > > bus > > also defined at arch/arm/boot/dts/vf610-bk4.dts:107.8-119.3 > > arch/arm/boot/dts/vf610-bk4.dtb: Warning (spi_bus_reg): Failed > > prerequisite 'spi_bus_bridge' > > > > > > Maybe Rob can jump in? > > Yes, I have already reported this warning to Rob and Lukasz. > Hopefully > they could help fixing it.
[REGRESSION] imx_v6_v7_defconfig: undefined reference to `__hyp_stub_vectors'
Hi there I noticed that at least today's and yesterdays -next won't build with the imx_v6_v7_defconfig giving the following error: LD arch/arm/boot/compressed/vmlinux arch/arm/boot/compressed/head.o: In function `restart': (.text+0xa8): undefined reference to `__hyp_stub_vectors' (.text+0xac): undefined reference to `__hyp_stub_vectors' Has anybody seen that as well and knows what is going on? Thanks! Cheers Marcel
Re: [PATCH v1 2/3] clk: tegra: ignore unused vfir clock shared with uartb
On November 28, 2018 10:24:04 AM GMT+01:00, Thierry Reding wrote: >On Thu, Nov 01, 2018 at 10:41:52AM +0200, Peter De Schrijver wrote: >> On Thu, Nov 01, 2018 at 02:52:29AM +0100, Marcel Ziswiler wrote: >> > From: Marcel Ziswiler >> > >> > As UARTB and VFIR share their clock enable bit it is rather unwise >for >> > the kernel to turn off the VFIR one should that be unused (and >> > potentially vice versa but so far there anyway is no VFIR driver). >> > >> > Without this patch trying to use UARTB with the regular 8250 driver >> > will freeze as soon as ttyS1 is accessed after boot. Luckily, using >the >> > high-speed Tegra serial driver won't exhibit the issue as clocks >are >> > dynamically enabled/disabled on every access. >> > >> > This has been reproduced both on Apalis T30 as well as Apalis TK1 >but >> > may be an issue on all Tegra UARTB's which share the clock enable >with >> > VFIR. >> > >> >> Ah.. the correct fix for this is to initialize the enable_refcnt >based on the >> hw state. This is done in 9619dba8325fce098bbc9ee2911d1b0150fec0c9 >for >> periph gate clocks, but obviously also applies to normal periph >clocks. > >Hi Marcel, > >were you going to send a new version with the alternative fix as >suggested by Peter? Yes, sorry. Let me look at that now. >Thierry
Re: [PATCH 4.14 069/143] ARM: tegra: Fix ULPI regression on Tegra20
On Tue, 2018-11-06 at 01:31 -0500, Sasha Levin wrote:
> On Mon, Nov 05, 2018 at 02:05:49PM +0000, Marcel Ziswiler wrote:
> > On Fri, 2018-11-02 at 22:02 -0400, Sasha Levin wrote:
> > > On Fri, Nov 02, 2018 at 07:56:57PM +, Sudip Mukherjee wrote:
> > > > Hi Greg,
> > > >
> > > > On Fri, Nov 2, 2018 at 6:53 PM Greg Kroah-Hartman
> > > > wrote:
> > > > >
> > > > > 4.14-stable review patch. If anyone has any objections,
> > > > > please
> > > > > let me know.
> > > >
> > > > It seems this has already been reverted upstream:
> > > > 9bf4e370048d ("ARM: dts: tegra20: Revert "Fix ULPI regression
> > > > on
> > > > Tegra20"")
> > >
> > > The commit log of 9bf4e370048d suggests that this issue was fixed
> > > somewhere else which made 9bf4e370048d unnecessary. Can someone
> > > point
> > > to
> > > that fix?
> >
> > Yes, sorry. That got fixed properly by Dmitry in 5d797111afe1
> > ("clk:
> > tegra: Add quirk for getting CDEV1/2 clocks on Tegra20").
>
> Thank you. I've replaced it for 4.14, but for 4.9 it seems there are
> quite a few dependencies to pick 5d797111afe1 so I only removed
> 4c9a27a6c66d. If you have a backport for 4.9 I'll be happy to take
> it.
I believe the particular problem I was seeing did not exhibit itself
before much later than 4.9 or 4.14 and was caused by some re-work of
the clocking stuff which slightly changed order of things being
initialised.
> --
> Thanks,
> Sasha
Re: [PATCH 4.14 069/143] ARM: tegra: Fix ULPI regression on Tegra20
On Fri, 2018-11-02 at 22:02 -0400, Sasha Levin wrote:
> On Fri, Nov 02, 2018 at 07:56:57PM +, Sudip Mukherjee wrote:
> > Hi Greg,
> >
> > On Fri, Nov 2, 2018 at 6:53 PM Greg Kroah-Hartman
> > wrote:
> > >
> > > 4.14-stable review patch. If anyone has any objections, please
> > > let me know.
> >
> > It seems this has already been reverted upstream:
> > 9bf4e370048d ("ARM: dts: tegra20: Revert "Fix ULPI regression on
> > Tegra20"")
>
> The commit log of 9bf4e370048d suggests that this issue was fixed
> somewhere else which made 9bf4e370048d unnecessary. Can someone point
> to
> that fix?
Yes, sorry. That got fixed properly by Dmitry in 5d797111afe1 ("clk:
tegra: Add quirk for getting CDEV1/2 clocks on Tegra20").
> If not, I'll just revert this commit.
>
> --
> Thanks,
> Sasha
[PATCH v1 2/3] clk: tegra: ignore unused vfir clock shared with uartb
From: Marcel Ziswiler
As UARTB and VFIR share their clock enable bit it is rather unwise for
the kernel to turn off the VFIR one should that be unused (and
potentially vice versa but so far there anyway is no VFIR driver).
Without this patch trying to use UARTB with the regular 8250 driver
will freeze as soon as ttyS1 is accessed after boot. Luckily, using the
high-speed Tegra serial driver won't exhibit the issue as clocks are
dynamically enabled/disabled on every access.
This has been reproduced both on Apalis T30 as well as Apalis TK1 but
may be an issue on all Tegra UARTB's which share the clock enable with
VFIR.
Reported-by: Kory Swain
Signed-off-by: Marcel Ziswiler
---
drivers/clk/tegra/clk-tegra-periph.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra-periph.c
b/drivers/clk/tegra/clk-tegra-periph.c
index cc5275ec2c01..116c74340fb7 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -668,7 +668,7 @@ static struct tegra_periph_init_data periph_clks[] = {
MUX("hda", mux_pllp_pllc_clkm, CLK_SOURCE_HDA, 125,
TEGRA_PERIPH_ON_APB, tegra_clk_hda_8),
MUX("hda2codec_2x", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA2CODEC_2X,
111, TEGRA_PERIPH_ON_APB, tegra_clk_hda2codec_2x),
MUX8("hda2codec_2x", mux_pllp_pllc_plla_clkm, CLK_SOURCE_HDA2CODEC_2X,
111, TEGRA_PERIPH_ON_APB, tegra_clk_hda2codec_2x_8),
- MUX("vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7,
TEGRA_PERIPH_ON_APB, tegra_clk_vfir),
+ MUX_FLAGS("vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7,
TEGRA_PERIPH_ON_APB, tegra_clk_vfir, CLK_IGNORE_UNUSED),
MUX("sdmmc1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC1, 14,
TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc1),
MUX("sdmmc2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC2, 9,
TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc2),
MUX("sdmmc3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC3, 69,
TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc3),
--
2.14.5
[PATCH v1 3/3] serial: tegra: fix some spelling mistakes
From: Marcel Ziswiler Fix a few spelling mistakes I stumbled upon while debugging a customers UART issues. Signed-off-by: Marcel Ziswiler --- drivers/tty/serial/serial-tegra.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index af2a29cfbbe9..d5269aaaf9b2 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -746,7 +746,7 @@ static void tegra_uart_stop_rx(struct uart_port *u) if (!tup->rx_in_progress) return; - tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */ + tegra_uart_wait_sym_time(tup, 1); /* wait one character interval */ ier = tup->ier_shadow; ier &= ~(UART_IER_RDI | UART_IER_RLSI | UART_IER_RTOIE | @@ -887,7 +887,7 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) * * EORD is different interrupt than RX_TIMEOUT - RX_TIMEOUT occurs when * the DATA is sitting in the FIFO and couldn't be transferred to the -* DMA as the DMA size alignment(4 bytes) is not met. EORD will be +* DMA as the DMA size alignment (4 bytes) is not met. EORD will be * triggered when there is a pause of the incomming data stream for 4 * characters long. * @@ -1079,7 +1079,7 @@ static void tegra_uart_set_termios(struct uart_port *u, if (tup->rts_active) set_rts(tup, false); - /* Clear all interrupts as configuration is going to be change */ + /* Clear all interrupts as configuration is going to be changed */ tegra_uart_write(tup, tup->ier_shadow | UART_IER_RDI, UART_IER); tegra_uart_read(tup, UART_IER); tegra_uart_write(tup, 0, UART_IER); @@ -1165,10 +1165,10 @@ static void tegra_uart_set_termios(struct uart_port *u, /* update the port timeout based on new settings */ uart_update_timeout(u, termios->c_cflag, baud); - /* Make sure all write has completed */ + /* Make sure all writes have completed */ tegra_uart_read(tup, UART_IER); - /* Reenable interrupt */ + /* Re-enable interrupt */ tegra_uart_write(tup, tup->ier_shadow, UART_IER); tegra_uart_read(tup, UART_IER); -- 2.14.5
[PATCH v1 1/3] clk: tegra: get rid of duplicate defines
From: Marcel Ziswiler Get rid of 3 duplicate defines. Signed-off-by: Marcel Ziswiler --- drivers/clk/tegra/clk-tegra-periph.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c index 38c4eb28c8bf..cc5275ec2c01 100644 --- a/drivers/clk/tegra/clk-tegra-periph.c +++ b/drivers/clk/tegra/clk-tegra-periph.c @@ -79,7 +79,6 @@ #define CLK_SOURCE_3D 0x158 #define CLK_SOURCE_2D 0x15c #define CLK_SOURCE_MPE 0x170 -#define CLK_SOURCE_UARTE 0x1c4 #define CLK_SOURCE_VI_SENSOR 0x1a8 #define CLK_SOURCE_VI 0x148 #define CLK_SOURCE_EPP 0x16c @@ -117,8 +116,6 @@ #define CLK_SOURCE_ISP 0x144 #define CLK_SOURCE_SOR0 0x414 #define CLK_SOURCE_DPAUX 0x418 -#define CLK_SOURCE_SATA_OOB 0x420 -#define CLK_SOURCE_SATA 0x424 #define CLK_SOURCE_ENTROPY 0x628 #define CLK_SOURCE_VI_SENSOR2 0x658 #define CLK_SOURCE_HDMI_AUDIO 0x668 -- 2.14.5
[PATCH v1 0/3] clk/serial tegra: uart related fixes
This series features some UART related clock issue fix and clean-up. Marcel Ziswiler (3): clk: tegra: get rid of duplicate defines clk: tegra: ignore unused vfir clock shared with uartb serial: tegra: fix some spelling mistakes drivers/clk/tegra/clk-tegra-periph.c | 5 + drivers/tty/serial/serial-tegra.c| 10 +- 2 files changed, 6 insertions(+), 9 deletions(-) -- 2.14.5
[PATCH v1 2/3] ASoC: soc-core: fix trivial checkpatch issues
From: Marcel Ziswiler
Fix a few trivial aka cosmetic only checkpatch issues like long lines,
wrong indentations, spurious blanks and newlines, missing newlines,
multi-line comments etc.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
sound/soc/soc-core.c | 146 +++
1 file changed, 88 insertions(+), 58 deletions(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 62e8e36062df..6ddcf12bc030 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -66,8 +66,9 @@ static int pmdown_time = 5000;
module_param(pmdown_time, int, 0);
MODULE_PARM_DESC(pmdown_time, "DAPM stream powerdown time (msecs)");
-/* If a DMI filed contain strings in this blacklist (e.g.
- * "Type2 - Board Manufacturer" or "Type1 - TBD by OEM"), it will be taken
+/*
+ * If a DMI filed contain strings in this blacklist (e.g.
+ * "Type2 - Board Manufacturer" or "Type1 - TBD by OEM"), it will be taken
* as invalid and dropped when setting the card long name from DMI info.
*/
static const char * const dmi_blacklist[] = {
@@ -222,7 +223,7 @@ static void soc_init_card_debugfs(struct snd_soc_card *card)
&card->pop_time);
if (!card->debugfs_pop_time)
dev_warn(card->dev,
- "ASoC: Failed to create pop time debugfs file\n");
+"ASoC: Failed to create pop time debugfs file\n");
}
static void soc_cleanup_card_debugfs(struct snd_soc_card *card)
@@ -426,7 +427,8 @@ EXPORT_SYMBOL_GPL(snd_soc_get_pcm_runtime);
static void codec2codec_close_delayed_work(struct work_struct *work)
{
- /* Currently nothing to do for c2c links
+ /*
+* Currently nothing to do for c2c links
* Since c2c links are internal nodes in the DAPM graph and
* don't interface with the outside world or application layer
* we don't have to do any special handling on close.
@@ -446,8 +448,9 @@ int snd_soc_suspend(struct device *dev)
if (!card->instantiated)
return 0;
- /* Due to the resume being scheduled into a workqueue we could
- * suspend before that's finished - wait for it to complete.
+ /*
+* Due to the resume being scheduled into a workqueue we could
+* suspend before that's finished - wait for it to complete.
*/
snd_power_wait(card->snd_card, SNDRV_CTL_POWER_D0);
@@ -514,10 +517,13 @@ int snd_soc_suspend(struct device *dev)
/* suspend all COMPONENTs */
for_each_card_components(card, component) {
- struct snd_soc_dapm_context *dapm =
snd_soc_component_get_dapm(component);
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
- /* If there are paths active then the COMPONENT will be held
with
-* bias _ON and should not be suspended. */
+ /*
+* If there are paths active then the COMPONENT will be held
+* with bias _ON and should not be suspended.
+*/
if (!component->suspended) {
switch (snd_soc_dapm_get_bias_level(dapm)) {
case SND_SOC_BIAS_STANDBY:
@@ -571,18 +577,21 @@ int snd_soc_suspend(struct device *dev)
}
EXPORT_SYMBOL_GPL(snd_soc_suspend);
-/* deferred resume work, so resume can complete before we finished
+/*
+ * deferred resume work, so resume can complete before we finished
* setting our codec back up, which can be very slow on I2C
*/
static void soc_resume_deferred(struct work_struct *work)
{
struct snd_soc_card *card =
- container_of(work, struct snd_soc_card,
deferred_resume_work);
+ container_of(work, struct snd_soc_card,
+deferred_resume_work);
struct snd_soc_pcm_runtime *rtd;
struct snd_soc_component *component;
int i;
- /* our power state is still SNDRV_CTL_POWER_D3hot from suspend time,
+ /*
+* our power state is still SNDRV_CTL_POWER_D3hot from suspend time,
* so userspace apps are blocked from touching us
*/
@@ -699,6 +708,7 @@ int snd_soc_resume(struct device *dev)
*/
for_each_card_rtds(card, rtd) {
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
bus_control |= cpu_dai->driver->bus_control;
}
if (bus_control) {
@@ -777,7 +787,7 @@ struct snd_soc_dai *snd_soc_find_dai(
lockdep_assert_held(&client_mutex);
- /* Find CPU DAI from registered DAIs*/
+ /* Find CPU DAI from registered DAIs */
for_each_component(component) {
if (!snd_soc_is_matching_component(dlc, component))
[PATCH v1 1/3] ASoC: tegra_sgtl5000: fix device_node refcounting
From: Marcel Ziswiler
Similar to the following:
commit 4321723648b0 ("ASoC: tegra_alc5632: fix device_node refcounting")
commit 7c5dfd549617 ("ASoC: tegra: fix device_node refcounting")
Signed-off-by: Marcel Ziswiler
Acked-by: Jon Hunter
---
Changes in v1: None
sound/soc/tegra/tegra_sgtl5000.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/sound/soc/tegra/tegra_sgtl5000.c b/sound/soc/tegra/tegra_sgtl5000.c
index 45a4aa9d2a47..901457da25ec 100644
--- a/sound/soc/tegra/tegra_sgtl5000.c
+++ b/sound/soc/tegra/tegra_sgtl5000.c
@@ -149,14 +149,14 @@ static int tegra_sgtl5000_driver_probe(struct
platform_device *pdev)
dev_err(&pdev->dev,
"Property 'nvidia,i2s-controller' missing/invalid\n");
ret = -EINVAL;
- goto err;
+ goto err_put_codec_of_node;
}
tegra_sgtl5000_dai.platform_of_node = tegra_sgtl5000_dai.cpu_of_node;
ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev);
if (ret)
- goto err;
+ goto err_put_cpu_of_node;
ret = snd_soc_register_card(card);
if (ret) {
@@ -169,6 +169,13 @@ static int tegra_sgtl5000_driver_probe(struct
platform_device *pdev)
err_fini_utils:
tegra_asoc_utils_fini(&machine->util_data);
+err_put_cpu_of_node:
+ of_node_put(tegra_sgtl5000_dai.cpu_of_node);
+ tegra_sgtl5000_dai.cpu_of_node = NULL;
+ tegra_sgtl5000_dai.platform_of_node = NULL;
+err_put_codec_of_node:
+ of_node_put(tegra_sgtl5000_dai.codec_of_node);
+ tegra_sgtl5000_dai.codec_of_node = NULL;
err:
return ret;
}
@@ -183,6 +190,12 @@ static int tegra_sgtl5000_driver_remove(struct
platform_device *pdev)
tegra_asoc_utils_fini(&machine->util_data);
+ of_node_put(tegra_sgtl5000_dai.cpu_of_node);
+ tegra_sgtl5000_dai.cpu_of_node = NULL;
+ tegra_sgtl5000_dai.platform_of_node = NULL;
+ of_node_put(tegra_sgtl5000_dai.codec_of_node);
+ tegra_sgtl5000_dai.codec_of_node = NULL;
+
return ret;
}
--
2.14.4
[PATCH v1 0/3] ASoC: last minute fixes
This series comes with some last minutes fixes and clean-up. Changes in v1: - Split from the Tegra series as suggested by Mark. - Fix issue in soc-core rather than working around it in tegra_sgtl5000. Marcel Ziswiler (3): ASoC: tegra_sgtl5000: fix device_node refcounting ASoC: soc-core: fix trivial checkpatch issues ASoC: soc-core: fix platform name vs. of_node assignement sound/soc/soc-core.c | 162 --- sound/soc/tegra/tegra_sgtl5000.c | 17 +++- 2 files changed, 116 insertions(+), 63 deletions(-) -- 2.14.4
[PATCH v1 3/3] ASoC: soc-core: fix platform name vs. of_node assignement
From: Marcel Ziswiler
This fixes the following error as seen post commit daecf46ee0e5
("ASoC: soc-core: use snd_soc_dai_link_component for platform") on
Apalis TK1 after initial probe deferral:
tegra-snd-sgtl5000 sound: ASoC: Both platform name/of_node are set for
sgtl5000
tegra-snd-sgtl5000 sound: ASoC: failed to init link sgtl5000
tegra-snd-sgtl5000 sound: snd_soc_register_card failed (-22)
tegra-snd-sgtl5000: probe of sound failed with error -22
Signed-off-by: Marcel Ziswiler
---
Changes in v1:
- Split from the Tegra series as suggested by Mark.
- Fix issue in soc-core rather than working around it in tegra_sgtl5000.
sound/soc/soc-core.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 6ddcf12bc030..b97624005976 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -2733,7 +2733,7 @@ static int snd_soc_bind_card(struct snd_soc_card *card)
int snd_soc_register_card(struct snd_soc_card *card)
{
int i, ret;
- struct snd_soc_dai_link *link;
+ struct snd_soc_dai_link *link = NULL;
if (!card->name || !card->dev)
return -EINVAL;
@@ -2744,7 +2744,7 @@ int snd_soc_register_card(struct snd_soc_card *card)
if (ret) {
dev_err(card->dev, "ASoC: failed to init link %s\n",
link->name);
- return ret;
+ goto err;
}
}
@@ -2763,7 +2763,17 @@ int snd_soc_register_card(struct snd_soc_card *card)
mutex_init(&card->mutex);
mutex_init(&card->dapm_mutex);
- return snd_soc_bind_card(card);
+ ret = snd_soc_bind_card(card);
+ if (ret)
+ goto err;
+
+ return 0;
+
+err:
+ if (link && link->platform)
+ link->platform = NULL;
+
+ return ret;
}
EXPORT_SYMBOL_GPL(snd_soc_register_card);
--
2.14.4
[PATCH v3 3/7] ARM: tegra: colibri_t20: reorder pmic properties
From: Marcel Ziswiler
Reorder PMIC properties to be more in-line with any of our other device
trees.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d193e12c..d3aba6501510 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -475,11 +475,11 @@
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = ;
- ti,system-power-controller;
#gpio-cells = <2>;
gpio-controller;
+ interrupts = ;
sys-supply = <®_module_3v3>;
+ ti,system-power-controller;
vin-sm0-supply = <®_3v3_vsys>;
vin-sm1-supply = <®_3v3_vsys>;
vin-sm2-supply = <®_3v3_vsys>;
--
2.14.4
[PATCH v3 7/7] ARM: tegra: apalis_t30: further regulator clean-up
From: Marcel Ziswiler
Rename label vdd2_reg to reg_1v05.
Rename label ldo6_reg to reg_1v05_avdd_plle.
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Drop spurious newline in TPS62362 properties.
Rename vddio_sdmmc_1v8_reg to reg_1v8_vddio_sdmmc3.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Signed-off-by: Marcel Ziswiler
---
Changes in v3:
- Dropped ASoC patches in favour of sending them as a separate series.
Changes in v2:
- Dropped "[PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi
regulator" as suggested by Russell et. al.
- Added 2 new patches improving/fixing audio on Apalis TK1.
Changes in v1: None
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 70 +++---
arch/arm/boot/dts/tegra30-apalis.dtsi | 68 +++--
3 files changed, 58 insertions(+), 82 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index e29dca92ba0a..34c9fcd9198f 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -251,7 +251,7 @@
states = <180 0x0
330 0x1>;
startup-delay-us = <10>;
- vin-supply = <&vddio_sdmmc_1v8_reg>;
+ vin-supply = <®_1v8_vddio_sdmmc3>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index bc714032d771..fcfd3fddfda9 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -13,14 +13,14 @@
pcie@3000 {
status = "okay";
- avdd-pexa-supply = <&vdd2_reg>;
- avdd-pexb-supply = <&vdd2_reg>;
- avdd-pex-pll-supply = <&vdd2_reg>;
- avdd-plle-supply = <&ldo6_reg>;
+ avdd-pexa-supply = <®_1v05>;
+ avdd-pexb-supply = <®_1v05>;
+ avdd-pex-pll-supply = <®_1v05>;
+ avdd-plle-supply = <®_1v05>;
hvdd-pex-supply = <®_module_3v3>;
vddio-pex-ctl-supply = <®_module_3v3>;
- vdd-pexa-supply = <&vdd2_reg>;
- vdd-pexb-supply = <&vdd2_reg>;
+ vdd-pexa-supply = <®_1v05>;
+ vdd-pexb-supply = <®_1v05>;
/* Apalis type specific */
pci@1,0 {
@@ -864,16 +864,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -884,38 +881,38 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- vdd2_reg: vdd2 {
+ reg_1v05: vdd2 {
regulator-name = "+V1.05";
regulator-min-microvolt = <105>;
regulator-max-microvolt = <105>;
};
- vddctrl_reg: vddctrl {
+ vddctrl {
[PATCH v3 6/7] ARM: tegra: colibri_t30: further regulator clean-up
From: Marcel Ziswiler
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra30-colibri.dtsi | 45 --
1 file changed, 21 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 35af03ca9e90..f3c2dcd3879d 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -732,16 +732,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -752,29 +749,29 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- /* SW2: unused */
+ /* SW2 aka vdd2: unused */
- vddctrl_reg: vddctrl {
+ vddctrl {
regulator-name = "+V1.0_VDD_CPU";
regulator-min-microvolt = <115>;
regulator-max-microvolt = <115>;
regulator-always-on;
};
- reg_1v8_vio: vio {
- regulator-name = "+V1.8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- regulator-always-on;
- };
-
/* LDO1: unused */
/*
@@ -782,7 +779,7 @@
* +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
* see also +V3.3 fixed supply
*/
- ldo2_reg: ldo2 {
+ ldo2 {
regulator-name = "EN_+V3.3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
@@ -791,7 +788,7 @@
/* LDO3: unused */
- ldo4_reg: ldo4 {
+ ldo4 {
regulator-name = "+V1.2_VDD_RTC";
regulator-min-microvolt = <120>;
regulator-max-microvolt = <120>;
@@ -802,7 +799,7 @@
* +V2.8_AVDD_VDAC:
* only required for (unsupported) analog RGB
*/
- ldo5_reg: ldo5 {
+ ldo5 {
regulator-name = "+V2.8_AVDD_VDAC";
regulator-min-microvolt = <280>;
regulator-max-microvolt = <280>;
@@ -814,20 +811,20 @@
* but LDO6 can't set voltage in 50mV
[PATCH v3 4/7] ARM: tegra: apalis-tk1: further regulator clean-up
From: Marcel Ziswiler
Add reg_ prefix to vddio_sdmmc1 and vddio_sdmmc3.
Reorder PMIC properties.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 10 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 10 +-
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index eaee10ef6512..e553eff50499 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -171,7 +171,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -180,7 +180,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
index 7961eb4bd803..e2f94dc7ff91 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
@@ -137,7 +137,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -146,7 +146,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 73a8e117a9b9..e532b564e4c9 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1570,12 +1570,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
- gpio-controller;
- #gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
@@ -1679,7 +1679,7 @@
ams,ext-control = <1>;
};
- vddio_sdmmc1: ldo1 {
+ reg_vddio_sdmmc1: ldo1 {
regulator-name = "VDDIO_SDMMC1";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
@@ -1711,7 +1711,7 @@
/* LDO5 not used */
- vddio_sdmmc3: ldo6 {
+ reg_vddio_sdmmc3: ldo6 {
regulator-name = "VDDIO_SDMMC3";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3e3b347afe56..3cab9bda918f 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1600,12 +1600,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
[PATCH v3 0/7] ARM: dts: tegra: last minute fixes
This series comes with some last minutes fixes and further clean-up. Changes in v3: - Dropped ASoC patches in favour of sending them as a separate series. Changes in v2: - Dropped "[PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi regulator" as suggested by Russell et. al. - Added 2 new patches improving/fixing audio on Apalis TK1. Changes in v1: - Remove simple-panel compatible as suggested by Rob. Marcel Ziswiler (7): ARM: tegra: fix simple-panel compatibles ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable ARM: tegra: colibri_t20: reorder pmic properties ARM: tegra: apalis-tk1: further regulator clean-up ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module ARM: tegra: colibri_t30: further regulator clean-up ARM: tegra: apalis_t30: further regulator clean-up arch/arm/boot/dts/tegra114-dalmore.dts | 3 +- arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 17 +++--- arch/arm/boot/dts/tegra124-apalis.dtsi | 17 +++--- arch/arm/boot/dts/tegra124-venice2.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra20-colibri-iris.dts | 4 +- arch/arm/boot/dts/tegra20-colibri.dtsi | 4 +- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 4 +- arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 72 +++-- arch/arm/boot/dts/tegra30-apalis.dtsi | 70 ++-- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra30-colibri.dtsi | 45 21 files changed, 123 insertions(+), 145 deletions(-) -- 2.14.4
[PATCH v3 5/7] ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module
From: Marcel Ziswiler
The power I2C bus aka PWR_I2C which connects to the audio codec, PMIC,
temperature sensor and touch screen controller is really on-module only.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 5 -
arch/arm/boot/dts/tegra124-apalis.dtsi | 5 -
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index e532b564e4c9..0d095729b46b 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1552,7 +1552,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3cab9bda918f..13127415d86b 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1582,7 +1582,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 02f8126481a2..bc714032d771 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -845,7 +845,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 7f112f192fe9..4b6a8ecaac76 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -836,7 +836,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
--
2.14.4
[PATCH v3 1/7] ARM: tegra: fix simple-panel compatibles
From: Marcel Ziswiler
As there is no such thing as a generic simple-panel compatible remove
them.
Signed-off-by: Marcel Ziswiler
---
Changes in v3: None
Changes in v2: None
Changes in v1:
- Remove simple-panel compatible as suggested by Rob.
arch/arm/boot/dts/tegra114-dalmore.dts | 3 +--
arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts| 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
13 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index 1788556b4977..2ea7236d9da6 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -46,8 +46,7 @@
avdd-dsi-csi-supply = <&avdd_1v2_reg>;
panel@0 {
- compatible = "panasonic,vvx10f004b00",
-"simple-panel";
+ compatible = "panasonic,vvx10f004b00";
reg = <0>;
power-supply = <&avdd_lcd_reg>;
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
b/arch/arm/boot/dts/tegra124-venice2.dts
index 82d139648ef1..f54f77902774 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -1079,7 +1079,7 @@
};
panel: panel {
- compatible = "lg,lp129qe", "simple-panel";
+ compatible = "lg,lp129qe";
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
index 3c0f2681fcde..37ad508b61d9 100644
--- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
@@ -223,7 +223,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts
b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index d8004d68efa0..af4740847769 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -205,7 +205,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 1d96d92b72a7..02cd67ea2503 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -665,7 +665,7 @@
};
panel: panel {
- compatible = "auo,b101aw03", "simple-panel";
+ compatible = "auo,b101aw03";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts
b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index cda5448c2ace..c73510cd501c 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -57,7 +57,7 @@
};
panel: panel {
- compatible = "innolux,n156bge-l21", "simple-panel";
+ compatible = "innolux,n156bge-l21";
power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 8861e0976e37..e75f86901dfd 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -543,7 +543,7 @@
};
panel: panel {
-
[PATCH v3 2/7] ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable
From: Marcel Ziswiler Anything other than the default active-low would require the separate property enable-active-high to be set. This gets rid of the following warning during boot: regulator-usbh-vbus GPIO handle specifies active low - ignored resp.: regulator-1v05-avdd-hdmi-pll GPIO handle specifies active low - ignored Signed-off-by: Marcel Ziswiler --- Changes in v3: None Changes in v2: None Changes in v1: None arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi| 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-iris.dts| 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 367eb8c86098..73a8e117a9b9 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -1948,7 +1948,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 13c93cd507d8..3e3b347afe56 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -1978,7 +1978,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts index 37ad508b61d9..f1a85d930e61 100644 --- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts @@ -256,7 +256,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index af4740847769..e1e5ec5253fd 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -238,7 +238,7 @@ regulator-name = "VCC_USB1"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 8e106e784dce..7e6bf4cdf322 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -192,7 +192,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; -- 2.14.4
Re: [PATCH v2 9/9] ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement
On Wed, 2018-10-17 at 20:16 +0100, Mark Brown wrote: > On Wed, Oct 17, 2018 at 02:28:22PM +0000, Marcel Ziswiler wrote: > > > Some questions: > > - How exactly are devm allocations supposed to work concerning > > probe > > deferrals? > > Probe deferrals are just normal probe errors, any devm_ allocated > stuff > gets unwound. OK, that is where my understanding was weary. So you are saying anything should really get allocated again upon the second time. > > - Does or should the platform get cleared during a probe deferral > > cycle? > > - If so, why does that not work? > > Is something writing to static data when it should be writing to > dynamically allocated data? That's what this sounds like, we > shouldn't > be modifying any static data and any data dynamically allocated > during > probe ought to be being discarded. OK, I believe I start to see what you are saying. I guess the bug lays in soc-core then not properly discarding the platform and the second time around it is using a stale pointer to that which now of course points to whatever happens to be there! Let me try a few more things and I will cook up a proper patch to fix that... > > - Or is some special implicit probe deferral handling missing in > > soc- > > core? > > Like I say a probe deferral is just a normal error. Yeah, right. Thanks!
Re: [PATCH v2 9/9] ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement
On Wed, 2018-10-17 at 13:32 +0100, Jon Hunter wrote:
> On 16/10/2018 11:47, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler
> >
> > This fixes the following error as seen post commit daecf46ee0e5
> > ("ASoC: soc-core: use snd_soc_dai_link_component for platform"):
> >
> > tegra-snd-sgtl5000 sound: ASoC: Both platform name/of_node are set
> > for
> > sgtl5000
> > tegra-snd-sgtl5000 sound: ASoC: failed to init link sgtl5000
> > tegra-snd-sgtl5000 sound: snd_soc_register_card failed (-22)
> > tegra-snd-sgtl5000: probe of sound failed with error -22
> >
> > Signed-off-by: Marcel Ziswiler
> >
> > ---
> >
> > Changes in v2: New patch
> >
> > sound/soc/tegra/tegra_sgtl5000.c | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/sound/soc/tegra/tegra_sgtl5000.c
> > b/sound/soc/tegra/tegra_sgtl5000.c
> > index 901457da25ec..eb702925cac3 100644
> > --- a/sound/soc/tegra/tegra_sgtl5000.c
> > +++ b/sound/soc/tegra/tegra_sgtl5000.c
> > @@ -168,6 +168,11 @@ static int tegra_sgtl5000_driver_probe(struct
> > platform_device *pdev)
> > return 0;
> >
> > err_fini_utils:
> > + if (tegra_sgtl5000_dai.platform) {
> > + devm_kfree(&pdev->dev,
> > tegra_sgtl5000_dai.platform);
> > + tegra_sgtl5000_dai.platform = NULL;
> > + }
> > +
> > tegra_asoc_utils_fini(&machine->util_data);
> > err_put_cpu_of_node:
> > of_node_put(tegra_sgtl5000_dai.cpu_of_node);
> >
>
> Where is the above allocated?
snd_soc_init_platform() in sound/soc/soc-core.c
> I don't see it allocated in this driver
> AFAICT. If it is not then it does not seem right to free something
> that
> we have not allocated in this driver. I would have assumed it was
> allocated by snd_soc_init_platform() in which case it should not be
> necessary to free because that function uses devm_kzalloc().
That is kind of what I assumed as well.
> What am I missing here?
That is actually a very very good question. Unfortunately, since above
mentioned commit which is part of the bigger multi-platform (or
whatever one may call it) rework done by folks on CC things start
falling apart.
I should maybe rather have phrased this one as an RFC.
Some facts from my humble investigation so far:
- The issue does not exhibit itself on Apalis/Colibri T30 where
probably the order of things being initialised is slightly different.
- Bisecting points to the above mentioned commit being to blame.
However there is no way to just revert that commit as it is part of the
bigger multi-platform rework.
- Somehow it has to do with probe deferral. Basically, platform gets
allocated in snd_soc_init_platform() but due to GPIO/I2C whatever not
being ready the SGTL5000 codec aka dai_link can not yet be found and
therefore it probe defers as follows:
[2.166517] tegra30-i2s 70301200.i2s: DMA channels sourced from
device 7030.ahub
[2.176043] tegra-snd-sgtl5000 sound: ASoC: CODEC DAI sgtl5000 not
registered
[2.183241] tegra-snd-sgtl5000 sound: snd_soc_register_card failed
(-517)
- Somewhere thereafter platform seems to get stumped onto (e.g. its
name rather than being null now is bogus. Unfortunately, it is not just
the name as clearing just that did not really help (sgtl5000 codec gets
instantiated but trying to play audio always returned -EINVAL).
- The second time around snd_soc_init_platform() re-uses previously
allocated platform now corrupt triggering a check in soc-core
concerning platform name and of_node both being set (as noted in above
commit message).
Some questions:
- How exactly are devm allocations supposed to work concerning probe
deferrals?
- Does or should the platform get cleared during a probe deferral
cycle?
- If so, why does that not work?
- Or is some special implicit probe deferral handling missing in soc-
core?
I'm happy to try more things and/or provide more debugging output if
needed. Just let me know.
Thanks Jon!
> Cheers
> Jon
Cheers
Marcel
Re: [PATCH v2 2/2] clk: tegra20: Enable lock-status polling for PLLs
On Fri, 2018-08-31 at 12:29 +0300, Peter De Schrijver wrote:
> On Thu, Aug 30, 2018 at 09:42:10PM +0300, Dmitry Osipenko wrote:
> > Currently all PLL's on Tegra20 use a hardcoded delay despite of
> > having
> > a lock-status bit. The lock-status polling was disabled ~7 years
> > ago
> > because PLLE was failing to lock and was a suspicion that other
> > PLLs
> > might be faulty too. Other PLLs are okay, hence enable the lock-
> > status
> > polling for them. This reduces delay of any operation that require
> > PLL
> > to lock.
> >
> > Signed-off-by: Dmitry Osipenko
> > ---
> >
> > Changelog:
> >
> > v2: Don't enable polling for PLLE as it known to not being
> > able to lock.
> >
>
> This isn't correct. The lock bit of PLLE can declare lock too early,
> but the
> PLL itself does lock.
Is there an errata documenting this? As I could not really find any
mentioning of this anywhere at least up to the v11 from Dec 21, 2010 I
still have access to.
BTW: It looks like also PLLA may not always lock properly with those
changes. Is there anything known about that as well? Here is what I get
on various Colibri T20 modules (while random other ones seem to work
fine):
[0.232591] clk_pll_wait_for_lock: Timed out waiting for pll pll_a
lock
[0.232614] tegra_init_from_table: Failed to enable pll_a
[0.232627] [ cut here ]
[0.232655] WARNING: CPU: 0 PID: 1 at
/run/media/zim/Build/Sources/linux-
next.git/drivers/clk/tegra/clk.c:285
tegra_init_from_table+0x168/0x174
[0.232676] Modules linked in:
[0.232696] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc2-
next-20180903-00214-g5618a0514cf1-dirty #183
[0.232714] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[0.232753] [] (unwind_backtrace) from []
(show_stack+0x10/0x14)
[0.232783] [] (show_stack) from []
(dump_stack+0x8c/0xa0)
[0.232808] [] (dump_stack) from []
(__warn+0xe0/0xf8)
[0.232828] [] (__warn) from []
(warn_slowpath_null+0x40/0x48)
[0.232849] [] (warn_slowpath_null) from []
(tegra_init_from_table+0x168/0x174)
[0.232874] [] (tegra_init_from_table) from []
(tegra_clocks_apply_init_table+0x1c/0x2c)
[0.232901] [] (tegra_clocks_apply_init_table) from
[] (do_one_initcall+0x54/0x278)
[0.232926] [] (do_one_initcall) from []
(kernel_init_freeable+0x2c0/0x354)
[0.232949] [] (kernel_init_freeable) from []
(kernel_init+0x8/0x10c)
[0.232970] [] (kernel_init) from []
(ret_from_fork+0x14/0x2c)
[0.232987] Exception stack(0xc4c8ffb0 to 0xc4c8fff8)
[0.233001] ffa0:
[0.233021] ffc0:
[0.233040] ffe0: 0013
[0.233059] ---[ end trace 3f40fa49530610b9 ]---
> > drivers/clk/tegra/clk-tegra20.c | 20 +---
> > 1 file changed, 13 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/clk/tegra/clk-tegra20.c
> > b/drivers/clk/tegra/clk-tegra20.c
> > index cc857d4d4a86..cfde3745a0db 100644
> > --- a/drivers/clk/tegra/clk-tegra20.c
> > +++ b/drivers/clk/tegra/clk-tegra20.c
> > @@ -298,7 +298,8 @@ static struct tegra_clk_pll_params pll_c_params
> > = {
> > .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
> > .lock_delay = 300,
> > .freq_table = pll_c_freq_table,
> > - .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE,
> > + .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE |
> > +TEGRA_PLL_USE_LOCK,
> > };
> >
> > static struct tegra_clk_pll_params pll_m_params = {
> > @@ -314,7 +315,8 @@ static struct tegra_clk_pll_params pll_m_params
> > = {
> > .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
> > .lock_delay = 300,
> > .freq_table = pll_m_freq_table,
> > - .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE,
> > + .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE |
> > +TEGRA_PLL_USE_LOCK,
> > };
> >
> > static struct tegra_clk_pll_params pll_p_params = {
> > @@ -331,7 +333,7 @@ static struct tegra_clk_pll_params pll_p_params
> > = {
> > .lock_delay = 300,
> > .freq_table = pll_p_freq_table,
> > .flags = TEGRA_PLL_FIXED | TEGRA_PLL_HAS_CPCON |
> > -TEGRA_PLL_HAS_LOCK_ENABLE,
> > +TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_USE_LOCK,
> > .fixed_rate = 21600,
> > };
> >
> > @@ -348,7 +350,8 @@ static struct tegra_clk_pll_params pll_a_params
> > = {
> > .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
> > .lock_delay = 300,
> > .freq_table = pll_a_freq_table,
> > - .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE,
> > + .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_HAS_LOCK_ENABLE |
> > +TEGRA_PLL_USE_LOCK,
> > };
> >
> > static struct tegra_clk_pll_params pll_d_params = {
> > @@ -364,7 +367,8 @@ static struct tegra_clk_pll_params pll_d_params
> > = {
> > .lock_enable_bit_idx = PLLDU_MISC_LOCK_ENABLE,
Re: [PATCH v2 0/9] ARM: dts: tegra: last minute fixes
On Tue, 2018-10-16 at 12:58 +0100, Mark Brown wrote: > On Tue, Oct 16, 2018 at 12:47:21PM +0200, Marcel Ziswiler wrote: > > > Marcel Ziswiler (9): > > ARM: tegra: fix simple-panel compatibles > > ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator > > gpio > > enable > > ARM: tegra: colibri_t20: reorder pmic properties > > ARM: tegra: apalis-tk1: further regulator clean-up > > ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module > > ARM: tegra: colibri_t30: further regulator clean-up > > ARM: tegra: apalis_t30: further regulator clean-up > > ASoC: tegra_sgtl5000: fix device_node refcounting > > ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement > > These ASoC patches appear to have absolutely no relationship with the > rest of the series. Is that the case or is there some dependency I'm > missing? Not outside of all being Tegra specific stuff, no. If you prefer I may send them as a separate series.
Re: [PATCH v2 0/9] ARM: dts: tegra: last minute fixes
On Tue, 2018-10-16 at 12:58 +0100, Mark Brown wrote: > On Tue, Oct 16, 2018 at 12:47:21PM +0200, Marcel Ziswiler wrote: > > > Marcel Ziswiler (9): > > ARM: tegra: fix simple-panel compatibles > > ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator > > gpio > > enable > > ARM: tegra: colibri_t20: reorder pmic properties > > ARM: tegra: apalis-tk1: further regulator clean-up > > ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module > > ARM: tegra: colibri_t30: further regulator clean-up > > ARM: tegra: apalis_t30: further regulator clean-up > > ASoC: tegra_sgtl5000: fix device_node refcounting > > ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement > > These ASoC patches appear to have absolutely no relationship with the > rest of the series. Is that the case or is there some dependency I'm > missing? Not outside of all being Tegra specific stuff, no. If you prefer I may send them as a separate series.
[PATCH v2 8/9] ASoC: tegra_sgtl5000: fix device_node refcounting
From: Marcel Ziswiler
Similar to the following:
commit 4321723648b0 ("ASoC: tegra_alc5632: fix device_node refcounting")
commit 7c5dfd549617 ("ASoC: tegra: fix device_node refcounting")
Signed-off-by: Marcel Ziswiler
---
Changes in v2: New patch
sound/soc/tegra/tegra_sgtl5000.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/sound/soc/tegra/tegra_sgtl5000.c b/sound/soc/tegra/tegra_sgtl5000.c
index 45a4aa9d2a47..901457da25ec 100644
--- a/sound/soc/tegra/tegra_sgtl5000.c
+++ b/sound/soc/tegra/tegra_sgtl5000.c
@@ -149,14 +149,14 @@ static int tegra_sgtl5000_driver_probe(struct
platform_device *pdev)
dev_err(&pdev->dev,
"Property 'nvidia,i2s-controller' missing/invalid\n");
ret = -EINVAL;
- goto err;
+ goto err_put_codec_of_node;
}
tegra_sgtl5000_dai.platform_of_node = tegra_sgtl5000_dai.cpu_of_node;
ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev);
if (ret)
- goto err;
+ goto err_put_cpu_of_node;
ret = snd_soc_register_card(card);
if (ret) {
@@ -169,6 +169,13 @@ static int tegra_sgtl5000_driver_probe(struct
platform_device *pdev)
err_fini_utils:
tegra_asoc_utils_fini(&machine->util_data);
+err_put_cpu_of_node:
+ of_node_put(tegra_sgtl5000_dai.cpu_of_node);
+ tegra_sgtl5000_dai.cpu_of_node = NULL;
+ tegra_sgtl5000_dai.platform_of_node = NULL;
+err_put_codec_of_node:
+ of_node_put(tegra_sgtl5000_dai.codec_of_node);
+ tegra_sgtl5000_dai.codec_of_node = NULL;
err:
return ret;
}
@@ -183,6 +190,12 @@ static int tegra_sgtl5000_driver_remove(struct
platform_device *pdev)
tegra_asoc_utils_fini(&machine->util_data);
+ of_node_put(tegra_sgtl5000_dai.cpu_of_node);
+ tegra_sgtl5000_dai.cpu_of_node = NULL;
+ tegra_sgtl5000_dai.platform_of_node = NULL;
+ of_node_put(tegra_sgtl5000_dai.codec_of_node);
+ tegra_sgtl5000_dai.codec_of_node = NULL;
+
return ret;
}
--
2.14.4
[PATCH v2 3/9] ARM: tegra: colibri_t20: reorder pmic properties
From: Marcel Ziswiler
Reorder PMIC properties to be more in-line with any of our other device
trees.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d193e12c..d3aba6501510 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -475,11 +475,11 @@
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = ;
- ti,system-power-controller;
#gpio-cells = <2>;
gpio-controller;
+ interrupts = ;
sys-supply = <®_module_3v3>;
+ ti,system-power-controller;
vin-sm0-supply = <®_3v3_vsys>;
vin-sm1-supply = <®_3v3_vsys>;
vin-sm2-supply = <®_3v3_vsys>;
--
2.14.4
[PATCH v2 9/9] ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement
From: Marcel Ziswiler
This fixes the following error as seen post commit daecf46ee0e5
("ASoC: soc-core: use snd_soc_dai_link_component for platform"):
tegra-snd-sgtl5000 sound: ASoC: Both platform name/of_node are set for
sgtl5000
tegra-snd-sgtl5000 sound: ASoC: failed to init link sgtl5000
tegra-snd-sgtl5000 sound: snd_soc_register_card failed (-22)
tegra-snd-sgtl5000: probe of sound failed with error -22
Signed-off-by: Marcel Ziswiler
---
Changes in v2: New patch
sound/soc/tegra/tegra_sgtl5000.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/sound/soc/tegra/tegra_sgtl5000.c b/sound/soc/tegra/tegra_sgtl5000.c
index 901457da25ec..eb702925cac3 100644
--- a/sound/soc/tegra/tegra_sgtl5000.c
+++ b/sound/soc/tegra/tegra_sgtl5000.c
@@ -168,6 +168,11 @@ static int tegra_sgtl5000_driver_probe(struct
platform_device *pdev)
return 0;
err_fini_utils:
+ if (tegra_sgtl5000_dai.platform) {
+ devm_kfree(&pdev->dev, tegra_sgtl5000_dai.platform);
+ tegra_sgtl5000_dai.platform = NULL;
+ }
+
tegra_asoc_utils_fini(&machine->util_data);
err_put_cpu_of_node:
of_node_put(tegra_sgtl5000_dai.cpu_of_node);
--
2.14.4
[PATCH v2 0/9] ARM: dts: tegra: last minute fixes
This series comes with some last minutes fixes and further clean-up. Changes in v2: - Dropped "[PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi regulator" as suggested by Russell et. al. - Added 2 new patches improving/fixing audio on Apalis TK1. Changes in v1: - Remove simple-panel compatible as suggested by Rob. Marcel Ziswiler (9): ARM: tegra: fix simple-panel compatibles ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable ARM: tegra: colibri_t20: reorder pmic properties ARM: tegra: apalis-tk1: further regulator clean-up ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module ARM: tegra: colibri_t30: further regulator clean-up ARM: tegra: apalis_t30: further regulator clean-up ASoC: tegra_sgtl5000: fix device_node refcounting ASoC: tegra_sgtl5000: fix platform name vs. of_node assignement arch/arm/boot/dts/tegra114-dalmore.dts | 3 +- arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 17 +++--- arch/arm/boot/dts/tegra124-apalis.dtsi | 17 +++--- arch/arm/boot/dts/tegra124-venice2.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra20-colibri-iris.dts | 4 +- arch/arm/boot/dts/tegra20-colibri.dtsi | 4 +- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 4 +- arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 72 +++-- arch/arm/boot/dts/tegra30-apalis.dtsi | 70 ++-- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra30-colibri.dtsi | 45 sound/soc/tegra/tegra_sgtl5000.c| 22 +++- 22 files changed, 143 insertions(+), 147 deletions(-) -- 2.14.4
[PATCH v2 7/9] ARM: tegra: apalis_t30: further regulator clean-up
From: Marcel Ziswiler
Rename label vdd2_reg to reg_1v05.
Rename label ldo6_reg to reg_1v05_avdd_plle.
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Drop spurious newline in TPS62362 properties.
Rename vddio_sdmmc_1v8_reg to reg_1v8_vddio_sdmmc3.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Signed-off-by: Marcel Ziswiler
---
Changes in v2:
- Dropped "[PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi
regulator" as suggested by Russell et. al.
- Added 2 new patches improving/fixing audio on Apalis TK1.
Changes in v1: None
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 70 +++---
arch/arm/boot/dts/tegra30-apalis.dtsi | 68 +++--
3 files changed, 58 insertions(+), 82 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index e29dca92ba0a..34c9fcd9198f 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -251,7 +251,7 @@
states = <180 0x0
330 0x1>;
startup-delay-us = <10>;
- vin-supply = <&vddio_sdmmc_1v8_reg>;
+ vin-supply = <®_1v8_vddio_sdmmc3>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index bc714032d771..fcfd3fddfda9 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -13,14 +13,14 @@
pcie@3000 {
status = "okay";
- avdd-pexa-supply = <&vdd2_reg>;
- avdd-pexb-supply = <&vdd2_reg>;
- avdd-pex-pll-supply = <&vdd2_reg>;
- avdd-plle-supply = <&ldo6_reg>;
+ avdd-pexa-supply = <®_1v05>;
+ avdd-pexb-supply = <®_1v05>;
+ avdd-pex-pll-supply = <®_1v05>;
+ avdd-plle-supply = <®_1v05>;
hvdd-pex-supply = <®_module_3v3>;
vddio-pex-ctl-supply = <®_module_3v3>;
- vdd-pexa-supply = <&vdd2_reg>;
- vdd-pexb-supply = <&vdd2_reg>;
+ vdd-pexa-supply = <®_1v05>;
+ vdd-pexb-supply = <®_1v05>;
/* Apalis type specific */
pci@1,0 {
@@ -864,16 +864,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -884,38 +881,38 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- vdd2_reg: vdd2 {
+ reg_1v05: vdd2 {
regulator-name = "+V1.05";
regulator-min-microvolt = <105>;
regulator-max-microvolt = <105>;
};
- vddctrl_reg: vddctrl {
+ vddctrl {
regulator-name = "+V1.0_VDD_CPU";
regulator-min-microvol
[PATCH v2 4/9] ARM: tegra: apalis-tk1: further regulator clean-up
From: Marcel Ziswiler
Add reg_ prefix to vddio_sdmmc1 and vddio_sdmmc3.
Reorder PMIC properties.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 10 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 10 +-
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index eaee10ef6512..e553eff50499 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -171,7 +171,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -180,7 +180,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
index 7961eb4bd803..e2f94dc7ff91 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
@@ -137,7 +137,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -146,7 +146,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 73a8e117a9b9..e532b564e4c9 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1570,12 +1570,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
- gpio-controller;
- #gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
@@ -1679,7 +1679,7 @@
ams,ext-control = <1>;
};
- vddio_sdmmc1: ldo1 {
+ reg_vddio_sdmmc1: ldo1 {
regulator-name = "VDDIO_SDMMC1";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
@@ -1711,7 +1711,7 @@
/* LDO5 not used */
- vddio_sdmmc3: ldo6 {
+ reg_vddio_sdmmc3: ldo6 {
regulator-name = "VDDIO_SDMMC3";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3e3b347afe56..3cab9bda918f 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1600,12 +1600,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
[PATCH v2 2/9] ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable
From: Marcel Ziswiler Anything other than the default active-low would require the separate property enable-active-high to be set. This gets rid of the following warning during boot: regulator-usbh-vbus GPIO handle specifies active low - ignored resp.: regulator-1v05-avdd-hdmi-pll GPIO handle specifies active low - ignored Signed-off-by: Marcel Ziswiler --- Changes in v2: None Changes in v1: None arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi| 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-iris.dts| 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 367eb8c86098..73a8e117a9b9 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -1948,7 +1948,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 13c93cd507d8..3e3b347afe56 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -1978,7 +1978,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts index 37ad508b61d9..f1a85d930e61 100644 --- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts @@ -256,7 +256,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index af4740847769..e1e5ec5253fd 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -238,7 +238,7 @@ regulator-name = "VCC_USB1"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 8e106e784dce..7e6bf4cdf322 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -192,7 +192,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; -- 2.14.4
[PATCH v2 1/9] ARM: tegra: fix simple-panel compatibles
From: Marcel Ziswiler
As there is no such thing as a generic simple-panel compatible remove
them.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
Changes in v1:
- Remove simple-panel compatible as suggested by Rob.
arch/arm/boot/dts/tegra114-dalmore.dts | 3 +--
arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts| 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
13 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index 1788556b4977..2ea7236d9da6 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -46,8 +46,7 @@
avdd-dsi-csi-supply = <&avdd_1v2_reg>;
panel@0 {
- compatible = "panasonic,vvx10f004b00",
-"simple-panel";
+ compatible = "panasonic,vvx10f004b00";
reg = <0>;
power-supply = <&avdd_lcd_reg>;
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
b/arch/arm/boot/dts/tegra124-venice2.dts
index 82d139648ef1..f54f77902774 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -1079,7 +1079,7 @@
};
panel: panel {
- compatible = "lg,lp129qe", "simple-panel";
+ compatible = "lg,lp129qe";
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
index 3c0f2681fcde..37ad508b61d9 100644
--- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
@@ -223,7 +223,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts
b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index d8004d68efa0..af4740847769 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -205,7 +205,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 1d96d92b72a7..02cd67ea2503 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -665,7 +665,7 @@
};
panel: panel {
- compatible = "auo,b101aw03", "simple-panel";
+ compatible = "auo,b101aw03";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts
b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index cda5448c2ace..c73510cd501c 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -57,7 +57,7 @@
};
panel: panel {
- compatible = "innolux,n156bge-l21", "simple-panel";
+ compatible = "innolux,n156bge-l21";
power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 8861e0976e37..e75f86901dfd 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -543,7 +543,7 @@
};
panel: panel {
- compatible = &
[PATCH v2 6/9] ARM: tegra: colibri_t30: further regulator clean-up
From: Marcel Ziswiler
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra30-colibri.dtsi | 45 --
1 file changed, 21 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 35af03ca9e90..f3c2dcd3879d 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -732,16 +732,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -752,29 +749,29 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- /* SW2: unused */
+ /* SW2 aka vdd2: unused */
- vddctrl_reg: vddctrl {
+ vddctrl {
regulator-name = "+V1.0_VDD_CPU";
regulator-min-microvolt = <115>;
regulator-max-microvolt = <115>;
regulator-always-on;
};
- reg_1v8_vio: vio {
- regulator-name = "+V1.8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- regulator-always-on;
- };
-
/* LDO1: unused */
/*
@@ -782,7 +779,7 @@
* +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
* see also +V3.3 fixed supply
*/
- ldo2_reg: ldo2 {
+ ldo2 {
regulator-name = "EN_+V3.3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
@@ -791,7 +788,7 @@
/* LDO3: unused */
- ldo4_reg: ldo4 {
+ ldo4 {
regulator-name = "+V1.2_VDD_RTC";
regulator-min-microvolt = <120>;
regulator-max-microvolt = <120>;
@@ -802,7 +799,7 @@
* +V2.8_AVDD_VDAC:
* only required for (unsupported) analog RGB
*/
- ldo5_reg: ldo5 {
+ ldo5 {
regulator-name = "+V2.8_AVDD_VDAC";
regulator-min-microvolt = <280>;
regulator-max-microvolt = <280>;
@@ -814,20 +811,20 @@
* but LDO6 can't set voltage in 50mV
[PATCH v2 5/9] ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module
From: Marcel Ziswiler
The power I2C bus aka PWR_I2C which connects to the audio codec, PMIC,
temperature sensor and touch screen controller is really on-module only.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 5 -
arch/arm/boot/dts/tegra124-apalis.dtsi | 5 -
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index e532b564e4c9..0d095729b46b 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1552,7 +1552,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3cab9bda918f..13127415d86b 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1582,7 +1582,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 02f8126481a2..bc714032d771 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -845,7 +845,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 7f112f192fe9..4b6a8ecaac76 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -836,7 +836,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
--
2.14.4
Re: [PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi regulator
On Fri, 2018-10-12 at 11:44 +0100, Jon Hunter wrote: > On 09/10/18 16:25, Marcel Ziswiler wrote: > > From: Marcel Ziswiler > > ... > > > Given Linus W's fix for the gpiolib [0], I am not convinced that this > is > really better/needed. Looks like nobody else favours this (rather the opposite is the case it seems [1]) so I will drop it in a v2. Thanks! Any feedback about any of the other patches? > Cheers > Jon > > [0] https://lore.kernel.org/patchwork/patch/998354/ [1] https://lore.kernel.org/lkml/20181012125911.gt30...@n2100.armlinux.org. uk/
Re: [PATCH v7] regulator: fixed: Convert to use GPIO descriptor only
On Fri, 2018-10-12 at 13:59 +0100, Russell King - ARM Linux wrote: > On Fri, Oct 12, 2018 at 11:43:13AM +0000, Marcel Ziswiler wrote: > > I don't think it is that fictitious as it makes it crystal clear > > that > > there is something shared with all its pros and cons. E.g. what > > happens > > if one of them regulators wants to turn off while the other one > > still > > needs power? The regular regulator dependency tree would nicely > > make > > this all clear. > > If you're introducing a regulator that doesn't exist in reality > just to be able to share a GPIO line that is wired to several > real regulators, then it _is_ ficticious. You're not describing > the hardware, you're describing something else to work around the > shortcomings of the implementation that can't cope with how stuff > is wired up in the real world. You're making the DT description > fit the software implementation, rather than the software > implementation fit the real world hardware. > > Having a single GPIO that controls multiple separate regulators > which have entirely separate supplies of their own is very common > in electronics. Sure, fine. I will drop it. Thanks!
Re: [PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi regulator
On Fri, 2018-10-12 at 11:44 +0100, Jon Hunter wrote: > On 09/10/18 16:25, Marcel Ziswiler wrote: > > From: Marcel Ziswiler > > ... > > > Given Linus W's fix for the gpiolib [0], I am not convinced that this > is > really better/needed. Being pragmatic at the end of the day I'm just happy if it works and I may just drop this one then if nobody else sees any advantage. After all there are still enough really broken things like audio on Apalis TK1. Off to debug that one further... Argh, -EPROBE_DEFER! > Cheers > Jon > > [0] https://lore.kernel.org/patchwork/patch/998354/
Re: [PATCH v7] regulator: fixed: Convert to use GPIO descriptor only
On Fri, 2018-10-12 at 11:43 +0100, Russell King - ARM Linux wrote: > On Fri, Oct 12, 2018 at 11:39:15AM +0100, Jon Hunter wrote: > > We had the same situation for Tegra124 Jetson TK1 but I don't think > > that > > adding a pseudo intermediate regulator is cleaner. If the GPIO > > controls > > more than one regulator, I don't see why is it necessary to change > > the > > DT. There are several other people reporting the same problem with > > various different boards. So this does seem to be a common usage. > > Given that DT describes the hardware, not the software > implementation, > it must not change just because we move from GPIO numbers to GPIO > descriptors. Yes, that I do agree. However, like mentioned before on quick glance I really could not find any documentation about this "GPIO sharing" being allowed or not. > The existing DT description is reasonable, and introducing ficticious > regulators in DT to work around the implementation is not reasonable. I don't think it is that fictitious as it makes it crystal clear that there is something shared with all its pros and cons. E.g. what happens if one of them regulators wants to turn off while the other one still needs power? The regular regulator dependency tree would nicely make this all clear.
Re: [PATCH v7] regulator: fixed: Convert to use GPIO descriptor only
On Thu, 2018-10-11 at 19:47 +0200, Linus Walleij wrote: > On Thu, Oct 11, 2018 at 5:34 PM Marcel Ziswiler > wrote: > > > I guess that is also what broke HDMI on Apalis/Colibri T30 causing > > me > > to submit a fix [1]. I may also help testing. > > I see there are many ways to skin this cat. Yes, as a matter of fact I screened the kernel concerning this multi gpio stuff but could not quite find many examples and no mentioning anywhere whether or not this is actually allowed. So I kind of assumed that this may just not really be allowed and cooked up my patch which is anyway kind of a cleaner solution. I mean explicitly modelling the GPIO into some intermediate regulator supplying the others. > Does this patch fix things for you as well? > https://marc.info/?l=linux-kernel&m=153926854327176&w=2 Yes, da-da and HDMI works again. Thanks! I will still try to get my other patch in as like mentioned above I feel it is a cleaner solution to our regulator setup. BTW: Have you heard of lore as well? I believe it is the better mailing list archive as of today: https://lore.kernel.org/lkml/20181011143531.7195-1-linus.walleij@linaro .org/ > Yours, > Linus Walleij
Re: REGRESSION: [PATCH v5 3/3] gpiolib: Show correct direction from the beginning
On Fri, 2018-10-12 at 11:08 +0200, Linus Walleij wrote: > On Fri, Oct 12, 2018 at 11:00 AM Marcel Ziswiler > wrote: > > On Fri, 2018-10-05 at 08:53 +0200, Ricardo Ribalda Delgado wrote: > > > Current code assumes that the direction is input if > > > direction_input > > > function is set. > > > This might not be the case on GPIOs with programmable direction. > > > > Unfortunately, this breaks at least Apalis T30 and Apalis TK1. > > Enabling > > earlycon reveals the following: > > Does this (just applied) patch fix the issue? > https://marc.info/?l=linux-kernel&m=153932470412013&w=2 Yes, that cuts it. Thanks! > Yours, > Linus Walleij
REGRESSION: [PATCH v5 3/3] gpiolib: Show correct direction from the beginning
On Fri, 2018-10-05 at 08:53 +0200, Ricardo Ribalda Delgado wrote:
> Current code assumes that the direction is input if direction_input
> function is set.
> This might not be the case on GPIOs with programmable direction.
Unfortunately, this breaks at least Apalis T30 and Apalis TK1. Enabling
earlycon reveals the following:
[0.721165] Unable to handle kernel NULL pointer dereference at
virtual addre
ss 01f8
[0.729570] pgd = (ptrval)
[0.732417] [01f8] *pgd=
[0.736137] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[0.741643] Modules linked in:
[0.744819] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc7-
next-2018101
2 #6
[0.752579] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[0.759092] PC is at gpiod_hog+0x2c/0x150
[0.763255] LR is at of_gpiochip_add+0x34c/0x510
[0.768040] pc : []lr : []psr: 6013
[0.774534] sp : f68c9cd0 ip : fp : f68c9d18
[0.779946] r10: c0ccb3c8 r9 : r8 :
[0.785359] r7 : 0007 r6 : c20019c4 r5 : f6a7b970 r4 :
f6a78a24
[0.792121] r3 : r2 : r1 : c20019c4 r0 :
f6a7b970
[0.798884] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA
ARM Segment none
[0.806273] Control: 10c5387d Table: 8000404a DAC: 0051
[0.812227] Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
[0.818451] Stack: (0xf68c9cd0 to 0xf68ca000)
...
[1.043490] [] (gpiod_hog) from []
(of_gpiochip_add+0x34c/0x510)
[1.051531] [] (of_gpiochip_add) from []
(gpiochip_add_data_with_key+0x668/0x958)
[1.061091] [] (gpiochip_add_data_with_key) from
[] (devm_gpiochip_add_data+0x48/0x84)
[1.071109] [] (devm_gpiochip_add_data) from []
(tegra_gpio_probe+0x2d4/0x420)
[1.080413] [] (tegra_gpio_probe) from []
(platform_drv_probe+0x48/0x98)
[1.089171] [] (platform_drv_probe) from []
(really_probe+0x1e0/0x2cc)
[1.097746] [] (really_probe) from []
(driver_probe_device+0x60/0x16c)
[1.106317] [] (driver_probe_device) from []
(__driver_attach+0xdc/0xe0)
[1.115071] [] (__driver_attach) from []
(bus_for_each_dev+0x74/0xb4)
[1.123554] [] (bus_for_each_dev) from []
(bus_add_driver+0x1c0/0x204)
[1.132122] [] (bus_add_driver) from []
(driver_register+0x74/0x108)
[1.140521] [] (driver_register) from []
(do_one_initcall+0x54/0x284)
[1.149015] [] (do_one_initcall) from []
(kernel_init_freeable+0x2d0/0x364)
[1.158043] [] (kernel_init_freeable) from []
(kernel_init+0x8/0x110)
[1.166527] [] (kernel_init) from []
(ret_from_fork+0x14/0x2c)
[1.174375] Exception stack(0xf68c9fb0 to 0xf68c9ff8)
...
Just reverting this one patch made it boot again. I will investigate
further...
> Signed-off-by: Ricardo Ribalda Delgado
> ---
> drivers/gpio/gpiolib.c | 27 +--
> 1 file changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
> index 907019b67a58..e016b22658ff 100644
> --- a/drivers/gpio/gpiolib.c
> +++ b/drivers/gpio/gpiolib.c
> @@ -1349,20 +1349,6 @@ int gpiochip_add_data_with_key(struct
> gpio_chip *chip, void *data,
>
> spin_unlock_irqrestore(&gpio_lock, flags);
>
> - for (i = 0; i < chip->ngpio; i++) {
> - struct gpio_desc *desc = &gdev->descs[i];
> -
> - desc->gdev = gdev;
> -
> - /* REVISIT: most hardware initializes GPIOs as
> inputs (often
> - * with pullups enabled) so power usage is
> minimized. Linux
> - * code should set the gpio direction first thing;
> but until
> - * it does, and in case chip->get_direction is not
> set, we may
> - * expose the wrong direction in sysfs.
> - */
> - desc->flags = !chip->direction_input ? (1 <<
> FLAG_IS_OUT) : 0;
> - }
> -
> #ifdef CONFIG_PINCTRL
> INIT_LIST_HEAD(&gdev->pin_ranges);
> #endif
> @@ -1391,6 +1377,19 @@ int gpiochip_add_data_with_key(struct
> gpio_chip *chip, void *data,
> if (status)
> goto err_remove_chip;
>
> + for (i = 0; i < chip->ngpio; i++) {
> + struct gpio_desc *desc = &gdev->descs[i];
> +
> + desc->gdev = gdev;
> +
> + if (chip->get_direction &&
> gpiochip_line_is_valid(chip, i))
> + desc->flags = !chip->get_direction(chip, i)
> ?
> + (1 << FLAG_IS_OUT) : 0;
> + else
> + desc->flags = !chip->direction_input ?
> + (1 << FLAG_IS_OUT) : 0;
> + }
> +
> acpi_gpiochip_add(chip);
>
> machine_gpiochip_add(chip);
Re: [PATCH v7] regulator: fixed: Convert to use GPIO descriptor only
Hi Linus On Thu, 2018-10-11 at 16:00 +0100, Jon Hunter wrote: > Hi Linus, > > On 11/10/18 10:29, Linus Walleij wrote: > > On Thu, Oct 11, 2018 at 11:01 AM Marek Szyprowski > > wrote: > > > > > I've just noticed that this patch causes regression on Samsung > > > Exynos4412-based Trats2 board. Conversion to GPIO descriptor > > > breaks > > > operation when regulators used shared GPIO: sii9234 i2c driver > > > is not able to get vcc33mhl regulator (it uses shared GPIO enable > > > line with vsil12 regulator). > > > > So I guess this means that this physical GPIO line will enable the > > vcc33mhl and the vsil12 regulators at the same time? > > > > > This issue has been already pointed in case of commits: > > > 37fa23dbccbd97663acc085bd79246f427e603a1 > > > d1dae72fab2c377ff463742eefd8ac0f9e99b7b9 > > > ab4d11e2c2329cf7cb7be31ff22489aae4dee5dc > > > > A big sorry for my ignorance, I guess the information overload > > on the mailing list just makes me miss the important points. > > I'll try to be better, sadly I constantly fail to keep everything > > in mind and constantly break things like this. > > > > > Maybe it would be better to first solve the handling of shared > > > enable > > > GPIO in the descriptor-based interface before converting more > > > regulators > > > and stepping into this issue again? > > > > I am trying to solve it, but I just don't have systems to reproduce > > all > > kinds of things. It's a bit stressful since this is one of those > > runtime > > things that is hard to test when devising a patch for systems I > > don't > > have. > > This also appears to be causing a regression on the Tegra124 Jetson > TK1 > that also uses a shared GPIO for two regulators. The 2nd regulator > that > uses the GPIO now fails to probe [0] ... > > [0.680021] +5V_SATA: supplied by +5V_SYS > [0.683964] reg-fixed-voltage: probe of regulators:regulator@14 > failed with error -16 > > Not sure if you have one of these, but otherwise I can help test. I guess that is also what broke HDMI on Apalis/Colibri T30 causing me to submit a fix [1]. I may also help testing. BTW: Is it only me or is today's -next completely broken now? [0.691258] Unable to handle kernel NULL pointer dereference at virtual address 01f8 [0.699704] pgd = (ptrval) [0.702515] [01f8] *pgd= [0.706236] Internal error: Oops: 5 [#1] PREEMPT SMP ARM [0.711749] Modules linked in: [0.714930] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc7- next-20181011-dirty #3 [0.723245] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) [0.729765] PC is at gpiod_hog+0x2c/0x150 [0.733933] LR is at of_gpiochip_add+0x34c/0x510 This has been observed on Apalis TK1. > Cheers > Jon > > [0] https://storage.kernelci.org/next/master/next-20181011/arm/tegra_ > defconfig/lab-baylibre-seattle/boot-tegra124-jetson-tk1.html Cheers Marcel [1] https://lore.kernel.org/lkml/20181009152523.3771-4-mar...@ziswiler.com
[PATCH v1 2/8] ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable
From: Marcel Ziswiler Anything other than the default active-low would require the separate property enable-active-high to be set. This gets rid of the following warning during boot: regulator-usbh-vbus GPIO handle specifies active low - ignored resp.: regulator-1v05-avdd-hdmi-pll GPIO handle specifies active low - ignored Signed-off-by: Marcel Ziswiler --- Changes in v1: None arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi| 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-iris.dts| 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi index 367eb8c86098..73a8e117a9b9 100644 --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi @@ -1948,7 +1948,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 13c93cd507d8..3e3b347afe56 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -1978,7 +1978,7 @@ regulator-name = "+V1.05_AVDD_HDMI_PLL"; regulator-min-microvolt = <105>; regulator-max-microvolt = <105>; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vin-supply = <®_1v05_vdd>; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts index 37ad508b61d9..f1a85d930e61 100644 --- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts @@ -256,7 +256,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts index af4740847769..e1e5ec5253fd 100644 --- a/arch/arm/boot/dts/tegra20-colibri-iris.dts +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -238,7 +238,7 @@ regulator-name = "VCC_USB1"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 8e106e784dce..7e6bf4cdf322 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -192,7 +192,7 @@ regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <500>; regulator-max-microvolt = <500>; - gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; vin-supply = <®_5v0>; }; }; -- 2.14.4
[PATCH v1 6/8] ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module
From: Marcel Ziswiler
The power I2C bus aka PWR_I2C which connects to the audio codec, PMIC,
temperature sensor and touch screen controller is really on-module only.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 5 -
arch/arm/boot/dts/tegra124-apalis.dtsi | 5 -
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 2 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index e532b564e4c9..0d095729b46b 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1552,7 +1552,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3cab9bda918f..13127415d86b 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1582,7 +1582,10 @@
clock-frequency = <1>;
};
- /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
+ /*
+* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor
+* (On-module)
+*/
i2c@7000d000 {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 065a24ac1052..05e412a7ea17 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -845,7 +845,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 6727c5868425..0f0d0ae93075 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -836,7 +836,7 @@
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
-* touch screen controller
+* touch screen controller (On-module)
*/
i2c@7000d000 {
status = "okay";
--
2.14.4
[PATCH v1 7/8] ARM: tegra: colibri_t30: further regulator clean-up
From: Marcel Ziswiler
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra30-colibri.dtsi | 45 --
1 file changed, 21 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 963f26071415..d71038ea544f 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -732,16 +732,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -752,29 +749,29 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- /* SW2: unused */
+ /* SW2 aka vdd2: unused */
- vddctrl_reg: vddctrl {
+ vddctrl {
regulator-name = "+V1.0_VDD_CPU";
regulator-min-microvolt = <115>;
regulator-max-microvolt = <115>;
regulator-always-on;
};
- reg_1v8_vio: vio {
- regulator-name = "+V1.8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- regulator-always-on;
- };
-
/* LDO1: unused */
/*
@@ -782,7 +779,7 @@
* +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
* see also +V3.3 fixed supply
*/
- ldo2_reg: ldo2 {
+ ldo2 {
regulator-name = "EN_+V3.3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
@@ -791,7 +788,7 @@
/* LDO3: unused */
- ldo4_reg: ldo4 {
+ ldo4 {
regulator-name = "+V1.2_VDD_RTC";
regulator-min-microvolt = <120>;
regulator-max-microvolt = <120>;
@@ -802,7 +799,7 @@
* +V2.8_AVDD_VDAC:
* only required for (unsupported) analog RGB
*/
- ldo5_reg: ldo5 {
+ ldo5 {
regulator-name = "+V2.8_AVDD_VDAC";
regulator-min-microvolt = <280>;
regulator-max-microvolt = <280>;
@@ -814,20 +811,20 @@
* but LDO6 can't set voltage in 50mV
[PATCH v1 8/8] ARM: tegra: apalis_t30: further regulator clean-up
From: Marcel Ziswiler
Rename label vdd2_reg to reg_1v05.
Rename label ldo6_reg to reg_1v05_avdd_plle.
Drop unused labels.
Rename regulator tps62362-vout to +V1.2_VDD_CORE.
Reorder TPS65911 properties.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Add ti,en-ck32k-xtal.
Specify TPS62362 vin-supply.
Drop spurious newline in TPS62362 properties.
Rename vddio_sdmmc_1v8_reg to reg_1v8_vddio_sdmmc3.
Rename +V1.05 to +V1.05_AVDD_PLLE.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 70 +++---
arch/arm/boot/dts/tegra30-apalis.dtsi | 68 +++--
3 files changed, 58 insertions(+), 82 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
index e29dca92ba0a..34c9fcd9198f 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
@@ -251,7 +251,7 @@
states = <180 0x0
330 0x1>;
startup-delay-us = <10>;
- vin-supply = <&vddio_sdmmc_1v8_reg>;
+ vin-supply = <®_1v8_vddio_sdmmc3>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 05e412a7ea17..600680b5ae6c 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -13,14 +13,14 @@
pcie@3000 {
status = "okay";
- avdd-pexa-supply = <&vdd2_reg>;
- avdd-pexb-supply = <&vdd2_reg>;
- avdd-pex-pll-supply = <&vdd2_reg>;
- avdd-plle-supply = <&ldo6_reg>;
+ avdd-pexa-supply = <®_1v05>;
+ avdd-pexb-supply = <®_1v05>;
+ avdd-pex-pll-supply = <®_1v05>;
+ avdd-plle-supply = <®_1v05>;
hvdd-pex-supply = <®_module_3v3>;
vddio-pex-ctl-supply = <®_module_3v3>;
- vdd-pexa-supply = <&vdd2_reg>;
- vdd-pexb-supply = <&vdd2_reg>;
+ vdd-pexa-supply = <®_1v05>;
+ vdd-pexb-supply = <®_1v05>;
/* Apalis type specific */
pci@1,0 {
@@ -864,16 +864,13 @@
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
-
+ #gpio-cells = <2>;
+ gpio-controller;
interrupts = ;
#interrupt-cells = <2>;
interrupt-controller;
-
+ ti,en-ck32k-xtal;
ti,system-power-controller;
-
- #gpio-cells = <2>;
- gpio-controller;
-
vcc1-supply = <®_module_3v3>;
vcc2-supply = <®_module_3v3>;
vcc3-supply = <®_1v8_vio>;
@@ -884,38 +881,38 @@
vccio-supply = <®_module_3v3>;
regulators {
- vdd1_reg: vdd1 {
+ reg_1v8_vio: vio {
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+
+ vdd1 {
regulator-name = "+V1.35_VDDIO_DDR";
regulator-min-microvolt = <135>;
regulator-max-microvolt = <135>;
regulator-always-on;
};
- vdd2_reg: vdd2 {
+ reg_1v05: vdd2 {
regulator-name = "+V1.05";
regulator-min-microvolt = <105>;
regulator-max-microvolt = <105>;
};
- vddctrl_reg: vddctrl {
+ vddctrl {
regulator-name = "+V1.0_VDD_CPU";
regulator-min-microvolt = <115>;
regulator-max-microvolt = <115>;
regulator-always-on;
[PATCH v1 3/8] ARM: tegra: apalis/colibri_t30: fix hdmi regulator
From: Marcel Ziswiler
Fix HDMI requiring two regulators being enabled by a single GPIO. Model
this using an intermediate reg_en_vdd_hdmi regulator being the
vin-supply of them other two. This fixes the display subsystem and gets
rid of the following error during boot:
reg-fixed-voltage: probe of regulator-3v3-avdd-hdmi failed with error -16
tegra-hdmi 5428.hdmi: failed to get VDD regulator
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 16
arch/arm/boot/dts/tegra30-apalis.dtsi | 16
arch/arm/boot/dts/tegra30-colibri.dtsi | 16
3 files changed, 36 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
index 02f8126481a2..065a24ac1052 100644
--- a/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi
@@ -1133,8 +1133,7 @@
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
enable-active-high;
- gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <®_1v8_vio>;
+ vin-supply = <®_en_vdd_hdmi>;
};
reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
@@ -1143,8 +1142,7 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
enable-active-high;
- gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <®_module_3v3>;
+ vin-supply = <®_en_vdd_hdmi>;
};
reg_5v0_charge_pump: regulator-5v0-charge-pump {
@@ -1171,6 +1169,16 @@
regulator-always-on;
};
+ reg_en_vdd_hdmi: regulator-en-vdd-hdmi {
+ compatible = "regulator-fixed";
+ regulator-name = "EN_VDD_HDMI";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <®_module_3v3>;
+ };
+
sound {
compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
"nvidia,tegra-audio-sgtl5000";
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 7f112f192fe9..6727c5868425 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1115,8 +1115,7 @@
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
enable-active-high;
- gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <®_1v8_vio>;
+ vin-supply = <®_en_vdd_hdmi>;
};
reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
@@ -1125,8 +1124,7 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
enable-active-high;
- gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <®_module_3v3>;
+ vin-supply = <®_en_vdd_hdmi>;
};
reg_5v0_charge_pump: regulator-5v0-charge-pump {
@@ -1153,6 +1151,16 @@
regulator-always-on;
};
+ reg_en_vdd_hdmi: regulator-en-vdd-hdmi {
+ compatible = "regulator-fixed";
+ regulator-name = "EN_VDD_HDMI";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ enable-active-high;
+ gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <®_module_3v3>;
+ };
+
sound {
compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
"nvidia,tegra-audio-sgtl5000";
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 35af03ca9e90..963f26071415 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -965,8 +965,7 @@
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
enable-active-high;
- gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <®_1v8_vio>;
+ vin-supply = <®_en_vdd_hdmi>;
};
reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
@@ -975,8 +974,7 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
enable-active-high;
-
[PATCH v1 4/8] ARM: tegra: colibri_t20: reorder pmic properties
From: Marcel Ziswiler
Reorder PMIC properties to be more in-line with any of our other device
trees.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 6162d193e12c..d3aba6501510 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -475,11 +475,11 @@
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = ;
- ti,system-power-controller;
#gpio-cells = <2>;
gpio-controller;
+ interrupts = ;
sys-supply = <®_module_3v3>;
+ ti,system-power-controller;
vin-sm0-supply = <®_3v3_vsys>;
vin-sm1-supply = <®_3v3_vsys>;
vin-sm2-supply = <®_3v3_vsys>;
--
2.14.4
[PATCH v1 5/8] ARM: tegra: apalis-tk1: further regulator clean-up
From: Marcel Ziswiler
Add reg_ prefix to vddio_sdmmc1 and vddio_sdmmc3.
Reorder PMIC properties.
Signed-off-by: Marcel Ziswiler
---
Changes in v1: None
arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 ++--
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 10 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 10 +-
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index eaee10ef6512..e553eff50499 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -171,7 +171,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -180,7 +180,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
index 7961eb4bd803..e2f94dc7ff91 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
@@ -137,7 +137,7 @@
bus-width = <4>;
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc1>;
+ vqmmc-supply = <®_vddio_sdmmc1>;
};
/* Apalis SD1 */
@@ -146,7 +146,7 @@
bus-width = <4>;
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vddio_sdmmc3>;
+ vqmmc-supply = <®_vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index 73a8e117a9b9..e532b564e4c9 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -1570,12 +1570,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
- gpio-controller;
- #gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
@@ -1679,7 +1679,7 @@
ams,ext-control = <1>;
};
- vddio_sdmmc1: ldo1 {
+ reg_vddio_sdmmc1: ldo1 {
regulator-name = "VDDIO_SDMMC1";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
@@ -1711,7 +1711,7 @@
/* LDO5 not used */
- vddio_sdmmc3: ldo6 {
+ reg_vddio_sdmmc3: ldo6 {
regulator-name = "VDDIO_SDMMC3";
regulator-min-microvolt = <180>;
regulator-max-microvolt = <330>;
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3e3b347afe56..3cab9bda918f 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1600,12 +1600,12 @@
pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interr
[PATCH v1 1/8] ARM: tegra: fix simple-panel compatibles
From: Marcel Ziswiler
As there is no such thing as a generic simple-panel compatible remove
them.
Signed-off-by: Marcel Ziswiler
---
Changes in v1:
- Remove simple-panel compatible as suggested by Rob.
arch/arm/boot/dts/tegra114-dalmore.dts | 3 +--
arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts| 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
13 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
b/arch/arm/boot/dts/tegra114-dalmore.dts
index 1788556b4977..2ea7236d9da6 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -46,8 +46,7 @@
avdd-dsi-csi-supply = <&avdd_1v2_reg>;
panel@0 {
- compatible = "panasonic,vvx10f004b00",
-"simple-panel";
+ compatible = "panasonic,vvx10f004b00";
reg = <0>;
power-supply = <&avdd_lcd_reg>;
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
b/arch/arm/boot/dts/tegra124-venice2.dts
index 82d139648ef1..f54f77902774 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -1079,7 +1079,7 @@
};
panel: panel {
- compatible = "lg,lp129qe", "simple-panel";
+ compatible = "lg,lp129qe";
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
index 3c0f2681fcde..37ad508b61d9 100644
--- a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
@@ -223,7 +223,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts
b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index d8004d68efa0..af4740847769 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -205,7 +205,7 @@
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
- compatible = "edt,et057090dhu", "simple-panel";
+ compatible = "edt,et057090dhu";
backlight = <&backlight>;
power-supply = <®_3v3>;
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
b/arch/arm/boot/dts/tegra20-harmony.dts
index 1d96d92b72a7..02cd67ea2503 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -665,7 +665,7 @@
};
panel: panel {
- compatible = "auo,b101aw03", "simple-panel";
+ compatible = "auo,b101aw03";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts
b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index cda5448c2ace..c73510cd501c 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -57,7 +57,7 @@
};
panel: panel {
- compatible = "innolux,n156bge-l21", "simple-panel";
+ compatible = "innolux,n156bge-l21";
power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 8861e0976e37..e75f86901dfd 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -543,7 +543,7 @@
};
panel: panel {
- compatible = "samsung,ltn1
[PATCH v1 0/8] ARM: dts: tegra: last minute fixes
This series comes with some last minutes fixes and further clean-up. Marcel Ziswiler (8): ARM: tegra: fix simple-panel compatibles ARM: tegra: apalis-tk1/colibri_t20/t30: eval/iris: fix regulator gpio enable ARM: tegra: apalis/colibri_t30: fix hdmi regulator ARM: tegra: colibri_t20: reorder pmic properties ARM: tegra: apalis-tk1: further regulator clean-up ARM: tegra: apalis_t30/tk1: annotate power I2C being on-module ARM: tegra: colibri_t30: further regulator clean-up ARM: tegra: apalis_t30: further regulator clean-up arch/arm/boot/dts/tegra114-dalmore.dts | 3 +- arch/arm/boot/dts/tegra124-apalis-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 4 +- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 17 +++-- arch/arm/boot/dts/tegra124-apalis.dtsi | 17 +++-- arch/arm/boot/dts/tegra124-venice2.dts | 2 +- arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra20-colibri-iris.dts | 4 +- arch/arm/boot/dts/tegra20-colibri.dtsi | 4 +- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts | 4 +- arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 88 - arch/arm/boot/dts/tegra30-apalis.dtsi | 86 arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 +- arch/arm/boot/dts/tegra30-colibri.dtsi | 61 + 21 files changed, 159 insertions(+), 157 deletions(-) -- 2.14.4
Re: [PATCH v2 00/37] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support
Hi Thierry On September 26, 2018 4:56:46 PM GMT+02:00, Thierry Reding wrote: >On Sun, Sep 02, 2018 at 12:08:29PM +0200, Marcel Ziswiler wrote: >> This series is a major overhaul and adds support for the Colibri >> Evaluation Board device tree. >> >> Changes in v2: >> - Fix commit message which was mixed up between "[PATCH 03/31] ARM: >> tegra: colibri_t20: iris: annotate i2c busses" and "[PATCH 04/31] >ARM: >> tegra: colibri_t20: iris: add missing aliases". >> - Also replace underscores in node names with dashes. >> - Also reflect this change in the Iris device tree. >> - Also reflect this change in the device tree bindings documentation. >> - New patch as suggested by Rob. >> - New patch. >> - Get rid of fake clocks simple bus as suggested by Rob. >> - Updated evaluation board device tree with all applicable previous >> fixes. >> - Also reflect this addition in the device tree bindings >documentation. >> >> Marcel Ziswiler (37): >> ARM: tegra: colibri_t20: move aliases from module to carrier board >> ARM: tegra: colibri_t20: iris: integrate i2c real time clock >support >> ARM: tegra: colibri_t20: iris: add missing aliases >> ARM: tegra: colibri_t20: iris: annotate i2c busses >> ARM: tegra: colibri_t20: add local-mac-address property >> ARM: tegra: colibri_t20: reorder host1x/hdmi properties >> ARM: tegra: colibri_t20: iris: use no-1-8-v >> ARM: tegra: colibri_t20: regulator clean-up >> ARM: tegra: colibri_t20: add missing regulators >> ARM: tegra: colibri_t20: annotate usb ehci instances >> ARM: tegra: colibri_t20: remove phy-reset-gpio from controller node >> ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-up >> ARM: tegra: colibri_t20: update sound nvidia,model >> ARM: tegra: colibri_t20: pinmux clean-up >> ARM: tegra: colibri_t20: add missing pinmux >> ARM: tegra: colibri_t20: iris: display controller rgb panel support >> ARM: tegra: colibri_t20: iris: annotate uarts >> ARM: tegra: colibri_t20: iris: add uart-c >> ARM: tegra: colibri_t20: use high speed uart driver >> ARM: tegra: colibri_t20: iris: add gpio wakeup key >> ARM: tegra: colibri_t20: iris: add dr_mode property >> ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor >> ARM: tegra: colibri_t20: add i2c-thermtrip >> ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip >> ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers >> ARM: tegra: colibri_t20: annotate/move sd card detect >> ARM: tegra: colibri_t20: add compatibility comment >> ARM: tegra: colibri_t20: simplify model and compatible properties >> ARM: tegra: colibri_t20: iris: simplify model and compatible >> properties >> ARM: tegra: colibri_t20: iris: add colibri ssp support >> ARM: tegra: colibri_t20: drop module level model and compatible >> ARM: tegra: colibri_t20: rename i2c_ddc to hdmi_ddc >> ARM: tegra: colibri_t20: iris: drop unused i2c_ddc label >> ARM: tegra: colibri_t20: rename tps6586x@34 and drop unused pmic >label >> ARM: tegra: colibri_t20: get rid of fake clocks simple bus >> ARM: tegra: colibri_t20: rename ac97 label to tegra_ac97 >> ARM: tegra: colibri_t20: add eval board device tree >> >> Documentation/devicetree/bindings/arm/tegra.txt | 5 +- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 262 ++ >> arch/arm/boot/dts/tegra20-colibri-iris.dts | 200 ++-- >> arch/arm/boot/dts/tegra20-colibri.dtsi | 655 > >> 5 files changed, 866 insertions(+), 257 deletions(-) >> create mode 100644 arch/arm/boot/dts/tegra20-colibri-eval-v3.dts > >Applied, thanks. All of these series together have got to be some kind >of a record. Thank you very much! Yeah, sorry about that. With the downstream L4T R16.5 based stuff with its 3.1.10 kernel definitely becoming obsolete, more and more of our customers switch to using mainline based stuff. After all we are still selling hundred thousands of those modules every year and hope to continue to do so many more years. BTW: Rob's latest feedback will make it into another few patches I guess. Keep tuned... >Thierry Cheers Marcel
