On 4/12/24 20:37, Tanmay Shah wrote:
Add properties as per new bindings in zynqmp remoteproc node
to represent TCM address and size.
This patch also adds alternative remoteproc node to represent
remoteproc cluster in split mode. By default lockstep mode is
enabled and users should disable it
5_0_BTCM>;
memory-region = <&rproc_0_fw_image>;
};
- r5f-1 {
+ r5f@1 {
compatible = "xlnx,zynqmp-r5f";
- power-domains = <&zynqmp_firmware PD_RPU_1>;
+ reg = <0x1 0x0 0x0 0x1>, <0x1 0x2 0x0 0x1>;
+ reg-names = "atcm", "btcm";
+ power-domains = <&zynqmp_firmware PD_RPU_1>,
+ <&zynqmp_firmware PD_R5_1_ATCM>,
+ <&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>;
};
};
Acked-by: Michal Simek
Thanks,
Michal
uot;;
- power-domains = <&zynqmp_firmware PD_RPU_1>;
+ reg = <0x1 0x0 0x0 0x1>, <0x1 0x2 0x0 0x1>;
+ reg-names = "atcm", "btcm";
+ power-domains = <&zynqmp_firmware PD_RPU_1>,
+ <&zynqmp_firmware PD_R5_1_ATCM>,
+ <&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>;
};
};
Acked-by: Michal Simek
Let me know if you want me to take this via my tree.
Thanks,
Michal
AZE || ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST
> select IRQ_DOMAIN
> + help
> + Support for the Xilinx Interrupt Controller IP core.
> + This is used as a primary controller with MicroBlaze and can also
> + be used as a secondary chained controller on othe
On 4/19/21 1:48 PM, Jan Kiszka wrote:
> On 19.04.21 12:52, Michal Simek wrote:
>> Hi Jan,
>>
>> On 4/18/21 2:12 PM, Jan Kiszka wrote:
>>> On 01.04.21 16:52, Jan Kiszka wrote:
>>>> On 01.04.21 13:42, Michal Simek wrote:
>>>>> Hi Jan,
&g
Hi Marc and Robert, +Anirudha
On 4/16/21 8:14 PM, Robert Hancock wrote:
> On Fri, 2021-04-16 at 18:53 +0100, Marc Zyngier wrote:
>> On Fri, 16 Apr 2021 17:05:49 +0100,
>> Robert Hancock wrote:
>>> On Fri, 2021-04-16 at 14:41 +0100, Marc Zyngier wrote:
On Fri, 16 Apr 2021 00:32:50 +0100,
Hi Jan,
On 4/18/21 2:12 PM, Jan Kiszka wrote:
> On 01.04.21 16:52, Jan Kiszka wrote:
>> On 01.04.21 13:42, Michal Simek wrote:
>>> Hi Jan,
>>>
>>> On 3/27/21 8:55 PM, Jan Kiszka wrote:
>>>> On 07.11.19 10:44, Rajan Vaja wrote:
>>>>>
Hi Guenter,
On 4/11/21 4:02 PM, Guenter Roeck wrote:
> Michal,
>
> On 4/7/21 11:08 PM, Michal Simek wrote:
> ...
>> It looks like that you directly created the patch. Isn't it better to
>> send it yourself? Or do you want Manish to create it based on gui
GPIO device.
> + * xgpio_probe - Probe method for the GPIO device.
> * @pdev: pointer to the platform device
> *
> * Return:
>
Reviewed-by: Michal Simek
Thanks,
Michal
On 4/8/21 1:23 PM, Pu Lehui wrote:
> pm_runtime_get_sync() will increment pm usage counter even it failed.
> Forgetting to putting operation will result in reference leak here.
> Fix it by replacing it with pm_runtime_resume_and_get() to keep usage
> counter balanced.
>
> Signed-off-by: Pu Lehu
++
On 4/8/21 11:25 AM, Dinghao Liu wrote:
> When platform_get_irq() fails, a pairing PM usage counter
> increment is needed to keep the counter balanced. It's the
> same for the following error paths.
>
> Signed-off-by: Dinghao Liu
> ---
> drivers/spi/spi-zynqmp-gqspi.c | 1 +
> 1 file changed,
Hi Guenter,
On 4/7/21 11:48 PM, Guenter Roeck wrote:
> On Wed, Mar 17, 2021 at 12:22:29PM +0530, Manish Narani wrote:
>> Add a new driver for supporting Xilinx platforms. This driver is used
>> for some sequence of operations required for Xilinx USB controllers.
>> This driver is also used to choo
Hi Jens,
On 3/5/21 10:10 AM, Piyush Mehta wrote:
> Updated code with already prepared dev_err_probe(). It reduces code size
> and simplifies EPROBE_DEFER handling.
>
> Also, unify message format for similar error cases.
>
> Signed-off-by: Piyush Mehta
> Acked-by: Micha
>> b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
>> new file mode 100644
>> index 000..9868ca1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
>> @@ -0,0 +1,222 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
On 3/29/21 3:45 AM, Huang Guobin wrote:
> From: Guobin Huang
>
> There is a error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Reported-by: Hulk Robot
> Signed-off-by: Guobin Huang
> ---
> drivers/net/ethernet/xilinx/xil
PTR_ERR(phy);
> + ret = PTR_ERR(phy);
> + goto err_clk_put;
> }
>
> gtr_phy->phy = phy;
> @@ -962,9 +999,16 @@ static int xpsgtr_probe(struct platform_device *pdev)
> provider = devm_of_phy_provider_register(&pdev->dev, xpsgtr_xlate);
> if (IS_ERR(provider)) {
> dev_err(&pdev->dev, "registering provider failed\n");
> - return PTR_ERR(provider);
> + ret = PTR_ERR(provider);
> + goto err_clk_put;
> }
> return 0;
> +
> +err_clk_put:
> + for (i = 0; i < ARRAY_SIZE(gtr_dev->clk); i++)
> + clk_disable_unprepare(gtr_dev->clk[i]);
> +
> + return ret;
> }
>
> static const struct of_device_id xpsgtr_of_match[] = {
>
Acked-by: Michal Simek
Thanks,
Michal
On 3/24/21 10:13 AM, Greg Kroah-Hartman wrote:
> On Wed, Mar 24, 2021 at 10:02:53AM +0100, Michal Simek wrote:
>>
>>
>> On 3/24/21 9:49 AM, Greg Kroah-Hartman wrote:
>>> On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
>>>> On 3/23/21 2:42
On 3/24/21 9:49 AM, Greg Kroah-Hartman wrote:
> On Wed, Mar 24, 2021 at 09:29:12AM +0100, Michal Simek wrote:
>> On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
>>> On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
>>>> Adding pinctrl dri
On 3/23/21 2:42 PM, Greg Kroah-Hartman wrote:
> On Wed, Mar 17, 2021 at 01:55:16PM +0530, Sai Krishna Potthuri wrote:
>> Adding pinctrl driver for Xilinx ZynqMP platform.
>> This driver queries pin information from firmware and registers
>> pin control accordingly.
>>
>> Signed-off-by: Sai Krishna
On 3/23/21 3:19 PM, Manish Narani wrote:
> The current driver is not handling the clock enable/disable operations
> properly. The clocks need to be handled correctly by enabling or
> disabling at appropriate places. This patch adds code to handle the
> same.
>
> Signed-off-by: Manish Narani
>
On 3/23/21 5:28 PM, Jens Axboe wrote:
> On 3/23/21 10:25 AM, Michal Simek wrote:
>>
>>
>> On 3/23/21 5:23 PM, Jens Axboe wrote:
>>> On 3/22/21 6:04 PM, Davidlohr Bueso wrote:
>>>> Hi,
>>>>
>>>> On Mon, 09 Nov 2020, Michal Simek w
On 3/23/21 5:23 PM, Jens Axboe wrote:
> On 3/22/21 6:04 PM, Davidlohr Bueso wrote:
>> Hi,
>>
>> On Mon, 09 Nov 2020, Michal Simek wrote:
>>
>>> Sysace IP is no longer used on Xilinx PowerPC 405/440 and Microblaze
>>> systems. The driver is not reg
On 3/22/21 1:23 PM, Lorenzo Pieralisi wrote:
> On Thu, Feb 25, 2021 at 03:10:13PM +, Marc Zyngier wrote:
>> In anticipation of the removal of the msi_controller structure, convert
>> the ancient xilinx host controller driver to MSI domains.
>>
>> We end-up with the usual two domain structure
Hi,
On 3/22/21 1:21 PM, Lorenzo Pieralisi wrote:
> On Thu, Feb 25, 2021 at 03:10:13PM +, Marc Zyngier wrote:
>> In anticipation of the removal of the msi_controller structure, convert
>> the ancient xilinx host controller driver to MSI domains.
>>
>> We end-up with the usual two domain structu
he happy */
> -page:/* Create room on stack and save registers for storign values */
> +page:/* Create room on stack and save registers for storing values */
> addik r1, r1, -40
> swi r5, r1, 0
> swi r6, r1, 4
> --
> 2.26.2
>
sing ret value from first loop in second.
Addresses-Coverity: ("Uninitialized variables")
Signed-off-by: Michal Simek
CC: Colin Ian King
CC: Dan Carpenter
---
drivers/pinctrl/core.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
On 3/11/21 12:24 PM, Colin Ian King wrote:
> On 11/03/2021 11:16, Michal Simek wrote:
>>
>>
>> On 3/11/21 11:57 AM, Colin Ian King wrote:
>>> Hi,
>>>
>>> Static analysis on linux-next with Coverity has found a potential issue
>>
On 3/11/21 11:57 AM, Colin Ian King wrote:
> Hi,
>
> Static analysis on linux-next with Coverity has found a potential issue
> in drivers/pinctrl/core.c with the following commit:
>
> commit 0952b7ec1614abf232e921aac0cc2bca8e60e162
> Author: Michal Simek
> Date:
s.x); }
This is wrong because as you use err is used here.
Thanks,
Michal
> COPY(r0);
> COPY(r1);
> @@ -75,7 +73,7 @@ static int restore_sigcontext(struct pt_regs *regs,
>
> *rval_p = regs->r3;
>
> - return err;
> + return 0;
> }
>
.
The patch is enforcing the order that pin is requested all the time first
followed by pin configuration. This change will ensure that firmware gets
requests in the right order.
Signed-off-by: Michal Simek
---
drivers/pinctrl/core.c | 23 ++-
1 file changed, 22 insertions
On 3/8/21 12:54 PM, quanyang.w...@windriver.com wrote:
> From: Quanyang Wang
>
> The function of_i2c_get_board_info will call of_modalias_node to check
> if a device_node contains "compatible" string. But for the device si5328
> at zcu102/zcu106 boards, there is no proper DT bindings for them.
Hi,
On 3/8/21 9:35 AM, Laurent Pinchart wrote:
> Hi Quanyang,
>
> Thank you for the patch.
>
> On Mon, Mar 08, 2021 at 03:08:43PM +0800, quanyang.w...@windriver.com wrote:
>> From: Quanyang Wang
>>
>> The function of_i2c_get_board_info will call of_modalias_node to check
>> if a device_node con
d of looping for each bit
> in xgpio_set_multiple() function, now we can check each channel at
> a time and save cycles.
>
> Cc: Bartosz Golaszewski
> Cc: Michal Simek
> Signed-off-by: Syed Nayyar Waris
> Acked-by: William Breathitt Gray
> --
v found in graph\n");
> + ret = -ENOENT;
> goto done;
> }
>
>
Reviewed-by: Michal Simek
Thanks,
Michal
t;failed to get reset\n");
> }
I got it twice not sure why.
nit: Sorry I didn't spot it in the first internal review.
But you can also remove that {} around.
With that fixed please add my
Acked-by: Michal Simek
Thanks,
Michal
c_data versal_reset_data = {
> -.reset_id = 0,
> -.num_resets = VERSAL_NR_RESETS,
> + .reset_id = 0,
> + .num_resets = VERSAL_NR_RESETS,
> };
>
> static const struct reset_control_ops zynqmp_reset_ops = {
>
Reviewed-by: Michal Simek
Thanks,
Michal
t the controller reset */
> + reset_control_deassert(cevapriv->rst);
> +
> + for (i = 0; i < hpriv->nports; i++) {
> + rc = phy_power_on(hpriv->phys[i]);
> + if (rc) {
> + phy_exit(hpriv->phys[i]);
> + return rc;
> + }
> + }
> + }
>
> if (of_property_read_bool(np, "ceva,broken-gen2"))
> cevapriv->flags = CEVA_FLAG_BROKEN_GEN2;
>
Acked-by: Michal Simek
Jens: Can you please take a look at this patch if you see any other issue?
Thanks,
Michal
alvador
>
> Thanks!
>
> Whoever feels like picking this up (@Andrew?) can you add
>
> "We need __meminit because __init_memblock defaults to that without
> CONFIG_ARCH_KEEP_MEMBLOCK" and __init_memblock is not used outside
> memblock code.
>
Applied with thi
- t_nr="$2"
> - t_entry="$3"
> -
> - while [ $t_nxt -lt $t_nr ]; do
> - printf "__SYSCALL(%s, sys_ni_syscall, )\n" "${t_nxt}"
> - t_nxt=$((t_nxt+1))
> - done
> - printf "__SYSCALL(%s, %s, )\n" "
On 3/1/21 3:13 PM, Linus Walleij wrote:
> On Mon, Mar 1, 2021 at 10:31 AM Michal Simek wrote:
>> On 3/1/21 10:19 AM, Linus Walleij wrote:
>
>> Does this mean that you prefer to fix how dt overlay applying instead of
>> fixing code to apply mux configs first before c
Hi Linus,
On 3/1/21 10:19 AM, Linus Walleij wrote:
> On Tue, Feb 16, 2021 at 4:35 PM Michal Simek wrote:
>
>> I have a question about expectations when pinctrl setting is applied. In
>> DTS all nodes are described in the order available in DT.
>>
>>
Hi Noburiho,
On 2/28/21 1:17 AM, Nobuhiro Iwamatsu wrote:
> Hi,
>
> 2021年2月12日(金) 21:10 Sai Krishna Potthuri
> :
>>
>> Adding pinctrl support to query platform specific information (pins)
>> from firmware.
>>
>> Signed-off-by: Sai Krishna Potthuri
>
Hi Rob,
On 2/11/21 3:42 PM, Rob Herring wrote:
> On Thu, Feb 11, 2021 at 3:35 AM Michal Simek wrote:
>>
>> Hi Rob,
>>
>> On 2/10/21 11:22 PM, Rob Herring wrote:
>>> On Tue, Feb 09, 2021 at 11:48:09AM +0100, Michal Simek wrote:
>>>> From: Piyu
Hi Matthias,
On 2/10/21 6:10 PM, Matthias Kaehlcke wrote:
> This series adds the onboard_usb_hub_driver, the corresponding
> device tree bindings and creation of onboard_usb_hub platform in
> the xhci-plat driver during probe().
>
> The main issue the driver addresses is that a USB hub needs to b
oblaze: Fix built-in DTB alignment to be 8-byte aligned
arch/microblaze/Kconfig | 1 -
arch/microblaze/kernel/module.c | 26 --
arch/microblaze/kernel/vmlinux.lds.S | 2 +-
3 files changed, 1 insertion(+), 28 deletions(-)
--
Michal Simek, Ing. (M.Eng), O
Hi,
I have a question about expectations when pinctrl setting is applied. In
DTS all nodes are described in the order available in DT.
uart-default {
mux {
...
};
conf {
...
};
};
I don't know if this standard description or not. I
On 2/15/21 4:58 PM, Nobuhiro Iwamatsu wrote:
> zynqmp_pm_get_eemi_ops() was removed in commit 4db8180ffe7c: "Firmware:
> xilinx:
> Remove eemi ops for fpga related APIs", but not in
> IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE).
> Any driver who want to communicate with PMC using EEMI APIs use the fu
; Fixes: 79edff12060f ("scripts/dtc: Update to upstream version
> v1.6.0-51-g183df9e9c2b9")
> Reported-by: Guenter Roeck
> Tested-by: Guenter Roeck
> Cc: Michal Simek
> Signed-off-by: Rob Herring
> ---
> As the commit is in my tree, I'll take this via the DT tre
Hi,
On 2/12/21 11:50 PM, Guenter Roeck wrote:
> On Fri, Feb 12, 2021 at 04:34:04PM -0600, Rob Herring wrote:
>> On Fri, Feb 12, 2021 at 3:01 PM Rob Herring wrote:
>>>
>>> On Fri, Feb 12, 2021 at 9:17 AM Guenter Roeck wrote:
On Fri, Feb 12, 2021 at 08:16:04AM -0600, Rob Herring wrote:
>
/*
> * Xilinx Zynq MPSoC Firmware layer
> *
> - * Copyright (C) 2014-2020 Xilinx, Inc.
> + * Copyright (C) 2014-2021 Xilinx, Inc.
> *
> * Michal Simek
> * Davorin Mista
> @@ -1280,12 +1280,13 @@ static int zynqmp_firmware_probe(struct
> platform_device *pdev)
&
On 2/12/21 12:23 AM, Nobuhiro Iwamatsu wrote:
> zynqmp_pm_get_eemi_ops() was removed in commit 4db8180ffe7c: "Firmware:
> xilinx:
> Remove eemi ops for fpga related APIs", but not in
> IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE).
> Any driver who want to communicate with PMC using EEMI APIs use the f
old_value, value);
> -#endif
> break;
>
> case R_MICROBLAZE_64_PCREL:
> -#if __GNUC__ < 4
> - old_value = (location[0] & 0x) << 16 |
> - (location[1] & 0xFFFF);
> -
On 2/11/21 1:39 PM, Mark Brown wrote:
> On Thu, Feb 11, 2021 at 10:37:30AM +0100, Michal Simek wrote:
>> st 10. 2. 2021 v 11:10 odesílatel Michal Simek
>> napsal:
>
>>> +description:
>>> + The Xilinx Zynq QSPI controller is used to access multi-bi
On 2/11/21 12:27 PM, Arnd Bergmann wrote:
> On Mon, Feb 1, 2021 at 3:28 PM Michal Simek wrote:
>>
>> Update years in header to be up2date.
>>
>> Signed-off-by: Michal Simek
>
> I saw this in your pull request, and I did not think this was how
> copyri
po 1. 2. 2021 v 15:28 odesílatel Michal Simek napsal:
>
> Update years in header to be up2date.
>
> Signed-off-by: Michal Simek
> ---
>
> arch/arm/boot/dts/zynq-7000.dtsi | 2 +-
> arch/arm/boot/dts/zynq-cc108.dts | 2 +-
> arch/arm/boot/dts/zynq-zc702.d
Hi Rob,
On 2/10/21 11:22 PM, Rob Herring wrote:
> On Tue, Feb 09, 2021 at 11:48:09AM +0100, Michal Simek wrote:
>> From: Piyush Mehta
>>
>> Added dt binding for usb5744 driver.
>>
>> Signed-off-by: Piyush Mehta
>> Signed-off-by: Michal Simek
>> ---
st 10. 2. 2021 v 11:10 odesílatel Michal Simek napsal:
>
> Convert spi-zynq-qspi.txt to yaml.
>
> Signed-off-by: Michal Simek
> ---
>
> Changes in v2:
> - s/additionalProperties: true/unevaluatedProperties: false/
>
> .../devicetree/bindings/spi/spi-zynq-qspi.txt
Hi Andrew,
On 2/10/21 3:52 AM, Andrew Lunn wrote:
> On Tue, Feb 09, 2021 at 10:53:20AM +0100, Michal Simek wrote:
>> +static int usb5744_i2c_probe(struct i2c_client *client,
>> + const struct i2c_device_id *id)
>> +{
>> +struct device *dev
Convert spi-zynq-qspi.txt to yaml.
Signed-off-by: Michal Simek
---
Changes in v2:
- s/additionalProperties: true/unevaluatedProperties: false/
.../devicetree/bindings/spi/spi-zynq-qspi.txt | 25
.../bindings/spi/xlnx,zynq-qspi.yaml | 59 +++
MAINTAINERS
po 1. 2. 2021 v 14:16 odesílatel Michal Simek napsal:
>
> Add missing DT compatible strings for Zturn boards.
>
> Signed-off-by: Michal Simek
> ---
>
> Patches are based on
> https://lore.kernel.org/linux-arm-kernel/20210120194033.26970-3-mich...@walle.cc/
> ---
Based on
https://lore.kernel.org/linux-arm-kernel/ycjv59g3tq2ha...@kroah.com/
initialization should fail if any registration fails.
Signed-off-by: Michal Simek
---
Changes in v2:
- Also remove i2c driver when platform driver registration failed.
drivers/usb/misc/usb3503.c | 9 +++--
1
Based on
https://lore.kernel.org/linux-arm-kernel/ycjv59g3tq2ha...@kroah.com/
initialization should fail if any registration fails.
Signed-off-by: Michal Simek
---
drivers/usb/misc/usb3503.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/misc/usb3503.c
reset.
Signed-off-by: Piyush Mehta
Signed-off-by: Michal Simek
---
Changes in v2:
- s/USB_USB5744/USB_HUB_USB5744/g
- Fix order in Makefile and Kconfig
MAINTAINERS| 1 +
drivers/usb/misc/Kconfig | 9 +++
drivers/usb/misc/Makefile | 1 +
drivers/usb/misc/usb5744.c | 115
From: Piyush Mehta
Added dt binding for usb5744 driver.
Signed-off-by: Piyush Mehta
Signed-off-by: Michal Simek
---
Changes in v2: None
.../bindings/usb/microchip,usb5744.yaml | 56 +++
MAINTAINERS | 1 +
2 files changed, 57
Hi,
the series is adding basic support for this USB hub. The key part is
running reset over GPIO line and when i2c is connected it is necessary to
send command to boot the hub. This chip is available on Xilinx
zcu100/Ultra96 v1 board.
Thanks,
Michal
Changes in v2:
- s/USB_USB5744/USB_HUB_USB5744
On 2/9/21 11:03 AM, Greg Kroah-Hartman wrote:
> On Tue, Feb 09, 2021 at 10:53:20AM +0100, Michal Simek wrote:
>> From: Piyush Mehta
>>
>> This patch adds a USB GPIO based hub reset for USB5744 hub. This usb5744
>> driver trigger hub reset signal after soft reset or c
reset.
Signed-off-by: Piyush Mehta
Signed-off-by: Michal Simek
---
MAINTAINERS| 1 +
drivers/usb/misc/Kconfig | 9 +++
drivers/usb/misc/Makefile | 1 +
drivers/usb/misc/usb5744.c | 115 +
4 files changed, 126 insertions(+)
create mode
From: Piyush Mehta
Added dt binding for usb5744 driver.
Signed-off-by: Piyush Mehta
Signed-off-by: Michal Simek
---
.../bindings/usb/microchip,usb5744.yaml | 56 +++
MAINTAINERS | 1 +
2 files changed, 57 insertions(+)
create mode
Hi,
the series is adding basic support for this USB hub. The key part is
running reset over GPIO line and when i2c is connected it is necessary to
send command to boot the hub. This chip is available on Xilinx
zcu100/Ultra96 v1 board.
Thanks,
Michal
Piyush Mehta (2):
dt-bindings: usb: misc: A
Use already prepared dev_err_probe() introduced by commit a787e5400a1c
("driver core: add device probe log helper").
It simplifies EPROBE_DEFER handling.
Signed-off-by: Michal Simek
---
drivers/fpga/xilinx-pr-decoupler.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
Use already prepared dev_err_probe() introduced by commit a787e5400a1c
("driver core: add device probe log helper").
It simplifies EPROBE_DEFER handling.
Signed-off-by: Michal Simek
---
drivers/phy/xilinx/phy-zynqmp.c | 11 ---
1 file changed, 4 insertions(+), 7 deletion
dev_err(&spi->dev, "Failed to get DONE gpio: %ld\n",
> - PTR_ERR(conf->done));
> - return PTR_ERR(conf->done);
> - }
> + if (IS_ERR(conf->done))
> + return dev_err_probe(&spi->dev, PTR_ERR(conf->done),
> + "Failed to get DONE gpio\n");
>
> mgr = devm_fpga_mgr_create(&spi->dev,
> "Xilinx Slave Serial FPGA Manager",
>
Acked-by: Michal Simek
Thanks,
Michal
Use already prepared dev_err_probe() introduced by commit a787e5400a1c
("driver core: add device probe log helper").
It simplifies EPROBE_DEFER handling.
Also unify message format for similar error cases.
Signed-off-by: Michal Simek
---
drivers/net/can/xilinx_can.c | 10
On 2/3/21 3:12 PM, Rob Herring wrote:
> On Wed, Feb 3, 2021 at 1:01 AM Michal Simek wrote:
>>
>>
>>
>> On 2/1/21 6:41 PM, Rob Herring wrote:
>>> On Mon, Feb 1, 2021 at 8:27 AM Michal Simek wrote:
>>>>
>>>> The commit 3eb619b2f
Based on discussion at
https://lore.kernel.org/r/20200318125003.ga2727...@kroah.com we got
recommendation to use explicit values for all enum values.
The patch is following this recommendation.
Signed-off-by: Michal Simek
---
Based on
https://lore.kernel.org/r
Convert spi-zynq-qspi.txt to yaml.
Signed-off-by: Michal Simek
---
.../devicetree/bindings/spi/spi-zynq-qspi.txt | 25
.../bindings/spi/xlnx,zynq-qspi.yaml | 59 +++
MAINTAINERS | 1 +
3 files changed, 60 insertions(+), 25
On 2/1/21 2:30 PM, Michael Walle wrote:
> Add the pinctrl entries for the GPIOs which are connected to the
> push buttons on this board.
>
> Signed-off-by: Michael Walle
> ---
> arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --gi
On 2/1/21 6:41 PM, Rob Herring wrote:
> On Mon, Feb 1, 2021 at 8:27 AM Michal Simek wrote:
>>
>> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
>> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
>> commit
>> &
MICROBLAZE || COMPILE_TEST
> + depends on HAS_IOMEM || COMPILE_TEST
> + depends on OF
> help
> Support for the Analog Devices axi-clkgen pcore clock generator for
> Xilinx
> FPGAs. It is commonly used in Analog Devices' reference designs.
>
Make sense.
Acked-by: Michal Simek
Thanks,
Michal
Update years in header to be up2date.
Signed-off-by: Michal Simek
---
arch/arm/boot/dts/zynq-7000.dtsi | 2 +-
arch/arm/boot/dts/zynq-cc108.dts | 2 +-
arch/arm/boot/dts/zynq-zc702.dts | 2 +-
arch/arm/boot/dts/zynq-zc706.dts | 2 +-
arch/arm/boot/dts/zynq-zc770-xm010
property is less critical, but creates
ambiguities when used in interrupt-map properties, so warn about this as
well now."
Add address-cells property to gic and gpio nodes to get rid of this warning.
The similar change has been done for ZynqMP too.
CC: Andre Przywara
Signed-off-by: Michal Simek
Add missing DT compatible strings for Zturn boards.
Signed-off-by: Michal Simek
---
Patches are based on
https://lore.kernel.org/linux-arm-kernel/20210120194033.26970-3-mich...@walle.cc/
---
Documentation/devicetree/bindings/arm/xilinx.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a
Hi,
On 1/31/21 3:30 PM, Nobuhiro Iwamatsu wrote:
> zynqmp_pm_get_eemi_ops() was removed in commit 4db8180ffe7c: "Firmware:
> xilinx:
> Remove eemi ops for fpga related APIs", but not in
> IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE).
> This removed zynqmp_pm_get_eemi_ops() in
> IS_REACHABLE(CONFIG_ZYNQ
Hi,
On 1/21/21 1:36 PM, Michal Simek wrote:
> Hi,
>
> I am updating DT patches which were there part of DP v11 series sent by
> Laurent in past [1]. Patches have been removed in v12 [2].
> The series is rebased on the top of [3] which wired si5341 clock chip.
>
> [1]
>
On 1/21/21 11:56 AM, Michal Simek wrote:
> Trivial fix.
>
> Signed-off-by: Michal Simek
> ---
>
> Documentation/devicetree/bindings/arm/xilinx.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/xil
On 1/21/21 11:27 AM, Michal Simek wrote:
> Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c
> structure compare to revA. The rest of the board is the same from software
> perspective.
> Also enable DMAs and QSPI.
>
> Signed-off-by: Michal Simek
> -
On 1/21/21 11:26 AM, Michal Simek wrote:
> Hi,
>
> I am sending this series to reflect the latest drivers which have been
> merged to mainline kernel. I have boot it on zcu102-rev1.0 and also
> zcu104-rev1.0. That's why I have also added DT for this newer revision.
>
&
On 1/27/21 2:13 AM, Hyun Kwon wrote:
> The email will become invalid soon.
>
> Signed-off-by: Hyun Kwon
> Cc: Laurent Pinchart
> Cc: Michal Simek
> ---
> MAINTAINERS | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
>
r ; t...@redhat.com;
>> robh...@kernel.org; Michal Simek ; linux-
>> f...@vger.kernel.org; devicet...@vger.kernel.org; linux-arm-
>> ker...@lists.infradead.org; linux-kernel@vger.kernel.org; git
>> ; chinnikishore...@gmail.com; Appana Durga Kedareswara
>> Rao
>&
Hi,
On 1/27/21 3:18 AM, Hyun Kwon wrote:
> Hi Laurent,
>
> On Tue, Jan 26, 2021 at 05:37:02PM -0800, Laurent Pinchart wrote:
>> Hi Hyun,
>>
>> Thank you for the patch.
>>
>> On Tue, Jan 26, 2021 at 05:13:12PM -0800, Hyun Kwon wrote:
>>> The email will become invalid soon.
>>
>> Is there, by any c
On 1/20/21 8:40 PM, Michael Walle wrote:
> Add support for the Ebang EBAZ4205 board. This board was once used as a
> control board for a bitcoin mining device. Nowawdays it is sold as a cheap
> Zynq-7000 eval board.
>
> Michael Walle (3):
> dt-bindings: add ebang vendor prefix
> dt-bindings
parameter or member
> 'pll_status' not described in 'clk_register_zynq_pll'
> drivers/clk/zynq/pll.c:187: warning: Function parameter or member
> 'lock_index' not described in 'clk_register_zynq_pll'
> drivers/clk/zynq/pll.c:187: warning: Functio
On 1/26/21 1:45 PM, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
>
> drivers/clk/zynqmp/divider.c:46: warning: Function parameter or member
> 'max_div' not described in 'zynqmp_clk_divider'
>
> Cc: Michael Turquette
> Cc: Step
On 1/25/21 10:04 PM, Daniel Walker (danielwa) wrote:
> On Mon, Jan 25, 2021 at 08:52:01AM +0100, Michal Simek wrote:
>>>
>>>>
>>>> Long time ago we said that we are not going to push any PL related
>>>> configurations. It means all below can
Hi Daniel,
On 1/22/21 9:32 PM, Daniel Walker (danielwa) wrote:
> On Fri, Jan 22, 2021 at 09:48:53AM +0100, Michal Simek wrote:
>> Hi Daniel,
>>
>> On 1/22/21 12:12 AM, Daniel Walker wrote:
>>> Add Petra and Hellcat dts file. These platforms are based on
ACK from the maintainer of this file to merge it with the rest to
> the pinctrl tree. I suppose Michal?
here it is.
Acked-by: Michal Simek
Thanks,
Michal
Hi,
On 1/21/21 11:29 PM, Laurent Pinchart wrote:
> Hi Michal,
>
> I've just realized I forgot to reply to this e-mail, sorry.
>
> On Tue, Dec 08, 2020 at 08:26:41AM +0100, Michal Simek wrote:
>> On 07. 12. 20 23:16, Laurent Pinchart wrote:
>>> On Mon, Dec 0
Hi,
On 1/22/21 10:24 AM, Corentin Labbe wrote:
> Hello
>
> With at least qemu 5.1.0 (and later), the xlnx-zcu102 machine boot lead to a
> panic due to missing console.
> qemu-system-aarch64 -kernel Image -nographic -machine xlnx-zcu102 -device
> ide-hd,drive=lavatest -serial mon:stdio -serial n
Hi Daniel,
On 1/22/21 12:12 AM, Daniel Walker wrote:
> Add Petra and Hellcat dts file. These platforms are based on
> the Xilinx Zynqmp platform.
>
> Signed-off-by: Daniel Walker
> Cc: xe-linux-exter...@cisco.com
> ---
> arch/arm64/boot/dts/xilinx/Makefile | 2 +
> .../boot/dts/xili
Hi Laurent,
On 1/22/21 8:46 AM, Laurent Pinchart wrote:
> Hi Michal,
>
> On Fri, Jan 22, 2021 at 08:19:15AM +0100, Michal Simek wrote:
>> On 1/21/21 11:37 PM, Laurent Pinchart wrote:
>>> On Thu, Jan 21, 2021 at 01:36:07PM +0100, Michal Simek wrote:
>>>> From
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