Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
Hi Lee Jones On Wednesday 30 November 2016 02:39 AM, Dmitry Torokhov wrote: > On Tue, Nov 29, 2016 at 11:11:35AM +0530, Mugunthan V N wrote: >> On Friday 25 November 2016 03:29 PM, Lee Jones wrote: >>> On Fri, 25 Nov 2016, Mugunthan V N wrote: >>> >>>> Hi Dmitry Torokhov, >>>> >>>> On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: >>>>> This patch series enables ADC to be clocked at 24MHz as the >>>>> TI AM335x ADC driver has already adopted to use DMA to transfer >>>>> ADC samples. Now ADC can generated upto 800K Samples per second >>>>> with the patch [1] on AM335x BBB and AM437x GP EVM. >>>>> >>>>> when ADC ref clock is set at 24MHz, I am seeing some issue with >>>>> touch screen pointer as the pointer jumps to random locations >>>>> with free draw application. The issue is due to increase in ADC >>>>> clock and charge delay for the touchscreen ADC line duration >>>>> reduced. >>>>> >>>>> So the notation of ti,charge-delay in terms of ADC clock is >>>>> wrong, it has to be represented in time and driver has to convert >>>>> the charge delay time to ADC clocks based on what ADC clock >>>>> frequency is set. >>>>> >>>>> Measured the performance with the iio_generic_buffer with the >>>>> patch [2] applied >>>>> >>>>> Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 >>>>> cape with [3] dts for display and touch screen to work. >>>>> >>>> >>>> Since there are acks from DT and MFD maintainers, can you pull the patch >>>> series if you do not have any more comments. >>> >>> Cant do anything without *all* Acks. >>> >> Hi Dmitry Torokhov, >> >> Can you provide your inputs on the patch series. > > You have my ack for the input bit. > A gentle ping Regards Mugunthan V N
Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
Hi Lee Jones On Wednesday 30 November 2016 02:39 AM, Dmitry Torokhov wrote: > On Tue, Nov 29, 2016 at 11:11:35AM +0530, Mugunthan V N wrote: >> On Friday 25 November 2016 03:29 PM, Lee Jones wrote: >>> On Fri, 25 Nov 2016, Mugunthan V N wrote: >>> >>>> Hi Dmitry Torokhov, >>>> >>>> On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: >>>>> This patch series enables ADC to be clocked at 24MHz as the >>>>> TI AM335x ADC driver has already adopted to use DMA to transfer >>>>> ADC samples. Now ADC can generated upto 800K Samples per second >>>>> with the patch [1] on AM335x BBB and AM437x GP EVM. >>>>> >>>>> when ADC ref clock is set at 24MHz, I am seeing some issue with >>>>> touch screen pointer as the pointer jumps to random locations >>>>> with free draw application. The issue is due to increase in ADC >>>>> clock and charge delay for the touchscreen ADC line duration >>>>> reduced. >>>>> >>>>> So the notation of ti,charge-delay in terms of ADC clock is >>>>> wrong, it has to be represented in time and driver has to convert >>>>> the charge delay time to ADC clocks based on what ADC clock >>>>> frequency is set. >>>>> >>>>> Measured the performance with the iio_generic_buffer with the >>>>> patch [2] applied >>>>> >>>>> Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 >>>>> cape with [3] dts for display and touch screen to work. >>>>> >>>> >>>> Since there are acks from DT and MFD maintainers, can you pull the patch >>>> series if you do not have any more comments. >>> >>> Cant do anything without *all* Acks. >>> >> Hi Dmitry Torokhov, >> >> Can you provide your inputs on the patch series. > > You have my ack for the input bit. > A gentle ping Regards Mugunthan V N
Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
On Friday 25 November 2016 03:29 PM, Lee Jones wrote: > On Fri, 25 Nov 2016, Mugunthan V N wrote: > >> Hi Dmitry Torokhov, >> >> On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: >>> This patch series enables ADC to be clocked at 24MHz as the >>> TI AM335x ADC driver has already adopted to use DMA to transfer >>> ADC samples. Now ADC can generated upto 800K Samples per second >>> with the patch [1] on AM335x BBB and AM437x GP EVM. >>> >>> when ADC ref clock is set at 24MHz, I am seeing some issue with >>> touch screen pointer as the pointer jumps to random locations >>> with free draw application. The issue is due to increase in ADC >>> clock and charge delay for the touchscreen ADC line duration >>> reduced. >>> >>> So the notation of ti,charge-delay in terms of ADC clock is >>> wrong, it has to be represented in time and driver has to convert >>> the charge delay time to ADC clocks based on what ADC clock >>> frequency is set. >>> >>> Measured the performance with the iio_generic_buffer with the >>> patch [2] applied >>> >>> Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 >>> cape with [3] dts for display and touch screen to work. >>> >> >> Since there are acks from DT and MFD maintainers, can you pull the patch >> series if you do not have any more comments. > > Cant do anything without *all* Acks. > Hi Dmitry Torokhov, Can you provide your inputs on the patch series. Regards Mugunthan V N
Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
On Friday 25 November 2016 03:29 PM, Lee Jones wrote: > On Fri, 25 Nov 2016, Mugunthan V N wrote: > >> Hi Dmitry Torokhov, >> >> On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: >>> This patch series enables ADC to be clocked at 24MHz as the >>> TI AM335x ADC driver has already adopted to use DMA to transfer >>> ADC samples. Now ADC can generated upto 800K Samples per second >>> with the patch [1] on AM335x BBB and AM437x GP EVM. >>> >>> when ADC ref clock is set at 24MHz, I am seeing some issue with >>> touch screen pointer as the pointer jumps to random locations >>> with free draw application. The issue is due to increase in ADC >>> clock and charge delay for the touchscreen ADC line duration >>> reduced. >>> >>> So the notation of ti,charge-delay in terms of ADC clock is >>> wrong, it has to be represented in time and driver has to convert >>> the charge delay time to ADC clocks based on what ADC clock >>> frequency is set. >>> >>> Measured the performance with the iio_generic_buffer with the >>> patch [2] applied >>> >>> Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 >>> cape with [3] dts for display and touch screen to work. >>> >> >> Since there are acks from DT and MFD maintainers, can you pull the patch >> series if you do not have any more comments. > > Cant do anything without *all* Acks. > Hi Dmitry Torokhov, Can you provide your inputs on the patch series. Regards Mugunthan V N
Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
Hi Dmitry Torokhov, On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: > This patch series enables ADC to be clocked at 24MHz as the > TI AM335x ADC driver has already adopted to use DMA to transfer > ADC samples. Now ADC can generated upto 800K Samples per second > with the patch [1] on AM335x BBB and AM437x GP EVM. > > when ADC ref clock is set at 24MHz, I am seeing some issue with > touch screen pointer as the pointer jumps to random locations > with free draw application. The issue is due to increase in ADC > clock and charge delay for the touchscreen ADC line duration > reduced. > > So the notation of ti,charge-delay in terms of ADC clock is > wrong, it has to be represented in time and driver has to convert > the charge delay time to ADC clocks based on what ADC clock > frequency is set. > > Measured the performance with the iio_generic_buffer with the > patch [2] applied > > Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 > cape with [3] dts for display and touch screen to work. > Since there are acks from DT and MFD maintainers, can you pull the patch series if you do not have any more comments. Regards Mugunthan V N
Re: [PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
Hi Dmitry Torokhov, On Thursday 10 November 2016 10:05 PM, Mugunthan V N wrote: > This patch series enables ADC to be clocked at 24MHz as the > TI AM335x ADC driver has already adopted to use DMA to transfer > ADC samples. Now ADC can generated upto 800K Samples per second > with the patch [1] on AM335x BBB and AM437x GP EVM. > > when ADC ref clock is set at 24MHz, I am seeing some issue with > touch screen pointer as the pointer jumps to random locations > with free draw application. The issue is due to increase in ADC > clock and charge delay for the touchscreen ADC line duration > reduced. > > So the notation of ti,charge-delay in terms of ADC clock is > wrong, it has to be represented in time and driver has to convert > the charge delay time to ADC clocks based on what ADC clock > frequency is set. > > Measured the performance with the iio_generic_buffer with the > patch [2] applied > > Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 > cape with [3] dts for display and touch screen to work. > Since there are acks from DT and MFD maintainers, can you pull the patch series if you do not have any more comments. Regards Mugunthan V N
[PATCH v2 2/3] Input: ti_am335x_tsc: Add support for ti,charge-delay-ns
ti,charge-delay will be deprecated as it represents number of
clock cycles and the DT entries are done in assumption of 3MHz
TSCADC clock, but clock can be set upto 24MHz. So driver add
support for ti,charge-delay-ns and do not drop support for
ti,charge-delay to support old dtbs and it will be assumed that
it is for 3MHz TSCADC clock and will be calculated as per current
clock speed.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/input/touchscreen/ti_am335x_tsc.c | 31 +++
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c
b/drivers/input/touchscreen/ti_am335x_tsc.c
index 7953381d939a..104b3640f728 100644
--- a/drivers/input/touchscreen/ti_am335x_tsc.c
+++ b/drivers/input/touchscreen/ti_am335x_tsc.c
@@ -379,15 +379,30 @@ static int titsc_parse_dt(struct platform_device *pdev,
ts_dev->coordinate_readouts = 5;
}
- err = of_property_read_u32(node, "ti,charge-delay",
+ err = of_property_read_u32(node, "ti,charge-delay-ns",
_dev->charge_delay);
- /*
-* If ti,charge-delay value is not specified, then use
-* CHARGEDLY_OPENDLY as the default value.
-*/
- if (err < 0) {
- ts_dev->charge_delay = CHARGEDLY_OPENDLY;
- dev_warn(>dev, "ti,charge-delay not specified\n");
+ if (err >= 0) {
+ u64 charge_delay = ts_dev->charge_delay;
+
+ charge_delay *= ADC_CLK;
+ do_div(charge_delay, 1E9);
+ ts_dev->charge_delay = (u32)charge_delay;
+ } else {
+ err = of_property_read_u32(node, "ti,charge-delay",
+ _dev->charge_delay);
+ /*
+* If ti,charge-delay value is not specified, then use
+* CHARGEDLY_OPENDLY as the default value.
+*/
+ if (err < 0) {
+ ts_dev->charge_delay = CHARGEDLY_OPENDLY;
+ dev_warn(>dev, "ti,charge-delay not specified\n");
+ }
+ /*
+* ti,charge-delay is specified with referrence to 3MHz,
+* so convert it to in referrence to current clock
+*/
+ ts_dev->charge_delay *= ADC_CLK / 300;
}
return of_property_read_u32_array(node, "ti,wire-config",
--
2.11.0.rc0.7.gbe5a750
[PATCH v2 2/3] Input: ti_am335x_tsc: Add support for ti,charge-delay-ns
ti,charge-delay will be deprecated as it represents number of
clock cycles and the DT entries are done in assumption of 3MHz
TSCADC clock, but clock can be set upto 24MHz. So driver add
support for ti,charge-delay-ns and do not drop support for
ti,charge-delay to support old dtbs and it will be assumed that
it is for 3MHz TSCADC clock and will be calculated as per current
clock speed.
Signed-off-by: Mugunthan V N
---
drivers/input/touchscreen/ti_am335x_tsc.c | 31 +++
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c
b/drivers/input/touchscreen/ti_am335x_tsc.c
index 7953381d939a..104b3640f728 100644
--- a/drivers/input/touchscreen/ti_am335x_tsc.c
+++ b/drivers/input/touchscreen/ti_am335x_tsc.c
@@ -379,15 +379,30 @@ static int titsc_parse_dt(struct platform_device *pdev,
ts_dev->coordinate_readouts = 5;
}
- err = of_property_read_u32(node, "ti,charge-delay",
+ err = of_property_read_u32(node, "ti,charge-delay-ns",
_dev->charge_delay);
- /*
-* If ti,charge-delay value is not specified, then use
-* CHARGEDLY_OPENDLY as the default value.
-*/
- if (err < 0) {
- ts_dev->charge_delay = CHARGEDLY_OPENDLY;
- dev_warn(>dev, "ti,charge-delay not specified\n");
+ if (err >= 0) {
+ u64 charge_delay = ts_dev->charge_delay;
+
+ charge_delay *= ADC_CLK;
+ do_div(charge_delay, 1E9);
+ ts_dev->charge_delay = (u32)charge_delay;
+ } else {
+ err = of_property_read_u32(node, "ti,charge-delay",
+ _dev->charge_delay);
+ /*
+* If ti,charge-delay value is not specified, then use
+* CHARGEDLY_OPENDLY as the default value.
+*/
+ if (err < 0) {
+ ts_dev->charge_delay = CHARGEDLY_OPENDLY;
+ dev_warn(>dev, "ti,charge-delay not specified\n");
+ }
+ /*
+* ti,charge-delay is specified with referrence to 3MHz,
+* so convert it to in referrence to current clock
+*/
+ ts_dev->charge_delay *= ADC_CLK / 300;
}
return of_property_read_u32_array(node, "ti,wire-config",
--
2.11.0.rc0.7.gbe5a750
[PATCH v2 3/3] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
Increase ADC reference clock from 3MHz to 24MHz so that the sampling rates goes up from 100K samples per second to 800K samples per second on AM335x and AM437x SoC. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index b9a53e013bff..f6c449b96ea5 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -137,7 +137,7 @@ #define SEQ_STATUS BIT(5) #define CHARGE_STEP0x11 -#define ADC_CLK300 +#define ADC_CLK2400 #define TOTAL_STEPS16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD19 -- 2.11.0.rc0.7.gbe5a750
[PATCH v2 3/3] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
Increase ADC reference clock from 3MHz to 24MHz so that the sampling rates goes up from 100K samples per second to 800K samples per second on AM335x and AM437x SoC. Signed-off-by: Mugunthan V N --- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index b9a53e013bff..f6c449b96ea5 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -137,7 +137,7 @@ #define SEQ_STATUS BIT(5) #define CHARGE_STEP0x11 -#define ADC_CLK300 +#define ADC_CLK2400 #define TOTAL_STEPS16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD19 -- 2.11.0.rc0.7.gbe5a750
[PATCH v2 1/3] dt/binding: ti-tsc-adc: deprecate ti,charge-delay and add binding doc for ti,charge-delay-ns
ti,charge-delay represents the duration that ADC should wait before sampling the ADC line to detect the touch location and pen up/downs. Currently the ADC clock is set at 3MHz. The device-tree entry for ti,charge-delay is based on assumption of ADC clock at 3MHz, but it can be operated up to 24MHz clock. Representing the charge delay of touchscreen in terms of ADC clocks is incorrect. So change this representation to ti,charge-delay-ns, which driver can convert it to number clock cycles based on ref clock frequency. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- .../bindings/input/touchscreen/ti-tsc-adc.txt | 32 ++ 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt b/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt index b1163bf97146..83570776c804 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt @@ -30,17 +30,27 @@ Required properties: Optional properties: - child "tsc" - ti,charge-delay: Length of touch screen charge delay step in terms of -ADC clock cycles. Charge delay value should be large -in order to avoid false pen-up events. This value -effects the overall sampling speed, hence need to be -kept as low as possible, while avoiding false pen-up -event. Start from a lower value, say 0x400, and -increase value until false pen-up events are avoided. -The pen-up detection happens immediately after the -charge step, so this does in fact function as a -hardware knob for adjusting the amount of "settling -time". + ti,charge-delay-ns: Length of touch screen charge delay step in terms of + nano Seconds. Charge delay value should be large + in order to avoid false pen-up events. This value + effects the overall sampling speed, hence need to be + kept as low as possible, while avoiding false pen-up + event. Start from a lower value, say 41000nS, and + increase value until false pen-up events are avoided. + The pen-up detection happens immediately after the + charge step, so this does in fact function as a + hardware knob for adjusting the amount of "settling + time". + ti,charge-delay: Deprecated as representing charge delay should be +represented in time as the ADC clock may be different. +Currently this value is calculated based on 3MHz ADC +ref clock, but ADC clock can operate upto 24MHz clock. +ADC clock will be changed to 24MHz to increase the +number of ADC samples. So to keep the backward +compatibility, driver will consider this value is +calculated for 3MHz clock so the value will be +multiplied by 8 to compensate the change in reference +clock. - child "adc" ti,chan-step-opendelay: List of open delays for each channel of -- 2.11.0.rc0.7.gbe5a750
[PATCH v2 1/3] dt/binding: ti-tsc-adc: deprecate ti,charge-delay and add binding doc for ti,charge-delay-ns
ti,charge-delay represents the duration that ADC should wait before sampling the ADC line to detect the touch location and pen up/downs. Currently the ADC clock is set at 3MHz. The device-tree entry for ti,charge-delay is based on assumption of ADC clock at 3MHz, but it can be operated up to 24MHz clock. Representing the charge delay of touchscreen in terms of ADC clocks is incorrect. So change this representation to ti,charge-delay-ns, which driver can convert it to number clock cycles based on ref clock frequency. Signed-off-by: Mugunthan V N --- .../bindings/input/touchscreen/ti-tsc-adc.txt | 32 ++ 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt b/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt index b1163bf97146..83570776c804 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/ti-tsc-adc.txt @@ -30,17 +30,27 @@ Required properties: Optional properties: - child "tsc" - ti,charge-delay: Length of touch screen charge delay step in terms of -ADC clock cycles. Charge delay value should be large -in order to avoid false pen-up events. This value -effects the overall sampling speed, hence need to be -kept as low as possible, while avoiding false pen-up -event. Start from a lower value, say 0x400, and -increase value until false pen-up events are avoided. -The pen-up detection happens immediately after the -charge step, so this does in fact function as a -hardware knob for adjusting the amount of "settling -time". + ti,charge-delay-ns: Length of touch screen charge delay step in terms of + nano Seconds. Charge delay value should be large + in order to avoid false pen-up events. This value + effects the overall sampling speed, hence need to be + kept as low as possible, while avoiding false pen-up + event. Start from a lower value, say 41000nS, and + increase value until false pen-up events are avoided. + The pen-up detection happens immediately after the + charge step, so this does in fact function as a + hardware knob for adjusting the amount of "settling + time". + ti,charge-delay: Deprecated as representing charge delay should be +represented in time as the ADC clock may be different. +Currently this value is calculated based on 3MHz ADC +ref clock, but ADC clock can operate upto 24MHz clock. +ADC clock will be changed to 24MHz to increase the +number of ADC samples. So to keep the backward +compatibility, driver will consider this value is +calculated for 3MHz clock so the value will be +multiplied by 8 to compensate the change in reference +clock. - child "adc" ti,chan-step-opendelay: List of open delays for each channel of -- 2.11.0.rc0.7.gbe5a750
[PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
This patch series enables ADC to be clocked at 24MHz as the TI AM335x ADC driver has already adopted to use DMA to transfer ADC samples. Now ADC can generated upto 800K Samples per second with the patch [1] on AM335x BBB and AM437x GP EVM. when ADC ref clock is set at 24MHz, I am seeing some issue with touch screen pointer as the pointer jumps to random locations with free draw application. The issue is due to increase in ADC clock and charge delay for the touchscreen ADC line duration reduced. So the notation of ti,charge-delay in terms of ADC clock is wrong, it has to be represented in time and driver has to convert the charge delay time to ADC clocks based on what ADC clock frequency is set. Measured the performance with the iio_generic_buffer with the patch [2] applied Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 cape with [3] dts for display and touch screen to work. Changes from initial version: * Removed modification to STEPCONFIG_OPENDLY defined as it doesn't affect/improve touchscreen performance. * Changed ti,charge-delay to ti,charge-delay-ns [1] - http://pastebin.ubuntu.com/23357935/ [2] - http://pastebin.ubuntu.com/23357939/ [3] - http://pastebin.ubuntu.com/23456616/ Mugunthan V N (3): dt/binding: ti-tsc-adc: deprecate ti,charge-delay and add binding doc for ti,charge-delay-ns Input: ti_am335x_tsc: Add support for ti,charge-delay-ns drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz .../bindings/input/touchscreen/ti-tsc-adc.txt | 32 ++ drivers/input/touchscreen/ti_am335x_tsc.c | 31 +++-- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 3 files changed, 45 insertions(+), 20 deletions(-) -- 2.11.0.rc0.7.gbe5a750
[PATCH v2 0/3] increase TSCADC clock to 24MHz and fix ti,charge-delay to represent in nS
This patch series enables ADC to be clocked at 24MHz as the TI AM335x ADC driver has already adopted to use DMA to transfer ADC samples. Now ADC can generated upto 800K Samples per second with the patch [1] on AM335x BBB and AM437x GP EVM. when ADC ref clock is set at 24MHz, I am seeing some issue with touch screen pointer as the pointer jumps to random locations with free draw application. The issue is due to increase in ADC clock and charge delay for the touchscreen ADC line duration reduced. So the notation of ti,charge-delay in terms of ADC clock is wrong, it has to be represented in time and driver has to convert the charge delay time to ADC clocks based on what ADC clock frequency is set. Measured the performance with the iio_generic_buffer with the patch [2] applied Verified the touch screen on AM335x GP EVM and AM335x BBB LCD7 cape with [3] dts for display and touch screen to work. Changes from initial version: * Removed modification to STEPCONFIG_OPENDLY defined as it doesn't affect/improve touchscreen performance. * Changed ti,charge-delay to ti,charge-delay-ns [1] - http://pastebin.ubuntu.com/23357935/ [2] - http://pastebin.ubuntu.com/23357939/ [3] - http://pastebin.ubuntu.com/23456616/ Mugunthan V N (3): dt/binding: ti-tsc-adc: deprecate ti,charge-delay and add binding doc for ti,charge-delay-ns Input: ti_am335x_tsc: Add support for ti,charge-delay-ns drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz .../bindings/input/touchscreen/ti-tsc-adc.txt | 32 ++ drivers/input/touchscreen/ti_am335x_tsc.c | 31 +++-- include/linux/mfd/ti_am335x_tscadc.h | 2 +- 3 files changed, 45 insertions(+), 20 deletions(-) -- 2.11.0.rc0.7.gbe5a750
Re: [PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
On Monday 24 October 2016 11:32 AM, Mugunthan V N wrote: > Increase ADC reference clock from 3MHz to 24MHz so that the > sampling rates goes up from 100K samples per second to 800K > samples per second on AM335x and AM437x SoC. > > Also increase opendelay for touchscreen configuration to > equalize the increase in ADC reference clock frequency, > which results in the same amount touch events reported via > evtest on AM335x GP EVM. > > Signed-off-by: Mugunthan V N <mugunthan...@ti.com> Found issues with touchscreen usage with GUI on my AM335x GP EVM. Fixed with change the "ti,charge-delay" DT property based on change in ADC clocks. Will be sending v2 patch soon. Regards Mugunthan V N
Re: [PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
On Monday 24 October 2016 11:32 AM, Mugunthan V N wrote: > Increase ADC reference clock from 3MHz to 24MHz so that the > sampling rates goes up from 100K samples per second to 800K > samples per second on AM335x and AM437x SoC. > > Also increase opendelay for touchscreen configuration to > equalize the increase in ADC reference clock frequency, > which results in the same amount touch events reported via > evtest on AM335x GP EVM. > > Signed-off-by: Mugunthan V N Found issues with touchscreen usage with GUI on my AM335x GP EVM. Fixed with change the "ti,charge-delay" DT property based on change in ADC clocks. Will be sending v2 patch soon. Regards Mugunthan V N
Re: [PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
On Tuesday 25 October 2016 02:28 AM, John Syne wrote: >> > On Oct 23, 2016, at 11:02 PM, Mugunthan V N <mugunthan...@ti.com> wrote: >> > >> > Increase ADC reference clock from 3MHz to 24MHz so that the >> > sampling rates goes up from 100K samples per second to 800K >> > samples per second on AM335x and AM437x SoC. >> > >> > Also increase opendelay for touchscreen configuration to >> > equalize the increase in ADC reference clock frequency, >> > which results in the same amount touch events reported via >> > evtest on AM335x GP EVM. >> > >> > Signed-off-by: Mugunthan V N <mugunthan...@ti.com> >> > --- >> > >> > This patch depends on ADC DMA patch series [1] >> > >> > Without DMA support, when ADC ref clock is set at 24MHz, I am >> > seeing fifo overflow as CPU is not able to pull the ADC samples. >> > This answers that DMA support is must for ADC to consume the >> > samples generated at 24MHz with no open, step delay or >> > averaging with patch [2]. >> > >> > Measured the performance with the iio_generic_buffer with the >> > patch [3] applied >> > >> > [1] - http://www.spinics.net/lists/devicetree/msg145045.html >> > [2] - http://pastebin.ubuntu.com/23357935/ >> > [3] - http://pastebin.ubuntu.com/23357939/ >> > >> > --- >> > include/linux/mfd/ti_am335x_tscadc.h | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> > >> > diff --git a/include/linux/mfd/ti_am335x_tscadc.h >> > b/include/linux/mfd/ti_am335x_tscadc.h >> > index b9a53e0..96c4207 100644 >> > --- a/include/linux/mfd/ti_am335x_tscadc.h >> > +++ b/include/linux/mfd/ti_am335x_tscadc.h >> > @@ -90,7 +90,7 @@ >> > /* Delay register */ >> > #define STEPDELAY_OPEN_MASK(0x3 << 0) >> > #define STEPDELAY_OPEN(val)((val) << 0) >> > -#define STEPCONFIG_OPENDLYSTEPDELAY_OPEN(0x098) > Wouldn’t this be better to add this to the devicetree? > > ti,chan-step-avg = <0x16 0x16 0x16 0x16 0x16 0x16 0x16>; > ti,chan-step-opendelay = <0x500 0x500 0x500 0x500 0x500 0x500 0x500>; > ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0>; For a touch screen, there is not need to change in these parameter settings, so my opinion is to keep it as is. Or am I missing something? Regards Mugunthan V N
Re: [PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
On Tuesday 25 October 2016 02:28 AM, John Syne wrote: >> > On Oct 23, 2016, at 11:02 PM, Mugunthan V N wrote: >> > >> > Increase ADC reference clock from 3MHz to 24MHz so that the >> > sampling rates goes up from 100K samples per second to 800K >> > samples per second on AM335x and AM437x SoC. >> > >> > Also increase opendelay for touchscreen configuration to >> > equalize the increase in ADC reference clock frequency, >> > which results in the same amount touch events reported via >> > evtest on AM335x GP EVM. >> > >> > Signed-off-by: Mugunthan V N >> > --- >> > >> > This patch depends on ADC DMA patch series [1] >> > >> > Without DMA support, when ADC ref clock is set at 24MHz, I am >> > seeing fifo overflow as CPU is not able to pull the ADC samples. >> > This answers that DMA support is must for ADC to consume the >> > samples generated at 24MHz with no open, step delay or >> > averaging with patch [2]. >> > >> > Measured the performance with the iio_generic_buffer with the >> > patch [3] applied >> > >> > [1] - http://www.spinics.net/lists/devicetree/msg145045.html >> > [2] - http://pastebin.ubuntu.com/23357935/ >> > [3] - http://pastebin.ubuntu.com/23357939/ >> > >> > --- >> > include/linux/mfd/ti_am335x_tscadc.h | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> > >> > diff --git a/include/linux/mfd/ti_am335x_tscadc.h >> > b/include/linux/mfd/ti_am335x_tscadc.h >> > index b9a53e0..96c4207 100644 >> > --- a/include/linux/mfd/ti_am335x_tscadc.h >> > +++ b/include/linux/mfd/ti_am335x_tscadc.h >> > @@ -90,7 +90,7 @@ >> > /* Delay register */ >> > #define STEPDELAY_OPEN_MASK(0x3 << 0) >> > #define STEPDELAY_OPEN(val)((val) << 0) >> > -#define STEPCONFIG_OPENDLYSTEPDELAY_OPEN(0x098) > Wouldn’t this be better to add this to the devicetree? > > ti,chan-step-avg = <0x16 0x16 0x16 0x16 0x16 0x16 0x16>; > ti,chan-step-opendelay = <0x500 0x500 0x500 0x500 0x500 0x500 0x500>; > ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0>; For a touch screen, there is not need to change in these parameter settings, so my opinion is to keep it as is. Or am I missing something? Regards Mugunthan V N
[PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
Increase ADC reference clock from 3MHz to 24MHz so that the sampling rates goes up from 100K samples per second to 800K samples per second on AM335x and AM437x SoC. Also increase opendelay for touchscreen configuration to equalize the increase in ADC reference clock frequency, which results in the same amount touch events reported via evtest on AM335x GP EVM. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- This patch depends on ADC DMA patch series [1] Without DMA support, when ADC ref clock is set at 24MHz, I am seeing fifo overflow as CPU is not able to pull the ADC samples. This answers that DMA support is must for ADC to consume the samples generated at 24MHz with no open, step delay or averaging with patch [2]. Measured the performance with the iio_generic_buffer with the patch [3] applied [1] - http://www.spinics.net/lists/devicetree/msg145045.html [2] - http://pastebin.ubuntu.com/23357935/ [3] - http://pastebin.ubuntu.com/23357939/ --- include/linux/mfd/ti_am335x_tscadc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index b9a53e0..96c4207 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -90,7 +90,7 @@ /* Delay register */ #define STEPDELAY_OPEN_MASK(0x3 << 0) #define STEPDELAY_OPEN(val)((val) << 0) -#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) +#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x500) #define STEPDELAY_SAMPLE_MASK (0xFF << 24) #define STEPDELAY_SAMPLE(val) ((val) << 24) #define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) @@ -137,7 +137,7 @@ #define SEQ_STATUS BIT(5) #define CHARGE_STEP0x11 -#define ADC_CLK300 +#define ADC_CLK2400 #define TOTAL_STEPS16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD19 -- 2.10.1.502.g6598894
[PATCH] drivers: mfd: ti_am335x_tscadc: increase ADC ref clock to 24MHz
Increase ADC reference clock from 3MHz to 24MHz so that the sampling rates goes up from 100K samples per second to 800K samples per second on AM335x and AM437x SoC. Also increase opendelay for touchscreen configuration to equalize the increase in ADC reference clock frequency, which results in the same amount touch events reported via evtest on AM335x GP EVM. Signed-off-by: Mugunthan V N --- This patch depends on ADC DMA patch series [1] Without DMA support, when ADC ref clock is set at 24MHz, I am seeing fifo overflow as CPU is not able to pull the ADC samples. This answers that DMA support is must for ADC to consume the samples generated at 24MHz with no open, step delay or averaging with patch [2]. Measured the performance with the iio_generic_buffer with the patch [3] applied [1] - http://www.spinics.net/lists/devicetree/msg145045.html [2] - http://pastebin.ubuntu.com/23357935/ [3] - http://pastebin.ubuntu.com/23357939/ --- include/linux/mfd/ti_am335x_tscadc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index b9a53e0..96c4207 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -90,7 +90,7 @@ /* Delay register */ #define STEPDELAY_OPEN_MASK(0x3 << 0) #define STEPDELAY_OPEN(val)((val) << 0) -#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) +#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x500) #define STEPDELAY_SAMPLE_MASK (0xFF << 24) #define STEPDELAY_SAMPLE(val) ((val) << 24) #define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) @@ -137,7 +137,7 @@ #define SEQ_STATUS BIT(5) #define CHARGE_STEP0x11 -#define ADC_CLK300 +#define ADC_CLK2400 #define TOTAL_STEPS16 #define TOTAL_CHANNELS 8 #define FIFO1_THRESHOLD19 -- 2.10.1.502.g6598894
Re: [PATCH v3 2/4] drivers: iio: ti_am335x_adc: add dma support
On Sunday 09 October 2016 02:00 PM, Jonathan Cameron wrote:
> On 05/10/16 10:04, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
> Hi,
>
> Just the one question inline. I'll also need an Ack from Lee as
> this touches code in mfd (as does the previous patch).
> We have obviously missed this merge window, so no particular rush.
>
> Otherwise, looking very nice indeed. Got to get my BBB out and play
> with this now ;)
>
> Jonathan
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 148
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 152 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..ad9dec3 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,28 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +int current_period;
>> +int period_size;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->buf + dma->current_period * dma->period_size;
>> +dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
>> +
>> +for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
> Hmm. Another case for the mooted iio_push_to_buffers_multi. Guess
> we should move on with that one ;)
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->current_period = 0; /* We start to fill period 0 */
>> +/*
>> + * Make the fifo thresh as the multiple of total number of
>> + * channels enabled, so make sure that cyclic DMA period
>> + * length is also a multiple of total number of channels
>> + * enabled. This ensures that no invalid data is reported
>> + * to the stack via iio_push_to_buffers().
>> + */
>> +dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
>> + adc_dev->total_ch_enabled) - 1;
>> +/* Make sure that period length is multiple of fifo thresh level */
>> +dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
>> +(dma->fifo_thresh + 1) * sizeof(u16));
>> +
>> +dma->conf.src_maxburst = dma->fifo_thresh + 1;
>> +dmaengine_slave_config(dma->chan, >conf);
>> +
>> +desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
>> + dma->period_size * 2,
>> + dma->period_size, DMA_DEV_TO_MEM,
>> + DMA_PREP_INTERRUPT);
>> +if (!desc)
>> +return -EBUSY;
>> +
>> +desc->callback = tiadc_dma_rx_complete;
>> +desc->callback_param = indio_dev;
>> +
>> +dma->cookie = dmaengine_submit(desc);
>> +
>> +dma_async_issue_pending(dma->chan);
>> +
>> +tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thre
Re: [PATCH v3 2/4] drivers: iio: ti_am335x_adc: add dma support
On Sunday 09 October 2016 02:00 PM, Jonathan Cameron wrote:
> On 05/10/16 10:04, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N
> Hi,
>
> Just the one question inline. I'll also need an Ack from Lee as
> this touches code in mfd (as does the previous patch).
> We have obviously missed this merge window, so no particular rush.
>
> Otherwise, looking very nice indeed. Got to get my BBB out and play
> with this now ;)
>
> Jonathan
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 148
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 152 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..ad9dec3 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,28 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +int current_period;
>> +int period_size;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->buf + dma->current_period * dma->period_size;
>> +dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
>> +
>> +for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
> Hmm. Another case for the mooted iio_push_to_buffers_multi. Guess
> we should move on with that one ;)
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->current_period = 0; /* We start to fill period 0 */
>> +/*
>> + * Make the fifo thresh as the multiple of total number of
>> + * channels enabled, so make sure that cyclic DMA period
>> + * length is also a multiple of total number of channels
>> + * enabled. This ensures that no invalid data is reported
>> + * to the stack via iio_push_to_buffers().
>> + */
>> +dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
>> + adc_dev->total_ch_enabled) - 1;
>> +/* Make sure that period length is multiple of fifo thresh level */
>> +dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
>> +(dma->fifo_thresh + 1) * sizeof(u16));
>> +
>> +dma->conf.src_maxburst = dma->fifo_thresh + 1;
>> +dmaengine_slave_config(dma->chan, >conf);
>> +
>> +desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
>> + dma->period_size * 2,
>> + dma->period_size, DMA_DEV_TO_MEM,
>> + DMA_PREP_INTERRUPT);
>> +if (!desc)
>> +return -EBUSY;
>> +
>> +desc->callback = tiadc_dma_rx_complete;
>> +desc->callback_param = indio_dev;
>> +
>> +dma->cookie = dmaengine_submit(desc);
>> +
>> +dma_async_issue_pending(dma->chan);
>> +
>> +tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
>> +tiadc_writel(adc_dev, REG_DM
Re: [v2] tty: serial_core: Fix serial console crash on port shutdown
On Tuesday 18 October 2016 10:05 PM, Geert Uytterhoeven wrote:
> The port->console flag is always false, as uart_console() is called
> before the serial console has been registered.
>
> Hence for a serial port used as the console, uart_tty_port_shutdown()
> will still be called when userspace closes the port, powering it down.
> This may lead to a system lock up when the serial console driver writes
> to the serial port's registers.
>
> To fix this, move the setting of port->console after the call to
> uart_configure_port(), which registers the serial console.
>
> Fixes: 761ed4a94582ab29 ("tty: serial_core: convert uart_close to use
> tty_port_close")
> Reported-by: Niklas Söderlund <niklas.soderlund+rene...@ragnatech.se>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> Acked-by: Rob Herring <r...@kernel.org>
Fixes some junk characters seen on boot console on TI platforms.
Tested-by: Mugunthan V N <mugunthan...@ti.com>
Regards
Mugunthan V N
> ---
> v2:
> - Add Acked-by,
> - Reworded one-line summary (incl. magic word "fix").
>
> Can easily be reproduced on Renesas boards:
> 1. With systemd: hangs during boot,
> 2. Without systemd: "telinit n" to switch to a runlevel that doesn't
> run a getty on ttySC0, and trigger kernel console output => hang.
> ---
> drivers/tty/serial/serial_core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/serial_core.c
> b/drivers/tty/serial/serial_core.c
> index 6e4f63627479db8d..ce8899c13af3d97f 100644
> --- a/drivers/tty/serial/serial_core.c
> +++ b/drivers/tty/serial/serial_core.c
> @@ -2746,8 +2746,6 @@ int uart_add_one_port(struct uart_driver *drv, struct
> uart_port *uport)
> uport->cons = drv->cons;
> uport->minor = drv->tty_driver->minor_start + uport->line;
>
> - port->console = uart_console(uport);
> -
> /*
>* If this port is a console, then the spinlock is already
>* initialised.
> @@ -2761,6 +2759,8 @@ int uart_add_one_port(struct uart_driver *drv, struct
> uart_port *uport)
>
> uart_configure_port(drv, state, uport);
>
> + port->console = uart_console(uport);
> +
> num_groups = 2;
> if (uport->attr_group)
> num_groups++;
>
Re: [v2] tty: serial_core: Fix serial console crash on port shutdown
On Tuesday 18 October 2016 10:05 PM, Geert Uytterhoeven wrote:
> The port->console flag is always false, as uart_console() is called
> before the serial console has been registered.
>
> Hence for a serial port used as the console, uart_tty_port_shutdown()
> will still be called when userspace closes the port, powering it down.
> This may lead to a system lock up when the serial console driver writes
> to the serial port's registers.
>
> To fix this, move the setting of port->console after the call to
> uart_configure_port(), which registers the serial console.
>
> Fixes: 761ed4a94582ab29 ("tty: serial_core: convert uart_close to use
> tty_port_close")
> Reported-by: Niklas Söderlund
> Signed-off-by: Geert Uytterhoeven
> Acked-by: Rob Herring
Fixes some junk characters seen on boot console on TI platforms.
Tested-by: Mugunthan V N
Regards
Mugunthan V N
> ---
> v2:
> - Add Acked-by,
> - Reworded one-line summary (incl. magic word "fix").
>
> Can easily be reproduced on Renesas boards:
> 1. With systemd: hangs during boot,
> 2. Without systemd: "telinit n" to switch to a runlevel that doesn't
> run a getty on ttySC0, and trigger kernel console output => hang.
> ---
> drivers/tty/serial/serial_core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/serial_core.c
> b/drivers/tty/serial/serial_core.c
> index 6e4f63627479db8d..ce8899c13af3d97f 100644
> --- a/drivers/tty/serial/serial_core.c
> +++ b/drivers/tty/serial/serial_core.c
> @@ -2746,8 +2746,6 @@ int uart_add_one_port(struct uart_driver *drv, struct
> uart_port *uport)
> uport->cons = drv->cons;
> uport->minor = drv->tty_driver->minor_start + uport->line;
>
> - port->console = uart_console(uport);
> -
> /*
>* If this port is a console, then the spinlock is already
>* initialised.
> @@ -2761,6 +2759,8 @@ int uart_add_one_port(struct uart_driver *drv, struct
> uart_port *uport)
>
> uart_configure_port(drv, state, uport);
>
> + port->console = uart_console(uport);
> +
> num_groups = 2;
> if (uport->attr_group)
> num_groups++;
>
seeing some junk characters on boot console with v4.9-rc1-3-g14155ca
Hi I am seeing some junk characters on uart boot console on DRA72x platform [1] and even on other TI platforms, did a bisect and found the commit "761ed4a94582" broke it first. By reverting below two commit, I don't see the issue logs [2]. 761ed4a94582 "tty:serial_core: convert uart_close to use tty_port_close" a5a2b13074fd "serial: core: fix potential NULL pointer dereference" [1] - http://pastebin.ubuntu.com/23343431/ [2] - http://pastebin.ubuntu.com/23343435/ Regards Mugunthan V N
seeing some junk characters on boot console with v4.9-rc1-3-g14155ca
Hi I am seeing some junk characters on uart boot console on DRA72x platform [1] and even on other TI platforms, did a bisect and found the commit "761ed4a94582" broke it first. By reverting below two commit, I don't see the issue logs [2]. 761ed4a94582 "tty:serial_core: convert uart_close to use tty_port_close" a5a2b13074fd "serial: core: fix potential NULL pointer dereference" [1] - http://pastebin.ubuntu.com/23343431/ [2] - http://pastebin.ubuntu.com/23343435/ Regards Mugunthan V N
[PATCH v4 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..1b63924 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.1.445.g3cdd5d1
[PATCH v4 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..1b63924 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.1.445.g3cdd5d1
[PATCH v4 3/4] ARM: dts: dra72-evm-revc: add phy impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index 064b322..5450367 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.1.445.g3cdd5d1
[PATCH v4 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index 5450367..3b23b32 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.1.445.g3cdd5d1
[PATCH v4 3/4] ARM: dts: dra72-evm-revc: add phy impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index 064b322..5450367 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.1.445.g3cdd5d1
[PATCH v4 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index 5450367..3b23b32 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.1.445.g3cdd5d1
[PATCH v4 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from v3: * Fixup change log text and no code changes. Changes from v2: * Fixed a typo in dts and driver. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23343139/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v4 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: add phy impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.1.445.g3cdd5d1
[PATCH v4 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from v3: * Fixup change log text and no code changes. Changes from v2: * Fixed a typo in dts and driver. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23343139/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v4 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: add phy impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.1.445.g3cdd5d1
[PATCH v4 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,min-output-impedance and ti,max-output-impedance which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.1.445.g3cdd5d1
[PATCH v4 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,min-output-impedance and ti,max-output-impedance which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.1.445.g3cdd5d1
Re: [PATCH v3 1/4] net: phy: dp83867: Add documentation for optional impedance control
On Monday 10 October 2016 06:48 PM, Rob Herring wrote: > On Thu, Oct 06, 2016 at 10:43:52AM +0530, Mugunthan V N wrote: >> Add documention of ti,impedance-control which can be used to > > Needs updating. Oops, will update this in next version. > >> correct MAC impedance mismatch using phy extended registers. >> >> Signed-off-by: Mugunthan V N <mugunthan...@ti.com> >> --- >> Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 >> 1 file changed, 12 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt >> b/Documentation/devicetree/bindings/net/ti,dp83867.txt >> index 5d21141..85bf945 100644 >> --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt >> +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt >> @@ -9,6 +9,18 @@ Required properties: >> - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h >> for applicable values >> >> +Optional property: >> +- ti,min-output-impedance - MAC Interface Impedance control to set >> +the programmable output impedance to >> +minimum value (35 ohms). >> +- ti,max-output-impedance - MAC Interface Impedance control to set >> +the programmable output impedance to >> +maximum value (70 ohms). > > Define what are valid range of values for these. The values are already mentioned in documentation as 35/70 ohms. Are you mentioning about the register values? Regards Mugunthan V N
Re: [PATCH v3 1/4] net: phy: dp83867: Add documentation for optional impedance control
On Monday 10 October 2016 06:48 PM, Rob Herring wrote: > On Thu, Oct 06, 2016 at 10:43:52AM +0530, Mugunthan V N wrote: >> Add documention of ti,impedance-control which can be used to > > Needs updating. Oops, will update this in next version. > >> correct MAC impedance mismatch using phy extended registers. >> >> Signed-off-by: Mugunthan V N >> --- >> Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 >> 1 file changed, 12 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt >> b/Documentation/devicetree/bindings/net/ti,dp83867.txt >> index 5d21141..85bf945 100644 >> --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt >> +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt >> @@ -9,6 +9,18 @@ Required properties: >> - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h >> for applicable values >> >> +Optional property: >> +- ti,min-output-impedance - MAC Interface Impedance control to set >> +the programmable output impedance to >> +minimum value (35 ohms). >> +- ti,max-output-impedance - MAC Interface Impedance control to set >> +the programmable output impedance to >> +maximum value (70 ohms). > > Define what are valid range of values for these. The values are already mentioned in documentation as 35/70 ohms. Are you mentioning about the register values? Regards Mugunthan V N
[PATCH v3 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..1b63924 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.0.372.g6fe1b14
[PATCH v3 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..1b63924 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.0.372.g6fe1b14
[PATCH v3 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,impedance-control which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.0.372.g6fe1b14
[PATCH v3 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,impedance-control which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.0.372.g6fe1b14
[PATCH v3 3/4] ARM: dts: dra72-evm-revc: add phy impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3b..aafb594 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.0.372.g6fe1b14
[PATCH v3 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from v2: * Fixed a typo in dts and driver. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23283056/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v3 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: add phy impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v3 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index aafb594..01e1f39 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.0.372.g6fe1b14
[PATCH v3 3/4] ARM: dts: dra72-evm-revc: add phy impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3b..aafb594 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.0.372.g6fe1b14
[PATCH v3 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from v2: * Fixed a typo in dts and driver. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23283056/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v3 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: add phy impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v3 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index aafb594..01e1f39 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-impedance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.0.372.g6fe1b14
[PATCH v3 2/4] drivers: iio: ti_am335x_adc: add dma support
This patch adds the required pieces to ti_am335x_adc driver for
DMA support
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/iio/adc/ti_am335x_adc.c | 148 ++-
include/linux/mfd/ti_am335x_tscadc.h | 7 ++
2 files changed, 152 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index c3cfacca..ad9dec3 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -30,10 +30,28 @@
#include
#include
+#include
+#include
+
+#define DMA_BUFFER_SIZESZ_2K
+
+struct tiadc_dma {
+ struct dma_slave_config conf;
+ struct dma_chan *chan;
+ dma_addr_t addr;
+ dma_cookie_tcookie;
+ u8 *buf;
+ int current_period;
+ int period_size;
+ u8 fifo_thresh;
+};
+
struct tiadc_device {
struct ti_tscadc_dev *mfd_tscadc;
+ struct tiadc_dma dma;
struct mutex fifo1_lock; /* to protect fifo access */
int channels;
+ int total_ch_enabled;
u8 channel_line[8];
u8 channel_step[8];
int buffer_en_ch_steps;
@@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
return IRQ_HANDLED;
}
+static void tiadc_dma_rx_complete(void *param)
+{
+ struct iio_dev *indio_dev = param;
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ u8 *data;
+ int i;
+
+ data = dma->buf + dma->current_period * dma->period_size;
+ dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
+
+ for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
+ iio_push_to_buffers(indio_dev, data);
+ data += indio_dev->scan_bytes;
+ }
+}
+
+static int tiadc_start_dma(struct iio_dev *indio_dev)
+{
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ struct dma_async_tx_descriptor *desc;
+
+ dma->current_period = 0; /* We start to fill period 0 */
+ /*
+* Make the fifo thresh as the multiple of total number of
+* channels enabled, so make sure that cyclic DMA period
+* length is also a multiple of total number of channels
+* enabled. This ensures that no invalid data is reported
+* to the stack via iio_push_to_buffers().
+*/
+ dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
+adc_dev->total_ch_enabled) - 1;
+ /* Make sure that period length is multiple of fifo thresh level */
+ dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
+ (dma->fifo_thresh + 1) * sizeof(u16));
+
+ dma->conf.src_maxburst = dma->fifo_thresh + 1;
+ dmaengine_slave_config(dma->chan, >conf);
+
+ desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
+dma->period_size * 2,
+dma->period_size, DMA_DEV_TO_MEM,
+DMA_PREP_INTERRUPT);
+ if (!desc)
+ return -EBUSY;
+
+ desc->callback = tiadc_dma_rx_complete;
+ desc->callback_param = indio_dev;
+
+ dma->cookie = dmaengine_submit(desc);
+
+ dma_async_issue_pending(dma->chan);
+
+ tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);
+
+ return 0;
+}
+
static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
@@ -218,20 +297,30 @@ static int tiadc_buffer_preenable(struct iio_dev
*indio_dev)
static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ unsigned int irq_enable;
unsigned int enb = 0;
u8 bit;
tiadc_step_config(indio_dev);
- for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
+ for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {
enb |= (get_adc_step_bit(adc_dev, bit) << 1);
+ adc_dev->total_ch_enabled++;
+ }
adc_dev->buffer_en_ch_steps = enb;
+ if (dma->chan)
+ tiadc_start_dma(indio_dev);
+
am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
- tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FI
[PATCH v3 2/4] drivers: iio: ti_am335x_adc: add dma support
This patch adds the required pieces to ti_am335x_adc driver for
DMA support
Signed-off-by: Mugunthan V N
---
drivers/iio/adc/ti_am335x_adc.c | 148 ++-
include/linux/mfd/ti_am335x_tscadc.h | 7 ++
2 files changed, 152 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index c3cfacca..ad9dec3 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -30,10 +30,28 @@
#include
#include
+#include
+#include
+
+#define DMA_BUFFER_SIZESZ_2K
+
+struct tiadc_dma {
+ struct dma_slave_config conf;
+ struct dma_chan *chan;
+ dma_addr_t addr;
+ dma_cookie_tcookie;
+ u8 *buf;
+ int current_period;
+ int period_size;
+ u8 fifo_thresh;
+};
+
struct tiadc_device {
struct ti_tscadc_dev *mfd_tscadc;
+ struct tiadc_dma dma;
struct mutex fifo1_lock; /* to protect fifo access */
int channels;
+ int total_ch_enabled;
u8 channel_line[8];
u8 channel_step[8];
int buffer_en_ch_steps;
@@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
return IRQ_HANDLED;
}
+static void tiadc_dma_rx_complete(void *param)
+{
+ struct iio_dev *indio_dev = param;
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ u8 *data;
+ int i;
+
+ data = dma->buf + dma->current_period * dma->period_size;
+ dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
+
+ for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
+ iio_push_to_buffers(indio_dev, data);
+ data += indio_dev->scan_bytes;
+ }
+}
+
+static int tiadc_start_dma(struct iio_dev *indio_dev)
+{
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ struct dma_async_tx_descriptor *desc;
+
+ dma->current_period = 0; /* We start to fill period 0 */
+ /*
+* Make the fifo thresh as the multiple of total number of
+* channels enabled, so make sure that cyclic DMA period
+* length is also a multiple of total number of channels
+* enabled. This ensures that no invalid data is reported
+* to the stack via iio_push_to_buffers().
+*/
+ dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
+adc_dev->total_ch_enabled) - 1;
+ /* Make sure that period length is multiple of fifo thresh level */
+ dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
+ (dma->fifo_thresh + 1) * sizeof(u16));
+
+ dma->conf.src_maxburst = dma->fifo_thresh + 1;
+ dmaengine_slave_config(dma->chan, >conf);
+
+ desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
+dma->period_size * 2,
+dma->period_size, DMA_DEV_TO_MEM,
+DMA_PREP_INTERRUPT);
+ if (!desc)
+ return -EBUSY;
+
+ desc->callback = tiadc_dma_rx_complete;
+ desc->callback_param = indio_dev;
+
+ dma->cookie = dmaengine_submit(desc);
+
+ dma_async_issue_pending(dma->chan);
+
+ tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);
+
+ return 0;
+}
+
static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
@@ -218,20 +297,30 @@ static int tiadc_buffer_preenable(struct iio_dev
*indio_dev)
static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ unsigned int irq_enable;
unsigned int enb = 0;
u8 bit;
tiadc_step_config(indio_dev);
- for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
+ for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {
enb |= (get_adc_step_bit(adc_dev, bit) << 1);
+ adc_dev->total_ch_enabled++;
+ }
adc_dev->buffer_en_ch_steps = enb;
+ if (dma->chan)
+ tiadc_start_dma(indio_dev);
+
am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
- tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
-
[PATCH v3 4/4] ARM: dts: am4372: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0fadae5..6094d17 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -867,6 +867,8 @@
clocks = <_tsc_fck>;
clock-names = "fck";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v3 3/4] ARM: dts: am33xx: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 98748c6..6d607b8 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -917,6 +917,8 @@
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v3 4/4] ARM: dts: am4372: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0fadae5..6094d17 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -867,6 +867,8 @@
clocks = <_tsc_fck>;
clock-names = "fck";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v3 3/4] ARM: dts: am33xx: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 98748c6..6d607b8 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -917,6 +917,8 @@
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v3 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 word depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [1]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [2] to enable ADC and pushed a branch for testing [3] Changes from v2: * Fixed an issue on handling of error return from dma_request_chan(). Changes from Initial version: * Changed DMA api from dma_request_slave_channel_compat() to dma_request_chan() * Changed variable names to have more clear information as per comments from Peter. [1] - http://pastebin.ubuntu.com/23278405/ [2] - http://pastebin.ubuntu.com/23211494/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma-v2 Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 148 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 158 insertions(+), 3 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v3 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 word depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [1]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [2] to enable ADC and pushed a branch for testing [3] Changes from v2: * Fixed an issue on handling of error return from dma_request_chan(). Changes from Initial version: * Changed DMA api from dma_request_slave_channel_compat() to dma_request_chan() * Changed variable names to have more clear information as per comments from Peter. [1] - http://pastebin.ubuntu.com/23278405/ [2] - http://pastebin.ubuntu.com/23211494/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma-v2 Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 148 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 158 insertions(+), 3 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v3 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.372.g6fe1b14
[PATCH v3 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.372.g6fe1b14
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Wednesday 05 October 2016 02:16 PM, Peter Ujfalusi wrote:
> On 10/05/16 11:17, Mugunthan V N wrote:
>> On Wednesday 05 October 2016 12:01 PM, Peter Ujfalusi wrote:
>>> On 10/05/16 09:21, Mugunthan V N wrote:
>>>> On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
>>>>> On 10/03/16 16:03, Mugunthan V N wrote:
>>>>>> +static int tiadc_request_dma(struct platform_device *pdev,
>>>>>> + struct tiadc_device *adc_dev)
>>>>>> +{
>>>>>> +struct tiadc_dma*dma = _dev->dma;
>>>>>> +dma_cap_mask_t mask;
>>>>>> +
>>>>>> +/* Default slave configuration parameters */
>>>>>> +dma->conf.direction = DMA_DEV_TO_MEM;
>>>>>> +dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>>>>>> +dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base +
>>>>>> REG_FIFO1;
>>>>>> +
>>>>>> +dma_cap_zero(mask);
>>>>>> +dma_cap_set(DMA_CYCLIC, mask);
>>>>>> +
>>>>>> +/* Get a channel for RX */
>>>>>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>>>> +if (!dma->chan)
>>>>>> +return -ENODEV;
>>>>>
>>>>> dma_request_chan() ERR_PTR in case of failure, never NULL. You should
>>>>> reuse
>>>>> the returned error code to support deferred probing.
>>>>
>>>> Will fix this in v3.
>>>>
>>>>>
>>>>>> +
>>>>>> +/* RX buffer */
>>>>>> +dma->buf = dma_alloc_coherent(dma->chan->device->dev,
>>>>>> DMA_BUFFER_SIZE,
>>>>>> + >addr, GFP_KERNEL);
>>>>>> +if (!dma->buf)
>>>>>> +goto err;
>>>>>> +
>>>>>> +return 0;
>>>>>> +err:
>>>>>> +dma_release_channel(dma->chan);
>>>>>> +
>>>>>> +return -ENOMEM;
>>>>>> +}
>>>>>> +
>>>>>> static int tiadc_parse_dt(struct platform_device *pdev,
>>>>>>struct tiadc_device *adc_dev)
>>>>>> {
>>>>>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>>>>>
>>>>>> platform_set_drvdata(pdev, indio_dev);
>>>>>>
>>>>>> +err = tiadc_request_dma(pdev, adc_dev);
>>>>>> +if (err && err != -ENODEV)
>>>>>> +goto err_dma;
>>>>>
>>>>> You should handle the deferred probing for DMA channel.
>>>>
>>>> + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>> + if (IS_ERR(dma->chan)) {
>>>> + int ret = PTR_ERR(dma->chan);
>>>> +
>>>> + dma->chan = NULL;
>>>> + return ret;
>>>
>>> You don't need the 'ret' variable:
>>> return PTR_ERR(dma->chan);
>>
>> So you mean change all *if (dma->chan)* to *if (IS_ERR(dma->chan))*?
>
> Oh, sorry. Your version was fine as you NULL the dma->chan before the return.
>
>>
>>>
>>>> + }
>>>>
>>>> With this probe defer will be taken care and ADC will continue without
>>>> DMA when request channel returns -ENODEV.
>>>
>>> I would rather have explicit check for deferred probe:
>>>
>>> err = tiadc_request_dma(pdev, adc_dev);
>>> if (err && err == -EPROBE_DEFER)
>>> goto err_dma;
>>
>> But in this case any other failure other than -EPROBE_DEFER will be
>> masked and ADC will be in PIO mode?
>
> Yes, exactly. If we fail to get the DMA channel we should not use the DMA and
> we only want to handle the deferred probing.
>
Okay, will update accordingly in next version.
Regards
Mugunthan V N
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Wednesday 05 October 2016 02:16 PM, Peter Ujfalusi wrote:
> On 10/05/16 11:17, Mugunthan V N wrote:
>> On Wednesday 05 October 2016 12:01 PM, Peter Ujfalusi wrote:
>>> On 10/05/16 09:21, Mugunthan V N wrote:
>>>> On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
>>>>> On 10/03/16 16:03, Mugunthan V N wrote:
>>>>>> +static int tiadc_request_dma(struct platform_device *pdev,
>>>>>> + struct tiadc_device *adc_dev)
>>>>>> +{
>>>>>> +struct tiadc_dma*dma = _dev->dma;
>>>>>> +dma_cap_mask_t mask;
>>>>>> +
>>>>>> +/* Default slave configuration parameters */
>>>>>> +dma->conf.direction = DMA_DEV_TO_MEM;
>>>>>> +dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>>>>>> +dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base +
>>>>>> REG_FIFO1;
>>>>>> +
>>>>>> +dma_cap_zero(mask);
>>>>>> +dma_cap_set(DMA_CYCLIC, mask);
>>>>>> +
>>>>>> +/* Get a channel for RX */
>>>>>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>>>> +if (!dma->chan)
>>>>>> +return -ENODEV;
>>>>>
>>>>> dma_request_chan() ERR_PTR in case of failure, never NULL. You should
>>>>> reuse
>>>>> the returned error code to support deferred probing.
>>>>
>>>> Will fix this in v3.
>>>>
>>>>>
>>>>>> +
>>>>>> +/* RX buffer */
>>>>>> +dma->buf = dma_alloc_coherent(dma->chan->device->dev,
>>>>>> DMA_BUFFER_SIZE,
>>>>>> + >addr, GFP_KERNEL);
>>>>>> +if (!dma->buf)
>>>>>> +goto err;
>>>>>> +
>>>>>> +return 0;
>>>>>> +err:
>>>>>> +dma_release_channel(dma->chan);
>>>>>> +
>>>>>> +return -ENOMEM;
>>>>>> +}
>>>>>> +
>>>>>> static int tiadc_parse_dt(struct platform_device *pdev,
>>>>>>struct tiadc_device *adc_dev)
>>>>>> {
>>>>>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>>>>>
>>>>>> platform_set_drvdata(pdev, indio_dev);
>>>>>>
>>>>>> +err = tiadc_request_dma(pdev, adc_dev);
>>>>>> +if (err && err != -ENODEV)
>>>>>> +goto err_dma;
>>>>>
>>>>> You should handle the deferred probing for DMA channel.
>>>>
>>>> + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>> + if (IS_ERR(dma->chan)) {
>>>> + int ret = PTR_ERR(dma->chan);
>>>> +
>>>> + dma->chan = NULL;
>>>> + return ret;
>>>
>>> You don't need the 'ret' variable:
>>> return PTR_ERR(dma->chan);
>>
>> So you mean change all *if (dma->chan)* to *if (IS_ERR(dma->chan))*?
>
> Oh, sorry. Your version was fine as you NULL the dma->chan before the return.
>
>>
>>>
>>>> + }
>>>>
>>>> With this probe defer will be taken care and ADC will continue without
>>>> DMA when request channel returns -ENODEV.
>>>
>>> I would rather have explicit check for deferred probe:
>>>
>>> err = tiadc_request_dma(pdev, adc_dev);
>>> if (err && err == -EPROBE_DEFER)
>>> goto err_dma;
>>
>> But in this case any other failure other than -EPROBE_DEFER will be
>> masked and ADC will be in PIO mode?
>
> Yes, exactly. If we fail to get the DMA channel we should not use the DMA and
> we only want to handle the deferred probing.
>
Okay, will update accordingly in next version.
Regards
Mugunthan V N
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Wednesday 05 October 2016 12:01 PM, Peter Ujfalusi wrote:
> On 10/05/16 09:21, Mugunthan V N wrote:
>> On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
>>> On 10/03/16 16:03, Mugunthan V N wrote:
>>>> +static int tiadc_request_dma(struct platform_device *pdev,
>>>> + struct tiadc_device *adc_dev)
>>>> +{
>>>> + struct tiadc_dma*dma = _dev->dma;
>>>> + dma_cap_mask_t mask;
>>>> +
>>>> + /* Default slave configuration parameters */
>>>> + dma->conf.direction = DMA_DEV_TO_MEM;
>>>> + dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>>>> + dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;
>>>> +
>>>> + dma_cap_zero(mask);
>>>> + dma_cap_set(DMA_CYCLIC, mask);
>>>> +
>>>> + /* Get a channel for RX */
>>>> + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>> + if (!dma->chan)
>>>> + return -ENODEV;
>>>
>>> dma_request_chan() ERR_PTR in case of failure, never NULL. You should reuse
>>> the returned error code to support deferred probing.
>>
>> Will fix this in v3.
>>
>>>
>>>> +
>>>> + /* RX buffer */
>>>> + dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>>>> +>addr, GFP_KERNEL);
>>>> + if (!dma->buf)
>>>> + goto err;
>>>> +
>>>> + return 0;
>>>> +err:
>>>> + dma_release_channel(dma->chan);
>>>> +
>>>> + return -ENOMEM;
>>>> +}
>>>> +
>>>> static int tiadc_parse_dt(struct platform_device *pdev,
>>>> struct tiadc_device *adc_dev)
>>>> {
>>>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>>>
>>>>platform_set_drvdata(pdev, indio_dev);
>>>>
>>>> + err = tiadc_request_dma(pdev, adc_dev);
>>>> + if (err && err != -ENODEV)
>>>> + goto err_dma;
>>>
>>> You should handle the deferred probing for DMA channel.
>>
>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>> +if (IS_ERR(dma->chan)) {
>> +int ret = PTR_ERR(dma->chan);
>> +
>> +dma->chan = NULL;
>> +return ret;
>
> You don't need the 'ret' variable:
> return PTR_ERR(dma->chan);
So you mean change all *if (dma->chan)* to *if (IS_ERR(dma->chan))*?
>
>> +}
>>
>> With this probe defer will be taken care and ADC will continue without
>> DMA when request channel returns -ENODEV.
>
> I would rather have explicit check for deferred probe:
>
> err = tiadc_request_dma(pdev, adc_dev);
> if (err && err == -EPROBE_DEFER)
> goto err_dma;
But in this case any other failure other than -EPROBE_DEFER will be
masked and ADC will be in PIO mode?
Regards
Mugunthan V N
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Wednesday 05 October 2016 12:01 PM, Peter Ujfalusi wrote:
> On 10/05/16 09:21, Mugunthan V N wrote:
>> On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
>>> On 10/03/16 16:03, Mugunthan V N wrote:
>>>> +static int tiadc_request_dma(struct platform_device *pdev,
>>>> + struct tiadc_device *adc_dev)
>>>> +{
>>>> + struct tiadc_dma*dma = _dev->dma;
>>>> + dma_cap_mask_t mask;
>>>> +
>>>> + /* Default slave configuration parameters */
>>>> + dma->conf.direction = DMA_DEV_TO_MEM;
>>>> + dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>>>> + dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;
>>>> +
>>>> + dma_cap_zero(mask);
>>>> + dma_cap_set(DMA_CYCLIC, mask);
>>>> +
>>>> + /* Get a channel for RX */
>>>> + dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>>>> + if (!dma->chan)
>>>> + return -ENODEV;
>>>
>>> dma_request_chan() ERR_PTR in case of failure, never NULL. You should reuse
>>> the returned error code to support deferred probing.
>>
>> Will fix this in v3.
>>
>>>
>>>> +
>>>> + /* RX buffer */
>>>> + dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>>>> +>addr, GFP_KERNEL);
>>>> + if (!dma->buf)
>>>> + goto err;
>>>> +
>>>> + return 0;
>>>> +err:
>>>> + dma_release_channel(dma->chan);
>>>> +
>>>> + return -ENOMEM;
>>>> +}
>>>> +
>>>> static int tiadc_parse_dt(struct platform_device *pdev,
>>>> struct tiadc_device *adc_dev)
>>>> {
>>>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>>>
>>>>platform_set_drvdata(pdev, indio_dev);
>>>>
>>>> + err = tiadc_request_dma(pdev, adc_dev);
>>>> + if (err && err != -ENODEV)
>>>> + goto err_dma;
>>>
>>> You should handle the deferred probing for DMA channel.
>>
>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>> +if (IS_ERR(dma->chan)) {
>> +int ret = PTR_ERR(dma->chan);
>> +
>> +dma->chan = NULL;
>> +return ret;
>
> You don't need the 'ret' variable:
> return PTR_ERR(dma->chan);
So you mean change all *if (dma->chan)* to *if (IS_ERR(dma->chan))*?
>
>> +}
>>
>> With this probe defer will be taken care and ADC will continue without
>> DMA when request channel returns -ENODEV.
>
> I would rather have explicit check for deferred probe:
>
> err = tiadc_request_dma(pdev, adc_dev);
> if (err && err == -EPROBE_DEFER)
> goto err_dma;
But in this case any other failure other than -EPROBE_DEFER will be
masked and ADC will be in PIO mode?
Regards
Mugunthan V N
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
> On 10/03/16 16:03, Mugunthan V N wrote:
>> +static int tiadc_request_dma(struct platform_device *pdev,
>> + struct tiadc_device *adc_dev)
>> +{
>> +struct tiadc_dma*dma = _dev->dma;
>> +dma_cap_mask_t mask;
>> +
>> +/* Default slave configuration parameters */
>> +dma->conf.direction = DMA_DEV_TO_MEM;
>> +dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> +dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;
>> +
>> +dma_cap_zero(mask);
>> +dma_cap_set(DMA_CYCLIC, mask);
>> +
>> +/* Get a channel for RX */
>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>> +if (!dma->chan)
>> +return -ENODEV;
>
> dma_request_chan() ERR_PTR in case of failure, never NULL. You should reuse
> the returned error code to support deferred probing.
Will fix this in v3.
>
>> +
>> +/* RX buffer */
>> +dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>> + >addr, GFP_KERNEL);
>> +if (!dma->buf)
>> +goto err;
>> +
>> +return 0;
>> +err:
>> +dma_release_channel(dma->chan);
>> +
>> +return -ENOMEM;
>> +}
>> +
>> static int tiadc_parse_dt(struct platform_device *pdev,
>>struct tiadc_device *adc_dev)
>> {
>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>
>> platform_set_drvdata(pdev, indio_dev);
>>
>> +err = tiadc_request_dma(pdev, adc_dev);
>> +if (err && err != -ENODEV)
>> +goto err_dma;
>
> You should handle the deferred probing for DMA channel.
+ dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
+ if (IS_ERR(dma->chan)) {
+ int ret = PTR_ERR(dma->chan);
+
+ dma->chan = NULL;
+ return ret;
+ }
With this probe defer will be taken care and ADC will continue without
DMA when request channel returns -ENODEV.
Regards
Mugunthan V N
>
>> +
>> return 0;
>>
>> +err_dma:
>> +iio_device_unregister(indio_dev);
>> err_buffer_unregister:
>> tiadc_iio_buffered_hardware_remove(indio_dev);
>> err_free_channels:
>> @@ -525,8 +658,14 @@ static int tiadc_remove(struct platform_device *pdev)
>> {
>> struct iio_dev *indio_dev = platform_get_drvdata(pdev);
>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> u32 step_en;
>>
>> +if (dma->chan) {
>> +dma_free_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>> + dma->buf, dma->addr);
>> +dma_release_channel(dma->chan);
>> +}
>> iio_device_unregister(indio_dev);
>> tiadc_iio_buffered_hardware_remove(indio_dev);
>> tiadc_channels_remove(indio_dev);
>> diff --git a/include/linux/mfd/ti_am335x_tscadc.h
>> b/include/linux/mfd/ti_am335x_tscadc.h
>> index e45a208..b9a53e0 100644
>> --- a/include/linux/mfd/ti_am335x_tscadc.h
>> +++ b/include/linux/mfd/ti_am335x_tscadc.h
>> @@ -23,6 +23,8 @@
>> #define REG_IRQENABLE 0x02C
>> #define REG_IRQCLR 0x030
>> #define REG_IRQWAKEUP 0x034
>> +#define REG_DMAENABLE_SET 0x038
>> +#define REG_DMAENABLE_CLEAR 0x03c
>> #define REG_CTRL0x040
>> #define REG_ADCFSM 0x044
>> #define REG_CLKDIV 0x04C
>> @@ -36,6 +38,7 @@
>> #define REG_FIFO0THR0xE8
>> #define REG_FIFO1CNT0xF0
>> #define REG_FIFO1THR0xF4
>> +#define REG_DMA1REQ 0xF8
>> #define REG_FIFO0 0x100
>> #define REG_FIFO1 0x200
>>
>> @@ -126,6 +129,10 @@
>> #define FIFOREAD_DATA_MASK (0xfff << 0)
>> #define FIFOREAD_CHNLID_MASK (0xf << 16)
>>
>> +/* DMA ENABLE/CLEAR Register */
>> +#define DMA_FIFO0 BIT(0)
>> +#define DMA_FIFO1 BIT(1)
>> +
>> /* Sequencer Status */
>> #define SEQ_STATUS BIT(5)
>> #define CHARGE_STEP 0x11
>>
>
>
Re: [PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
On Tuesday 04 October 2016 02:02 PM, Peter Ujfalusi wrote:
> On 10/03/16 16:03, Mugunthan V N wrote:
>> +static int tiadc_request_dma(struct platform_device *pdev,
>> + struct tiadc_device *adc_dev)
>> +{
>> +struct tiadc_dma*dma = _dev->dma;
>> +dma_cap_mask_t mask;
>> +
>> +/* Default slave configuration parameters */
>> +dma->conf.direction = DMA_DEV_TO_MEM;
>> +dma->conf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> +dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;
>> +
>> +dma_cap_zero(mask);
>> +dma_cap_set(DMA_CYCLIC, mask);
>> +
>> +/* Get a channel for RX */
>> +dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
>> +if (!dma->chan)
>> +return -ENODEV;
>
> dma_request_chan() ERR_PTR in case of failure, never NULL. You should reuse
> the returned error code to support deferred probing.
Will fix this in v3.
>
>> +
>> +/* RX buffer */
>> +dma->buf = dma_alloc_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>> + >addr, GFP_KERNEL);
>> +if (!dma->buf)
>> +goto err;
>> +
>> +return 0;
>> +err:
>> +dma_release_channel(dma->chan);
>> +
>> +return -ENOMEM;
>> +}
>> +
>> static int tiadc_parse_dt(struct platform_device *pdev,
>>struct tiadc_device *adc_dev)
>> {
>> @@ -512,8 +639,14 @@ static int tiadc_probe(struct platform_device *pdev)
>>
>> platform_set_drvdata(pdev, indio_dev);
>>
>> +err = tiadc_request_dma(pdev, adc_dev);
>> +if (err && err != -ENODEV)
>> +goto err_dma;
>
> You should handle the deferred probing for DMA channel.
+ dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");
+ if (IS_ERR(dma->chan)) {
+ int ret = PTR_ERR(dma->chan);
+
+ dma->chan = NULL;
+ return ret;
+ }
With this probe defer will be taken care and ADC will continue without
DMA when request channel returns -ENODEV.
Regards
Mugunthan V N
>
>> +
>> return 0;
>>
>> +err_dma:
>> +iio_device_unregister(indio_dev);
>> err_buffer_unregister:
>> tiadc_iio_buffered_hardware_remove(indio_dev);
>> err_free_channels:
>> @@ -525,8 +658,14 @@ static int tiadc_remove(struct platform_device *pdev)
>> {
>> struct iio_dev *indio_dev = platform_get_drvdata(pdev);
>> struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> u32 step_en;
>>
>> +if (dma->chan) {
>> +dma_free_coherent(dma->chan->device->dev, DMA_BUFFER_SIZE,
>> + dma->buf, dma->addr);
>> +dma_release_channel(dma->chan);
>> +}
>> iio_device_unregister(indio_dev);
>> tiadc_iio_buffered_hardware_remove(indio_dev);
>> tiadc_channels_remove(indio_dev);
>> diff --git a/include/linux/mfd/ti_am335x_tscadc.h
>> b/include/linux/mfd/ti_am335x_tscadc.h
>> index e45a208..b9a53e0 100644
>> --- a/include/linux/mfd/ti_am335x_tscadc.h
>> +++ b/include/linux/mfd/ti_am335x_tscadc.h
>> @@ -23,6 +23,8 @@
>> #define REG_IRQENABLE 0x02C
>> #define REG_IRQCLR 0x030
>> #define REG_IRQWAKEUP 0x034
>> +#define REG_DMAENABLE_SET 0x038
>> +#define REG_DMAENABLE_CLEAR 0x03c
>> #define REG_CTRL0x040
>> #define REG_ADCFSM 0x044
>> #define REG_CLKDIV 0x04C
>> @@ -36,6 +38,7 @@
>> #define REG_FIFO0THR0xE8
>> #define REG_FIFO1CNT0xF0
>> #define REG_FIFO1THR0xF4
>> +#define REG_DMA1REQ 0xF8
>> #define REG_FIFO0 0x100
>> #define REG_FIFO1 0x200
>>
>> @@ -126,6 +129,10 @@
>> #define FIFOREAD_DATA_MASK (0xfff << 0)
>> #define FIFOREAD_CHNLID_MASK (0xf << 16)
>>
>> +/* DMA ENABLE/CLEAR Register */
>> +#define DMA_FIFO0 BIT(0)
>> +#define DMA_FIFO1 BIT(1)
>> +
>> /* Sequencer Status */
>> #define SEQ_STATUS BIT(5)
>> #define CHARGE_STEP 0x11
>>
>
>
Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
On Tuesday 04 October 2016 06:41 PM, Lokesh Vutla wrote: > > On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote: >> > The default impedance settings of the phy is not the optimal >> > value, due to this the second ethernet is not working. Fix it >> > with correct values which makes the second ethernet port to work. >> > >> > Signed-off-by: Mugunthan V N <mugunthan...@ti.com> >> > --- >> > arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts >> > b/arch/arm/boot/dts/dra72-evm-revc.dts >> > index f9cfd3b..d626cd7 100644 >> > --- a/arch/arm/boot/dts/dra72-evm-revc.dts >> > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts >> > @@ -62,6 +62,7 @@ >> >ti,rx-internal-delay = ; >> >ti,tx-internal-delay = ; >> >ti,fifo-depth = ; >> > + ti,min-output-imepdance; > s/imepdance/impedance > Thanks for quick catch. Will fix this in v3. Regards Mugunthan V N
Re: [PATCH v2 2/4] net: phy: dp83867: add support for MAC impedance configuration
On Tuesday 04 October 2016 06:40 PM, Andrew Lunn wrote: >> +if (of_property_read_bool(of_node, "ti,max-output-imepdance")) >> +dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; >> +else if (of_property_read_bool(of_node, "ti,min-output-imepdance")) > > Did you really test this? Or did you make the same typos in your device > tree file? > I have tested this and attached the log in cover letter. Since there is a typo error on both dts and driver it worked as expected. Will send a v3 ASAP. Regards Mugunthan V N
Re: [PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
On Tuesday 04 October 2016 06:41 PM, Lokesh Vutla wrote: > > On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote: >> > The default impedance settings of the phy is not the optimal >> > value, due to this the second ethernet is not working. Fix it >> > with correct values which makes the second ethernet port to work. >> > >> > Signed-off-by: Mugunthan V N >> > --- >> > arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts >> > b/arch/arm/boot/dts/dra72-evm-revc.dts >> > index f9cfd3b..d626cd7 100644 >> > --- a/arch/arm/boot/dts/dra72-evm-revc.dts >> > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts >> > @@ -62,6 +62,7 @@ >> >ti,rx-internal-delay = ; >> >ti,tx-internal-delay = ; >> >ti,fifo-depth = ; >> > + ti,min-output-imepdance; > s/imepdance/impedance > Thanks for quick catch. Will fix this in v3. Regards Mugunthan V N
Re: [PATCH v2 2/4] net: phy: dp83867: add support for MAC impedance configuration
On Tuesday 04 October 2016 06:40 PM, Andrew Lunn wrote: >> +if (of_property_read_bool(of_node, "ti,max-output-imepdance")) >> +dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; >> +else if (of_property_read_bool(of_node, "ti,min-output-imepdance")) > > Did you really test this? Or did you make the same typos in your device > tree file? > I have tested this and attached the log in cover letter. Since there is a typo error on both dts and driver it worked as expected. Will send a v3 ASAP. Regards Mugunthan V N
[PATCH v2 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,impedance-control which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N <mugunthan...@ti.com> --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.0.372.g6fe1b14
[PATCH v2 1/4] net: phy: dp83867: Add documentation for optional impedance control
Add documention of ti,impedance-control which can be used to correct MAC impedance mismatch using phy extended registers. Signed-off-by: Mugunthan V N --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 5d21141..85bf945 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -9,6 +9,18 @@ Required properties: - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h for applicable values +Optional property: + - ti,min-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + minimum value (35 ohms). + - ti,max-output-impedance - MAC Interface Impedance control to set + the programmable output impedance to + maximum value (70 ohms). + +Note: ti,min-output-impedance and ti,max-output-impedance are mutually + exclusive. When both properties are present ti,max-output-impedance + takes precedence. + Default child nodes are standard Ethernet PHY device nodes as described in Documentation/devicetree/bindings/net/phy.txt -- 2.10.0.372.g6fe1b14
[PATCH v2 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..795ae17 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-imepdance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-imepdance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.0.372.g6fe1b14
[PATCH v2 2/4] net: phy: dp83867: add support for MAC impedance configuration
Add support for programmable MAC impedance configuration
Signed-off-by: Mugunthan V N
---
drivers/net/phy/dp83867.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 91177a4..795ae17 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -33,6 +33,7 @@
/* Extended Registers */
#define DP83867_RGMIICTL 0x0032
#define DP83867_RGMIIDCTL 0x0086
+#define DP83867_IO_MUX_CFG 0x0170
#define DP83867_SW_RESET BIT(15)
#define DP83867_SW_RESTART BIT(14)
@@ -62,10 +63,17 @@
/* RGMIIDCTL bits */
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+/* IO_MUX_CFG bits */
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f
+
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
+#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+
struct dp83867_private {
int rx_id_delay;
int tx_id_delay;
int fifo_depth;
+ int io_impedance;
};
static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -111,6 +119,14 @@ static int dp83867_of_init(struct phy_device *phydev)
if (!of_node)
return -ENODEV;
+ dp83867->io_impedance = -EINVAL;
+
+ /* Optional configuration */
+ if (of_property_read_bool(of_node, "ti,max-output-imepdance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
+ else if (of_property_read_bool(of_node, "ti,min-output-imepdance"))
+ dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
+
ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
>rx_id_delay);
if (ret)
@@ -184,6 +200,18 @@ static int dp83867_config_init(struct phy_device *phydev)
phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
DP83867_DEVADDR, delay);
+
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR);
+
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+
+ phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
+ DP83867_DEVADDR, val);
+ }
}
return 0;
--
2.10.0.372.g6fe1b14
[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3b..d626cd7 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.0.372.g6fe1b14
[PATCH v2 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23274616/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v2 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v2 3/4] ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings
The default impedance settings of the phy is not the optimal
value, due to this the second ethernet is not working. Fix it
with correct values which makes the second ethernet port to work.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index f9cfd3b..d626cd7 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -62,6 +62,7 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
dp83867_1: ethernet-phy@3 {
@@ -69,5 +70,6 @@
ti,rx-internal-delay = ;
ti,tx-internal-delay = ;
ti,fifo-depth = ;
+ ti,min-output-imepdance;
};
};
--
2.10.0.372.g6fe1b14
[PATCH v2 0/4] add support for impedance control for TI dp83867 phy and fix 2nd ethernet on dra72 rev C evm
Add support for configurable impedance control for TI dp83867 phy via devicetree. More documentation in [1]. CPSW second ethernet is not working, fix it by enabling impedance configuration on the phy. Verified the patch on DRA72 Rev C evm, logs at [2]. Also pushed a branch [3] for others to test. Changes from initial version: * As per Sekhar's comment, instead of passing impedance values, change to max and min impedance from DT * Adopted phy_read_mmd_indirect() to cunnrent implementation. * Corrected the phy delay timings to the optimal value. [1] - http://www.ti.com/lit/ds/symlink/dp83867ir.pdf [2] - http://pastebin.ubuntu.com/23274616/ [3] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git dp83867-v2 Mugunthan V N (4): net: phy: dp83867: Add documentation for optional impedance control net: phy: dp83867: add support for MAC impedance configuration ARM: dts: dra72-evm-revc: fix correct phy delay and impedance settings ARM: dts: dra72-evm-revc: fix correct phy delay .../devicetree/bindings/net/ti,dp83867.txt | 12 ++ arch/arm/boot/dts/dra72-evm-revc.dts | 10 drivers/net/phy/dp83867.c | 28 ++ 3 files changed, 46 insertions(+), 4 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v2 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index d626cd7..8472a8c 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.0.372.g6fe1b14
[PATCH v2 4/4] ARM: dts: dra72-evm-revc: fix correct phy delay
The current delay settings of the phy are not the optimal value,
fix it with correct values.
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/dra72-evm-revc.dts | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts
b/arch/arm/boot/dts/dra72-evm-revc.dts
index d626cd7..8472a8c 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -59,16 +59,16 @@
_mdio {
dp83867_0: ethernet-phy@2 {
reg = <2>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
dp83867_1: ethernet-phy@3 {
reg = <3>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
ti,fifo-depth = ;
ti,min-output-imepdance;
};
--
2.10.0.372.g6fe1b14
[PATCH v2 4/4] ARM: dts: am4372: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0fadae5..6094d17 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -867,6 +867,8 @@
clocks = <_tsc_fck>;
clock-names = "fck";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
This patch adds the required pieces to ti_am335x_adc driver for
DMA support
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/iio/adc/ti_am335x_adc.c | 145 ++-
include/linux/mfd/ti_am335x_tscadc.h | 7 ++
2 files changed, 149 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index c3cfacca..7e250be 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -30,10 +30,28 @@
#include
#include
+#include
+#include
+
+#define DMA_BUFFER_SIZESZ_2K
+
+struct tiadc_dma {
+ struct dma_slave_config conf;
+ struct dma_chan *chan;
+ dma_addr_t addr;
+ dma_cookie_tcookie;
+ u8 *buf;
+ int current_period;
+ int period_size;
+ u8 fifo_thresh;
+};
+
struct tiadc_device {
struct ti_tscadc_dev *mfd_tscadc;
+ struct tiadc_dma dma;
struct mutex fifo1_lock; /* to protect fifo access */
int channels;
+ int total_ch_enabled;
u8 channel_line[8];
u8 channel_step[8];
int buffer_en_ch_steps;
@@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
return IRQ_HANDLED;
}
+static void tiadc_dma_rx_complete(void *param)
+{
+ struct iio_dev *indio_dev = param;
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ u8 *data;
+ int i;
+
+ data = dma->buf + dma->current_period * dma->period_size;
+ dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
+
+ for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
+ iio_push_to_buffers(indio_dev, data);
+ data += indio_dev->scan_bytes;
+ }
+}
+
+static int tiadc_start_dma(struct iio_dev *indio_dev)
+{
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ struct dma_async_tx_descriptor *desc;
+
+ dma->current_period = 0; /* We start to fill period 0 */
+ /*
+* Make the fifo thresh as the multiple of total number of
+* channels enabled, so make sure that cyclic DMA period
+* length is also a multiple of total number of channels
+* enabled. This ensures that no invalid data is reported
+* to the stack via iio_push_to_buffers().
+*/
+ dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
+adc_dev->total_ch_enabled) - 1;
+ /* Make sure that period length is multiple of fifo thresh level */
+ dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
+ (dma->fifo_thresh + 1) * sizeof(u16));
+
+ dma->conf.src_maxburst = dma->fifo_thresh + 1;
+ dmaengine_slave_config(dma->chan, >conf);
+
+ desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
+dma->period_size * 2,
+dma->period_size, DMA_DEV_TO_MEM,
+DMA_PREP_INTERRUPT);
+ if (!desc)
+ return -EBUSY;
+
+ desc->callback = tiadc_dma_rx_complete;
+ desc->callback_param = indio_dev;
+
+ dma->cookie = dmaengine_submit(desc);
+
+ dma_async_issue_pending(dma->chan);
+
+ tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);
+
+ return 0;
+}
+
static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
@@ -218,20 +297,30 @@ static int tiadc_buffer_preenable(struct iio_dev
*indio_dev)
static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ unsigned int irq_enable;
unsigned int enb = 0;
u8 bit;
tiadc_step_config(indio_dev);
- for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
+ for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {
enb |= (get_adc_step_bit(adc_dev, bit) << 1);
+ adc_dev->total_ch_enabled++;
+ }
adc_dev->buffer_en_ch_steps = enb;
+ if (dma->chan)
+ tiadc_start_dma(indio_dev);
+
am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
- tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FI
[PATCH v2 4/4] ARM: dts: am4372: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/am4372.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0fadae5..6094d17 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -867,6 +867,8 @@
clocks = <_tsc_fck>;
clock-names = "fck";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v2 2/4] drivers: iio: ti_am335x_adc: add dma support
This patch adds the required pieces to ti_am335x_adc driver for
DMA support
Signed-off-by: Mugunthan V N
---
drivers/iio/adc/ti_am335x_adc.c | 145 ++-
include/linux/mfd/ti_am335x_tscadc.h | 7 ++
2 files changed, 149 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index c3cfacca..7e250be 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -30,10 +30,28 @@
#include
#include
+#include
+#include
+
+#define DMA_BUFFER_SIZESZ_2K
+
+struct tiadc_dma {
+ struct dma_slave_config conf;
+ struct dma_chan *chan;
+ dma_addr_t addr;
+ dma_cookie_tcookie;
+ u8 *buf;
+ int current_period;
+ int period_size;
+ u8 fifo_thresh;
+};
+
struct tiadc_device {
struct ti_tscadc_dev *mfd_tscadc;
+ struct tiadc_dma dma;
struct mutex fifo1_lock; /* to protect fifo access */
int channels;
+ int total_ch_enabled;
u8 channel_line[8];
u8 channel_step[8];
int buffer_en_ch_steps;
@@ -198,6 +216,67 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
return IRQ_HANDLED;
}
+static void tiadc_dma_rx_complete(void *param)
+{
+ struct iio_dev *indio_dev = param;
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ u8 *data;
+ int i;
+
+ data = dma->buf + dma->current_period * dma->period_size;
+ dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
+
+ for (i = 0; i < dma->period_size; i += indio_dev->scan_bytes) {
+ iio_push_to_buffers(indio_dev, data);
+ data += indio_dev->scan_bytes;
+ }
+}
+
+static int tiadc_start_dma(struct iio_dev *indio_dev)
+{
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ struct dma_async_tx_descriptor *desc;
+
+ dma->current_period = 0; /* We start to fill period 0 */
+ /*
+* Make the fifo thresh as the multiple of total number of
+* channels enabled, so make sure that cyclic DMA period
+* length is also a multiple of total number of channels
+* enabled. This ensures that no invalid data is reported
+* to the stack via iio_push_to_buffers().
+*/
+ dma->fifo_thresh = rounddown(FIFO1_THRESHOLD + 1,
+adc_dev->total_ch_enabled) - 1;
+ /* Make sure that period length is multiple of fifo thresh level */
+ dma->period_size = rounddown(DMA_BUFFER_SIZE / 2,
+ (dma->fifo_thresh + 1) * sizeof(u16));
+
+ dma->conf.src_maxburst = dma->fifo_thresh + 1;
+ dmaengine_slave_config(dma->chan, >conf);
+
+ desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
+dma->period_size * 2,
+dma->period_size, DMA_DEV_TO_MEM,
+DMA_PREP_INTERRUPT);
+ if (!desc)
+ return -EBUSY;
+
+ desc->callback = tiadc_dma_rx_complete;
+ desc->callback_param = indio_dev;
+
+ dma->cookie = dmaengine_submit(desc);
+
+ dma_async_issue_pending(dma->chan);
+
+ tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);
+ tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);
+
+ return 0;
+}
+
static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
@@ -218,20 +297,30 @@ static int tiadc_buffer_preenable(struct iio_dev
*indio_dev)
static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
{
struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ struct tiadc_dma *dma = _dev->dma;
+ unsigned int irq_enable;
unsigned int enb = 0;
u8 bit;
tiadc_step_config(indio_dev);
- for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
+ for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {
enb |= (get_adc_step_bit(adc_dev, bit) << 1);
+ adc_dev->total_ch_enabled++;
+ }
adc_dev->buffer_en_ch_steps = enb;
+ if (dma->chan)
+ tiadc_start_dma(indio_dev);
+
am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
- tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
-
[PATCH v2 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 work depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [2]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [3] to enable ADC and pushed a branch for testing [4] Changes from Initial version: * Changed DMA api from dma_request_slave_channel_compat() to dma_request_chan() * Changed variable names to have more clear information as per comments from Peter. [1] - http://pastebin.ubuntu.com/23211490/ [2] - http://pastebin.ubuntu.com/23269792/ [3] - http://pastebin.ubuntu.com/23211494/ [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma-v2 Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 145 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 155 insertions(+), 3 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v2 3/4] ARM: dts: am33xx: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 98748c6..6d607b8 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -917,6 +917,8 @@
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v2 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.372.g6fe1b14
[PATCH v2 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 work depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [2]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [3] to enable ADC and pushed a branch for testing [4] Changes from Initial version: * Changed DMA api from dma_request_slave_channel_compat() to dma_request_chan() * Changed variable names to have more clear information as per comments from Peter. [1] - http://pastebin.ubuntu.com/23211490/ [2] - http://pastebin.ubuntu.com/23269792/ [3] - http://pastebin.ubuntu.com/23211494/ [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma-v2 Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 145 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 155 insertions(+), 3 deletions(-) -- 2.10.0.372.g6fe1b14
[PATCH v2 3/4] ARM: dts: am33xx: add DMA properties for tscadc
Add DMA properties for tscadc
Signed-off-by: Mugunthan V N
---
arch/arm/boot/dts/am33xx.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 98748c6..6d607b8 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -917,6 +917,8 @@
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
+ dmas = < 53 0>, < 57 0>;
+ dma-names = "fifo0", "fifo1";
tsc {
compatible = "ti,am3359-tsc";
--
2.10.0.372.g6fe1b14
[PATCH v2 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.372.g6fe1b14
Re: [PATCH 1/4] mfd: ti_am335x_tscadc: store physical address
On Wednesday 28 September 2016 01:10 AM, Lee Jones wrote:
> On Wed, 21 Sep 2016, Mugunthan V N wrote:
>
>> store the physical address of the device in its priv to use it
>> for DMA addressing in the client drivers.
>>
>> Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
>> ---
>> drivers/mfd/ti_am335x_tscadc.c | 1 +
>> include/linux/mfd/ti_am335x_tscadc.h | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
>> index c8f027b..0f3fab4 100644
>> --- a/drivers/mfd/ti_am335x_tscadc.c
>> +++ b/drivers/mfd/ti_am335x_tscadc.c
>> @@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
>> *pdev)
>> tscadc->irq = err;
>>
>> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +tscadc->tscadc_phys_base = res->start;
>
> This is unusual. Can't you use a virt_to_phys() variant instead?
>
I tried using virt_to_phys(), but its not working for me.
Also saw many drivers uses like this to get physical address
("git grep -n " res->start;" drivers/*").
Regards
Mugunthan V N
Re: [PATCH 1/4] mfd: ti_am335x_tscadc: store physical address
On Wednesday 28 September 2016 01:10 AM, Lee Jones wrote:
> On Wed, 21 Sep 2016, Mugunthan V N wrote:
>
>> store the physical address of the device in its priv to use it
>> for DMA addressing in the client drivers.
>>
>> Signed-off-by: Mugunthan V N
>> ---
>> drivers/mfd/ti_am335x_tscadc.c | 1 +
>> include/linux/mfd/ti_am335x_tscadc.h | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
>> index c8f027b..0f3fab4 100644
>> --- a/drivers/mfd/ti_am335x_tscadc.c
>> +++ b/drivers/mfd/ti_am335x_tscadc.c
>> @@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
>> *pdev)
>> tscadc->irq = err;
>>
>> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +tscadc->tscadc_phys_base = res->start;
>
> This is unusual. Can't you use a virt_to_phys() variant instead?
>
I tried using virt_to_phys(), but its not working for me.
Also saw many drivers uses like this to get physical address
("git grep -n " res->start;" drivers/*").
Regards
Mugunthan V N
Re: [PATCH 0/4] Add DMA support for ti_am335x_adc driver
On Sunday 25 September 2016 03:11 PM, Jonathan Cameron wrote: > On 21/09/16 17:11, Mugunthan V N wrote: >> > The ADC has a 64 work depth fifo length which holds the ADC data >> > till the CPU reads. So when a user program needs a large ADC data >> > to operate on, then it has to do multiple reads to get its >> > buffer. Currently if the application asks for 4 samples per >> > channel with all 8 channels are enabled, kernel can provide only >> > 3 samples per channel when all 8 channels are enabled (logs at >> > [1]). So with DMA support user can request for large number of >> > samples at a time (logs at [2]). >> > >> > Tested the patch on AM437x-gp-evm and AM335x Boneblack with the >> > patch [3] to enable ADC and pushed a branch for testing [4] >> > >> > [1] - http://pastebin.ubuntu.com/23211490/ >> > [2] - http://pastebin.ubuntu.com/23211492/ >> > [3] - http://pastebin.ubuntu.com/23211494/ >> > [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma > Just curious. How fast is the ADC sampling at in these? Never that > obvious for this driver! > > I'm also curious as to whether you started to hit the limits of the > kfifo based interface. Might be worth considering adding alternative > support for the dma buffers interface which is obviously much lower > overhead. > > Good to have this work prior to that as the kfifo stuff is somewhat > easier to use. Currently ADC clock is 3MHz, which can produce a data rate of 225KBps per channel with no open delay and no averaging of samples. So when all 8 Channels are enables the data rate will be 1.75MBps ADC can be operated at 24MHz, which can generate a data rate of 28MBps with all 8 channels enabled and no open delay and averaging, but our target is to get 800K samples per second per channel which has a data rate of 12.5MBps I think with this data rate, DMA will be the best option to implement without any data loss and less cpu overload to read the ADC samples. Regards Mugunthan V N
Re: [PATCH 0/4] Add DMA support for ti_am335x_adc driver
On Sunday 25 September 2016 03:11 PM, Jonathan Cameron wrote: > On 21/09/16 17:11, Mugunthan V N wrote: >> > The ADC has a 64 work depth fifo length which holds the ADC data >> > till the CPU reads. So when a user program needs a large ADC data >> > to operate on, then it has to do multiple reads to get its >> > buffer. Currently if the application asks for 4 samples per >> > channel with all 8 channels are enabled, kernel can provide only >> > 3 samples per channel when all 8 channels are enabled (logs at >> > [1]). So with DMA support user can request for large number of >> > samples at a time (logs at [2]). >> > >> > Tested the patch on AM437x-gp-evm and AM335x Boneblack with the >> > patch [3] to enable ADC and pushed a branch for testing [4] >> > >> > [1] - http://pastebin.ubuntu.com/23211490/ >> > [2] - http://pastebin.ubuntu.com/23211492/ >> > [3] - http://pastebin.ubuntu.com/23211494/ >> > [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma > Just curious. How fast is the ADC sampling at in these? Never that > obvious for this driver! > > I'm also curious as to whether you started to hit the limits of the > kfifo based interface. Might be worth considering adding alternative > support for the dma buffers interface which is obviously much lower > overhead. > > Good to have this work prior to that as the kfifo stuff is somewhat > easier to use. Currently ADC clock is 3MHz, which can produce a data rate of 225KBps per channel with no open delay and no averaging of samples. So when all 8 Channels are enables the data rate will be 1.75MBps ADC can be operated at 24MHz, which can generate a data rate of 28MBps with all 8 channels enabled and no open delay and averaging, but our target is to get 800K samples per second per channel which has a data rate of 12.5MBps I think with this data rate, DMA will be the best option to implement without any data loss and less cpu overload to read the ADC samples. Regards Mugunthan V N
Re: [PATCH 2/4] drivers: iio: ti_am335x_adc: add dma support
On Thursday 22 September 2016 11:48 AM, Vignesh R wrote:
>
>
> On Wednesday 21 September 2016 09:41 PM, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 160
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 164 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..89d0b07 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,32 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +/* Filter function */
>> +dma_filter_fn fn;
>> +/* Parameter to the filter function */
>> +void*param;
>
> These will not be needed with newer APIs (see below)
>
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +boolvalid_buf_seg;
>> +int buf_offset;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -184,6 +206,7 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
>> u16 *data = adc_dev->data;
>>
>> fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
>> +
>> for (k = 0; k < fifo1count; k = k + i) {
>> for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
>> read = tiadc_readl(adc_dev, REG_FIFO1);
>> @@ -198,6 +221,68 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->valid_buf_seg ? dma->buf + dma->buf_offset : dma->buf;
>> +dma->valid_buf_seg = !dma->valid_buf_seg;
>> +
>> +for (i = 0; i < dma->buf_offset; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->valid_buf_seg = false;
>> +dma->fifo_thresh = FIFO1_THRESHOLD;
>> +/*
>> + * Make the fifo thresh as the multiple of total number of
>> + * channels enabled, so make sure that that cyclic DMA period
>> + * length is also a multiple of total number of channels
>> + * enabled. This ensures that no invalid data is reported
>> + * to the stack via iio_push_to_buffers().
>> + */
>> +dma->fifo_thresh -= (dma->fifo_thresh + 1) % adc_dev->total_ch_enabled;
>
> Can we use rounddown(FIFO1_THRESHOLD + 1, adc_dev->total_ch_enabled)?
>
>> +dma->buf_offset = DMA_BUFFER_SIZE / 2;
>> +/* Make sure that period length is multiple of fifo thresh level */
>> +dma->buf_offset -= dma->buf_offset % ((dma->fifo_thresh + 1) *
>> + sizeof(u16));
>> +
>
> Can we use rounddown()?
Will change this in next version.
>
>> +dma->conf.src_maxburst = dma->fifo_thresh + 1;
>> +dmaengine_slave_config(dma->chan, >conf);
>> +
>> +desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
>> + dma->buf_offset * 2,
>> + dma->buf_offset, DMA_DEV_TO_MEM,
>> +
Re: [PATCH 2/4] drivers: iio: ti_am335x_adc: add dma support
On Thursday 22 September 2016 11:48 AM, Vignesh R wrote:
>
>
> On Wednesday 21 September 2016 09:41 PM, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 160
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 164 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..89d0b07 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,32 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +/* Filter function */
>> +dma_filter_fn fn;
>> +/* Parameter to the filter function */
>> +void*param;
>
> These will not be needed with newer APIs (see below)
>
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +boolvalid_buf_seg;
>> +int buf_offset;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -184,6 +206,7 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
>> u16 *data = adc_dev->data;
>>
>> fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
>> +
>> for (k = 0; k < fifo1count; k = k + i) {
>> for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
>> read = tiadc_readl(adc_dev, REG_FIFO1);
>> @@ -198,6 +221,68 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->valid_buf_seg ? dma->buf + dma->buf_offset : dma->buf;
>> +dma->valid_buf_seg = !dma->valid_buf_seg;
>> +
>> +for (i = 0; i < dma->buf_offset; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->valid_buf_seg = false;
>> +dma->fifo_thresh = FIFO1_THRESHOLD;
>> +/*
>> + * Make the fifo thresh as the multiple of total number of
>> + * channels enabled, so make sure that that cyclic DMA period
>> + * length is also a multiple of total number of channels
>> + * enabled. This ensures that no invalid data is reported
>> + * to the stack via iio_push_to_buffers().
>> + */
>> +dma->fifo_thresh -= (dma->fifo_thresh + 1) % adc_dev->total_ch_enabled;
>
> Can we use rounddown(FIFO1_THRESHOLD + 1, adc_dev->total_ch_enabled)?
>
>> +dma->buf_offset = DMA_BUFFER_SIZE / 2;
>> +/* Make sure that period length is multiple of fifo thresh level */
>> +dma->buf_offset -= dma->buf_offset % ((dma->fifo_thresh + 1) *
>> + sizeof(u16));
>> +
>
> Can we use rounddown()?
Will change this in next version.
>
>> +dma->conf.src_maxburst = dma->fifo_thresh + 1;
>> +dmaengine_slave_config(dma->chan, >conf);
>> +
>> +desc = dmaengine_prep_dma_cyclic(dma->chan, dma->addr,
>> + dma->buf_offset * 2,
>> + dma->buf_offset, DMA_DEV_TO_MEM,
>> + DMA_PREP_INTERRUPT);
>
Re: [PATCH 2/4] drivers: iio: ti_am335x_adc: add dma support
On Thursday 22 September 2016 12:50 PM, Peter Ujfalusi wrote:
> On 09/21/16 19:11, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 160
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 164 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..89d0b07 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,32 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +/* Filter function */
>> +dma_filter_fn fn;
>> +/* Parameter to the filter function */
>> +void*param;
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +boolvalid_buf_seg;
>> +int buf_offset;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -184,6 +206,7 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
>> u16 *data = adc_dev->data;
>>
>> fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
>> +
>> for (k = 0; k < fifo1count; k = k + i) {
>> for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
>> read = tiadc_readl(adc_dev, REG_FIFO1);
>> @@ -198,6 +221,68 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->valid_buf_seg ? dma->buf + dma->buf_offset : dma->buf;
>
> bool valid_buf_seg ? The buffer segment is valid or not valid? Which buffer
> segment is valid when valid_buf_seg is true?
>
> I know what this is doing, but it is logically not correct.
>
> Instead you could have:
>
> int current_period; /* The period the DMA is working on */
>
> When you start the DMA:
> dma->current_period = 0; /* We start to fill period 0 */
>
> In here:
>
> u8 *data = dma->buf + (dma->current_period * dma_period_size);
>
>> +dma->valid_buf_seg = !dma->valid_buf_seg;
>
> /* Currently we have only two periods, so we can just */
> dma->current_period = !dma->current_period;
> /* or */
> dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
>
> I think this would make it better to follow and if later you figure that you
> want three or more periods instead of the two, it is going to be easier to add
> that.
Okay, will change this in next version patch.
>
>> +
>> +for (i = 0; i < dma->buf_offset; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->valid_buf_seg = false;
>> +dma->fifo_thresh = FIFO1_THRESHOLD;
>
> FIFO1_THRESHOLD is defined as 19 in the global header file, so
> if you have 2 channels enabled the trigger comes when the FIFO have 10
> samples/ch, in case of all 8 channels enabled you will round it down the
> trigger comes when you have 2 samples/ch.
>
> Would not be better to try to use high threshold for the FIFO to reduce the
> number of DMA requests needed runtime?
>
> It is OK as it is at the moment, but I think it would make sense to
Re: [PATCH 2/4] drivers: iio: ti_am335x_adc: add dma support
On Thursday 22 September 2016 12:50 PM, Peter Ujfalusi wrote:
> On 09/21/16 19:11, Mugunthan V N wrote:
>> This patch adds the required pieces to ti_am335x_adc driver for
>> DMA support
>>
>> Signed-off-by: Mugunthan V N
>> ---
>> drivers/iio/adc/ti_am335x_adc.c | 160
>> ++-
>> include/linux/mfd/ti_am335x_tscadc.h | 7 ++
>> 2 files changed, 164 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iio/adc/ti_am335x_adc.c
>> b/drivers/iio/adc/ti_am335x_adc.c
>> index c3cfacca..89d0b07 100644
>> --- a/drivers/iio/adc/ti_am335x_adc.c
>> +++ b/drivers/iio/adc/ti_am335x_adc.c
>> @@ -30,10 +30,32 @@
>> #include
>> #include
>>
>> +#include
>> +#include
>> +
>> +#define DMA_BUFFER_SIZE SZ_2K
>> +
>> +struct tiadc_dma {
>> +/* Filter function */
>> +dma_filter_fn fn;
>> +/* Parameter to the filter function */
>> +void*param;
>> +struct dma_slave_config conf;
>> +struct dma_chan *chan;
>> +dma_addr_t addr;
>> +dma_cookie_tcookie;
>> +u8 *buf;
>> +boolvalid_buf_seg;
>> +int buf_offset;
>> +u8 fifo_thresh;
>> +};
>> +
>> struct tiadc_device {
>> struct ti_tscadc_dev *mfd_tscadc;
>> +struct tiadc_dma dma;
>> struct mutex fifo1_lock; /* to protect fifo access */
>> int channels;
>> +int total_ch_enabled;
>> u8 channel_line[8];
>> u8 channel_step[8];
>> int buffer_en_ch_steps;
>> @@ -184,6 +206,7 @@ static irqreturn_t tiadc_worker_h(int irq, void *private)
>> u16 *data = adc_dev->data;
>>
>> fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
>> +
>> for (k = 0; k < fifo1count; k = k + i) {
>> for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
>> read = tiadc_readl(adc_dev, REG_FIFO1);
>> @@ -198,6 +221,68 @@ static irqreturn_t tiadc_worker_h(int irq, void
>> *private)
>> return IRQ_HANDLED;
>> }
>>
>> +static void tiadc_dma_rx_complete(void *param)
>> +{
>> +struct iio_dev *indio_dev = param;
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +u8 *data;
>> +int i;
>> +
>> +data = dma->valid_buf_seg ? dma->buf + dma->buf_offset : dma->buf;
>
> bool valid_buf_seg ? The buffer segment is valid or not valid? Which buffer
> segment is valid when valid_buf_seg is true?
>
> I know what this is doing, but it is logically not correct.
>
> Instead you could have:
>
> int current_period; /* The period the DMA is working on */
>
> When you start the DMA:
> dma->current_period = 0; /* We start to fill period 0 */
>
> In here:
>
> u8 *data = dma->buf + (dma->current_period * dma_period_size);
>
>> +dma->valid_buf_seg = !dma->valid_buf_seg;
>
> /* Currently we have only two periods, so we can just */
> dma->current_period = !dma->current_period;
> /* or */
> dma->current_period = 1 - dma->current_period; /* swap the buffer ID */
>
> I think this would make it better to follow and if later you figure that you
> want three or more periods instead of the two, it is going to be easier to add
> that.
Okay, will change this in next version patch.
>
>> +
>> +for (i = 0; i < dma->buf_offset; i += indio_dev->scan_bytes) {
>> +iio_push_to_buffers(indio_dev, data);
>> +data += indio_dev->scan_bytes;
>> +}
>> +}
>> +
>> +static int tiadc_start_dma(struct iio_dev *indio_dev)
>> +{
>> +struct tiadc_device *adc_dev = iio_priv(indio_dev);
>> +struct tiadc_dma *dma = _dev->dma;
>> +struct dma_async_tx_descriptor *desc;
>> +
>> +dma->valid_buf_seg = false;
>> +dma->fifo_thresh = FIFO1_THRESHOLD;
>
> FIFO1_THRESHOLD is defined as 19 in the global header file, so
> if you have 2 channels enabled the trigger comes when the FIFO have 10
> samples/ch, in case of all 8 channels enabled you will round it down the
> trigger comes when you have 2 samples/ch.
>
> Would not be better to try to use high threshold for the FIFO to reduce the
> number of DMA requests needed runtime?
>
> It is OK as it is at the moment, but I think it would make sense to try to
> maximize the FIF
[PATCH 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.129.g35f6318
[PATCH 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 work depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [2]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [3] to enable ADC and pushed a branch for testing [4] [1] - http://pastebin.ubuntu.com/23211490/ [2] - http://pastebin.ubuntu.com/23211492/ [3] - http://pastebin.ubuntu.com/23211494/ [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 160 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 170 insertions(+), 3 deletions(-) -- 2.10.0.129.g35f6318
[PATCH 1/4] mfd: ti_am335x_tscadc: store physical address
store the physical address of the device in its priv to use it
for DMA addressing in the client drivers.
Signed-off-by: Mugunthan V N
---
drivers/mfd/ti_am335x_tscadc.c | 1 +
include/linux/mfd/ti_am335x_tscadc.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index c8f027b..0f3fab4 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device
*pdev)
tscadc->irq = err;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ tscadc->tscadc_phys_base = res->start;
tscadc->tscadc_base = devm_ioremap_resource(>dev, res);
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
diff --git a/include/linux/mfd/ti_am335x_tscadc.h
b/include/linux/mfd/ti_am335x_tscadc.h
index 7f55b8b..e45a208 100644
--- a/include/linux/mfd/ti_am335x_tscadc.h
+++ b/include/linux/mfd/ti_am335x_tscadc.h
@@ -155,6 +155,7 @@ struct ti_tscadc_dev {
struct device *dev;
struct regmap *regmap;
void __iomem *tscadc_base;
+ phys_addr_t tscadc_phys_base;
int irq;
int used_cells; /* 1-2 */
int tsc_wires;
--
2.10.0.129.g35f6318
[PATCH 0/4] Add DMA support for ti_am335x_adc driver
The ADC has a 64 work depth fifo length which holds the ADC data till the CPU reads. So when a user program needs a large ADC data to operate on, then it has to do multiple reads to get its buffer. Currently if the application asks for 4 samples per channel with all 8 channels are enabled, kernel can provide only 3 samples per channel when all 8 channels are enabled (logs at [1]). So with DMA support user can request for large number of samples at a time (logs at [2]). Tested the patch on AM437x-gp-evm and AM335x Boneblack with the patch [3] to enable ADC and pushed a branch for testing [4] [1] - http://pastebin.ubuntu.com/23211490/ [2] - http://pastebin.ubuntu.com/23211492/ [3] - http://pastebin.ubuntu.com/23211494/ [4] - git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git iio-dma Mugunthan V N (4): mfd: ti_am335x_tscadc: store physical address drivers: iio: ti_am335x_adc: add dma support ARM: dts: am33xx: add DMA properties for tscadc ARM: dts: am4372: add DMA properties for tscadc arch/arm/boot/dts/am33xx.dtsi| 2 + arch/arm/boot/dts/am4372.dtsi| 2 + drivers/iio/adc/ti_am335x_adc.c | 160 ++- drivers/mfd/ti_am335x_tscadc.c | 1 + include/linux/mfd/ti_am335x_tscadc.h | 8 ++ 5 files changed, 170 insertions(+), 3 deletions(-) -- 2.10.0.129.g35f6318
