> With both variants even on a 166MHz CPU you'll get above 1e-7 precision,
> which is way above accuracy of any crystal oscillator.
No, this is not so - this line
return ((long)cc * 100) / CALIBRATE_TIME;
truncates the result to the MHZ because of the '* 100' statement (cc
is an
Jeff,
The things are pretty simple (HZ - in real should be "Hz", cause HZ are
fixed for Alpha, HZ = 1024 Hz) :
Hz = cc / calibration_time
cc == rpcc() at end - rpcc() at begin
calibration_time = (CLOCK_TICK_RATE / CALIBRATE_LATCH).
So there is nothing wrong - clock
Jeff,
The things are pretty simple (HZ - in real should be Hz, cause HZ are
fixed for Alpha, HZ = 1024 Hz) :
Hz = cc / calibration_time
cc == rpcc() at end - rpcc() at begin
calibration_time = (CLOCK_TICK_RATE / CALIBRATE_LATCH).
So there is nothing wrong - clock ticks
With both variants even on a 166MHz CPU you'll get above 1e-7 precision,
which is way above accuracy of any crystal oscillator.
No, this is not so - this line
return ((long)cc * 100) / CALIBRATE_TIME;
truncates the result to the MHZ because of the '* 100' statement (cc
is an
That's it.
Please also include my old rtc patch for 2.2.x series into official 2.2.20
kernel.
Thanks,
Oleg.
-
From: "Jeff Garzik" <[EMAIL PROTECTED]>
Subject: Re: [patch] Re: alpha - generic_init_pit - why using RTC for
calibration?
> Oleg,
>
> The official kernel now carries
erson" <[EMAIL PROTECTED]>
To: "Ivan Kokshaysky" <[EMAIL PROTECTED]>; <[EMAIL PROTECTED]>;
<[EMAIL PROTECTED]>
Cc: "Oleg I. Vdovikin" <[EMAIL PROTECTED]>; <[EMAIL PROTECTED]>
Sent: Wednesday, July 04, 2001 10:45 PM
Subject: [patch] Re: al
[EMAIL PROTECTED]
To: Ivan Kokshaysky [EMAIL PROTECTED]; [EMAIL PROTECTED];
[EMAIL PROTECTED]
Cc: Oleg I. Vdovikin [EMAIL PROTECTED]; [EMAIL PROTECTED]
Sent: Wednesday, July 04, 2001 10:45 PM
Subject: [patch] Re: alpha - generic_init_pit - why using RTC for
calibration?
On Fri, Jun 29, 2001 at 09:19
That's it.
Please also include my old rtc patch for 2.2.x series into official 2.2.20
kernel.
Thanks,
Oleg.
-
From: Jeff Garzik [EMAIL PROTECTED]
Subject: Re: [patch] Re: alpha - generic_init_pit - why using RTC for
calibration?
Oleg,
The official kernel now carries
Here is the patch against the buggy Cypress RTC which is found on some
Alpha boards. It's tested with 2.2.16 & 2.2.19 kernels and as seems should
work with 2.4.x kernels. This patch differs from initial Ivan's version by
the "cc" variable type & different calibrate divisor usage for better
Here is the patch against the buggy Cypress RTC which is found on some
Alpha boards. It's tested with 2.2.16 2.2.19 kernels and as seems should
work with 2.4.x kernels. This patch differs from initial Ivan's version by
the cc variable type different calibrate divisor usage for better
Here is the patch against the buggy Cypress RTC which is found on some
Alpha boards. It's tested with 2.2.16 & 2.2.19 kernels and as seems should
work with 2.4.x kernels. This patch differs from initial Ivan's version by
the "cc" variable type & different calibrate divisor usage for better
Here is the patch against the buggy Cypress RTC which is found on some
Alpha boards. It's tested with 2.2.16 2.2.19 kernels and as seems should
work with 2.4.x kernels. This patch differs from initial Ivan's version by
the cc variable type different calibrate divisor usage for better
Ivan, thanks. I will minorly adjust the patch, prepare it for 2.2.x series
and then post it.
Thanks,
Oleg.
P.S. Richard, any thoughts?
- Original Message -
From: "Ivan Kokshaysky" <[EMAIL PROTECTED]>
To: "Oleg I. Vdovikin" <[EMAIL PROTECTED]>
Ivan, thanks. I will minorly adjust the patch, prepare it for 2.2.x series
and then post it.
Thanks,
Oleg.
P.S. Richard, any thoughts?
- Original Message -
From: Ivan Kokshaysky [EMAIL PROTECTED]
To: Oleg I. Vdovikin [EMAIL PROTECTED]
Cc: Richard Henderson [EMAIL PROTECTED]; [EMAIL
Hello,
we've a bunch of UP2000/UP2000+ boards (similar to DP264) with 666MHz
EV67 Alphas (we're building large Alpha cluster). And we're regulary see
"HWRPB cycle frequency bogus" and the measured value for the speed in the
range of 519 MHz - 666 MHz. And this value changes in this range
Hello,
we've a bunch of UP2000/UP2000+ boards (similar to DP264) with 666MHz
EV67 Alphas (we're building large Alpha cluster). And we're regulary see
HWRPB cycle frequency bogus and the measured value for the speed in the
range of 519 MHz - 666 MHz. And this value changes in this range from
Hi!
We've number of UP2000+ boards (they just like DP264 in common). These
boards has 2 PCI hoses, both has 3 PCI slots - one 32bits (IdSel=9) & two
64bits (IdSel=7,8) (6 slots in total).
Recently we've tried to install 3c985b 64-bit card and observe the
following: this card works just
Hi!
We've number of UP2000+ boards (they just like DP264 in common). These
boards has 2 PCI hoses, both has 3 PCI slots - one 32bits (IdSel=9) two
64bits (IdSel=7,8) (6 slots in total).
Recently we've tried to install 3c985b 64-bit card and observe the
following: this card works just
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