Re: [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-08 Thread Palmer Dabbelt
On Fri, 07 Dec 2018 09:20:57 PST (-0800), a...@brainfault.org wrote: On Fri, 7 Dec, 2018, 10:30 PM Palmer Dabbelt On Mon, 03 Dec 2018 12:57:31 PST (-0800), atish.pa...@wdc.com wrote: > Currently, clocksource registration happens for an invalid cpu > for non-smp kernels. This lead to

Re: [PATCH 0/2] riscv: enable syscalls tracepoints

2018-12-07 Thread Palmer Dabbelt
On Thu, 06 Dec 2018 07:26:33 PST (-0800), david.abdurachma...@gmail.com wrote: Depends on audit patch: http://lists.infradead.org/pipermail/linux-riscv/2018-October/001931.html audit patch is already merged into linux-next. This simply fixes compilation error in do_syscall_trace_exit() and

Re: [PATCH 1/3] tty/serial: Add RISC-V SBI earlycon support

2018-12-07 Thread Palmer Dabbelt
On Wed, 05 Dec 2018 01:58:46 PST (-0800), Greg KH wrote: On Tue, Dec 04, 2018 at 07:25:05PM +0530, Anup Patel wrote: In RISC-V, the M-mode runtime firmware provide SBI calls for debug prints. This patch adds earlycon support using RISC-V SBI console calls. To enable it, just pass "earlycon=sbi"

Re: [PATCH RFC 4/7] riscv/vdso: don't clear PG_reserved

2018-12-07 Thread Palmer Dabbelt
leave the pages marked as reserved. Cc: Palmer Dabbelt Cc: Albert Ou Cc: Tobias Klauser Cc: Andrew Morton Cc: Michal Hocko Cc: Matthew Wilcox Signed-off-by: David Hildenbrand --- arch/riscv/kernel/vdso.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv

Re: [PATCH 2/3] RISC-V: defconfig: Enable RISC-V SBI earlycon support

2018-12-07 Thread Palmer Dabbelt
_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_HVC_RISCV_SBI=y # CONFIG_PTP_1588_CLOCK is not set CONFIG_DRM=y Reviewed-by: Palmer Dabbelt

Re: [PATCH 0/3] RISC-V SBI earlycon

2018-12-07 Thread Palmer Dabbelt
On Tue, 04 Dec 2018 05:55:04 PST (-0800), a...@brainfault.org wrote: This patchset adds RISC-V SBI earlycon and removes RISC-V EARLY_PRINTK. We should use earlycon over existing EARLY_PRINTK for SBI console because: 1. It's a more generic way of implementing early console for debugging 2.

Re: [PATCH 3/3] RISC-V: Remove EARLY_PRINTK support

2018-12-07 Thread Palmer Dabbelt
ister_console(early_console); - } -#endif *cmdline_p = boot_command_line; parse_early_param(); Reviewed-by: Palmer Dabbelt

Re: [PATCH 1/3] tty/serial: Add RISC-V SBI earlycon support

2018-12-07 Thread Palmer Dabbelt
< n; ++i) + sbi_console_putchar(s[i]); +} + +static int __init early_sbi_setup(struct earlycon_device *device, + const char *opt) +{ + device->con->write = sbi_console_write; + return 0; +} +EARLYCON_DECLARE(sbi, early_sbi_setup); Reviewed-by: Palmer Dabbelt

Re: [PATCH v2 0/2] Provide sched_clock for riscv_timer

2018-12-07 Thread Palmer Dabbelt
On Tue, 04 Dec 2018 02:29:50 PST (-0800), a...@brainfault.org wrote: This patchset extends riscv_timer to provide sched_clock using generic sched_clock framework. The patchset is tested on QEMU virt machine. It is based on Linux-4.20-rc5 and can be found at riscv_sched_clock_v2 branch of:

Re: [PATCH v2 1/2] RISC-V: Select GENERIC_SCHED_CLOCK for clocksource drivers

2018-12-07 Thread Palmer Dabbelt
C_IRQ_SHOW select GENERIC_PCI_IOMAP + select GENERIC_SCHED_CLOCK select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNLEN_USER select GENERIC_SMP_IDLE_THREAD Reviewed-by: Palmer Dabbelt

Re: [PATCH v2 2/2] clocksource: riscv_timer: Provide sched_clock

2018-12-07 Thread Palmer Dabbelt
pu, riscv_timer_dying_cpu); Reviewed-by: Palmer Dabbelt

Re: [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-07 Thread Palmer Dabbelt
On Mon, 03 Dec 2018 12:57:31 PST (-0800), atish.pa...@wdc.com wrote: Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Do not proceed if hartid is invalid. Take this opprtunity to

Re: [PATCH 3/4] RISC-V: Remove per cpu clocksource

2018-12-07 Thread Palmer Dabbelt
ster_hz(cs, riscv_timebase); + clocksource_register_hz(_clocksource, riscv_timebase); error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, "clockevents/riscv/timer:starting", Reviewed-by: Palmer Dabbelt

Re: [PATCH 2/4] RISC-V: Support per-hart timebase-frequency

2018-12-07 Thread Palmer Dabbelt
On Mon, 03 Dec 2018 12:57:29 PST (-0800), atish.pa...@wdc.com wrote: Follow the updated DT specs and read the timebase-frequency from the boot cpu. Keep the old DT reading as well for backward compatibility. This patch is rework of old patch from Palmer. Signed-off-by: Atish Patra ---

Re: [PATCH 1/4] dt-bindings: Correct RISC-V's timebase-frequency

2018-12-07 Thread Palmer Dabbelt
On Mon, 03 Dec 2018 12:57:28 PST (-0800), atish.pa...@wdc.com wrote: From: Palmer Dabbelt Someone must have read the device tree specification incorrectly, because we were putting timebase-frequency in the wrong place. This corrects the issue, moving it from / { cpus

Re: [PATCH] clocksource: riscv_timer: Provide sched_clock

2018-12-06 Thread Palmer Dabbelt
On Mon, 03 Dec 2018 04:35:24 PST (-0800), a...@brainfault.org wrote: Currently, we don't have a sched_clock registered for RISC-V systems. This means Linux time keeping will use jiffies (running at HZ) as the default sched_clock. To avoid this, we explicity provide sched_clock using RISC-V

Re: [PATCH] dt-bindings: sifive: describe sifive-blocks versioning

2018-11-26 Thread Palmer Dabbelt
Herring . Cc: Rob Herring Cc: Palmer Dabbelt Cc: Megan Wachs Cc: Wesley Terpstra Cc: Mark Rutland Cc: devicet...@vger.kernel.org Cc: linux-ri...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley --- Hi Rob, please let me know

Re: [PATCH] dt-bindings: sifive: describe sifive-blocks versioning

2018-11-26 Thread Palmer Dabbelt
On Wed, 21 Nov 2018 17:06:56 PST (-0800), Paul Walmsley wrote: For IP blocks that are generated from the public, open-source sifive-blocks repository, describe the version numbering policy that its maintainers intend to use, upon request from Rob Herring . Cc: Rob Herring Cc: Palmer Dabbelt

Re: [for-next][PATCH 10/18] riscv/function_graph: Simplify with function_graph_entry()

2018-11-26 Thread Palmer Dabbelt
dependent prepare_ftrace_return(). Have riscv use the new code, and remove the shadow stack management as well as having to set up the trace structure. This is needed to prepare for a fix of a design bug on how the curr_ret_stack is used. Cc: Greentime Hu Cc: Alan Kao Cc: Palmer Dabbel

Re: [PATCH v3 2/2] proc: add /proc//arch_state

2018-11-21 Thread Palmer Dabbelt
On Wed, 21 Nov 2018 01:53:50 PST (-0800), pet...@infradead.org wrote: On Wed, Nov 21, 2018 at 09:19:36AM +0100, Peter Zijlstra wrote: On Wed, Nov 21, 2018 at 09:39:00AM +0800, Li, Aubrey wrote: > > Also; you were going to shop around with the other architectures to see > > what they want/need

Re: [PATCH] RISC-V: Build flat and compressed kernel images

2018-11-21 Thread Palmer Dabbelt
On Tue, 20 Nov 2018 21:06:18 PST (-0800), bmeng...@gmail.com wrote: On Mon, Nov 12, 2018 at 1:55 PM Anup Patel wrote: This patch extends Linux RISC-V build system to build and install: Image - Flat uncompressed kernel image Image.gz - Flat and GZip compressed kernel image Quiet a few

Re: [PATCH] RISC-V: add of_node_put()

2018-11-20 Thread Palmer Dabbelt
On Tue, 20 Nov 2018 06:11:02 PST (-0800), tiny.win...@gmail.com wrote: use of_node_put() to release the refcount. Signed-off-by: Yangtao Li --- arch/riscv/kernel/time.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index

Re: [PATCH] RISC-V: Build flat and compressed kernel images

2018-11-19 Thread Palmer Dabbelt
On Fri, 16 Nov 2018 19:32:04 PST (-0800), a...@brainfault.org wrote: On Sat, Nov 17, 2018 at 2:43 AM Palmer Dabbelt wrote: On Sun, 11 Nov 2018 21:55:15 PST (-0800), a...@brainfault.org wrote: > This patch extends Linux RISC-V build system to build and install: > Image - Flat uncomp

Re: [PATCH] riscv: fix warning in arch/riscv/include/asm/module.h

2018-11-19 Thread Palmer Dabbelt
On Fri, 16 Nov 2018 19:09:36 PST (-0800), Olof Johansson wrote: On Thu, Nov 8, 2018 at 11:32 AM Palmer Dabbelt wrote: On Thu, 08 Nov 2018 11:07:00 PST (-0800), david.abdurachma...@gmail.com wrote: > Fixes warning: 'struct module' declared inside parameter list will not be > visible o

Re: [PATCH v2] riscv: add asm/unistd.h UAPI header

2018-11-19 Thread Palmer Dabbelt
On Fri, 16 Nov 2018 18:39:45 PST (-0800), Olof Johansson wrote: On Thu, Nov 8, 2018 at 11:02 AM David Abdurachmanov wrote: Marcin Juszkiewicz reported issues while generating syscall table for riscv using 4.20-rc1. The patch refactors our unistd.h files to match some other architectures. -

Re: [PATCH] RISC-V: Build flat and compressed kernel images

2018-11-16 Thread Palmer Dabbelt
On Sun, 11 Nov 2018 21:55:15 PST (-0800), a...@brainfault.org wrote: This patch extends Linux RISC-V build system to build and install: Image - Flat uncompressed kernel image Image.gz - Flat and GZip compressed kernel image Quiet a few bootloaders (such as Uboot, UEFI, etc) are capable of

Re: [PATCH v2] RISC-V: recognize S/U mode bits in print_isa

2018-11-16 Thread Palmer Dabbelt
On Fri, 09 Nov 2018 13:42:16 PST (-0800), m...@packi.ch wrote: Removes the warning about an unsupported ISA when reading /proc/cpuinfo on QEMU. The "S" extension is not being returned as it is not accessible from userspace. Signed-off-by: Patrick Stählin --- arch/riscv/kernel/cpu.c | 9

Re: [PATCH] RISC-V: Fix raw_copy_{to,from}_user()

2018-11-15 Thread Palmer Dabbelt
On Wed, 14 Nov 2018 16:27:55 PST (-0800), Olof Johansson wrote: Sparse highlighted it, and appears to be a pure bug (from vs to). ./arch/riscv/include/asm/uaccess.h:403:35: warning: incorrect type in argument 1 (different address spaces) ./arch/riscv/include/asm/uaccess.h:403:39: warning:

[GIT PULL] RISC-V Patches for 4.20-rc2

2018-11-14 Thread Palmer Dabbelt
The following changes since commit ccda4af0f4b92f7b4c308d3acc262f4a7e3affad: Linux 4.20-rc2 (2018-11-11 17:12:31 -0600) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-4.20-rc2 for you to fetch changes up to

Re: [PATCH v2 0/2] Introduce common code for risc-v sparsemem support

2018-11-14 Thread Palmer Dabbelt
On Wed, 07 Nov 2018 12:54:31 PST (-0800), log...@deltatee.com wrote: These are the first two common patches in my series to introduce sparsemem support to RISC-V. The full series was posted last cycle here [1] and the latest version can be found here [2]. As recommended by Palmer, I'd like to

Re: [PATCH 0/2] riscv: add ARCH_HAS_SG_CHAIN to Kconfig

2018-11-12 Thread Palmer Dabbelt
On Tue, 30 Oct 2018 03:01:05 PDT (-0700), david.abdurachma...@gmail.com wrote: This should improve virtio-gpu support for riscv. David Abdurachmanov (2): riscv: add ARCH_HAS_SG_CHAIN doc: re-run features-refresh.sh Documentation/features/io/sg-chain/arch-support.txt | 4 ++--

Re: [PATCH] riscv: fix trace_sys_exit hook

2018-11-12 Thread Palmer Dabbelt
On Mon, 29 Oct 2018 05:15:16 PDT (-0700), david.abdurachma...@gmail.com wrote: Depends on: http://lists.infradead.org/pipermail/linux-riscv/2018-October/001931.html Why we don't have HAVE_SYSCALL_TRACEPOINTS in arch/riscv/Kconfig? Signed-off-by: David Abdurachmanov ---

Re: [PATCH 1/2] riscv: add audit support

2018-11-12 Thread Palmer Dabbelt
On Mon, 29 Oct 2018 03:48:53 PDT (-0700), david.abdurachma...@gmail.com wrote: On RISC-V (riscv) audit is supported through generic lib/audit.c. The patch adds required arch specific definitions. Signed-off-by: David Abdurachmanov --- arch/riscv/Kconfig | 1 +

Re: [PATCH 1/2] RISC-V: Request stat64 on RV32

2018-11-12 Thread Palmer Dabbelt
On Sun, 11 Nov 2018 22:19:02 PST (-0800), david.abdurachma...@gmail.com wrote: On Mon, Nov 12, 2018 at 5:10 AM Zong Li wrote: The stat64 family that is used on 32-bit architectures to replace newstat. Since commit 67314ec7b0250290cc85eaa7a2f88a8ddb9e8547 ("RISC-V: Request newstat syscalls"),

Re: [PATCH] riscv: add S and U modes to ISA string

2018-11-11 Thread Palmer Dabbelt
On Sat, 10 Nov 2018 00:35:15 PST (-0800), m...@packi.ch wrote: On 10.11.18 07:45, David Abdurachmanov wrote: The patch adds the missing S and U modes. This is the same patch I submitted earlier (see v2 here [1], based on Palmer's feedback). Palmer stated that the "S" extension should not be

Re: [PATCH] RISC-V: recognize S/U mode bits in print_isa

2018-11-09 Thread Palmer Dabbelt
On Fri, 09 Nov 2018 11:33:47 PST (-0800), m...@packi.ch wrote: Removes the warning about an unsupported ISA when reading /proc/cpuinfo on QEMU. Signed-off-by: Patrick Stählin --- arch/riscv/kernel/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [PATCH] riscv: fix warning in arch/riscv/include/asm/module.h

2018-11-08 Thread Palmer Dabbelt
On Thu, 08 Nov 2018 11:07:00 PST (-0800), david.abdurachma...@gmail.com wrote: Fixes warning: 'struct module' declared inside parameter list will not be visible outside of this definition or declaration Signed-off-by: David Abdurachmanov --- arch/riscv/include/asm/module.h | 1 + 1 file

Re: [PATCH] riscv: add asm/unistd.h UAPI header

2018-11-08 Thread Palmer Dabbelt
On Thu, 08 Nov 2018 02:38:22 PST (-0800), david.abdurachma...@gmail.com wrote: On Thu, Nov 8, 2018 at 3:10 AM Palmer Dabbelt wrote: On Wed, 07 Nov 2018 13:09:39 PST (-0800), Arnd Bergmann wrote: > On Wed, Nov 7, 2018 at 7:30 PM David Abdurachmanov > wrote: >> On Wed, Nov 7, 201

Re: [PATCH] riscv: add asm/unistd.h UAPI header

2018-11-08 Thread Palmer Dabbelt
On Thu, 08 Nov 2018 02:30:02 PST (-0800), Arnd Bergmann wrote: On Thu, Nov 8, 2018 at 3:10 AM Palmer Dabbelt wrote: On Wed, 07 Nov 2018 13:09:39 PST (-0800), Arnd Bergmann wrote: > On Wed, Nov 7, 2018 at 7:30 PM David Abdurachmanov > wrote: >> On Wed, Nov 7, 2018 at 1:08 AM Pa

Re: [PATCH] riscv: add asm/unistd.h UAPI header

2018-11-07 Thread Palmer Dabbelt
On Wed, 07 Nov 2018 13:09:39 PST (-0800), Arnd Bergmann wrote: On Wed, Nov 7, 2018 at 7:30 PM David Abdurachmanov wrote: On Wed, Nov 7, 2018 at 1:08 AM Palmer Dabbelt wrote: > On Mon, 05 Nov 2018 12:56:15 PST (-0800), Arnd Bergmann wrote: > The target is still the next glibc releas

Re: [PATCH] riscv: add missing vdso_install target

2018-11-06 Thread Palmer Dabbelt
On Mon, 05 Nov 2018 06:35:37 PST (-0800), david.abdurachma...@gmail.com wrote: Building kernel 4.20 for Fedora as RPM fails, because riscv is missing vdso_install target in arch/riscv/Makefile. Signed-off-by: David Abdurachmanov --- arch/riscv/Makefile | 4 1 file changed, 4

Re: [PATCH] riscv: fix spacing in struct pt_regs

2018-11-06 Thread Palmer Dabbelt
On Mon, 05 Nov 2018 06:40:04 PST (-0800), david.abdurachma...@gmail.com wrote: Replace 8 spaces with tab to match styling. Signed-off-by: David Abdurachmanov --- arch/riscv/include/asm/ptrace.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH] riscv: add asm/unistd.h UAPI header

2018-11-06 Thread Palmer Dabbelt
On Mon, 05 Nov 2018 12:56:15 PST (-0800), Arnd Bergmann wrote: On 11/5/18, David Abdurachmanov wrote: Marcin Juszkiewicz reported issues while generating syscall table for riscv using 4.20-rc1. The patch refactors our unistd.h files to match some other architectures. - Add asm/unistd.h UAPI

Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code

2018-11-06 Thread Palmer Dabbelt
On Mon, 05 Nov 2018 00:52:52 PST (-0800), Arnd Bergmann wrote: On 11/5/18, Christoph Hellwig wrote: On Mon, Nov 05, 2018 at 02:58:07PM +0800, Vincent Chen wrote: Many thanks for kinds of comments. I quickly synthesize the comments and list them as below. 1. The kernel image shall include all

Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code

2018-11-06 Thread Palmer Dabbelt
On Sun, 04 Nov 2018 22:58:07 PST (-0800), vince...@andestech.com wrote: On Fri, Nov 02, 2018 at 01:48:57AM +0800, Karsten Merker wrote: On Wed, Oct 31, 2018 at 10:27:05AM -0700, Palmer Dabbelt wrote: > On Wed, 31 Oct 2018 04:16:10 PDT (-0700), a...@brainfault.org wrote: > > On Wed, Oct

Re: [RFC 1/2] dt-bindings: topology: Add RISC-V cpu topology.

2018-11-05 Thread Palmer Dabbelt
On Fri, 02 Nov 2018 06:09:39 PDT (-0700), robh...@kernel.org wrote: On Thu, Nov 1, 2018 at 6:04 PM Atish Patra wrote: Define a RISC-V cpu topology. This is based on cpu-map in ARM world. But it doesn't need a separate thread node for defining SMT systems. Multiple cpu phandle properties can

[GIT PULL] RISC-V Patches for the 4.20 Merge Window, Part 3

2018-11-01 Thread Palmer Dabbelt
The following changes since commit baa888d25ea64d0c59344d474284ca99cfdd449a: Merge branch 'next-keys2' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security (2018-11-01 15:23:59 -0700) are available in the Git repository at:

Re: [PATCH v2 2/2] RISC-V: defconfig: Enable printk timestamps

2018-11-01 Thread Palmer Dabbelt
On Wed, 31 Oct 2018 22:10:33 PDT (-0700), a...@brainfault.org wrote: The printk timestamps are very useful information to visually see where kernel is spending time during boot. It also helps us see the timing of hotplug events at runtime. This patch enables printk timestamps in RISC-V

Re: [PATCH v2 1/2] RISC-V: refresh defconfig

2018-11-01 Thread Palmer Dabbelt
On Wed, 31 Oct 2018 22:10:32 PDT (-0700), a...@brainfault.org wrote: This patch updates defconfig using savedefconfig on Linux-4.19. Signed-off-by: Anup Patel --- arch/riscv/configs/defconfig | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git

Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code

2018-11-01 Thread Palmer Dabbelt
On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alan...@andestech.com wrote: On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote: On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote: > I agree that we need a place for vendor-specific ISA extensions and > having vendor-specific

[GIT PULL] RISC-V Patches for the 4.20 Merge Window, Part 2 v2

2018-10-31 Thread Palmer Dabbelt
don't anticipate any more patch sets for the merge window. Changes since v1: * Use a consistent base to merge from so the history isn't a mess. Andreas Schwab (1): RISC-V: properly determine hardware caps Palmer Dabbelt (4

Re: [PATCH] RISC-V: defconfig: Enable printk timestamps

2018-10-31 Thread Palmer Dabbelt
On Wed, 31 Oct 2018 12:20:40 PDT (-0700), Olof Johansson wrote: On Tue, Oct 30, 2018 at 5:37 AM Anup Patel wrote: The printk timestamps are very useful information to visually see where kernel is spending time during boot. It also helps us see the timing of hotplug events at runtime. This

Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code

2018-10-31 Thread Palmer Dabbelt
On Wed, 31 Oct 2018 04:16:10 PDT (-0700), a...@brainfault.org wrote: On Wed, Oct 31, 2018 at 4:06 PM Vincent Chen wrote: RISC-V permits each vendor to develop respective extension ISA based on RISC-V standard ISA. This means that these vendor-specific features may be compatible to their

Re: [PATCH 0/3] RISC-V: A few build/warning fixes and cleanup

2018-10-31 Thread Palmer Dabbelt
On Tue, 30 Oct 2018 23:47:06 PDT (-0700), Olof Johansson wrote: A couple of fixes for build breakage or warnings, and a small whitespace/asm cleanup. The non-cleanups would be good to see in 4.20 to keep builds green. I'm happy to just keep them all together, since the cleanups are

[PATCH 1/2] Revert "RISC-V: Select GENERIC_LIB_UMODDI3 on RV32"

2018-10-29 Thread Palmer Dabbelt
I'm removing the generic 64-bit divide support, which means this will no longer work. This reverts commit 757331db921428295948fed5e7377a436e66d34e. Signed-off-by: Palmer Dabbelt --- arch/riscv/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig

[PATCH 2/2] Revert "lib: Add umoddi3 and udivmoddi4 of GCC library routines"

2018-10-29 Thread Palmer Dabbelt
We don't want 64-bit divide in the kernel. This reverts commit 6315730e9eab7de5fa9864bb13a352713f48aef1. Signed-off-by: Palmer Dabbelt --- lib/Kconfig | 3 - lib/Makefile | 1 - lib/udivmoddi4.c | 310 --- lib/umoddi3.c| 32 - 4

[PATCH 0/2] Remove umoddi3 and udivmoddi4

2018-10-29 Thread Palmer Dabbelt
These were only necessary for an out-of-tree driver that has since been fixed to use the proper divide routines.

Re: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver

2018-10-22 Thread Palmer Dabbelt
...@vger.kernel.org Cc: linux-ri...@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt Reviewed-by: Palmer Dabbelt Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley --- .../bindings/serial/sifive-serial.txt

Re: [PATCH 1/2] dt-bindings: serial: add documentation for the SiFive UART driver

2018-10-19 Thread Palmer Dabbelt
@vger.kernel.org Cc: Greg Kroah-Hartman Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley --- .../bindings/serial/sifive-serial.txt | 21 +++ 1 file changed, 21 insertions(+) create mode 100644 Documentation

Re: [PATCH v2 0/6] sparsemem support for RISC-V

2018-10-15 Thread Palmer Dabbelt
On Mon, 15 Oct 2018 10:56:56 PDT (-0700), log...@deltatee.com wrote: This patchset implements sparsemem on RISC-V. The first few patches move some code in existing architectures into common helpers so they can be used by the new RISC-V implementation. The final patch actually adds sparsmem

Re: [PATCH v4 0/5] Fix some bugs on RV32 build fail and issue

2018-10-15 Thread Palmer Dabbelt
On Mon, 15 Oct 2018 05:33:17 PDT (-0700), zong...@gmail.com wrote: Zong Li 於 2018年10月3日 週三 上午11:12寫道: This patches contain the modificaion as follows: 1. Fix up the building fail on RV32. 2. Add umoddi3 and udivmoddi4 functions for RV32. 3. Fix ioremap problem on RV32. Thanks all for review

Re: [PATCH v8 3/5] Cleanup ISA string setting

2018-10-15 Thread Palmer Dabbelt
On Sun, 14 Oct 2018 16:46:40 PDT (-0700), alan...@andestech.com wrote: Hi Guenter, On Sat, Oct 13, 2018 at 05:02:05PM -0700, Guenter Roeck wrote: Hi, With this patch in -next applied, I get the following error when building riscv:defconfig. I guess what you meant was this commit: commit

Re: [PATCH 5/5] RISC-V: Implement sparsemem

2018-10-15 Thread Palmer Dabbelt
On Thu, 11 Oct 2018 05:18:20 PDT (-0700), sba...@raithlin.com wrote: Palmer I don't really know anything about this, but you're welcome to add a Reviewed-by: Palmer Dabbelt Thanks. I think it would be good to get someone who's familiar with linux/mm to take a look. if you think

Re: [PATCH 5/5] RISC-V: Implement sparsemem

2018-10-10 Thread Palmer Dabbelt
() and sparse_init(), and provide a stub for vmemmap_populate() (all of which is similar to arm64). Signed-off-by: Logan Gunthorpe Cc: Palmer Dabbelt Cc: Albert Ou Cc: Andrew Waterman Cc: Olof Johansson Cc: Michael Clark Cc: Rob Herring Cc: Zong Li --- arch/riscv/Kconfig | 23

[GIT PULL] A Single RISC-V Fix for 4.19-rc7

2018-10-04 Thread Palmer Dabbelt
The following changes since commit 17b57b1883c1285f3d0dc2266e8f79286a7bef38: Linux 4.19-rc6 (2018-09-30 07:15:35 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-4.19-rc7 for you to fetch changes up to

Re: [PATCH v6 00/14] SMP cleanup and new features

2018-10-02 Thread Palmer Dabbelt
nstead of direct access RISC-V: Add logical CPU indexing for RISC-V RISC-V: Use Linux logical CPU number instead of hartid Palmer Dabbelt (7): RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} RISC-V: Filter ISA and MMU values in cpuinfo RISC-V: Comment on the TLB flush in smp_c

Re: [PATCH v3 3/5] lib: Add umoddi3 and udivmoddi4 of GCC library routines

2018-10-02 Thread Palmer Dabbelt
On Tue, 02 Oct 2018 07:50:41 PDT (-0700), Christoph Hellwig wrote: The udivmoddi4 and umoddi3 are copies from libgcc in gcc. There are other functions use the udivmoddi4 in libgcc, so I separate the umoddi3 and udivmoddi4 for flexible extension in the future. Can you please mention which exact

Re: [PATCH] RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo

2018-10-01 Thread Palmer Dabbelt
On Fri, 28 Sep 2018 23:12:47 PDT (-0700), a...@brainfault.org wrote: On Sat, Sep 29, 2018 at 7:16 AM Palmer Dabbelt wrote: On Wed, 12 Sep 2018 07:38:22 PDT (-0700), a...@brainfault.org wrote: > Currently, /proc/cpuinfo show logical CPU ID as Hart ID which > is in-correct. This patch sho

Re: [PATCH v3] RISC-V: Show IPI stats

2018-10-01 Thread Palmer Dabbelt
Anup Patel Changes since v2: - Remove use of IPI_CALL_WAKEUP because it's being removed Changes since v1: - Add stub inline show_ipi_stats() function for !CONFIG_SMP - Make ipi_names[] dynamically sized at compile time - Minor beautification of ipi_names[] using tabs Reviewed-by: Palmer Da

Re: [PATCH] RISC-V: Show IPI stats

2018-10-01 Thread Palmer Dabbelt
On Fri, 28 Sep 2018 23:09:56 PDT (-0700), a...@brainfault.org wrote: On Sat, Sep 29, 2018 at 7:15 AM Palmer Dabbelt wrote: On Mon, 10 Sep 2018 06:46:59 PDT (-0700), Christoph Hellwig wrote: > On Fri, Sep 07, 2018 at 06:14:29PM +0530, Anup Patel wrote: >> This patch

Re: [PATCH] RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo

2018-09-28 Thread Palmer Dabbelt
On Wed, 12 Sep 2018 07:38:22 PDT (-0700), a...@brainfault.org wrote: Currently, /proc/cpuinfo show logical CPU ID as Hart ID which is in-correct. This patch shows CPU ID and Hart ID separately in /proc/cpuinfo using cpuid_to_hardid_map(). With this patch, contents of /proc/cpuinfo looks as

Re: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible

2018-09-28 Thread Palmer Dabbelt
On Mon, 10 Sep 2018 06:34:18 PDT (-0700), Christoph Hellwig wrote: On Thu, Sep 06, 2018 at 04:15:14PM +0530, Anup Patel wrote: This patch is doing two things: 1. Allow IRQCHIP driver to provide IPI trigger mechanism And the big questions is why do we want that? The last thing we want is for

Re: [PATCH 1/2] of/fdt: Allow architectures to override CONFIG_CMDLINE logic

2018-09-28 Thread Palmer Dabbelt
On Fri, 07 Sep 2018 13:29:03 PDT (-0700), robh...@kernel.org wrote: On Fri, Sep 7, 2018 at 1:55 PM Paul Burton wrote: The CONFIG_CMDLINE-related logic in early_init_dt_scan_chosen() falls back to copying CONFIG_CMDLINE into boot_command_line/data if the DT has a /chosen node but that node has

Re: [PATCH] RISC-V: Show IPI stats

2018-09-28 Thread Palmer Dabbelt
On Mon, 10 Sep 2018 06:46:59 PDT (-0700), Christoph Hellwig wrote: On Fri, Sep 07, 2018 at 06:14:29PM +0530, Anup Patel wrote: This patch provides arch_show_interrupts() implementation to show IPI stats via /proc/interrupts. Now the contents of /proc/interrupts" will look like below:

Re: [RFC 2/3] RISC-V:Support per-hart timebase-frequency

2018-09-28 Thread Palmer Dabbelt
On Mon, 17 Sep 2018 07:23:08 PDT (-0700), Christoph Hellwig wrote: On Fri, Sep 14, 2018 at 02:54:55PM -0700, Atish Patra wrote: Follow the updated DT specs and read the timebase-frequency from the boot cpu. Keep the old DT reading as well for backward compatibility. This patch is rework of old

Re: [PATCH v5 00/12] SMP cleanup and new features

2018-09-28 Thread Palmer Dabbelt
ess RISC-V: Add logical CPU indexing for RISC-V RISC-V: Use Linux logical CPU number instead of hartid Palmer Dabbelt (7): RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} RISC-V: Filter ISA and MMU values in cpuinfo RISC-V: Comment on the TLB flush in smp_callin() RISC-

Re: [PATCH v2 0/5] Fix some bugs on RV32 build fail and issue

2018-09-28 Thread Palmer Dabbelt
On Wed, 26 Sep 2018 01:31:09 PDT (-0700), zong...@gmail.com wrote: This patches contain the modificaion as follows: 1. Fix up the building fail on RV32. 2. Add umoddi3 and udivmoddi4 functions for RV32. 3. Fix ioremap problem on RV32. Changes in v2: - Retain the copyright notices from libgcc

[GIT PULL] A Single RISC-V Update for 4.19-rc6

2018-09-27 Thread Palmer Dabbelt
The following changes since commit 6bf4ca7fbc85d80446ac01c0d1d77db4d91a6d84: Linux 4.19-rc5 (2018-09-23 19:15:18 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-4.19-rc6 for you to fetch changes up to

Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver

2018-09-26 Thread Palmer Dabbelt
On Tue, 25 Sep 2018 22:54:48 PDT (-0700), a...@brainfault.org wrote: On Mon, Sep 17, 2018 at 7:58 PM Anup Patel wrote: On Mon, Sep 17, 2018 at 7:44 PM Christoph Hellwig wrote: > > On Mon, Sep 10, 2018 at 10:08:58PM +0530, Anup Patel wrote: > > > They could in theory IFF someone actually get

Re: [PATCH 1/2] riscv/bitops: Remove smp_mb__{before,after}_clear_bit()

2018-09-25 Thread Palmer Dabbelt
On Tue, 25 Sep 2018 10:49:06 PDT (-0700), andrea.pa...@amarulasolutions.com wrote: On Tue, Sep 25, 2018 at 10:19:24AM -0700, Palmer Dabbelt wrote: On Tue, 25 Sep 2018 05:12:24 PDT (-0700), andrea.pa...@amarulasolutions.com wrote: > The barriers are unused; remove their definition. > &g

Re: [PATCH 1/2] riscv/bitops: Remove smp_mb__{before,after}_clear_bit()

2018-09-25 Thread Palmer Dabbelt
On Tue, 25 Sep 2018 05:12:24 PDT (-0700), andrea.pa...@amarulasolutions.com wrote: The barriers are unused; remove their definition. Signed-off-by: Andrea Parri Cc: Palmer Dabbelt Cc: Albert Ou Cc: --- arch/riscv/include/asm/bitops.h | 5 - 1 file changed, 5 deletions(-) diff --git

Re: [PATCH] RISCV: Fix end PFN for low memory

2018-09-25 Thread Palmer Dabbelt
On Mon, 24 Sep 2018 13:55:04 PDT (-0700), atish.pa...@wdc.com wrote: On 9/17/18 7:08 AM, Christoph Hellwig wrote: On Tue, Sep 11, 2018 at 11:30:18AM -0700, Atish Patra wrote: Use memblock_end_of_DRAM which provides correct last low memory PFN. Without that, DMA32 region becomes empty resulting

Re: [PATCH V4 00/27] C-SKY(csky) Linux Kernel Port

2018-09-20 Thread Palmer Dabbelt
On Fri, 14 Sep 2018 07:37:20 PDT (-0700), ren_...@c-sky.com wrote: On Wed, Sep 12, 2018 at 04:30:36PM +0200, Arnd Bergmann wrote: On Wed, Sep 12, 2018 at 3:25 PM Guo Ren wrote: > > This is the 3th version patchset to add the Linux kernel port for C-SKY(csky). > Thanks to everyone who provided

Re: [PATCH 14/21] riscv: use for_each_of_cpu_node iterator

2018-09-18 Thread Palmer Dabbelt
On Wed, 05 Sep 2018 12:37:31 PDT (-0700), r...@kernel.org wrote: Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This has the side effect of defaulting to iterating using "cpu" node names in preference to the deprecated (for FDT) device_type == "cpu". Cc

[GIT PULL] RISC-V: A single fix for 4.19-rc3

2018-09-12 Thread Palmer Dabbelt
I forgot to send this out last week as I was going to the GNU tool cauldron. I haven't gotten through my backlog yet so I don't have any other patches for this RC, so I figured I'd just send out the old tag. If that's an issue I can make a new one. The following changes since commit

Re: [PATCH v7 0/5] riscv: Add support to no-FPU systems

2018-09-06 Thread Palmer Dabbelt
On Sun, 26 Aug 2018 18:07:50 PDT (-0700), alan...@andestech.com wrote: This patchset adds an option, CONFIG_FPU, to enable/disable floating- point procedures. Kernel's new behavior will be as follows: * with CONFIG_FPU=y All FPU codes are reserved. If no FPU is found during booting, a

Re: [PATCH] y2038: Remove newstat family from default syscall set

2018-09-06 Thread Palmer Dabbelt
On Sat, 01 Sep 2018 10:43:53 PDT (-0700), li...@roeck-us.net wrote: Hi Arnd, On Fri, Apr 13, 2018 at 11:50:12AM +0200, Arnd Bergmann wrote: We have four generations of stat() syscalls: - the oldstat syscalls that are only used on the older architectures - the newstat family that is used on all

Re: [PATCH] dt-bindings: riscv,cpu-intc: Cleanups from a missed review

2018-09-06 Thread Palmer Dabbelt
On Tue, 21 Aug 2018 05:59:03 PDT (-0700), r...@kernel.org wrote: On Mon, Aug 20, 2018 at 6:10 PM Atish Patra wrote: On 8/20/18 4:01 PM, Palmer Dabbelt wrote: > I managed to miss one of Rob's code reviews on the mailing list > <http://lists.infradead.org/pipermail/linux-riscv/20

Re: [PATCH] riscv: move GCC version check for ARCH_SUPPORTS_INT128 to Kconfig

2018-09-06 Thread Palmer Dabbelt
On Fri, 24 Aug 2018 01:33:53 PDT (-0700), yamada.masah...@socionext.com wrote: This becomes much neater in Kconfig. Signed-off-by: Masahiro Yamada --- arch/riscv/Kconfig | 1 + arch/riscv/Makefile | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig

Re: [PATCH 5/8] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu

2018-09-06 Thread Palmer Dabbelt
On Thu, 30 Aug 2018 09:11:11 PDT (-0700), atish.pa...@wdc.com wrote: On 8/30/18 7:41 AM, Christoph Hellwig wrote: struct device_node *dn = NULL; - int hart, im_okay_therefore_i_am = 0; + int hart, found_boot_cpu = 0; If you rename this anyway please switch to use a bool.

Re: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible

2018-09-06 Thread Palmer Dabbelt
On Tue, 04 Sep 2018 11:50:02 PDT (-0700), Christoph Hellwig wrote: On Tue, Sep 04, 2018 at 06:15:10PM +0530, Anup Patel wrote: The mechanism to trigger IPI is generally part of interrupt-controller driver for various architectures. On RISC-V, we have an option to trigger IPI using SBI or SOC

Re: [PATCH 5/8] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu

2018-09-06 Thread Palmer Dabbelt
On Fri, 31 Aug 2018 14:18:02 PDT (-0700), atish.pa...@wdc.com wrote: On 8/30/18 10:54 PM, Christoph Hellwig wrote: On Thu, Aug 30, 2018 at 09:11:11AM -0700, Atish Patra wrote: On 8/30/18 7:41 AM, Christoph Hellwig wrote: struct device_node *dn = NULL; - int hart,

[GIT PULL] RISC-V Fixes and Cleanups for 4.19-rc2

2018-08-29 Thread Palmer Dabbelt
including tlb.h, which fixes a RISC-V build regression introduced during this merge window. * A cosmetic cleanup to sys_riscv_flush_icache(). Palmer Dabbelt (2): dt-bindings: riscv,cpu-intc: Cleanups from a missed review RISC-V

Re: [PATCH] riscv: Drop setup_initrd

2018-08-28 Thread Palmer Dabbelt
On Tue, 28 Aug 2018 17:36:28 PDT (-0700), li...@roeck-us.net wrote: On 08/28/2018 05:09 PM, Palmer Dabbelt wrote: On Tue, 28 Aug 2018 15:12:38 PDT (-0700), li...@roeck-us.net wrote: On Tue, Aug 28, 2018 at 03:03:00PM -0700, Palmer Dabbelt wrote: On Tue, 28 Aug 2018 14:59:59 PDT (-0700), li

Re: [PATCH] riscv: Drop setup_initrd

2018-08-28 Thread Palmer Dabbelt
On Tue, 28 Aug 2018 15:12:38 PDT (-0700), li...@roeck-us.net wrote: On Tue, Aug 28, 2018 at 03:03:00PM -0700, Palmer Dabbelt wrote: On Tue, 28 Aug 2018 14:59:59 PDT (-0700), li...@roeck-us.net wrote: >On Tue, Aug 28, 2018 at 11:46:09PM +0200, Andreas Schwab wrote: >>On Aug 28 2018

Re: [PATCH] riscv: Drop setup_initrd

2018-08-28 Thread Palmer Dabbelt
On Tue, 28 Aug 2018 14:59:59 PDT (-0700), li...@roeck-us.net wrote: On Tue, Aug 28, 2018 at 11:46:09PM +0200, Andreas Schwab wrote: On Aug 28 2018, Guenter Roeck wrote: > On Tue, Aug 28, 2018 at 01:10:20PM -0700, Palmer Dabbelt wrote: >> On Thu, 09 Aug 2018 21:11:40 PDT (-0700), li

Re: [PATCH] riscv: Drop setup_initrd

2018-08-28 Thread Palmer Dabbelt
On Thu, 09 Aug 2018 21:11:40 PDT (-0700), li...@roeck-us.net wrote: setup_initrd() does not appear to serve a practical purpose other than preventing qemu boots with "-initrd" parameter, so let's drop it. Signed-off-by: Guenter Roeck --- arch/riscv/kernel/setup.c | 39

Re: [PATCH] RISC-V: Mask out the F extension on systems without D

2018-08-28 Thread Palmer Dabbelt
On Tue, 28 Aug 2018 00:10:32 PDT (-0700), alan...@andestech.com wrote: Hi Palmer, On Mon, Aug 27, 2018 at 03:03:52PM -0700, Palmer Dabbelt wrote: The RISC-V Linux port doesn't support systems that have the F extension but don't have the D extension -- we actually don't support systems without

[PATCH] RISC-V: Mask out the F extension on systems without D

2018-08-27 Thread Palmer Dabbelt
up being popular. We can always extend this in the future. CC: Alan Kao Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/cpufeature.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 17011a870044..652d102ffa06

Re: Linux 4.19-rc1

2018-08-27 Thread Palmer Dabbelt
On Mon, 27 Aug 2018 06:44:59 PDT (-0700), li...@roeck-us.net wrote: On Sun, Aug 26, 2018 at 02:49:14PM -0700, Linus Torvalds wrote: So two weeks have passed, and the merge window for 4.19 is over. [ ... ] Anyway, go forth and test, Build results: total: 132 pass: 129 fail: 3

  1   2   3   4   5   6   7   8   >