goto i2c_disable_smbus_host;
> + }
> + }
> +
> dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr);
>
> pm_runtime_mark_last_busy(i2c_dev->dev);
> @@ -2176,6 +2245,9 @@ static int stm32f7_i2c_probe(struct platform_device
> *pdev)
>
> return 0;
>
> +i2c_disable_smbus_host:
> + stm32f7_i2c_disable_smbus_host(i2c_dev);
> +
> i2c_adapter_remove:
> i2c_del_adapter(adap);
>
> @@ -2210,6 +2282,7 @@ static int stm32f7_i2c_remove(struct platform_device
> *pdev)
> {
> struct stm32f7_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
>
> + stm32f7_i2c_disable_smbus_alert(i2c_dev);
> stm32f7_i2c_disable_smbus_host(i2c_dev);
>
> i2c_del_adapter(&i2c_dev->adap);
>
Reviewed-by: Pierre-Yves MORDRET
Regards
--
--
~ Py MORDRET
--
On 3/25/21 10:19 AM, Pierre Yves MORDRET wrote:
>
> s/postion/position/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/i2c/busses/i2c-stm32f4.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-stm32f4.c
> b/
Hi All,
Reviewed-by: Pierre-Yves MORDRET
Regards
On 3/12/21 12:53 PM, Alain Volmat wrote:
> Avoid CONFIG_PM preprocessor check for pm suspend/resume
> callbacks and identify the functions with __maybe_unused.
>
> Signed-off-by: Alain Volmat
> ---
> drivers/i2c/busses/
Hello
Looks good to me
Reviewed-by: Pierre-Yves MORDRET
Thx
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> Enable the analog filter for all I2C nodes of the stm32mp151.
>
> Signed-off-by: Alain Volmat
> ---
> arch/arm/boot/dts/stm32mp151.dtsi | 6 ++
> 1 file cha
Hello all
Looks good to me
Signed-off-by: Pierre-Yves MORDRET
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> Add the support for the i2c-digital-filter binding, allowing to enable
> the digital filter via the device-tree and indicate its value in the DT.
>
> Signed-off-by:
Hello all
Looks good to me
Signed-off-by: Pierre-Yves MORDRET
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> The digital filter related computation are present in the driver
> however the programming of the filter within the IP is missing.
> The maximum value for the DNF is wrong a
Hello all
Looks good to me
Signed-off-by: Pierre-Yves MORDRET
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> To help debugging issues, add the address of the slave being
> accessed when getting an error.
>
> Signed-off-by: Alain Volmat
> ---
> drivers/i2c/busses
Hello all
Looks good to me
Signed-off-by: Pierre-Yves MORDRET
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> This serie add support for the analog and digital filter binding
> for the stm32f7 i2c driver.
> An additional patch add also debug informations, displayed in case
&g
Hello all
Looks good to me
Signed-off-by: Pierre-Yves MORDRET
Regards
On 2/5/21 9:51 AM, Alain Volmat wrote:
> Replace driver internally coded enabling/disabling of the
> analog-filter with the DT binding "i2c-analog-filter".
>
> Signed-off-by: Alain Volmat
> ---
Hello
Looks good to me
Reviewed-by: Pierre-Yves MORDRET
Thx
Regards
On 6/1/20 7:56 AM, Alain Volmat wrote:
> Hi,
>
> Reviewed-by: Alain Volmat
>
> Thanks,
> Alain
>
> On Wed, May 27, 2020 at 01:38:53AM +, Dinghao Liu wrote:
>> pm_runtime_get_sync() i
Hi Alain
Sounds good
Reviewed-by: Pierre-Yves MORDRET
Best Regards
On 8/3/20 7:26 AM, Alain Volmat wrote:
> Add support for the SMBus-Alert protocol.
>
> Signed-off-by: Alain Volmat
> ---
> This patch has to be integrated on top of the patch
> 'i2c: stm32f7
Hi Alain
Look good for me
Reviewed-by: Pierre-Yves MORDRET
Best Regards
On 8/3/20 7:17 AM, Alain Volmat wrote:
> Rely on the core functions to implement the host-notify
> protocol via the a I2C slave device.
>
> Signed-off-by: Alain Volmat
> ---
> v3: identical to v2
Hi Alain
Look good for me
Reviewed-by: Pierre-Yves MORDRET
Best Regards
On 8/3/20 7:17 AM, Alain Volmat wrote:
> SMBus Host-Notify protocol, from the adapter point of view
> consist of receiving a message from a client, including the
> client address and some other data.
>
> I
Hi all,
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 5/5/20 7:51 AM, Alain Volmat wrote:
> Addition of two callbacks reg_client and unreg_client that can be
> implemented by adapter drivers in order to take action whenever a
> client is being registered to it.
>
> Signed-off-b
Hi all,
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 5/5/20 7:51 AM, Alain Volmat wrote:
> This patch adds the support for SMBus Host notify and SMBus Alert
> extensions protocols
>
> Signed-off-by: Alain Volmat
> ---
> drivers/i2c/busses/Kconfig | 1 +
> d
Hi all,
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 5/5/20 7:51 AM, Alain Volmat wrote:
> SMBus Host-Notify protocol, from the adapter point of view
> consist of receiving a message from a client, including the
> client address and some other data.
>
> It can be simply handle
Hello
Looks good
Reviewed-by: Pierre-Yves MORDRET
Thx
Regards
On 10/15/19 3:11 PM, Alain Volmat wrote:
> Remove the following warning:
>
> drivers/i2c/busses/i2c-stm32f7.c:315:
> warning: cannot understand function prototype:
> 'struct stm32f7_i2c_spec i2c_specs[] =
&g
Hello
Looks good
Reviewed-by: Pierre-Yves MORDRET
Thx
Regards
On 10/15/19 3:03 PM, Alain Volmat wrote:
> The IP can handle two slave addresses. One address can either be
> 7 bits or 10 bits while the other can only be 7 bits.
> In order to ensure that a 10 bits address can always be
Hi Alain
Fixes tag is missing in your patch.
[ i.e ==> Fixes: aeb068c57214 ("i2c: i2c-stm32f7: add driver") ]
Nonetheless patch only consists in removing a comment character ?
Thanks
On 10/4/19 4:55 PM, Alain Volmat wrote:
> Remove the following warning:
>
> drivers/i2c/busses/i2c-stm32f7.c:31
Hi
Reviewed-by: Pierre-Yves MORDRET
Thx
On 10/1/19 10:51 AM, Fabrice Gasnier wrote:
> When in slave mode, an arbitration loss (ARLO) may be detected before the
> slave had a chance to detect the stop condition (STOPF in ISR).
> This is seen when two master + slave adapters switch th
Hi,
Reviewed-by: Pierre-Yves MORDRET
Thx
On 9/30/19 5:28 PM, Fabrice Gasnier wrote:
> The slave-interface documentation [1] states "the bus driver should
> transmit the first byte" upon I2C_SLAVE_READ_REQUESTED slave event:
> - 'val': backend returns first
Hi Wolfram
Sorry for the delay.
Acked-by: Pierre-Yves MORDRET
BR
On 9/3/19 8:05 PM, Wolfram Sang wrote:
> On Thu, Aug 15, 2019 at 11:28:57AM +0530, Nishka Dasgupta wrote:
>> Static structure stm32f7_i2c_algo, of type i2c_algorithm, is used only
>> when it is assigned to constan
Hi
It looks good to me
Reviewed-by: Pierre-Yves MORDRET
Thx
On 6/4/19 3:34 PM, Fabrice Gasnier wrote:
> Add missing documentation for "dmas" and "dma-names" properties that can be
> used on i2c-stm32.
>
> Signed-off-by: Fabrice Gasnier
> ---
> Doc
Hi
I looks good to me
Reviewed-by: Pierre-Yves MORDRET
Thx
On 6/26/19 3:45 PM, Wolfram Sang wrote:
> On Tue, Jun 04, 2019 at 03:20:51PM +0200, Fabrice Gasnier wrote:
>> This patch adds the support of I2C_SMBUS_I2C_BLOCK_DATA transaction type
>> for the stm32f7 SMBUS Con
Add and enable Vivante GPU on stm32mp157c for ED1, DK1 and DK2 boards.
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
Pierre-Yves MORDRET (3):
ARM: dts: stm32: Add Vivante GPU support on
Enable Vivante GPU driver for stm32mp157a-dk1 and dk2 boards.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157a-dk1.dts
Enable Vivante GPU driver for stm32mp157c-ed1 board.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 16
Append Vivante GPU DT configuration.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157c.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts
Hi
Reviewed-by: Pierre-Yves MORDRET
Thanks
Regards
On 5/15/19 5:09 PM, Fabrice Gasnier wrote:
> During probe, return the "get_irq" error value instead of -EINVAL which
> allows the driver to be deferred probed if needed.
> Fix also the case where of_irq_get() returns a neg
Hello
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 4/24/19 11:21 AM, Fabien Dessenne wrote:
> platform_get_resource(pdev, IORESOURCE_IRQ) is not recommended for
> requesting IRQ's resources, as they can be not ready yet. Using
> platform_get_irq() instead is preferred for getting
Hello
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 4/23/19 5:18 PM, Arnaud Pouliquen wrote:
> Hello Vinod,
>
> Just a gentle reminder, if you could take a moment to review this patch.
> FYI, the patch has already been internally reviewed by Pierre Yves
> mordret...
> His
Enable Vivante GPU driver for stm32mp157a-dk1 and dk2 boards.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157a-dk1.dts
Enable Vivante GPU driver for stm32mp157c-ed1 board.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 16
Add and enable Vivante GPU on stm32mp157c for ED1, DK1 and DK2 boards.
---
Version history:
v2:
* move GPU reserved memeory out of bottom DDR to let free this area for
U-Boot
v1:
* Initial
---
Pierre-Yves MORDRET (3):
ARM: dts: stm32: Add Vivante GPU support on
Append Vivante GPU DT configuration.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
v1:
* Initial
---
---
arch/arm/boot/dts/stm32mp157c.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts
On 3/25/19 5:28 PM, Vinod Koul wrote:
> On 25-03-19, 17:21, Pierre-Yves MORDRET wrote:
>> This reverts commit 906b40b246b0 ("Add a check on read_u32_array")
>
> This and patch title should contain:
> 906b40b246b0 ("dmaengine: stm32-mdma: Add a check on read_u3
This reverts commit 906b40b246b0 ("Add a check on read_u32_array")
As stated by bindings "st,ahb-addr-masks" is optional.
The statement inserted by this commit makes this property
mandatory and prevents MDMA to be probed in case property not present.
Signed-off-by:
On 3/25/19 4:25 PM, Vinod Koul wrote:
> On 25-03-19, 15:46, Pierre-Yves MORDRET wrote:
>
> Please use the right subsystem name dmaengine, revert is not a subsystem
> name!
ok. sorry. I thought revert keyword was correct.
>
>> This reverts commit 906b40b246b0acb54c4
This reverts commit 906b40b246b0acb54c4dc97e815cf734761c9820.
As stated by bindings "st,ahb-addr-masks" is optional.
The statement inserted by this commit makes this property
mandatory and prevents MDMA to be probed in case property not present.
Signed-off-by: Pierre-Yves MORDRET
--
Reviewed-by: Pierre-Yves MORDRET
On 3/6/19 4:11 PM, Bich HEMON wrote:
> Add STM32H7 and STM32MP1 in the list of compatible socs for each
> optional property.
>
> Signed-off-by: Bich Hemon
> ---
> Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 17 +
&g
Reviewed-by: Pierre-Yves MORDRET
On 3/6/19 4:11 PM, Bich HEMON wrote:
> Remove extra spaces before colons.
>
> Signed-off-by: Bich Hemon
> ---
> .../devicetree/bindings/i2c/i2c-stm32.txt | 26
> +++---
> 1 file changed, 13 insertions(+), 13 d
Hi Lucas,
I'm going to resend a new version on this DT. I have to move this region
elsewhere.
However I didn't get your feedback about statement I did.
Would it be possible to have your feelings ?
Thanks :)
On 2/25/19 4:57 PM, Pierre Yves MORDRET wrote:
> Hi again,
>
>
Hi
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 3/6/19 4:12 PM, Bich HEMON wrote:
> From: Nicolas Le Bayon
>
> This avoids useless loops inside the I2C timing algorithm.
> Actually, we support only one possible solution per prescaler value.
> So after finding a solution with a
Hi
Reviewed-by: Pierre-Yves MORDRET
Thanks
On 3/6/19 4:12 PM, Bich HEMON wrote:
> From: Nicolas Le Bayon
>
> It conforms with Reference Manual I2C timing section.
>
> Signed-off-by: Nicolas Le Bayon
> Signed-off-by: Bich Hemon
> ---
> drivers/i2c/busses/i2c-st
Hi again,
On 2/15/19 5:14 PM, Lucas Stach wrote:
> Am Freitag, den 15.02.2019, 16:58 +0100 schrieb Pierre-Yves MORDRET:
>> Enable Vivante GPU driver for stm32mp157c-ed1 board.
>>
>> Signed-off-by: Pierre-Yves MORDRET
>> ---
>> arch/arm/boot/dts/stm32mp157c-ed
Hi Lucas
sorry for the delay : winter season :)
On 2/15/19 5:11 PM, Lucas Stach wrote:
> Hi Pierre-Yves,
>
> Am Freitag, den 15.02.2019, 16:58 +0100 schrieb Pierre-Yves MORDRET:
>> Append Vivante GPU DT configuration.
>>
>> Signed-off-by: Pierre-Yves MORDRET
&
Enable Vivante GPU driver for stm32mp157c-dk1 and dk2 boards.
Signed-off-by: Pierre-Yves MORDRET
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index
Enable Vivante GPU driver for stm32mp157c-ed1 board.
Signed-off-by: Pierre-Yves MORDRET
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 98ef7a0
Add and enable Vivante GPU on stm32mp157c for ED1, DK1 and DK2 boards.
Pierre-Yves MORDRET (3):
ARM: dts: stm32: Add Vivante GPU support on STM32MP157c
ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 board
ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-dk1 board
Append Vivante GPU DT configuration.
Signed-off-by: Pierre-Yves MORDRET
---
arch/arm/boot/dts/stm32mp157c.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index f8bbfff..29540bc 100644
--- a/arch/arm
Hello
Acked-by: Pierre-Yves MORDRET
Regards
On 12/28/18 8:26 PM, Aditya Pakki wrote:
> In stm32_mdma_probe, after reading the property "st,ahb-addr-masks", the
> second call is not checked for failure. This time of check to time of use
> case of "count" error is s
Use pm_runtime engine for clock management purpose
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 52 ++--
1 file changed, 46 insertions(+), 6 deletions(-)
diff --git a/drivers
Use pm_runtime engine for clock management purpose.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c | 58 +++--
1 file changed, 51 insertions(+), 7 deletions(-)
diff --git a/drivers
Use pm_runtime engine for clock management purpose for both DMA, DMAMUX and
MDMA
---
Version history:
v1:
* Initial
---
Pierre-Yves MORDRET (3):
dmaengine: stm32-dma: Add PM Runtime support
dmaengine: stm32-dmamux: Add PM Runtime support
dmaengine: stm32-mdma: Add PM Runtime
For avoiding false FIFO detection, check FIFO Error interrupt is
enabled prior raising any errors.
This will prevent having spurious FIFO error where it shouldn't.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c
Use pm_runtime engine for clock management purpose.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dmamux.c | 58 +-
1 file changed, 47 insertions(+), 11 deletions(-)
diff --git a/drivers
Use PM Runtime API to enable/disable clock
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
* Rebase
v2:
* missing define
v1:
* Initial
---
---
drivers/i2c/busses/i2c-stm32f7.c | 144 +++
1 file changed, 101
Hi Wolfram,
Sorry for the inconvenience.
I re-submit a v3 right now.
Thanks
On 11/27/18 1:10 PM, Wolfram Sang wrote:
> On Mon, Nov 19, 2018 at 12:04:24PM +0100, Pierre-Yves MORDRET wrote:
>> Use PM Runtime API to enable/disable clock
>>
>> Signed-off-by: Pierre-Yves MORDRET
Use PM Runtime API to enable/disable clock
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* missing define
v1:
* Initial
---
---
drivers/i2c/busses/i2c-stm32f7.c | 144 +++
1 file changed, 101 insertions(+), 43 deletions
Append optional bindings to update SYSCFG Fast Mode Plus bits if
Fast Mode Plus speed is selected.
Signed-off-by: Pierre-Yves MORDRET
Reviewed-by: Rob Herring
---
Version history:
v2:
v1:
* Initial
---
---
Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 6 ++
1 file
Append optional bindings to update SYSCFG Fast Mode Plus bits if
Fast Mode Plus speed is selected.
---
Version history:
v2:
* solve some build issues
v1:
* Initial
---
Pierre-Yves MORDRET (2):
dt-bindings: i2c-stm32: SYSCFG Fast Mode Plus support for I2C STM32F7
i2c
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus
speed is selected.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v2:
* Missing header file inclusion
v1:
* Initial
---
---
drivers/i2c/busses/i2c-stm32f7.c | 38
Use pm_runtime engine for clock management purpose for both DMA, DMAMUX and
MDMA
---
Version history:
v1:
* Initial
---
Pierre-Yves MORDRET (3):
dmaengine: stm32-dma: Add PM Runtime support
dmaengine: stm32-dmamux: Add PM Runtime support
dmaengine: stm32-mdma: Add PM Runtime
Use pm_runtime engine for clock management purpose.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dmamux.c | 58 +-
1 file changed, 47 insertions(+), 11 deletions(-)
diff --git a/drivers
For avoiding false FIFO detection, check FIFO Error interrupt is
enabled prior raising any errors.
This will prevent having spurious FIFO error where it shouldn't.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c
Use pm_runtime engine for clock management purpose
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 52 ++--
1 file changed, 46 insertions(+), 6 deletions(-)
diff --git a/drivers
Use pm_runtime engine for clock management purpose.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c | 58 +++--
1 file changed, 51 insertions(+), 7 deletions(-)
diff --git a/drivers
Append optional bindings to update SYSCFG Fast Mode Plus bits if
Fast Mode Plus speed is selected.
---
Version history:
v1:
* Initial
---
Pierre-Yves MORDRET (2):
dt-bindings: i2c-stm32: SYSCFG Fast Mode Plus support for I2C STM32F7
i2c: i2c-stm32f7: SYSCFG Fast Mode Plus
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus
speed is selected.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/i2c/busses/i2c-stm32f7.c | 37 ++---
1 file changed, 34 insertions(+), 3
Append optional bindings to update SYSCFG Fast Mode Plus bits if
Fast Mode Plus speed is selected.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 6 ++
1 file changed, 6 insertions(+)
diff
Use PM Runtime API to enable/disable clock
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/i2c/busses/i2c-stm32f7.c | 142 +++
1 file changed, 99 insertions(+), 43 deletions(-)
diff --git a/drivers/i2c
On 10/16/18 4:44 PM, Vinod wrote:
> On 16-10-18, 11:19, Pierre Yves MORDRET wrote:
>>
>>
>> On 10/15/18 7:14 PM, Vinod wrote:
>>> On 10-10-18, 09:02, Pierre Yves MORDRET wrote:
>>>>
>>>>
>>>> On 10/10/2018 06:03 AM
On 10/15/18 7:14 PM, Vinod wrote:
> On 10-10-18, 09:02, Pierre Yves MORDRET wrote:
>>
>>
>> On 10/10/2018 06:03 AM, Vinod wrote:
>>> On 09-10-18, 10:40, Pierre Yves MORDRET wrote:
>>>>
>>>>
>>>> On 10/07/2018 06:00 PM
On 10/10/2018 06:03 AM, Vinod wrote:
> On 09-10-18, 10:40, Pierre Yves MORDRET wrote:
>>
>>
>> On 10/07/2018 06:00 PM, Vinod wrote:
>>> On 28-09-18, 15:01, Pierre-Yves MORDRET wrote:
>>>> This patch adds support of DMA/MDMA chaining support.
>>&
On 10/09/2018 10:57 AM, Vinod wrote:
> Hi Pierre,
>
> On 09-10-18, 09:18, Pierre Yves MORDRET wrote:
>
>>>> * DMA client
>>>> @@ -68,7 +84,16 @@ channel: a phandle to the DMA controller plus the
>>>> following four integer cells:
>&
On 10/07/2018 06:00 PM, Vinod wrote:
> On 28-09-18, 15:01, Pierre-Yves MORDRET wrote:
>> This patch adds support of DMA/MDMA chaining support.
>> It introduces an intermediate transfer between peripherals and STM32 DMA.
>> This intermediate transfer is triggered by SW fo
On 10/07/2018 04:59 PM, Vinod wrote:
> On 28-09-18, 15:01, Pierre-Yves MORDRET wrote:
>> From: M'boumba Cedric Madianga
>>
>> This patch adds the description of the 2 properties needed to support M2M
>> transfer triggered by STM32 DMA when his transfer is compl
On 10/07/2018 04:58 PM, Vinod wrote:
> On 28-09-18, 15:01, Pierre-Yves MORDRET wrote:
>> From: M'boumba Cedric Madianga
>>
>> Add one cell to support DMA/MDMA chaining.
>>
>> Signed-off-by: Pierre-Yves MORDRET
>> ---
>> Version history
Hi Vinod
On 10/07/2018 04:57 PM, Vinod wrote:
> On 28-09-18, 15:01, Pierre-Yves MORDRET wrote:
>> From: M'boumba Cedric Madianga
>>
>> This patch adds dma bindings to support DMA/MDMA chaining transfer.
>> 1 bit is to manage both DMA FIFO Threshold
>>
Hello all,
I've submitted a V3 following a KBuild warning.
You can thus drop this V2.
Thanks and sorry for the spamming.
Have a nice weekend.
Regards
On 09/28/2018 10:36 AM, Pierre-Yves MORDRET wrote:
> This serie adds support for M2M transfer triggered by STM32 DMA in order to
> tr
is used for this intermediate buffer
Each DMA channel will be able to define its SRAM needs to achieve chaining
feature : (2 ^ order) * PAGE_SIZE.
For cyclic, SRAM buffer is derived from period length (rounded on
PAGE_SIZE).
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3
enable reuse to spare descriptors creation on critical UC.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
v2:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32
Enable client to resubmit already processed descriptors
in order to save descriptor creation time.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
v2:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c | 84 +++--
1 file
red by HW.
This mode is not really available in dmaengine framework as normally M2M
transfers are triggered by SW.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
v2:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 131 +
nding content
v1:
* Initial
---
Pierre-Yves MORDRET (3):
dt-bindings: stm32-dma: Add DMA/MDMA chaining support bindings
dt-bindings: stm32-dmamux: Add one cell to support DMA/MDMA chain
dt-bindings: stm32-mdma: Add DMA/MDMA chaining support bindings
dmaengine: stm32-dma: Add DMA
From: M'boumba Cedric Madianga
Add one cell to support DMA/MDMA chaining.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
v2:
* rework content
v1:
* Initial
---
---
Documentation/devicetree/bindings/dma/stm32-dmamux.txt | 6 +++---
1 file chang
From: M'boumba Cedric Madianga
This patch adds the description of the 2 properties needed to support M2M
transfer triggered by STM32 DMA when his transfer is complete.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v3:
v2:
* rework content
v1:
* In
er is given by the formula:
(2 ^ order) * PAGE_SIZE.
The order is given by those 2 bits.
For cyclic, whether chaining is chosen, any value above 1 can be set :
SRAM buffer size will rely on period size and not on this DT value.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
is used for this intermediate buffer
Each DMA channel will be able to define its SRAM needs to achieve chaining
feature : (2 ^ order) * PAGE_SIZE.
For cyclic, SRAM buffer is derived from period length (rounded on
PAGE_SIZE).
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1
red by HW.
This mode is not really available in dmaengine framework as normally M2M
transfers are triggered by SW.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 131 +--
1 file change
Enable client to resubmit already processed descriptors
in order to save descriptor creation time.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-dma.c | 84 +++--
1 file changed, 54
From: M'boumba Cedric Madianga
This patch adds the description of the 2 properties needed to support M2M
transfer triggered by STM32 DMA when his transfer is complete.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
Documentation/devicetree/bin
From: M'boumba Cedric Madianga
Add one cell to support DMA/MDMA chaining.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
Documentation/devicetree/bindings/dma/stm32-dmamux.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --
er is given by the formula:
(2 ^ order) * PAGE_SIZE.
The order is given by those 2 bits.
For cyclic, whether chaining is chosen, any value above 1 can be set :
SRAM buffer size will rely on period size and not on this DT value.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
enable reuse to spare descriptors creation on critical UC.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 6b6e63b
This serie adds support for M2M transfer triggered by STM32 DMA in order to
transfer data from/to SRAM to/from DDR.
Normally, this mode should not be needed as transferring data from/to DDR
is supported by the STM32 DMA.
However, the STM32 DMA don't have the ability to generate burst transfer
on t
When a period length is not multiple of FIFO some data may be stuck
within FIFO.
Burst/FIFO Threshold/Period or buffer length check has to be hardened
In any case DMA will grant any request from client but will degraded
any parameters whether awkward.
Signed-off-by: Pierre-Yves MORDRET
Add one cell to support DMA/MDMA chaining.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
Documentation/devicetree/bindings/dma/stm32-dmamux.txt | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings
enable reuse to spare descriptors creation on critical UC.
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1:
* Initial
---
---
drivers/dma/stm32-mdma.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 6b6e63b
is used for this intermediate buffer
Each DMA channel will be able to define its SRAM needs to achieve chaining
feature : (2 ^ order) * PAGE_SIZE.
For cyclic, SRAM buffer is derived from period length (rounded on
PAGE_SIZE).
Signed-off-by: Pierre-Yves MORDRET
---
Version history:
v1
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