The following commit has been merged into the perf/core branch of tip:
Commit-ID: a161545ab53b174c016b0eb63c289525d2f6
Gitweb:
https://git.kernel.org/tip/a161545ab53b174c016b0eb63c289525d2f6
Author:Ricardo Neri
AuthorDate:Mon, 12 Apr 2021 07:30:41 -07:00
Committer
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 250b3c0d79d1f4a55e54d8a9ef48058660483fef
Gitweb:
https://git.kernel.org/tip/250b3c0d79d1f4a55e54d8a9ef48058660483fef
Author:Ricardo Neri
AuthorDate:Mon, 12 Apr 2021 07:30:42 -07:00
Committer
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
Changes since v1:
* Don't bailout in update_sd_pick_busiest() if dst_cpu cannot pull
tasks. Instead, reclassify the candidate busiest group, as it
may still
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
Changes since v1:
* None
---
arch/x86/kernel/itmt.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/x86/kernel/itmt.c b/arch/x86
Gorman
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
Changes since v1:
* None
---
include/linux/sched/topology.h | 1 +
kernel/sched/fair.c| 11 ++-
2 files changed, 11 insertions
00 ( 0.00)
normal mthread-81.00 ( 0.00) +0.00 ( 0.00)
[1].
https://lore.kernel.org/lkml/20210406041108.7416-1-ricardo.neri-calde...@linux.intel.com/
Ricardo Neri (4):
sched/fair: Optimize checking for group_asym_packing
sched/fair: Introduce arch_sched_asym_prefer_ea
Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
Changes since v1:
* None
---
kernel/sched/fair.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 04a3ce20da67..4ef3fa0d5e8d 100644
--- a/kernel
On Thu, Apr 08, 2021 at 01:21:22PM +0200, Peter Zijlstra wrote:
> On Tue, Apr 06, 2021 at 04:17:51PM -0700, Ricardo Neri wrote:
> > On Tue, Apr 06, 2021 at 01:18:09PM +0200, Peter Zijlstra wrote:
> > > On Mon, Apr 05, 2021 at 09:11:07PM -0700, Ricardo Neri wrote:
&g
On Thu, Apr 08, 2021 at 01:10:39PM +0200, Peter Zijlstra wrote:
> On Tue, Apr 06, 2021 at 04:17:10PM -0700, Ricardo Neri wrote:
> > On Tue, Apr 06, 2021 at 01:17:28PM +0200, Peter Zijlstra wrote:
> > > On Mon, Apr 05, 2021 at 09:11:07PM -0700, Ricardo Neri wrote:
> >
On Tue, Apr 06, 2021 at 04:31:35PM +0200, Vincent Guittot wrote:
> On Tue, 6 Apr 2021 at 06:11, Ricardo Neri
> wrote:
> >
> > Introduce arch_sched_asym_prefer_early() so that architectures with SMT
> > can delay the decision to label a candidate busiest group a
On Tue, Apr 06, 2021 at 01:18:09PM +0200, Peter Zijlstra wrote:
> On Mon, Apr 05, 2021 at 09:11:07PM -0700, Ricardo Neri wrote:
> > +static bool cpu_group_is_smt(int cpu, struct sched_group *sg)
> > +{
> > +#ifdef CONFIG_SCHED_SMT
> > + if (!static
On Tue, Apr 06, 2021 at 01:17:28PM +0200, Peter Zijlstra wrote:
> On Mon, Apr 05, 2021 at 09:11:07PM -0700, Ricardo Neri wrote:
> > @@ -8507,6 +8619,10 @@ static bool update_sd_pick_busiest(struct lb_env
> > *env,
> > if (!sgs->sum_h_nr_running)
>
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
arch/x86/kernel/itmt.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/x86/kernel/itmt.c b/arch/x86/kernel/itmt.c
index 1afbdd1dd777
Gorman
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
include/linux/sched/topology.h | 1 +
kernel/sched/fair.c| 11 ++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git
Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
kernel/sched/fair.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index 04a3ce20da67..4ef3fa0d5e8d 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched
Cc: Quentin Perret
Cc: Srinivas Pandruvada
Cc: Steven Rostedt
Cc: Tim Chen
Reviewed-by: Len Brown
Signed-off-by: Ricardo Neri
---
include/linux/sched/topology.h | 1 +
kernel/sched/fair.c| 122 +
2 files changed, 123 insertions(+)
diff --git
read-41.00 ( 0.00) +0.00 ( 0.00)
normal mthread-81.00 ( 3.05) -2.16 ( 2.99)
Ricardo Neri (4):
sched/fair: Optimize checking for group_asym_packing
sched/fair: Introduce arch_sched_asym_prefer_early()
sched/fair: Consider SMT in ASYM_PACKING load b
On Wed, Mar 10, 2021 at 09:01:47PM +0100, Borislav Petkov wrote:
> On Wed, Mar 10, 2021 at 11:46:44AM -0800, Ricardo Neri wrote:
> > But this series provides the use case, right? Kan's patches handle PMU
> > counters
> > that may differ cross types of CPUs. In patch
On Wed, Mar 10, 2021 at 05:53:58PM +0100, Borislav Petkov wrote:
> On Wed, Mar 10, 2021 at 08:37:37AM -0800, kan.li...@linux.intel.com wrote:
> > From: Ricardo Neri
> >
> > Add feature enumeration to identify a processor with Intel Hybrid
> > Technology: one in which
On Wed, Oct 07, 2020 at 07:15:46AM +0200, Greg Kroah-Hartman wrote:
> On Tue, Oct 06, 2020 at 08:14:47PM -0700, Ricardo Neri wrote:
> > On Tue, Oct 06, 2020 at 09:37:44AM +0200, Greg Kroah-Hartman wrote:
> > > On Mon, Oct 05, 2020 at 05:57:36PM -0700, Ricardo Neri wrote:
>
On Tue, Oct 06, 2020 at 09:37:44AM +0200, Greg Kroah-Hartman wrote:
> On Mon, Oct 05, 2020 at 05:57:36PM -0700, Ricardo Neri wrote:
> > On Sat, Oct 03, 2020 at 10:53:45AM +0200, Greg Kroah-Hartman wrote:
> > > On Fri, Oct 02, 2020 at 06:17:42PM -0700, Ricardo Neri wrote:
On Tue, Oct 06, 2020 at 09:51:53AM +0100, Qais Yousef wrote:
> Hi Ricardo
Hi Qais,
Thanks for chiming in.
>
> Adding some people who might be interested.
>
> On 10/02/20 18:17, Ricardo Neri wrote:
> > Hybrid CPU topologies combine processors with more than one type of
&
On Fri, Oct 02, 2020 at 08:27:41PM -0700, Randy Dunlap wrote:
> On 10/2/20 6:17 PM, Ricardo Neri wrote:
> > +/**
> > + * arch_get_cpu_type() - Get the CPU type number
> > + * @cpu: Index of the CPU of which the index is needed
> > + *
> > + * Get the CPU type nu
On Sat, Oct 03, 2020 at 01:05:48PM +0200, Greg Kroah-Hartman wrote:
> On Sat, Oct 03, 2020 at 10:53:45AM +0200, Greg Kroah-Hartman wrote:
> > On Fri, Oct 02, 2020 at 06:17:42PM -0700, Ricardo Neri wrote:
> > > +/**
> > > + * arch_get_cpu_type_name() - Get the CPU ty
On Sat, Oct 03, 2020 at 10:55:06AM +0200, Greg Kroah-Hartman wrote:
> On Fri, Oct 02, 2020 at 06:17:45PM -0700, Ricardo Neri wrote:
> > Recent Intel processors combine CPUs with different types of micro-
> > architecture in the same package. There may be applications interested
On Sat, Oct 03, 2020 at 10:53:45AM +0200, Greg Kroah-Hartman wrote:
> On Fri, Oct 02, 2020 at 06:17:42PM -0700, Ricardo Neri wrote:
> > Hybrid CPU topologies combine CPUs of different microarchitectures in the
> > same die. Thus, even though the instruction set is compatible amo
On Sat, Oct 03, 2020 at 10:49:34AM +0200, Borislav Petkov wrote:
> On Fri, Oct 02, 2020 at 06:17:41PM -0700, Ricardo Neri wrote:
> > Patch 1 of the series proposes the generic interface, with hooks
> > that architectures can override to suit their needs. The three patches
> &
On Sat, Oct 03, 2020 at 11:04:29AM +0200, Borislav Petkov wrote:
> On Fri, Oct 02, 2020 at 07:17:30PM -0700, Luck, Tony wrote:
> > On Sat, Oct 03, 2020 at 03:39:29AM +0200, Thomas Gleixner wrote:
> > > On Fri, Oct 02 2020 at 13:19, Ricardo Neri wrote:
> > > > Add sup
On Sat, Oct 03, 2020 at 12:46:29PM +0200, Thomas Gleixner wrote:
> On Fri, Oct 02 2020 at 19:17, Tony Luck wrote:
>
> > On Sat, Oct 03, 2020 at 03:39:29AM +0200, Thomas Gleixner wrote:
> >> On Fri, Oct 02 2020 at 13:19, Ricardo Neri wrote:
> >> > Add suppo
Tony Luck
Suggested-by: Len Brown # Necessity of the interface
Suggested-by: Dave Hansen # Details of the interface
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/topology.h | 2 ++
arch/x86/kernel/cpu/topology.c | 23 +++
2 files changed, 25 insertions(+)
diff --gi
Len Brown # Necessity of the interface
Suggested-by: Dave Hansen # Details of the interface
Signed-off-by: Ricardo Neri
---
.../ABI/testing/sysfs-devices-system-cpu | 13 ++
drivers/base/cpu.c| 214 ++
include/linux/cpu.h
Lutomirski
Cc: Dave Hansen
Cc: Kan Liang
Cc: Len Brown
Cc: "Peter Zijlstra (Intel)"
Cc: "Rafael J. Wysocki"
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: Srinivas Pandruvada
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo Neri
: Len Brown
Cc: "Rafael J. Wysocki"
Cc: "Ravi V. Shankar"
Cc: Srinivas Pandruvada
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/intel-family.h | 4
arch/x86/kernel/cpu/cpu.h | 3 +++
arch/x8
that architectures can override to suit their needs. The three patches
patches implement such interface for x86 (as per request from Boris,
I pulled patch 2 from a separate submission [1]).
Thanks and BR,
Ricardo
[1]. https://lkml.org/lkml/2020/10/2/1013
Ricardo Neri (4):
drivers core: Introduce CPU type sysfs
On Fri, Oct 02, 2020 at 11:03:06PM +0200, Borislav Petkov wrote:
> On Fri, Oct 02, 2020 at 02:02:31PM -0700, Ricardo Neri wrote:
> > What about patches 1 and 3? Should I resubmit the series with only
> > those?
>
> Why would you need to resubmit? They're good to go a
On Fri, Oct 02, 2020 at 10:34:52PM +0200, Borislav Petkov wrote:
> On Fri, Oct 02, 2020 at 01:19:30PM -0700, Ricardo Neri wrote:
> > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> > index 35ad8480c464..0778b3ad26b3 100644
> > --- a/arch/x86/kernel/c
Lutomirski
Cc: Dave Hansen
Cc: Kan Liang
Cc: Len Brown
Cc: "Peter Zijlstra (Intel)"
Cc: "Rafael J. Wysocki"
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: Srinivas Pandruvada
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo N
kernels
and hybrid hardware can still understand the format of the reported error
format.
Cc: "Ravi V Shankar"
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo Neri
---
arch/x86/include/uapi/asm/mce.h | 1 +
arch/x86/kernel/cpu/
;
Cc: Srinivas Pandruvada
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include/asm/cpufeatures.h
index dad350d42ecf..26ec
will use the proposed functionality to expose the CPU
topology to user space.
Thanks and BR,
Ricardo
[1].
https://software.intel.com/content/dam/develop/public/us/en/documents/325462-sdm-vol-1-2abcd-3abcd.pdf
Vol 2. Section 3.2.CPUID leaf 0x1a
Ricardo Neri (3):
x86/cpufeatures: Enumerate hybrid
Simply add Lakefield model ID. No additional changes are needed.
Cc: Zhang Rui
Cc: "Rafael J. Wysocki"
Cc: "Ravi V. Shankar"
Signed-off-by: Ricardo Neri
---
drivers/powercap/intel_rapl_common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/powercap/in
On Tue, Aug 18, 2020 at 07:31:30AM +0200, Ingo Molnar wrote:
>
> * tip-bot2 for Ricardo Neri wrote:
>
> > --- a/arch/x86/include/asm/sync_core.h
> > +++ b/arch/x86/include/asm/sync_core.h
> > @@ -5,6 +5,7 @@
> > #include
> > #include
> >
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: bf9c912f9a649776c2d741310486a6984edaac72
Gitweb:
https://git.kernel.org/tip/bf9c912f9a649776c2d741310486a6984edaac72
Author:Ricardo Neri
AuthorDate:Thu, 06 Aug 2020 20:28:33 -07:00
Committer
Tony Luck
Suggested-by: Andy Lutomirski
Signed-off-by: Ricardo Neri
---
This is v4 from my three previous submission [1], [2], and [3]. The first
three patches of the series have been merged in Linus' tree. Hence, I am
submitting only this patch for review.
[1]. https://lkml.org/lkml/20
On Thu, Aug 06, 2020 at 04:08:47PM -0700, Dave Hansen wrote:
> On 8/6/20 4:04 PM, Ricardo Neri wrote:
> > * CPUID is the conventional way, but it's nasty: it doesn't
> > * exist on some 486-like CPUs, and it usually exits to a
> > * hypervisor.
> >
On Thu, Aug 06, 2020 at 12:57:26PM -0700, Dave Hansen wrote:
> On 8/6/20 12:25 PM, Ricardo Neri wrote:
> > static inline void sync_core(void)
> > {
> > /*
> > -* There are quite a few ways to do this. IRET-to-self is nice
> > +* Hardware can do this
Tony Luck
Suggested-by: Andy Lutomirski
Signed-off-by: Ricardo Neri
---
This is a v3 from my two previous submissions [1], [2]. The first three
patches of the series have been merged into Linus' tree. Hence, I am
submitting only this patch for review.
[1]. https://lkml.org/lkml/2020/7/27/8
[2]. h
On Wed, Aug 05, 2020 at 06:48:40AM +0200, Borislav Petkov wrote:
> On Tue, Aug 04, 2020 at 07:10:59PM -0700, Ricardo Neri wrote:
> > The SERIALIZE instruction gives software a way to force the processor to
> > complete all modifications to flags, registers and memory from previous
&
On Wed, Aug 05, 2020 at 07:08:08AM +0200, Borislav Petkov wrote:
> On Tue, Aug 04, 2020 at 09:58:25PM -0700, h...@zytor.com wrote:
> > Because why use an alternative to jump over one instruction?
> >
> > I personally would prefer to have the IRET put out of line
>
> Can't yet - SERIALIZE CPUs are
On Wed, Aug 05, 2020 at 11:28:31AM -0700, Andy Lutomirski wrote:
> On Wed, Aug 5, 2020 at 10:07 AM Ricardo Neri
> wrote:
> >
> > On Wed, Aug 05, 2020 at 07:08:08AM +0200, Borislav Petkov wrote:
> > > On Tue, Aug 04, 2020 at 09:58:25PM -0700, h...@zytor.com wro
lable.
Cc: Andy Lutomirski
Cc: Cathy Zhang
Cc: Dave Hansen
Cc: Fenghua Yu
Cc: "H. Peter Anvin"
Cc: Kyung Min Park
Cc: Peter Zijlstra
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Andy Lutomirsk
On Mon, Jul 27, 2020 at 03:30:20PM +0200, pet...@infradead.org wrote:
> On Mon, Jul 27, 2020 at 03:05:36PM +0200, pet...@infradead.org wrote:
> > Yeah, I'm not sure.. the 'funny' thing is that typically call
> > sync_core() from an IPI anyway. And the synchronous broadcast IPI is by
> > far the
On Mon, Jul 27, 2020 at 05:47:32AM -0700, h...@zytor.com wrote:
> On July 27, 2020 1:20:03 AM PDT, pet...@infradead.org wrote:
> >On Sun, Jul 26, 2020 at 09:31:32PM -0700, Ricardo Neri wrote:
> >> +static inline void serialize(void)
> >> +{
> >> +
On Mon, Jul 27, 2020 at 10:20:03AM +0200, pet...@infradead.org wrote:
> On Sun, Jul 26, 2020 at 09:31:32PM -0700, Ricardo Neri wrote:
> > +static inline void serialize(void)
> > +{
> > + asm volatile(".byte 0xf, 0x1, 0xe8");
> > +}
>
> Can we pre
On Mon, Jul 27, 2020 at 01:07:08PM +0200, Ingo Molnar wrote:
>
> * Ricardo Neri wrote:
>
> > A recent submission to LKML introduced a CPU feature flag for a new
> > Intel architecture Serializing Instruction, SERIALIZE [1]. Unlike the
> > existing Serializing Instruc
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 85b23fbc7d88f8c6e3951721802d7845bc39663d
Gitweb:
https://git.kernel.org/tip/85b23fbc7d88f8c6e3951721802d7845bc39663d
Author:Ricardo Neri
AuthorDate:Sun, 26 Jul 2020 21:31:29 -07:00
Committer
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 9998a9832c4027e907353e5e05fde730cf624b77
Gitweb:
https://git.kernel.org/tip/9998a9832c4027e907353e5e05fde730cf624b77
Author:Ricardo Neri
AuthorDate:Sun, 26 Jul 2020 21:31:30 -07:00
Committer
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: f69ca629d89d65737537e05308ac531f7bb07d5c
Gitweb:
https://git.kernel.org/tip/f69ca629d89d65737537e05308ac531f7bb07d5c
Author:Ricardo Neri
AuthorDate:Sun, 26 Jul 2020 21:31:31 -07:00
Committer
Zhang
Cc: Dave Hansen
Cc: Fenghua Yu
Cc: "H. Peter Anvin"
Cc: Kyung Min Park
Cc: Peter Zijlstra
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Co-developed-by: Tony Luck
Signed-off-by: Tony Luck
Signed-
.kernel.org
Reviewed-by: Tony Luck
Signed-off-by: Ricardo Neri
---
---
arch/x86/include/asm/processor.h| 64 -
arch/x86/include/asm/sync_core.h| 64 +
arch/x86/kernel/alternative.c | 1 +
arch/x86/kernel/cpu/mce/core.c
Cc: Peter Zijlstra
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviwed-by: Tony Luck
Suggested-by: Andy Lutomirski
Signed-off-by: Ricardo Neri
---
---
arch/x86/include/asm/special_insns.h | 5 +
arch/x86/include/asm/
Cc: Cathy Zhang
Cc: Fenghua Yu
Cc: "H. Peter Anvin"
Cc: Kyung Min Park
Cc: Peter Zijlstra
Cc: "Ravi V. Shankar"
Cc: Sean Christopherson
Cc: Tony Luck
Cc: linux-e...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Dave Hansen
Reviewed-by: Tony Luck
Signed-o
es/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
[3].
https://lore.kernel.org/kvm/CALCETrWudiF8G8r57r5i4JefuP5biG1kHg==0o8yxb-bys-...@mail.gmail.com/
Ricardo Neri (4):
x86/cpufeatures: Add enumeration for SERIALIZE instruction
x86/cpu: Relocate
On Thu, Jul 23, 2020 at 01:02:43AM +0200, Thomas Gleixner wrote:
> Ricardo Neri writes:
> > On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> >> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
> >> >
> >> > This instruction g
Reported-by: Andreas Rammhold
> Originally-by: Ricardo Neri
> Signed-off-by: Brendan Shanks
FWIW, tested on hardware with UMIP.
Reviewed-by: Ricardo Neri
Tested-by: Ricardo Neri
Thanks and BR,
Ricardo
ing SLDT that
> >were crashing when run on UMIP-enabled systems.
> >
> >Reported-by: Andreas Rammhold
> >Originally-by: Ricardo Neri
> >Signed-off-by: Brendan Shanks
> >---
> >
> >v5: Capitalize instruction names in comments.
> >
> > a
On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote:
> >
> > This instruction gives software a way to force the processor to complete
> > all modifications to flags, registers and memory from previous instructions
> > and drain all
Reported-by: Andreas Rammhold
> Originally-by: Ricardo Neri
> Signed-off-by: Brendan Shanks
> ---
>
> v4: Use braces for every clause of the conditional. I tried a switch(),
> but it takes more lines and looks more cluttered (especially with the
> #ifdef).
> Also replace out-o
On Mon, Jun 08, 2020 at 05:38:12PM -0700, Ricardo Neri wrote:
> On Mon, Jun 08, 2020 at 03:44:24PM -0700, Brendan Shanks wrote:
> > Add emulation/spoofing of SLDT and STR for both 32- and 64-bit
> > processes.
> >
> > Wine users have found a small number of Windows ap
Reported-by: Andreas Rammhold
> Originally-by: Ricardo Neri
> Signed-off-by: Brendan Shanks
> ---
>
> v3: Use (GDT_ENTRY_TSS * 8) for task register selector instead of
> harcoding 0x40.
>
> arch/x86/kernel/umip.c | 32 +++-
> 1 file changed,
Reported-by: Andreas Rammhold
> Originally-by: Ricardo Neri
> Signed-off-by: Brendan Shanks
> ---
>
> v2: Return (GDT_ENTRY_LDT * 8) for SLDT when an LDT is set.
>
> arch/x86/kernel/umip.c | 34 +-
> 1 file changed, 25 insertions(+), 9 deletion
On Fri, Jun 05, 2020 at 11:58:13AM -0700, Brendan Shanks wrote:
>
> > On Jun 3, 2020, at 9:39 PM, Andy Lutomirski wrote:
> >
> > On Wed, Jun 3, 2020 at 5:12 PM Ricardo Neri
> > > <mailto:ricardo.neri-calde...@linux.intel.com>> wrote:
> >>
> &
Reported-by: Andreas Rammhold
> Originally-by: Ricardo Neri
> Signed-off-by: Brendan Shanks
> ---
> arch/x86/kernel/umip.c | 23 ++-
> 1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kernel/umip.c b/arch/x86/kernel/umip.c
ff-by: Giovanni Gherdovich
> Suggested-by: Ricardo Neri
FWIW,
Tested-by: Ricardo Neri
On Sat, May 23, 2020 at 04:17:39AM +0200, Andreas Rammhold wrote:
> On 12:43 19.05.20, Ricardo Neri wrote:
> > I have a patch for this already that I wrote for testing purposes:
> > https://github.com/ricardon/tip/commit/1692889cb3f8accb523d44b682458e234b93be50
> > P
On Tue, May 19, 2020 at 05:54:53PM -0700, Andy Lutomirski wrote:
> On Tue, May 19, 2020 at 12:43 PM Ricardo Neri
> wrote:
> >
> > On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote:
> > >
> > > > On May 19, 2020, at 7:38 AM, Andreas Rammh
On Tue, May 19, 2020 at 11:56:40AM -0700, Brendan Shanks wrote:
>
> > On May 19, 2020, at 7:38 AM, Andreas Rammhold wrote:
> >
> > Hi,
> >
> > I've been running into a weird problem with UMIP on a current Ryzen
> > 3900x with kernel 5.6.11 where a process receives a page fault after the
> >
On Sat, May 02, 2020 at 04:25:00PM +0200, Giovanni Gherdovich wrote:
> >
> > I've changed the patch like so.. OK?
> >
> > (ok, perhaps I went a little overboard with the paranoia ;-)
>
> Right, I wasn't really checking for overflow, only for when the product
> "mcnt * arch_max_freq_ratio"
ition
> > scale-invariant calculations can't be performed.
> >
> > Signed-off-by: Giovanni Gherdovich
> > Suggested-by: Ricardo Neri
> > Fixes: 1567c3e3467c ("x86, sched: Add support for frequency invariance")
> > ---
> > arch/x86/kernel/smp
ff-by: Giovanni Gherdovich
> Suggested-by: Ricardo Neri
Thanks for implementing this, Giovanni!
Tested-by: Ricardo Neri
n run on
> UMIP-enabled systems.
Emulation support for 64-bit processes was not initially included
because no use cases had been identified. Brendan has found one.
Here is the relevant e-mail thread: https://lkml.org/lkml/2017/1/26/12
FWIW,
Reviewed-by: Ricardo Neri
Only one m
On Mon, Jul 01, 2019 at 08:57:28PM +0800, Li Wang wrote:
> On Mon, Jul 1, 2019 at 8:02 PM Paolo Bonzini wrote:
>
> > On 01/07/19 09:50, Li Wang wrote:
> > > Hello there,
> > >
> > > LTP/umip_basic_test get failed on KVM UMIP
> > > system(kernel-v5.2-rc4.x86_64). The test is only trying to do
> >
On Mon, Jul 01, 2019 at 02:02:35PM +0200, Paolo Bonzini wrote:
> On 01/07/19 09:50, Li Wang wrote:
> > Hello there,
> >
> > LTP/umip_basic_test get failed on KVM UMIP
> > system(kernel-v5.2-rc4.x86_64). The test is only trying to do
> > asm volatile("smsw %0\n" : "=m" (val));
> > and expect
Commit-ID: fd329f276ecaad7a371d6f91b9bbea031d0c3440
Gitweb: https://git.kernel.org/tip/fd329f276ecaad7a371d6f91b9bbea031d0c3440
Author: Ricardo Neri
AuthorDate: Thu, 27 Jun 2019 19:35:37 -0700
Committer: Thomas Gleixner
CommitDate: Fri, 28 Jun 2019 07:21:00 +0200
x86/mtrr: Skip cache
Commit-ID: 1e03bff3600101bd9158d005e4313132e55bdec8
Gitweb: https://git.kernel.org/tip/1e03bff3600101bd9158d005e4313132e55bdec8
Author: Ricardo Neri
AuthorDate: Thu, 27 Jun 2019 19:35:36 -0700
Committer: Thomas Gleixner
CommitDate: Fri, 28 Jun 2019 07:20:48 +0200
x86/cpu/intel: Clear
ested-by: Alan Cox
Signed-off-by: Ricardo Neri
---
arch/x86/kernel/cpu/intel.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index f17c1a714779..62e366ec0812 100644
--- a/arch/x86/kernel/cpu/intel.c
+++
avi V. Shankar"
Reported-by: Mohammad Etemadi
Signed-off-by: Ricardo Neri
---
arch/x86/kernel/cpu/mtrr/generic.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c
b/arch/x86/kernel/cpu/mtrr/generic.c
index 9356c1c9024d..aa5c
.intel.com/content/dam/www/public/us/en/documents/specification-updates/pentium-dual-core-specification-update.pdf
Ricardo Neri (2):
x86/cpu/intel: Clear cache self-snoop capability in CPUs with known
errata
x86, mtrr: generic: Skip cache flushes on CPUs with cache
self-snooping
arch/
On Thu, Jun 27, 2019 at 10:38:13PM +0200, Thomas Gleixner wrote:
> Ricardo,
>
> On Thu, 27 Jun 2019, Ricardo Neri wrote:
> >
> > +/*
> > + * Processors which have self-snooping capability can handle conflicting
> > + * memory type across CPUs by snooping its
c: "Rafael J. Wysocki"
Cc: Greg Kroah-Hartman
Cc: Jordan Borgner
Cc: "Ravi V. Shankar"
Cc: x...@kernel.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Alan Cox
Signed-off-by: Ricardo Neri
---
arch/x86/kernel/cpu/intel.c | 30 ++
1 file changed
/documents/specification-updates/pentium-dual-core-desktop-e2000-specification-update.pdf
[6]. Errata AN107, AN109,
https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/pentium-dual-core-specification-update.pdf
Ricardo Neri (2):
x86/cpu/intel: Clear cache self-snoop
avi V. Shankar"
Reported-by: Mohammad Etemadi
Signed-off-by: Ricardo Neri
---
arch/x86/kernel/cpu/mtrr/generic.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c
b/arch/x86/kernel/cpu/mtrr/generic.c
index 9356c1c9024d..169672a6935c 10
Kleen
Cc: Tony Luck
Cc: Clemens Ladisch
Cc: Arnd Bergmann
Cc: Philippe Ombredanne
Cc: Kate Stewart
Cc: "Rafael J. Wysocki"
Cc: Stephane Eranian
Cc: Suravee Suthikulpanit
Cc: "Ravi V. Shankar"
Cc: x...@kernel.org
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/hpet.
ro Yamada
Cc: Nayna Jain
Cc: Stephane Eranian
Cc: Suravee Suthikulpanit
Cc: "Ravi V. Shankar"
Cc: x...@kernel.org
Suggested-by: Andi Kleen
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/hpet.h | 2 ++
arch/x86/kernel/watchdog_hld_hpet.c | 27 ++-
te Stewart
Cc: "Rafael J. Wysocki"
Cc: Stephane Eranian
Cc: Suravee Suthikulpanit
Cc: "Ravi V. Shankar"
Cc: x...@kernel.org
Originally-by: Suravee Suthikulpanit
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/hpet.h | 1 +
arch/x86/kernel/hpet.c | 57 ++
.
Signed-off-by: Ricardo Neri
---
arch/x86/include/asm/hpet.h| 2 ++
arch/x86/kernel/tsc.c | 2 ++
arch/x86/kernel/watchdog_hld.c | 7 +++
3 files changed, 11 insertions(+)
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index fd99f2390714..a82cbe17479d 100644
ikulpanit
Cc: x...@kernel.org
Signed-off-by: Ricardo Neri
---
arch/x86/Kconfig.debug | 11 +
arch/x86/include/asm/hpet.h | 13 ++
arch/x86/kernel/Makefile| 1 +
arch/x86/kernel/hpet.c | 3 +-
arch/x86/kernel/watchdog_hld_hpet.c | 335 +++
lpanit
Cc: "Ravi V. Shankar"
Cc: x...@kernel.org
Cc: io...@lists.linux-foundation.org
Signed-off-by: Ricardo Neri
---
drivers/iommu/intel_irq_remapping.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/intel_irq_remapping.c
b/drivers/iommu/i
;Ravi V. Shankar"
Cc: x...@kernel.org
Signed-off-by: Ricardo Neri
--
checkpatch gives the following warning:
CHECK: __setup appears un-documented -- check
Documentation/admin-guide/kernel-parameters.rst
+__setup("nmi_watchdog=", hardlockup_detector_hpet_setup);
This is a fal
On Wed, Apr 10, 2019 at 09:01:52AM +0200, Peter Zijlstra wrote:
> On Tue, Apr 09, 2019 at 06:19:57PM -0700, Ricardo Neri wrote:
> > On Tue, Apr 09, 2019 at 01:28:17PM +0200, Peter Zijlstra wrote:
> > > > @@ -147,6 +161,14 @@ static void set_periodic(struct hpet_hld
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