one already solves the issue...
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 2 +-
> drivers/gpu/drm/drm_dp_helper.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
> drive
; be calling icp_hpd_irq_setup() to ensure that CML-S/TGP platforms function
> correctly anyway, let's move platforms using PCH_ICP which aren't handled
> by gen11_hpd_irq_setup() over to icp_hpd_irq_setup().
>
> Cc: Tejas Upadhyay
> Signed-off-by: Lyude Paul
makes sense to m
On Wed, Feb 10, 2021 at 10:23:58PM -0500, Rodrigo Vivi wrote:
> On Tue, Feb 09, 2021 at 04:28:31PM -0500, Lyude Paul wrote:
> > Apparently the new gen9_bc platforms that Intel has introduced don't
> > provide us with a STRAP config register to read from for initializing DDI
On Mon, Feb 08, 2021 at 06:39:00PM -0500, Lyude Paul wrote:
> Since we're about to implement eDP backlight support in nouveau using the
> standard protocol from VESA, we might as well just take the code that's
> already written for this and move it into a set of shared DRM helpers.
>
> Note that
_CONTROL_MODE_MASK - imirkin
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 15 ++-
> 1 file changed, 2 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_
l on reading DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN. There's not much point in
> doing this, so just return early.
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
&g
give
> us that anyway).
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 101 +-
> 1 file changed, 52 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_back
ncoder)
> ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);
> else if (IS_ROCKETLAKE(dev_priv))
> ddc_pin = rkl_port_to_ddc_pin(dev_priv, port);
> + else if (IS_GEN9_BC(dev_priv) && HAS_PCH_TGP(dev_priv))
> + ddc_pin = gen9bc_
On Tue, Feb 09, 2021 at 04:28:31PM -0500, Lyude Paul wrote:
> Apparently the new gen9_bc platforms that Intel has introduced don't
> provide us with a STRAP config register to read from for initializing DDI
> B, C, and D detection. So, workaround this by hard-coding our strap config
> in
ce skl_hpd_pin() like vsyrjala suggested and use that instead of
> sticking our HPD pin mappings in TGP code
>
> Cc: Matt Roper
> Cc: Jani Nikula
> Cc: Ville Syrjala
> [originally from Tejas's work]
> Signed-off-by: Tejas Upadhyay
> Signed-off-by: Lyude Paul
Reviewed-by
n patch - vsyrjala
>
> Cc: Matt Roper
> Cc: Jani Nikula
> Cc: Ville Syrjala
> [originally from Tejas's work]
> Signed-off-by: Tejas Upadhyay
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_pch.c | 3 ++-
> 1 file changed
On Fri, Feb 05, 2021 at 06:45:11PM -0500, Lyude Paul wrote:
> No functional changes, just move set_vesa_backlight_enable() closer to it's
> only caller: intel_dp_aux_vesa_enable_backlight().
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> ..
match up with what we
> actually need to use them for, like DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT
> for instance).
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_display_types.h| 2 ++
> .../drm/i915/display/intel_dp_aux_backl
n values from each function
> correctly.
>
> Signed-off-by: Lyude Paul
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 41 +--
> 1 file changed, 19 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display
On Mon, Jan 25, 2021 at 07:10:30PM -0500, Lyude Paul wrote:
> Since we're about to implement eDP backlight support in nouveau using the
> standard protocol from VESA, we might as well just take the code that's
> already written for this and move it into a set of shared DRM helpers.
>
> Note that
On Wed, Nov 04, 2020 at 09:37:05AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drm-intel-fixes tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'gen12_emit_fini_breadcrumb':
>
On Wed, Sep 16, 2020 at 01:18:50PM -0400, Lyude Paul wrote:
> Currently, every different type of backlight hook that i915 supports is
> pretty straight forward - you have a backlight, probably through PWM
> (but maybe DPCD), with a single set of platform-specific hooks that are
> used for
vesa to make it clear that they're specific to the VESA interface and
> not Intel's.
>
> Signed-off-by: Lyude Paul
> Cc: thay...@noraisin.net
> Cc: Vasily Khoruzhick
Reviewed-by: Rodrigo Vivi
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 51 ++-
>
* already set to what we want, so as to avoid clearing any state by
> accident
> + */
> + if (careful) {
my first reaction here is why the problem described on the commit message
doesn't
appear during the init, and setting it to the same shouldn't be a problem... but
yeap, I a
On Tue, Sep 15, 2020 at 01:29:38PM -0400, Lyude Paul wrote:
> So-recently a bunch of laptops on the market have started using DPCD
> backlight controls instead of the traditional DDI backlight controls.
> Originally we thought we had this handled by adding VESA backlight
> control support to i915,
On Tue, Sep 15, 2020 at 01:29:35PM -0400, Lyude Paul wrote:
> Since we're about to start adding support for Intel's magic HDR
> backlight interface over DPCD, we need to ensure we're properly
> programming this field so that Intel specific sink services are exposed.
> Otherwise, 0x300-0x3ff will
On Fri, May 29, 2020 at 12:15:27PM +1000, Dave Airlie wrote:
> On Fri, 29 May 2020 at 12:02, Dave Airlie wrote:
> >
> > On Fri, 29 May 2020 at 11:49, Linus Torvalds
> > wrote:
> > >
> > > On Thu, May 28, 2020 at 5:21 PM Dave Airlie wrote:
> > > >
> > > > Seems to have wound down nicely, a
Hi Greg, Ben, and all
Is https://www.kernel.org/category/releases.html updated in terms of EOL?
Some news out of Linaro conference [2] generated a lot of doubts and questions
around.
Specially because on the way it was stated by the news 3.16 wouldn't be active
anymore. So I'm not sure about
Hi Greg, Ben, and all
Is https://www.kernel.org/category/releases.html updated in terms of EOL?
Some news out of Linaro conference [2] generated a lot of doubts and questions
around.
Specially because on the way it was stated by the news 3.16 wouldn't be active
anymore. So I'm not sure about
On Wed, Apr 18, 2018 at 08:46:44AM +0300, Jani Nikula wrote:
> On Tue, 17 Apr 2018, Souptick Joarder wrote:
> > On 17-Apr-2018 9:45 PM, "Matthew Wilcox" wrote:
> >>
> >> On Tue, Apr 17, 2018 at 09:14:32PM +0530, Souptick Joarder wrote:
> >> > Not
On Wed, Apr 18, 2018 at 08:46:44AM +0300, Jani Nikula wrote:
> On Tue, 17 Apr 2018, Souptick Joarder wrote:
> > On 17-Apr-2018 9:45 PM, "Matthew Wilcox" wrote:
> >>
> >> On Tue, Apr 17, 2018 at 09:14:32PM +0530, Souptick Joarder wrote:
> >> > Not exactly. The plan for these patches is to
On Tue, Apr 17, 2018 at 12:02:52PM +0300, Jani Nikula wrote:
> On Mon, 16 Apr 2018, "Srivatsa, Anusha" wrote:
> >>-Original Message-
> >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> >>Sent: Wednesday, April 11, 2018 5:27 AM
> >>To: Ian W MORRISON
On Tue, Apr 17, 2018 at 12:02:52PM +0300, Jani Nikula wrote:
> On Mon, 16 Apr 2018, "Srivatsa, Anusha" wrote:
> >>-Original Message-
> >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> >>Sent: Wednesday, April 11, 2018 5:27 AM
> >>To: Ian W MORRISON
> >>Cc: Vivi, Rodrigo ;
On Mon, Feb 19, 2018 at 10:10:50AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/gpu/drm/i915/intel_breadcrumbs.c
>
> between commit:
>
> 117172c8f9d4 ("drm/i915/breadcrumbs: Ignore unsubmitted signalers")
>
> from
On Mon, Feb 19, 2018 at 10:10:50AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/gpu/drm/i915/intel_breadcrumbs.c
>
> between commit:
>
> 117172c8f9d4 ("drm/i915/breadcrumbs: Ignore unsubmitted signalers")
>
> from
On Sat, Dec 30, 2017 at 12:53:58PM +, Jiri Kosina wrote:
> On Sat, 30 Dec 2017, Jiri Kosina wrote:
>
> > Seems like disabling RC6 on the kernel command line works this around, and
> > I can dock / undock several times in a row with the image always coming
> > up properly on the external
On Sat, Dec 30, 2017 at 12:53:58PM +, Jiri Kosina wrote:
> On Sat, 30 Dec 2017, Jiri Kosina wrote:
>
> > Seems like disabling RC6 on the kernel command line works this around, and
> > I can dock / undock several times in a row with the image always coming
> > up properly on the external
On Sun, Dec 31, 2017 at 10:34:54PM +, Stefan Brüns wrote:
> The ACK/NACK implementation as found in e.g. the G965 has the falling
> clock edge and the release of the data line after the ACK for the received
> byte happen at the same time.
>
> This is conformant with the I2C specification,
On Sun, Dec 31, 2017 at 10:34:54PM +, Stefan Brüns wrote:
> The ACK/NACK implementation as found in e.g. the G965 has the falling
> clock edge and the release of the data line after the ACK for the received
> byte happen at the same time.
>
> This is conformant with the I2C specification,
On Wed, Dec 06, 2017 at 01:00:15AM +, Stephen Rothwell wrote:
> Hi all,
Hi Stephen,
I had just written the email for you about this.
Feel free to ignore that one since you already found the solution
and sorry for the delay on warning you.
>
> After merging the drm-misc tree, today's
On Wed, Dec 06, 2017 at 01:00:15AM +, Stephen Rothwell wrote:
> Hi all,
Hi Stephen,
I had just written the email for you about this.
Feel free to ignore that one since you already found the solution
and sorry for the delay on warning you.
>
> After merging the drm-misc tree, today's
On Mon, Oct 30, 2017 at 07:10:11PM +, Linus Torvalds wrote:
> On Mon, Oct 30, 2017 at 12:00 AM, Fengguang Wu wrote:
> > CC intel-gfx.
>
> Thanks, these are all interesting (even if some of them seem to be
> from random kernels).
>
> Fengguang, is this a new script
On Mon, Oct 30, 2017 at 07:10:11PM +, Linus Torvalds wrote:
> On Mon, Oct 30, 2017 at 12:00 AM, Fengguang Wu wrote:
> > CC intel-gfx.
>
> Thanks, these are all interesting (even if some of them seem to be
> from random kernels).
>
> Fengguang, is this a new script that you started running?
On Wed, Oct 11, 2017 at 08:51:06AM +, Mark Brown wrote:
> On Tue, Oct 10, 2017 at 08:03:00AM +0100, Mark Brown wrote:
> > Hi all,
> >
> > After merging the drm-misc-fixes tree, today's linux-next build
> > (x86_allmodconfig) failed like this:
> >
> > CC [M]
On Wed, Oct 11, 2017 at 08:51:06AM +, Mark Brown wrote:
> On Tue, Oct 10, 2017 at 08:03:00AM +0100, Mark Brown wrote:
> > Hi all,
> >
> > After merging the drm-misc-fixes tree, today's linux-next build
> > (x86_allmodconfig) failed like this:
> >
> > CC [M]
duplicated MMIO
Manasi Navare (1):
drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2017-09-06' of https://github.com/01org/gvt-linux
into drm-intel-next-fixes
Ville Syrjälä (7):
drm/i915: Treat fb->offsets[] as a
duplicated MMIO
Manasi Navare (1):
drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts
Rodrigo Vivi (1):
Merge tag 'gvt-fixes-2017-09-06' of https://github.com/01org/gvt-linux
into drm-intel-next-fixes
Ville Syrjälä (7):
drm/i915: Treat fb->offsets[] as a
_______
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
: Manasi Navare
>
> ping, it seems this patch went under the radar.
yes totally. sorry about that.
merged to dinq. Thanks for patch, review, and heads up
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
Oh, nevermind... I saw the places that depends on changes on other
legacy usage like drm_wait_on_vblank... (not trivial on intel_crt)
and other cases...
So better to just go with the static for now.
Feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>
On Wed, Aug 3, 2016
Oh, nevermind... I saw the places that depends on changes on other
legacy usage like drm_wait_on_vblank... (not trivial on intel_crt)
and other cases...
So better to just go with the static for now.
Feel free to use:
Reviewed-by: Rodrigo Vivi
On Wed, Aug 3, 2016 at 12:22 AM, Daniel Vetter
extern int drm_crtc_vblank_get(struct drm_crtc *crtc);
> extern void drm_crtc_vblank_put(struct drm_crtc *crtc);
> extern void drm_wait_one_vblank(struct drm_device *dev, unsigned int pipe);
> --
> 2.5.5
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
crtc *crtc);
> extern void drm_wait_one_vblank(struct drm_device *dev, unsigned int pipe);
> --
> 2.5.5
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
On Thu, Nov 14, 2013 at 09:36:10AM -0800, Olof Johansson wrote:
> On Thu, Nov 14, 2013 at 8:53 AM, Rodrigo Vivi wrote:
> > On Wed, Nov 13, 2013 at 05:59:43PM -0800, Olof Johansson wrote:
> >> From: Duncan Laurie
> >>
> >> We had been using a DMI
On Wed, Nov 13, 2013 at 05:59:43PM -0800, Olof Johansson wrote:
> From: Duncan Laurie
>
> We had been using a DMI table workaround to select the right
> frequency for devices, but this is fragile and must be updated
> with every new platform.
>
> Instead the default case when VBT is missing is
On Wed, Nov 13, 2013 at 05:59:43PM -0800, Olof Johansson wrote:
From: Duncan Laurie dlau...@chromium.org
We had been using a DMI table workaround to select the right
frequency for devices, but this is fragile and must be updated
with every new platform.
Instead the default case when VBT
On Thu, Nov 14, 2013 at 09:36:10AM -0800, Olof Johansson wrote:
On Thu, Nov 14, 2013 at 8:53 AM, Rodrigo Vivi rodrigo.v...@gmail.com wrote:
On Wed, Nov 13, 2013 at 05:59:43PM -0800, Olof Johansson wrote:
From: Duncan Laurie dlau...@chromium.org
We had been using a DMI table workaround
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