Hi Peter,
On 25/11/2020 14:49, Roger Quadros wrote:
Hardware based role switch is broken as the driver always skips it.
Fix this by registering for SW role switch only if 'usb-role-switch'
property is present in the device tree.
Fixes: 50642709f659 ("usb: cdns3: core: quit if it uses
Hardware based role switch is broken as the driver always skips it.
Fix this by registering for SW role switch only if 'usb-role-switch'
property is present in the device tree.
Fixes: 50642709f659 ("usb: cdns3: core: quit if it uses role switch class")
Signed-off-by: Roger Quadros
--
On 25/11/2020 02:36, Peter Chen wrote:
On 20-11-24 14:22:25, Roger Quadros wrote:
Peter,
On 24/11/2020 13:47, Peter Chen wrote:
On 20-11-24 12:33:34, Roger Quadros wrote:
I am sorry about that. Do you use role switch /sys entry, if you have
used, I prefer using "usb-role-switch"
Peter,
On 24/11/2020 13:47, Peter Chen wrote:
On 20-11-24 12:33:34, Roger Quadros wrote:
I am sorry about that. Do you use role switch /sys entry, if you have
used, I prefer using "usb-role-switch" property at dts to judge if SoC
OTG signals or external signals for role switch. I
+Heikki
Peter,
On 24/11/2020 11:57, Peter Chen wrote:
Best regards,
Peter Chen
-Original Message-
From: Roger Quadros
Sent: 2020年11月24日 17:39
To: Peter Chen
Cc: paw...@cadence.com; gre...@linuxfoundation.org; ba...@kernel.org;
linux-...@vger.kernel.org; linux-kernel
Peter,
On 24/11/2020 08:43, Peter Chen wrote:
On 20-11-23 13:50:51, Roger Quadros wrote:
This reverts commit 50642709f6590fe40afa6d22c32f23f5b842aed5.
This commit breaks hardware based role switching on TI platforms.
cdns->role_sw is always going to be non-zero as it is a poin
ing is not required by the platform.
Signed-off-by: Roger Quadros
---
drivers/usb/cdns3/core.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index a0f73d4711ae..4c1445cf2ad0 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/cor
Some platforms (e.g. TI) will not have any platform data which will
lead to NULL pointer dereference if we don't check for NULL pdata.
Fixes: a284b7fd1b8f ("usb: cdns3: add quirk for enable runtime pm by default")
Reported-by: Nishanth Menon
Signed-off-by: Roger Quadros
---
drivers
On 12/11/2020 03:49, Nishanth Menon wrote:
The default state of a device tree node is "okay". There is no specific
use of explicitly adding status = "okay" in the board dts.
Fixes: 7e7e7dd51d06 ("arm64: dts: ti: k3-am654-base-board: enable USB1")
Signed-off-by: Nis
-by: Peter Chen
Acked-by: Roger Quadros
---
Changelog:
v4
- fixed typo.
- "Acked-by" tag has been added.
v3
- changed error condition checking for dev_irq.
v2
- simplified code as sugested by Roger Quadros.
drivers/usb/cdns3/core.c | 12 ++--
1 file changed, 2 inserti
driver by Chunfeng Yun.
Signed-off-by: Pawel Laszczak
---
Changelog:
v2
- simplified code as sugested by Roger Quadros.
drivers/usb/cdns3/core.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index a0f73d4711ae
On 12/10/2020 09:45, Pawel Laszczak wrote:
Patch removes not used variable 'length' from
cdns3_wa2_descmiss_copy_data function.
Fixes: 141e70fef4ee ("usb: cdns3: gadget: need to handle sg case for workaround 2
case")
Signed-off-by: Pawel Laszczak
Acked-by: Roger Quadros
---
---
Changelog:
v2
- simplified code as sugested by Roger Quadros.
drivers/usb/cdns3/core.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index a0f73d4711ae..85ef3025b293 100644
--- a/drivers/usb/cdns3/core.c
Pawel,
On 08/10/2020 06:57, Pawel Laszczak wrote:
Siergei,
On 10/7/20 11:15 AM, Roger Quadros wrote:
[...]
Patch removes not used variable 'length' from
cdns3_wa2_descmiss_copy_data function.
Signed-off-by: Pawel Laszczak
Fixes: commit 141e70fef4ee ("usb: cdns3: gadget: need to h
On 08/10/2020 07:18, Pawel Laszczak wrote:
Hi Roger,
On 07/10/2020 06:35, Pawel Laszczak wrote:
On failure, the platform_get_irq_byname prints an error message
so, patch removes error message related to this function from
core.c file.
A change was suggested during reviewing CDNSP driver
On 07/10/2020 06:39, Pawel Laszczak wrote:
Patch removes not used variable 'length' from
cdns3_wa2_descmiss_copy_data function.
Signed-off-by: Pawel Laszczak
Fixes: commit 141e70fef4ee ("usb: cdns3: gadget: need to handle sg case for
workaround 2 case")
Acked-by: Rog
Pawel,
On 07/10/2020 06:35, Pawel Laszczak wrote:
On failure, the platform_get_irq_byname prints an error message
so, patch removes error message related to this function from
core.c file.
A change was suggested during reviewing CDNSP driver by Chunfeng Yun.
Signed-off-by: Pawel Laszczak
---
On 07/10/2020 07:02, Pawel Laszczak wrote:
Function cdns3_gadget_exit is used only in gadget.c file.
This patch removes declaration and definition of this
function from gadget-export.h file and makes it static.
Signed-off-by: Pawel Laszczak
Acked-by: Roger Quadros
---
drivers/usb
Pawel,
On 05/10/2020 08:54, Pawel Laszczak wrote:
Roger,
Pawel,
On 02/10/2020 12:08, Pawel Laszczak wrote:
Roger,
On 30/09/2020 09:57, Pawel Laszczak wrote:
To avoid duplicate error information patch replaces platform_get_irq_byname
into platform_get_irq_byname_optional.
What is
Pawel,
On 02/10/2020 12:08, Pawel Laszczak wrote:
Roger,
On 30/09/2020 09:57, Pawel Laszczak wrote:
To avoid duplicate error information patch replaces platform_get_irq_byname
into platform_get_irq_byname_optional.
What is duplicate error information?
The function
Pawel,
On 30/09/2020 09:57, Pawel Laszczak wrote:
To avoid duplicate error information patch replaces platform_get_irq_byname
into platform_get_irq_byname_optional.
What is duplicate error information?
A change was suggested during reviewing CDNSP driver by Chunfeng Yun.
Signed-off-by:
-by: Kishon Vijay Abraham I
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64/boot/dts/ti/k3-j7200-common
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot
chosen to use PCI2 and QSGMII as default. So restrict
USB0 to high-speed mode.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
.../dts/ti/k3-j7200-common-proc-board.dts | 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can
select upto 4 different IPs. Define all the possible functions.
Cc: Peter Rosin
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
Acked-by: Rob Herring
Acked-by: Peter Rosin
---
include/dt-bindings/mux/ti-serdes.h
ommon-proc-board: Configure the SERDES lane
function
Roger Quadros (5):
dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
arm64: dts: ti: k3-j7200-main: Add USB
Hi Sergei,
On 15/09/2020 19:15, Sergei Shtylyov wrote:
Hello!
On 9/15/20 2:45 PM, Roger Quadros wrote:
Controller version 0x0002450D has USB2 PHY RX sensitivity issues
that needs to be worked around by enabling phyrst-a-enable bit
in PHYRST_CFG register.
There is no way to know controller
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200
-by: Kishon Vijay Abraham I
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 8e534ef8a3f5
chosen to use PCI2 and QSGMII as default. So restrict
USB0 to high-speed mode.
Signed-off-by: Roger Quadros
---
.../dts/ti/k3-j7200-common-proc-board.dts | 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can
select upto 4 different IPs. Define all the possible functions.
Cc: Peter Rosin
Signed-off-by: Roger Quadros
---
include/dt-bindings/mux/ti-serdes.h | 22 ++
1 file changed, 22 insertions(+)
diff --git
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index
underscore.
Kishon Vijay Abraham I (1):
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane
function
Roger Quadros (5):
dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
arm64: dts: ti: k3-j7200-main.dts
-main: Add system controller node
and SERDES lane mux")
Signed-off-by: Roger Quadros
Acked-by: Peter Rosin
---
Changelog:
v2
- use _DT_BINDINGS_MUX_TI_SERDES
- Add unused lane configurations for completeness
.../dts/ti/k3-j721e-common-proc-board.dts | 11 +--
arch/arm64/boot/dts/t
We intend to use one header file for SERDES MUX for all
TI SoCs so rename the header file.
The exsting macros are too generic. Prefix them with SoC name.
Signed-off-by: Roger Quadros
---
.../dts/ti/k3-j721e-common-proc-board.dts | 11 ++--
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 13
Hi Peter & Nishanth,
On 16/09/2020 18:45, Nishanth Menon wrote:
On 06:52-20200916, Peter Rosin wrote:
Hi,
Sorry for the delay.
On 2020-09-15 13:20, Roger Quadros wrote:
Each SERDES lane mux can select upto 4 different IPs.
There are 4 lanes in each J7200 SERDES. Define all
the poss
.
v2:
- fixed warnings when built with W=2. Still one warning is present
as property name "dr_mode" by USB core contains underscore.
Kishon Vijay Abraham I (1):
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane
function
Roger Quadros (5):
dt-bindings: mux-j720
and
device modes, so we rely on a DT property do decide when to
apply the workaround.
Signed-off-by: Pawel Laszczak
Signed-off-by: Roger Quadros
---
drivers/usb/cdns3/core.c | 2 ++
drivers/usb/cdns3/core.h | 1 +
drivers/usb/cdns3/drd.c | 12
drivers/usb/cdns3/drd.h | 5 -
4
modes, so we add this DT property.
Signed-off-by: Roger Quadros
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/usb/cdns,usb3.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
b/Documentation/devicetree/bindings/usb/cdns
is required
for the quirk.
Pawel Laszczak (1):
usb: cdns3: Enable workaround for USB2.0 PHY Rx compliance test PHY
lockup
Roger Quadros (2):
dt-bindings: usb: Convert cdns-usb3.txt to YAML schema
dt-bindings: usb: cdns,usb3: Add cdns,phyrst-a-enable property
.../devicetree/bindings/usb
Converts cdns-usb3.txt to YAML schema cdns,usb3.yaml
Signed-off-by: Roger Quadros
---
.../devicetree/bindings/usb/cdns,usb3.yaml| 92 +++
.../devicetree/bindings/usb/cdns-usb3.txt | 45 -
2 files changed, 92 insertions(+), 45 deletions(-)
create mode 100644
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b
Each SERDES lane mux can select upto 4 different IPs.
There are 4 lanes in each J7200 SERDES. Define all
the possible functions in this file.
Cc: Peter Rosin
Signed-off-by: Roger Quadros
---
include/dt-bindings/mux/mux-j7200-wiz.h | 29 +
1 file changed, 29 insertions
-by: Kishon Vijay Abraham I
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 8e534ef8a3f5
chosen to use PCI2 and QSGMII as default. So restrict
USB0 to high-speed mode.
Signed-off-by: Roger Quadros
---
.../dts/ti/k3-j7200-common-proc-board.dts | 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index
to
`of_platform_device_create'
Fixes: ea0c0ad6b6eb ("memory: Enable compile testing for most of the drivers")
Signed-off-by: Krzysztof Kozlowski
Acked-by: Roger Quadros
---
drivers/memory/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/memory/Kconfig b/driv
On 11/09/2020 17:55, Krzysztof Kozlowski wrote:
On Fri, 11 Sep 2020 at 16:48, Roger Quadros wrote:
Hi Krzysztof,
On 11/09/2020 17:32, Krzysztof Kozlowski wrote:
SPARC comes without CONFIG_OF_ADDRESS thus compile testing fails on
linking:
/usr/bin/sparc64-linux-gnu-ld: drivers/memory
Hi Krzysztof,
On 11/09/2020 17:32, Krzysztof Kozlowski wrote:
SPARC comes without CONFIG_OF_ADDRESS thus compile testing fails on
linking:
/usr/bin/sparc64-linux-gnu-ld: drivers/memory/omap-gpmc.o: in function
`gpmc_probe_generic_child':
omap-gpmc.c:(.text.unlikely+0x14ec): undefined
+Peter
On 07/09/2020 17:52, Roger Quadros wrote:
Each SERDES lane mux can select upto 4 different IPs.
There are 4 lanes in each J7200 SERDES. Define all
the possible functions in this file.
Signed-off-by: Roger Quadros
---
include/dt-bindings/mux/mux-j7200-wiz.h | 29
ot; by USB core contains underscore.
Kishon Vijay Abraham I (1):
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane
function
Roger Quadros (5):
dt-bindings: mux-j7200-wiz: Add lane function defines
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
arm64: d
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200
Each SERDES lane mux can select upto 4 different IPs.
There are 4 lanes in each J7200 SERDES. Define all
the possible functions in this file.
Signed-off-by: Roger Quadros
---
include/dt-bindings/mux/mux-j7200-wiz.h | 29 +
1 file changed, 29 insertions(+)
create mode
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index
-by: Kishon Vijay Abraham I
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 8e534ef8a3f5
Enable USB0 port in high-speed (2.0) mode.
The board uses lane 3 of SERDES for USB. Set the mux
accordingly.
Signed-off-by: Roger Quadros
---
.../dts/ti/k3-j7200-common-proc-board.dts | 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200
Roger Quadros (5):
dt-bindings: mux-j7200-wiz: Add lane function defines
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
arm64: dts: ti: k3-j7200-main: Add USB controller
arm64: dts: ti: k3-j7200-common-proc-board: Add
Enable USB0 port in high-speed (2.0) mode.
The board uses lane 3 of SERDES for USB. Set the mux
accordingly.
Signed-off-by: Roger Quadros
---
.../dts/ti/k3-j7200-common-proc-board.dts | 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200
Each SERDES lane mux can select upto 4 different IPs.
There are 4 lanes in each J7200 SERDES. Define all
the possible functions in this file.
Signed-off-by: Roger Quadros
---
include/dt-bindings/mux/mux-j7200-wiz.h | 29 +
1 file changed, 29 insertions(+)
create mode
-by: Kishon Vijay Abraham I
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 8e534ef8a3f5
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/dts/ti/k3-j7200
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b
modes, so we add this DT property.
Signed-off-by: Roger Quadros
---
Documentation/devicetree/bindings/usb/cdns,usb3.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
index
Converts cdns-usb3.txt to YAML schema cdns,usb3.yaml
Signed-off-by: Roger Quadros
---
.../devicetree/bindings/usb/cdns,usb3.yaml| 89 +++
.../devicetree/bindings/usb/cdns-usb3.txt | 45 --
2 files changed, 89 insertions(+), 45 deletions(-)
create mode 100644
workaround for USB2.0 PHY Rx compliance test PHY
lockup
Roger Quadros (2):
dt-bindings: usb: Convert cdns-usb3.txt to YAML schema
dt-bindings: usb: cdns,usb3: Add cdns,phyrst-a-enable property
.../devicetree/bindings/usb/cdns,usb3.yaml| 93 +++
.../devicetree/bindings/usb
and
device modes, so we rely on a DT property do decide when to
apply the workaround.
Signed-off-by: Pawel Laszczak
Signed-off-by: Roger Quadros
---
drivers/usb/cdns3/core.c | 2 ++
drivers/usb/cdns3/core.h | 1 +
drivers/usb/cdns3/drd.c | 12
drivers/usb/cdns3/drd.h | 5 -
4
Peter,
On 27/08/2020 14:14, Peter Chen wrote:
On 20-08-25 15:00:58, Roger Quadros wrote:
Controller version 0x0002450D has USB2 PHY RX sensitivity issues
that needs to be worked around by enabling phyrst-a-enable bit
in PHYRST_CFG register.
There is no way to distinguish between
char *name)
^~~~
Move them to #ifdef CONFIG_OF block to fix this.
Signed-off-by: YueHaibing
Acked-by: Roger Quadros
---
v3: move the functions to #ifdef block
v2: update commit log
---
drivers/memory/omap-gpmc.c | 114 ++---
1 file
Hi,
On 01/09/2020 10:09, YueHaibing wrote:
If CONFIG_OF is not set, make W=1 warns:
drivers/memory/omap-gpmc.c:987:12: warning: ‘gpmc_cs_remap’ defined but not
used [-Wunused-function]
static int gpmc_cs_remap(int cs, u32 base)
^
drivers/memory/omap-gpmc.c:926:20:
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
Changelog:
v5
- Added "ti,am437x-usb2" compatible.
v4
- fix example to fix dt_binding_check warnings
- '#phy-cells' -> "#phy-cells"
- Add 'oneOf' to compatible logic to a
is resend, please fix it as well.
With the sizeof(*p) change.
Acked-by: Roger Quadros
cheers,
-roger
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 27/08/2020 03:24, Peter Chen wrote:
On 20-08-26 15:49:57, Roger Quadros wrote:
Peter,
On 26/08/2020 11:07, Peter Chen wrote:
On 20-08-26 04:04:01, Pawel Laszczak wrote:
On 20-08-25 15:00:59, Roger Quadros wrote:
From: Pawel Laszczak
USB2.0 PHY hangs in Rx Compliance test when
Hi,
On 26/08/2020 15:59, YueHaibing wrote:
If CONFIG_OF is n, gcc fails:
drivers/memory/omap-gpmc.o: In function `gpmc_omap_onenand_set_timings':
omap-gpmc.c:(.text+0x2a88): undefined reference to `gpmc_read_settings_dt'
Add gpmc_read_settings_dt() helper function to fix this.
Fixes:
ic allocator for GPMC memory space")
Signed-off-by: Dan Carpenter
Acked-by: Roger Quadros
---
drivers/memory/omap-gpmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
index cd9e80748591..fd245b82163a 100644
Peter,
On 26/08/2020 11:07, Peter Chen wrote:
On 20-08-26 04:04:01, Pawel Laszczak wrote:
On 20-08-25 15:00:59, Roger Quadros wrote:
From: Pawel Laszczak
USB2.0 PHY hangs in Rx Compliance test when the incoming packet
amplitude is varied below and above the Squelch Level of Receiver
property to decide when to apply the workaround.
Signed-off-by: Pawel Laszczak
Signed-off-by: Roger Quadros
---
drivers/usb/cdns3/core.c | 2 ++
drivers/usb/cdns3/core.h | 1 +
drivers/usb/cdns3/drd.c | 12
drivers/usb/cdns3/drd.h | 5 -
4 files changed, 19 insertions(+), 1
Hi,
This series converts DT binding to YAML schema.
Then adds a new property to enable workaround for USB2.0 PHY
Rx compliance issues.
cheers,
-roger
Pawel Laszczak (1):
usb: cdns3: Enable workaround for USB2.0 PHY Rx compliance test PHY
lockup
Roger Quadros (2):
dt-bindings: usb
Converts cdns-usb3.txt to YAML schema cdns,usb3.yaml
Signed-off-by: Roger Quadros
---
.../devicetree/bindings/usb/cdns,usb3.yaml| 89 +++
.../devicetree/bindings/usb/cdns-usb3.txt | 45 --
2 files changed, 89 insertions(+), 45 deletions(-)
create mode 100644
-off-by: Roger Quadros
---
Documentation/devicetree/bindings/usb/cdns,usb3.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
index 7bc0263accee..e670adc955e1 100644
abled by Default Without VBUS
Presence"
Signed-off-by: Roger Quadros
Tested-by: Jan Kiszka
---
drivers/phy/ti/phy-omap-usb2.c | 47 +-
1 file changed, 40 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/ti/phy-omap-usb2.c b/drivers/phy/ti/phy-omap-us
Fix checkpatch warnings and sort the include files alphabetically.
Signed-off-by: Roger Quadros
---
drivers/phy/ti/phy-omap-usb2.c | 36 --
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/drivers/phy/ti/phy-omap-usb2.c b/drivers/phy/ti/phy-omap
rger-det"
v2
- Address Rob's comments on YAML schema.
Roger Quadros (2):
phy: omap-usb2-phy: disable PHY charger detect
phy: omap-usb2-phy: fix coding style issues
drivers/phy/ti/phy-omap-usb2.c | 83 +++---
1 file changed, 57 insertions(+), 26 deletions(-)
--
Tex
Hi,
On 21/08/2020 11:11, Roger Quadros wrote:
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
v4
- fix example to fix dt_binding_check warnings
- '#phy-cells' -> "#phy-cells"
- Add 'oneOf' to compatible logic to allow just
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
v4
- fix example to fix dt_binding_check warnings
- '#phy-cells' -> "#phy-cells"
- Add 'oneOf' to compatible logic to allow just "ti,omap-usb2" as valid
v3
- Removed
abled by Default Without VBUS
Presence"
Signed-off-by: Roger Quadros
Tested-by: Jan Kiszka
---
Vinod/Kishon,
As this is an errata fix, it should be targetted for 5.9-rc cycle.
Thanks.
cheers,
-roger
Changelog:
v5
- don't use dt property to enable workaround. Use soc_device_match() instead.
v4
- f
abled by Default Without VBUS
Presence"
Signed-off-by: Roger Quadros
---
Changelog:
v5
- don't use dt property to enable workaround. Use soc_device_match() instead.
v4
- fix example to fix dt_binding_check warnings
- '#phy-cells' -> "#phy-cells"
- Add 'oneOf' to compatible logic to a
Kishon,
On 16/07/2020 11:22, Roger Quadros wrote:
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
Can you please pick just this one patch from this series for -next? Thanks.
cheers,
-roger
---
.../devicetree/bindings/phy/ti,omap-usb2
On 19/08/2020 12:02, Jan Kiszka wrote:
On 16.07.20 10:22, Roger Quadros wrote:
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs. Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.
Using
id
v3
- Removed quotes from compatibles
- changed property to "ti,disable-charger-det"
v2
- Address Rob's comments on YAML schema.
cheers,
-roger
Roger Quadros (3):
dt-binding: phy: convert ti,omap-usb2 to YAML
dt-binding: phy: ti,omap-usb2: Add quirk to disable charger detection
Add "ti,disable-charger-det" property to disable the USB2_PHY Charger Detect
logic.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bi
workaround for AM654x PG1.0.
This addresses Silicon Errata:
i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS
Presence"
Signed-off-by: Bin Liu
Signed-off-by: Sekhar Nori
Signed-off-by: Roger Quadros
---
drivers/phy/ti/phy-omap-usb2.c | 35 +
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/ti,omap-usb2.yaml | 72 +++
.../devicetree/bindings/phy/ti-phy.txt| 37 --
2 files changed, 72 insertions(+), 37 deletions(-)
create
On 03/07/2020 11:58, Roger Quadros wrote:
Hi Rob,
On 02/07/2020 23:47, Rob Herring wrote:
On Tue, 30 Jun 2020 12:27:27 +0300, Roger Quadros wrote:
Move ti,omap-usb2 to its own YAML schema.
Signed-off-by: Roger Quadros
Reviewed-by: Rob Herring
---
.../devicetree/bindings/phy/ti,omap
There were some review comments after the patch was integrated.
Address those.
Fixes: 1883a934e156 ("dt-bindings: usb: convert keystone-usb.txt to YAML")
Signed-off-by: Roger Quadros
---
.../bindings/usb/ti,keystone-dwc3.yaml| 51 ++-
1 file changed, 37 inserti
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