RE: [Intel-wired-lan] [PATCH V2 net] ice: Re-organizes reqstd/avail {R, T}XQ check/code for efficiency+readability
> From: Brelinski, TonyX [mailto:tonyx.brelin...@intel.com]
> Sent: Tuesday, April 20, 2021 9:26 PM
>
> > From: Intel-wired-lan On Behalf Of
> > Salil Mehta
> > Sent: Tuesday, April 13, 2021 3:45 PM
> > To: da...@davemloft.net; k...@kernel.org
> > Cc: salil.me...@huawei.com; linux...@openeuler.org;
> > net...@vger.kernel.org; linux...@huawei.com; linux-
> > ker...@vger.kernel.org; Jeff Kirsher ; intel-
> > wired-...@lists.osuosl.org
> > Subject: [Intel-wired-lan] [PATCH V2 net] ice: Re-organizes reqstd/avail {R,
> > T}XQ check/code for efficiency+readability
> >
> > If user has explicitly requested the number of {R,T}XQs, then it is
> > unnecessary to get the count of already available {R,T}XQs from the PF
> > avail_{r,t}xqs bitmap. This value will get overridden by user specified
> > value
> in
> > any case.
> >
> > This patch does minor re-organization of the code for improving the flow and
> > readabiltiy. This scope of improvement was found during the review of the
> > ICE driver code.
> >
> > FYI, I could not test this change due to unavailability of the hardware.
> > It would be helpful if somebody can test this patch and provide Tested-by
> > Tag. Many thanks!
> >
> > Fixes: 87324e747fde ("ice: Implement ethtool ops for channels")
> > Cc: intel-wired-...@lists.osuosl.org
> > Cc: Jeff Kirsher
> > Signed-off-by: Salil Mehta
> > --
> > Change V1->V2
> > (*) Fixed the comments from Anthony Nguyen(Intel)
> > Link: https://lkml.org/lkml/2021/4/12/1997
> > ---
> > drivers/net/ethernet/intel/ice/ice_lib.c | 14 --
> > 1 file changed, 8 insertions(+), 6 deletions(-)
>
> Tested-by: Tony Brelinski (A Contingent Worker at
> Intel)
Many thanks!
Salil.
[PATCH V2 net] ice: Re-organizes reqstd/avail {R,T}XQ check/code for efficiency+readability
If user has explicitly requested the number of {R,T}XQs, then it is
unnecessary to get the count of already available {R,T}XQs from the
PF avail_{r,t}xqs bitmap. This value will get overridden by user specified
value in any case.
This patch does minor re-organization of the code for improving the flow
and readabiltiy. This scope of improvement was found during the review of
the ICE driver code.
FYI, I could not test this change due to unavailability of the hardware.
It would be helpful if somebody can test this patch and provide Tested-by
Tag. Many thanks!
Fixes: 87324e747fde ("ice: Implement ethtool ops for channels")
Cc: intel-wired-...@lists.osuosl.org
Cc: Jeff Kirsher
Signed-off-by: Salil Mehta
--
Change V1->V2
(*) Fixed the comments from Anthony Nguyen(Intel)
Link: https://lkml.org/lkml/2021/4/12/1997
---
drivers/net/ethernet/intel/ice/ice_lib.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c
b/drivers/net/ethernet/intel/ice/ice_lib.c
index d13c7fc8fb0a..d77133d6baa7 100644
--- a/drivers/net/ethernet/intel/ice/ice_lib.c
+++ b/drivers/net/ethernet/intel/ice/ice_lib.c
@@ -161,12 +161,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16
vf_id)
switch (vsi->type) {
case ICE_VSI_PF:
- vsi->alloc_txq = min3(pf->num_lan_msix,
- ice_get_avail_txq_count(pf),
- (u16)num_online_cpus());
if (vsi->req_txq) {
vsi->alloc_txq = vsi->req_txq;
vsi->num_txq = vsi->req_txq;
+ } else {
+ vsi->alloc_txq = min3(pf->num_lan_msix,
+ ice_get_avail_txq_count(pf),
+ (u16)num_online_cpus());
}
pf->num_lan_tx = vsi->alloc_txq;
@@ -175,12 +176,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16
vf_id)
if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
vsi->alloc_rxq = 1;
} else {
- vsi->alloc_rxq = min3(pf->num_lan_msix,
- ice_get_avail_rxq_count(pf),
- (u16)num_online_cpus());
if (vsi->req_rxq) {
vsi->alloc_rxq = vsi->req_rxq;
vsi->num_rxq = vsi->req_rxq;
+ } else {
+ vsi->alloc_rxq = min3(pf->num_lan_msix,
+
ice_get_avail_rxq_count(pf),
+ (u16)num_online_cpus());
}
}
--
2.17.1
RE: [PATCH net] ice: Re-organizes reqstd/avail {R,T}XQ check/code for efficiency+readability
Hi Anthony,
Thanks for reviewing!
> From: Nguyen, Anthony L [mailto:anthony.l.ngu...@intel.com]
> Sent: Monday, April 12, 2021 11:41 PM
> To: da...@davemloft.net; k...@kernel.org; Salil Mehta
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; Brandeburg, Jesse
> ; linux...@openeuler.org; Tieman, Henry W
> ; Linuxarm
> Subject: Re: [PATCH net] ice: Re-organizes reqstd/avail {R,T}XQ check/code for
> efficiency+readability
>
> On Sun, 2021-04-11 at 02:45 +0100, Salil Mehta wrote:
> > If user has explicitly requested the number of {R,T}XQs, then it is
> > unnecessary
> > to get the count of already available {R,T}XQs from the PF
> > avail_{r,t}xqs
> > bitmap. This value will get overriden by user specified value in any
>
> s/overriden/overridden
Ok.
>
> > case.
> >
> > This patch does minor re-organization of the code for improving the
> > flow and
> > readabiltiy. This scope of improvement was found during the review of
> > the ICE
> > driver code.
>
> The changes themselves look ok, but there are some checkpatch issues.
> Also, could you include intel-wired-...@lists.osuosl.org
Sure. will fix them.
>
> > FYI, I could not test this change due to unavailability of the
> > hardware. It
> > would helpful if somebody can test this and provide Tested-by Tag.
> > Many thanks!
> >
> > Fixes: 11b7551e096d ("ice: Implement ethtool ops for channels")
>
> This commit id doesn't exist.
Will fix. Sorry about this.
>
> > Signed-off-by: Salil Mehta
> > ---
> > drivers/net/ethernet/intel/ice/ice_lib.c | 14 --
> > 1 file changed, 8 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c
> > b/drivers/net/ethernet/intel/ice/ice_lib.c
> > index d13c7fc8fb0a..161e8dfe548c 100644
> > --- a/drivers/net/ethernet/intel/ice/ice_lib.c
> > +++ b/drivers/net/ethernet/intel/ice/ice_lib.c
> > @@ -161,12 +161,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi
> > *vsi, u16 vf_id)
> >
> > switch (vsi->type) {
> > case ICE_VSI_PF:
> > - vsi->alloc_txq = min3(pf->num_lan_msix,
> > - ice_get_avail_txq_count(pf),
> > - (u16)num_online_cpus());
> > if (vsi->req_txq) {
> > vsi->alloc_txq = vsi->req_txq;
> > vsi->num_txq = vsi->req_txq;
> > + } else {
> > + vsi->alloc_txq = min3(pf->num_lan_msix,
> > +ice_get_avail_txq_count(pf),
> > +(u16)num_online_cpus());
>
> Alignment is incorrect.
Ok. Will check, perhaps the cause of the checkpatch.pl errors.
>
> > }
> >
> > pf->num_lan_tx = vsi->alloc_txq;
> > @@ -175,12 +176,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi
> > *vsi, u16 vf_id)
> > if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
> > vsi->alloc_rxq = 1;
> > } else {
> > - vsi->alloc_rxq = min3(pf->num_lan_msix,
> > - ice_get_avail_rxq_count(p
> > f),
> > - (u16)num_online_cpus());
> > if (vsi->req_rxq) {
> > vsi->alloc_rxq = vsi->req_rxq;
> > vsi->num_rxq = vsi->req_rxq;
> > + } else {
> > + vsi->alloc_rxq = min3(pf->num_lan_msix,
> > +ice_get_avail_rxq_coun
> > t(pf),
> > +(u16)num_online_cpus()
>
> Same, alignment is incorrect.
Ok. Will fix.
Thanks
Salil.
[PATCH net] ice: Re-organizes reqstd/avail {R,T}XQ check/code for efficiency+readability
If user has explicitly requested the number of {R,T}XQs, then it is unnecessary
to get the count of already available {R,T}XQs from the PF avail_{r,t}xqs
bitmap. This value will get overriden by user specified value in any case.
This patch does minor re-organization of the code for improving the flow and
readabiltiy. This scope of improvement was found during the review of the ICE
driver code.
FYI, I could not test this change due to unavailability of the hardware. It
would helpful if somebody can test this and provide Tested-by Tag. Many thanks!
Fixes: 11b7551e096d ("ice: Implement ethtool ops for channels")
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/intel/ice/ice_lib.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c
b/drivers/net/ethernet/intel/ice/ice_lib.c
index d13c7fc8fb0a..161e8dfe548c 100644
--- a/drivers/net/ethernet/intel/ice/ice_lib.c
+++ b/drivers/net/ethernet/intel/ice/ice_lib.c
@@ -161,12 +161,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16
vf_id)
switch (vsi->type) {
case ICE_VSI_PF:
- vsi->alloc_txq = min3(pf->num_lan_msix,
- ice_get_avail_txq_count(pf),
- (u16)num_online_cpus());
if (vsi->req_txq) {
vsi->alloc_txq = vsi->req_txq;
vsi->num_txq = vsi->req_txq;
+ } else {
+ vsi->alloc_txq = min3(pf->num_lan_msix,
+ice_get_avail_txq_count(pf),
+(u16)num_online_cpus());
}
pf->num_lan_tx = vsi->alloc_txq;
@@ -175,12 +176,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16
vf_id)
if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
vsi->alloc_rxq = 1;
} else {
- vsi->alloc_rxq = min3(pf->num_lan_msix,
- ice_get_avail_rxq_count(pf),
- (u16)num_online_cpus());
if (vsi->req_rxq) {
vsi->alloc_rxq = vsi->req_rxq;
vsi->num_rxq = vsi->req_rxq;
+ } else {
+ vsi->alloc_rxq = min3(pf->num_lan_msix,
+ice_get_avail_rxq_count(pf),
+(u16)num_online_cpus());
}
}
--
2.17.1
[PATCH net] net: hns3: Trivial spell fix in hns3 driver
Some trivial spelling mistakes which caught my eye during the
review of the code.
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +-
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 2dd2af269b46..b0dbe6dcaa7b 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -11210,7 +11210,7 @@ static int hclge_set_channels(struct hnae3_handle
*handle, u32 new_tqps_num,
if (ret)
return ret;
- /* RSS indirection table has been configuared by user */
+ /* RSS indirection table has been configured by user */
if (rxfh_configured)
goto out;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 700e068764c8..4c5ec5e38cea 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -2193,7 +2193,7 @@ static void hclgevf_reset_service_task(struct hclgevf_dev
*hdev)
if (test_and_clear_bit(HCLGEVF_RESET_PENDING,
>reset_state)) {
- /* PF has initmated that it is about to reset the hardware.
+ /* PF has intimated that it is about to reset the hardware.
* We now have to poll & check if hardware has actually
* completed the reset sequence. On hardware reset completion,
* VF needs to reset the client and ae device.
@@ -3497,7 +3497,7 @@ static int hclgevf_set_channels(struct hnae3_handle
*handle, u32 new_tqps_num,
if (ret)
return ret;
- /* RSS indirection table has been configuared by user */
+ /* RSS indirection table has been configured by user */
if (rxfh_configured)
goto out;
--
2.17.1
RE: [Linuxarm] Re: [PATCH net] net: hns3: Limiting the scope of vector_ring_chain variable
Hi Dave,
Hope I am not missing something and not sure how this patchwork bot works,
the patch was sent for -net repo (i.e. bug fixes branch) but it got applied
to the -net-next repo.
> Subject: [Linuxarm] Re: [PATCH net] net: hns3: Limiting the scope of
> vector_ring_chain variable
[...]
> Hello:
>
> This patch was applied to netdev/net-next.git (refs/heads/master):
>
I was wondering if I missed anything in my submission or because of some
other reason this patch was chosen to be applied to the -net-next repo
instead. Perhaps this is not classified as bug?
Many thanks
Salil
> From: patchwork-bot+netdev...@kernel.org
> [mailto:patchwork-bot+netdev...@kernel.org]
> Sent: Monday, April 5, 2021 11:10 PM
> To: Salil Mehta
> Cc: da...@davemloft.net; k...@kernel.org; net...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Linuxarm ;
> linux...@openeuler.org
> Subject: [Linuxarm] Re: [PATCH net] net: hns3: Limiting the scope of
> vector_ring_chain variable
>
> Hello:
>
> This patch was applied to netdev/net-next.git (refs/heads/master):
>
> On Mon, 5 Apr 2021 18:28:25 +0100 you wrote:
> > Limiting the scope of the variable vector_ring_chain to the block where it
> > is used.
> >
> > Fixes: 424eb834a9be ("net: hns3: Unified HNS3 {VF|PF} Ethernet Driver for
> > hip08
> SoC")
> > Signed-off-by: Salil Mehta
> > ---
> > drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
>
> Here is the summary with links:
> - [net] net: hns3: Limiting the scope of vector_ring_chain variable
> https://git.kernel.org/netdev/net-next/c/d392ecd1bc29
>
> You are awesome, thank you!
> --
> Deet-doot-dot, I am a bot.
> https://korg.docs.kernel.org/patchwork/pwbot.html
>
> ___
> Linuxarm mailing list -- linux...@openeuler.org
> To unsubscribe send an email to linuxarm-le...@openeuler.org
[PATCH net] net: hns3: Limiting the scope of vector_ring_chain variable
Limiting the scope of the variable vector_ring_chain to the block where it
is used.
Fixes: 424eb834a9be ("net: hns3: Unified HNS3 {VF|PF} Ethernet Driver for hip08
SoC")
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index bf4302a5cf95..65752f363f43 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -3704,7 +3704,6 @@ static void hns3_nic_set_cpumask(struct hns3_nic_priv
*priv)
static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
{
- struct hnae3_ring_chain_node vector_ring_chain;
struct hnae3_handle *h = priv->ae_handle;
struct hns3_enet_tqp_vector *tqp_vector;
int ret;
@@ -3736,6 +3735,8 @@ static int hns3_nic_init_vector_data(struct hns3_nic_priv
*priv)
}
for (i = 0; i < priv->vector_num; i++) {
+ struct hnae3_ring_chain_node vector_ring_chain;
+
tqp_vector = >tqp_vector[i];
tqp_vector->rx_group.total_bytes = 0;
--
2.17.1
[PATCH V2 net 2/2] net: hns3: Remove un-necessary 'else-if' in the hclge_reset_event()
Code to defer the reset(which caps the frequency of the reset) schedules the
timer and returns. Hence, following 'else-if' looks un-necessary.
Fixes: 9de0b86f6444 ("net: hns3: Prevent to request reset frequently")
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 58d210bbb311..2dd2af269b46 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3980,7 +3980,9 @@ static void hclge_reset_event(struct pci_dev *pdev,
struct hnae3_handle *handle)
HCLGE_RESET_INTERVAL))) {
mod_timer(>reset_timer, jiffies + HCLGE_RESET_INTERVAL);
return;
- } else if (hdev->default_reset_request) {
+ }
+
+ if (hdev->default_reset_request) {
hdev->reset_level =
hclge_get_reset_level(ae_dev,
>default_reset_request);
--
2.17.1
[PATCH V2 net 0/2] Misc. fixes for hns3 driver
Fixes for the miscellaneous problems found during the review of the code. Change Summary: Patch 1/2, Change V1->V2: [1] Fixed comments from Leon Romanovsky Link: https://lkml.org/lkml/2021/4/4/14 Patch 2/2, Change V1->V2: None Salil Mehta (2): net: hns3: Remove the left over redundant check & assignment net: hns3: Remove un-necessary 'else-if' in the hclge_reset_event() drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.17.1
[PATCH V2 net 1/2] net: hns3: Remove the left over redundant check & assignment
This removes the left over check and assignment which is no longer used
anywhere in the function and should have been removed as part of the
below mentioned patch.
Fixes: 012fcb52f67c ("net: hns3: activate reset timer when calling reset_event")
Signed-off-by: Salil Mehta
--
V1->V2:
[1] Fixed comments from Leon Romanovsky
Link: https://lkml.org/lkml/2021/4/4/14
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index e3f81c7e0ce7..58d210bbb311 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3966,7 +3966,6 @@ static void hclge_reset_event(struct pci_dev *pdev,
struct hnae3_handle *handle)
*normalcy is to reset.
* 2. A new reset request from the stack due to timeout
*
-* For the first case,error event might not have ae handle available.
* check if this is a new reset request and we are not here just because
* last reset attempt did not succeed and watchdog hit us again. We will
* know this if last reset request did not occur very recently (watchdog
@@ -3976,8 +3975,6 @@ static void hclge_reset_event(struct pci_dev *pdev,
struct hnae3_handle *handle)
* want to make sure we throttle the reset request. Therefore, we will
* not allow it again before 3*HZ times.
*/
- if (!handle)
- handle = >vport[0].nic;
if (time_before(jiffies, (hdev->last_reset_time +
HCLGE_RESET_INTERVAL))) {
--
2.17.1
RE: [PATCH net 1/2] net: hns3: Remove the left over redundant check & assignment
> From: Leon Romanovsky [mailto:l...@kernel.org]
> Sent: Monday, April 5, 2021 1:43 PM
> To: Salil Mehta
> Cc: da...@davemloft.net; k...@kernel.org; net...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Linuxarm ;
> linux...@openeuler.org
> Subject: Re: [PATCH net 1/2] net: hns3: Remove the left over redundant check
> & assignment
>
> On Mon, Apr 05, 2021 at 12:26:37PM +, Salil Mehta wrote:
> > Hi Leon,
> > Thanks for the review.
> >
> > > From: Leon Romanovsky [mailto:l...@kernel.org]
> > > Sent: Sunday, April 4, 2021 7:26 AM
> > > To: Salil Mehta
> > > Cc: da...@davemloft.net; k...@kernel.org; net...@vger.kernel.org;
> > > linux-kernel@vger.kernel.org; Linuxarm ;
> > > linux...@openeuler.org
> > > Subject: Re: [PATCH net 1/2] net: hns3: Remove the left over redundant
> > > check
> > > & assignment
> > >
> > > On Sat, Apr 03, 2021 at 02:35:19AM +0100, Salil Mehta wrote:
> > > > This removes the left over check and assignment which is no longer used
> > > > anywhere in the function and should have been removed as part of the
> > > > below mentioned patch.
> > > >
> > > > Fixes: 012fcb52f67c ("net: hns3: activate reset timer when calling
> > > reset_event")
> > > > Signed-off-by: Salil Mehta
> > > > ---
> > > > drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 --
> > > > 1 file changed, 2 deletions(-)
> > > >
> > > > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > > b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > > > index e3f81c7e0ce7..7ad0722383f5 100644
> > > > --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > > > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > > > @@ -3976,8 +3976,6 @@ static void hclge_reset_event(struct pci_dev
> > > > *pdev,
> > > struct hnae3_handle *handle)
> > > > * want to make sure we throttle the reset request. Therefore,
> > > > we will
> > > > * not allow it again before 3*HZ times.
> > > > */
> > > > - if (!handle)
> > > > - handle = >vport[0].nic;
> > >
> > > The comment above should be updated too, and probably the signature of
> > > hclge_reset_event() worth to be changed.
> >
> >
> > Yes, true. Both the comment and the prototype will be updated in near
> > future.
> > I can assure you this did not go un-noticed during the change. There are
> > some internal subtleties which I am trying to sort out. Those might come
> > as part of different patch-set which deals with other related changes as
> > well.
>
> I can buy such explanation for the change in function signature, but have hard
> time to believe that extra commit is needed to change comment above.
Sure, I understand your point. Earlier I thought to retain the comment for
reference
and make it part of the refactor change. But will send another version changing
the comment now. No issues :)
Many thanks
>
> Thanks
>
> >
> > The current change(and some other) will pave the way for necessary
> > refactoring
> > Of the code being done.
> >
> >
> > >
> > > Thanks
> > >
> > > >
> > > > if (time_before(jiffies, (hdev->last_reset_time +
> > > > HCLGE_RESET_INTERVAL))) {
> > > > --
> > > > 2.17.1
> > > >
RE: [PATCH net 1/2] net: hns3: Remove the left over redundant check & assignment
Hi Leon,
Thanks for the review.
> From: Leon Romanovsky [mailto:l...@kernel.org]
> Sent: Sunday, April 4, 2021 7:26 AM
> To: Salil Mehta
> Cc: da...@davemloft.net; k...@kernel.org; net...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Linuxarm ;
> linux...@openeuler.org
> Subject: Re: [PATCH net 1/2] net: hns3: Remove the left over redundant check
> & assignment
>
> On Sat, Apr 03, 2021 at 02:35:19AM +0100, Salil Mehta wrote:
> > This removes the left over check and assignment which is no longer used
> > anywhere in the function and should have been removed as part of the
> > below mentioned patch.
> >
> > Fixes: 012fcb52f67c ("net: hns3: activate reset timer when calling
> reset_event")
> > Signed-off-by: Salil Mehta
> > ---
> > drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 --
> > 1 file changed, 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > index e3f81c7e0ce7..7ad0722383f5 100644
> > --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> > @@ -3976,8 +3976,6 @@ static void hclge_reset_event(struct pci_dev *pdev,
> struct hnae3_handle *handle)
> > * want to make sure we throttle the reset request. Therefore, we will
> > * not allow it again before 3*HZ times.
> > */
> > - if (!handle)
> > - handle = >vport[0].nic;
>
> The comment above should be updated too, and probably the signature of
> hclge_reset_event() worth to be changed.
Yes, true. Both the comment and the prototype will be updated in near future.
I can assure you this did not go un-noticed during the change. There are
some internal subtleties which I am trying to sort out. Those might come
as part of different patch-set which deals with other related changes as well.
The current change(and some other) will pave the way for necessary refactoring
Of the code being done.
>
> Thanks
>
> >
> > if (time_before(jiffies, (hdev->last_reset_time +
> > HCLGE_RESET_INTERVAL))) {
> > --
> > 2.17.1
> >
[PATCH net 2/2] net: hns3: Remove un-necessary 'else-if' in the hclge_reset_event()
Code to defer the reset(which caps the frequency of the reset) schedules the
timer and returns. Hence, following 'else-if' looks un-necessary.
Fixes: 9de0b86f6444 ("net: hns3: Prevent to request reset frequently")
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 7ad0722383f5..2ed464e13d1b 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3981,7 +3981,9 @@ static void hclge_reset_event(struct pci_dev *pdev,
struct hnae3_handle *handle)
HCLGE_RESET_INTERVAL))) {
mod_timer(>reset_timer, jiffies + HCLGE_RESET_INTERVAL);
return;
- } else if (hdev->default_reset_request) {
+ }
+
+ if (hdev->default_reset_request) {
hdev->reset_level =
hclge_get_reset_level(ae_dev,
>default_reset_request);
--
2.17.1
[PATCH net 1/2] net: hns3: Remove the left over redundant check & assignment
This removes the left over check and assignment which is no longer used
anywhere in the function and should have been removed as part of the
below mentioned patch.
Fixes: 012fcb52f67c ("net: hns3: activate reset timer when calling reset_event")
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index e3f81c7e0ce7..7ad0722383f5 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3976,8 +3976,6 @@ static void hclge_reset_event(struct pci_dev *pdev,
struct hnae3_handle *handle)
* want to make sure we throttle the reset request. Therefore, we will
* not allow it again before 3*HZ times.
*/
- if (!handle)
- handle = >vport[0].nic;
if (time_before(jiffies, (hdev->last_reset_time +
HCLGE_RESET_INTERVAL))) {
--
2.17.1
[PATCH net 0/2] Misc. fixes for hns3 driver
Fixes for the miscellaneous problems found during the review of the code. Salil Mehta (2): net: hns3: Remove the left over redundant check & assignment net: hns3: Remove un-necessary 'else-if' in the hclge_reset_event() drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1
RE: [PATCH 5/6] dma-mapping/iommu: Add dma_set_max_opt_size()
(+) correction below, sorry for the typo in earlier post.
> From: iommu [mailto:iommu-boun...@lists.linux-foundation.org] On Behalf Of
> Robin Murphy
> Sent: Friday, March 19, 2021 5:00 PM
> To: John Garry ; j...@8bytes.org; w...@kernel.org;
> j...@linux.ibm.com; martin.peter...@oracle.com; h...@lst.de;
> m.szyprow...@samsung.com
> Cc: io...@lists.linux-foundation.org; linux-kernel@vger.kernel.org;
> linux-s...@vger.kernel.org; Linuxarm
> Subject: Re: [PATCH 5/6] dma-mapping/iommu: Add dma_set_max_opt_size()
>
> On 2021-03-19 13:25, John Garry wrote:
> > Add a function to allow the max size which we want to optimise DMA mappings
> > for.
>
> It seems neat in theory - particularly for packet-based interfaces that
> might have a known fixed size of data unit that they're working on at
> any given time - but aren't there going to be many cases where the
> driver has no idea because it depends on whatever size(s) of request
> userspace happens to throw at it? Even if it does know the absolute
> maximum size of thing it could ever transfer, that could be
> impractically large in areas like video/AI/etc., so it could still be
> hard to make a reasonable decision.
This is also the case for networking workloads where we have MTU set but
actual packet sizes might vary.
>
> Being largely workload-dependent is why I still think this should be a
> command-line or sysfs tuneable - we could set the default based on how
> much total memory is available, but ultimately it's the end user who
> knows what the workload is going to be and what they care about
> optimising for.
>
> Another thought (which I'm almost reluctant to share) is that I would
> *love* to try implementing a self-tuning strategy that can detect high
> contention on particular allocation sizes and adjust the caches on the
> fly, but I can easily imagine that having enough inherent overhead to
> end up being an impractical (but fun) waste of time.
This might be particularly useful for the NICs where packet sizes vary
from 64B to 9K. But without optimal strategy this can affect the
performance of networking workloads.
>
> Robin.
>
> > Signed-off-by: John Garry
> > ---
> > drivers/iommu/dma-iommu.c | 2 +-
> > include/linux/dma-map-ops.h | 1 +
> > include/linux/dma-mapping.h | 5 +
> > kernel/dma/mapping.c| 11 +++
> > 4 files changed, 18 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
> > index a5dfbd6c0496..d35881fcfb9c 100644
> > --- a/drivers/iommu/dma-iommu.c
> > +++ b/drivers/iommu/dma-iommu.c
> > @@ -447,7 +447,6 @@ static dma_addr_t iommu_dma_alloc_iova(struct
> > iommu_domain
> *domain,
> > return (dma_addr_t)iova << shift;
> > }
> >
> > -__maybe_unused
> > static void iommu_dma_set_opt_size(struct device *dev, size_t size)
> > {
> > struct iommu_domain *domain = iommu_get_dma_domain(dev);
> > @@ -1278,6 +1277,7 @@ static const struct dma_map_ops iommu_dma_ops = {
> > .map_resource = iommu_dma_map_resource,
> > .unmap_resource = iommu_dma_unmap_resource,
> > .get_merge_boundary = iommu_dma_get_merge_boundary,
> > + .set_max_opt_size = iommu_dma_set_opt_size,
> > };
> >
> > /*
> > diff --git a/include/linux/dma-map-ops.h b/include/linux/dma-map-ops.h
> > index 51872e736e7b..fed7a183b3b9 100644
> > --- a/include/linux/dma-map-ops.h
> > +++ b/include/linux/dma-map-ops.h
> > @@ -64,6 +64,7 @@ struct dma_map_ops {
> > u64 (*get_required_mask)(struct device *dev);
> > size_t (*max_mapping_size)(struct device *dev);
> > unsigned long (*get_merge_boundary)(struct device *dev);
> > + void (*set_max_opt_size)(struct device *dev, size_t size);
> > };
> >
> > #ifdef CONFIG_DMA_OPS
> > diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> > index 2a984cb4d1e0..91fe770145d4 100644
> > --- a/include/linux/dma-mapping.h
> > +++ b/include/linux/dma-mapping.h
> > @@ -144,6 +144,7 @@ u64 dma_get_required_mask(struct device *dev);
> > size_t dma_max_mapping_size(struct device *dev);
> > bool dma_need_sync(struct device *dev, dma_addr_t dma_addr);
> > unsigned long dma_get_merge_boundary(struct device *dev);
> > +void dma_set_max_opt_size(struct device *dev, size_t size);
> > #else /* CONFIG_HAS_DMA */
> > static inline dma_addr_t dma_map_page_attrs(struct device *dev,
> > struct page *page, size_t offset, size_t size,
> > @@ -257,6 +258,10 @@ static inline unsigned long
> > dma_get_merge_boundary(struct
> device *dev)
> > {
> > return 0;
> > }
> > +static inline void dma_set_max_opt_size(struct device *dev, size_t size)
> > +{
> > +}
> > +
> > #endif /* CONFIG_HAS_DMA */
> >
> > struct page *dma_alloc_pages(struct device *dev, size_t size,
> > diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
> > index b6a633679933..59e6acb1c471 100644
> > --- a/kernel/dma/mapping.c
> > +++ b/kernel/dma/mapping.c
> > @@ -608,3 +608,14 @@
RE: [PATCH 5/6] dma-mapping/iommu: Add dma_set_max_opt_size()
> From: iommu [mailto:iommu-boun...@lists.linux-foundation.org] On Behalf Of
> Robin Murphy
> Sent: Friday, March 19, 2021 5:00 PM
> To: John Garry ; j...@8bytes.org; w...@kernel.org;
> j...@linux.ibm.com; martin.peter...@oracle.com; h...@lst.de;
> m.szyprow...@samsung.com
> Cc: io...@lists.linux-foundation.org; linux-kernel@vger.kernel.org;
> linux-s...@vger.kernel.org; Linuxarm
> Subject: Re: [PATCH 5/6] dma-mapping/iommu: Add dma_set_max_opt_size()
>
> On 2021-03-19 13:25, John Garry wrote:
> > Add a function to allow the max size which we want to optimise DMA mappings
> > for.
>
> It seems neat in theory - particularly for packet-based interfaces that
> might have a known fixed size of data unit that they're working on at
> any given time - but aren't there going to be many cases where the
> driver has no idea because it depends on whatever size(s) of request
> userspace happens to throw at it? Even if it does know the absolute
> maximum size of thing it could ever transfer, that could be
> impractically large in areas like video/AI/etc., so it could still be
> hard to make a reasonable decision.
This is also the case in networking workloads where we have MTU set but
actual packet sizes might vary.
>
> Being largely workload-dependent is why I still think this should be a
> command-line or sysfs tuneable - we could set the default based on how
> much total memory is available, but ultimately it's the end user who
> knows what the workload is going to be and what they care about
> optimising for.
>
> Another thought (which I'm almost reluctant to share) is that I would
> *love* to try implementing a self-tuning strategy that can detect high
> contention on particular allocation sizes and adjust the caches on the
> fly, but I can easily imagine that having enough inherent overhead to
> end up being an impractical (but fun) waste of time.
This might be particularly useful for the NICs where packet sizes vary
from 64K to 9K. Hence, without optimal strategy this can affect the
performance of networking workloads.
>
> Robin.
>
> > Signed-off-by: John Garry
> > ---
> > drivers/iommu/dma-iommu.c | 2 +-
> > include/linux/dma-map-ops.h | 1 +
> > include/linux/dma-mapping.h | 5 +
> > kernel/dma/mapping.c| 11 +++
> > 4 files changed, 18 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
> > index a5dfbd6c0496..d35881fcfb9c 100644
> > --- a/drivers/iommu/dma-iommu.c
> > +++ b/drivers/iommu/dma-iommu.c
> > @@ -447,7 +447,6 @@ static dma_addr_t iommu_dma_alloc_iova(struct
> > iommu_domain
> *domain,
> > return (dma_addr_t)iova << shift;
> > }
> >
> > -__maybe_unused
> > static void iommu_dma_set_opt_size(struct device *dev, size_t size)
> > {
> > struct iommu_domain *domain = iommu_get_dma_domain(dev);
> > @@ -1278,6 +1277,7 @@ static const struct dma_map_ops iommu_dma_ops = {
> > .map_resource = iommu_dma_map_resource,
> > .unmap_resource = iommu_dma_unmap_resource,
> > .get_merge_boundary = iommu_dma_get_merge_boundary,
> > + .set_max_opt_size = iommu_dma_set_opt_size,
> > };
> >
> > /*
> > diff --git a/include/linux/dma-map-ops.h b/include/linux/dma-map-ops.h
> > index 51872e736e7b..fed7a183b3b9 100644
> > --- a/include/linux/dma-map-ops.h
> > +++ b/include/linux/dma-map-ops.h
> > @@ -64,6 +64,7 @@ struct dma_map_ops {
> > u64 (*get_required_mask)(struct device *dev);
> > size_t (*max_mapping_size)(struct device *dev);
> > unsigned long (*get_merge_boundary)(struct device *dev);
> > + void (*set_max_opt_size)(struct device *dev, size_t size);
> > };
> >
> > #ifdef CONFIG_DMA_OPS
> > diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> > index 2a984cb4d1e0..91fe770145d4 100644
> > --- a/include/linux/dma-mapping.h
> > +++ b/include/linux/dma-mapping.h
> > @@ -144,6 +144,7 @@ u64 dma_get_required_mask(struct device *dev);
> > size_t dma_max_mapping_size(struct device *dev);
> > bool dma_need_sync(struct device *dev, dma_addr_t dma_addr);
> > unsigned long dma_get_merge_boundary(struct device *dev);
> > +void dma_set_max_opt_size(struct device *dev, size_t size);
> > #else /* CONFIG_HAS_DMA */
> > static inline dma_addr_t dma_map_page_attrs(struct device *dev,
> > struct page *page, size_t offset, size_t size,
> > @@ -257,6 +258,10 @@ static inline unsigned long
> > dma_get_merge_boundary(struct
> device *dev)
> > {
> > return 0;
> > }
> > +static inline void dma_set_max_opt_size(struct device *dev, size_t size)
> > +{
> > +}
> > +
> > #endif /* CONFIG_HAS_DMA */
> >
> > struct page *dma_alloc_pages(struct device *dev, size_t size,
> > diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
> > index b6a633679933..59e6acb1c471 100644
> > --- a/kernel/dma/mapping.c
> > +++ b/kernel/dma/mapping.c
> > @@ -608,3 +608,14 @@ unsigned long dma_get_merge_boundary(struct device
> > *dev)
>
RE: [REPORT] possible circular locking dependency when booting a VM on arm64 host
> From: Salil Mehta
> Sent: Thursday, July 16, 2020 1:53 AM
> To: 'Marc Zyngier' ; yuzenghui
>
> > From: Marc Zyngier [mailto:m...@kernel.org]
> > Sent: Wednesday, July 15, 2020 5:09 PM
> > To: yuzenghui
> >
> > Hi Zenghui,
> >
> > On 2020-07-09 11:41, Zenghui Yu wrote:
> > > Hi All,
> > >
> > > I had seen the following lockdep splat when booting a guest on my
> > > Kunpeng 920 with GICv4 enabled. I can also trigger the same splat
> > > on v5.5 so it should already exist in the kernel for a while. I'm
> > > not sure what the exact problem is and hope someone can have a look!
> >
> > I can't manage to trigger this splat on my D05, despite running guests
> > with GICv4 enabled. A couple of questions below:
>
>
> Sorry I forgot to update but I did try on Friday and I could not manage
> to trigger it on D06/Kunpeng920 either. I used 5.8.0-rc4.
>
>
> > > Thanks,
> > > Zenghui
> > >
> > > [ 103.855511] ==
> > > [ 103.861664] WARNING: possible circular locking dependency detected
> > > [ 103.867817] 5.8.0-rc4+ #35 Tainted: GW
> > > [ 103.872932] --
> > > [ 103.879083] CPU 2/KVM/20515 is trying to acquire lock:
> > > [ 103.884200] 202fcd5865b0 (_desc_lock_class){-.-.}-{2:2},
> > > at: __irq_get_desc_lock+0x60/0xa0
> > > [ 103.893127]
> > >but task is already holding lock:
> > > [ 103.898933] 202fcfd07f58 (>lock){-.-.}-{2:2}, at:
> > > __schedule+0x114/0x8b8
> > > [ 103.906301]
> > >which lock already depends on the new lock.
> > >
> > > [ 103.914441]
> > >the existing dependency chain (in reverse order) is:
> > > [ 103.921888]
> > >-> #3 (>lock){-.-.}-{2:2}:
> > > [ 103.927438]_raw_spin_lock+0x54/0x70
> > > [ 103.931605]task_fork_fair+0x48/0x150
> > > [ 103.935860]sched_fork+0x100/0x268
> > > [ 103.939856]copy_process+0x628/0x1868
> > > [ 103.944106]_do_fork+0x74/0x710
> > > [ 103.947840]kernel_thread+0x78/0xa0
> > > [ 103.951917]rest_init+0x30/0x270
> > > [ 103.955742]arch_call_rest_init+0x14/0x1c
> > > [ 103.960339]start_kernel+0x534/0x568
> > > [ 103.964503]
> > >-> #2 (>pi_lock){-.-.}-{2:2}:
> > > [ 103.970224]_raw_spin_lock_irqsave+0x70/0x98
> > > [ 103.975080]try_to_wake_up+0x5c/0x5b0
> > > [ 103.979330]wake_up_process+0x28/0x38
> > > [ 103.983581]create_worker+0x128/0x1b8
> > > [ 103.987834]workqueue_init+0x308/0x3bc
> > > [ 103.992172]kernel_init_freeable+0x180/0x33c
> > > [ 103.997027]kernel_init+0x18/0x118
> > > [ 104.001020]ret_from_fork+0x10/0x18
> > > [ 104.005097]
> > >-> #1 (>lock){-.-.}-{2:2}:
> > > [ 104.010817]_raw_spin_lock+0x54/0x70
> > > [ 104.014983]__queue_work+0x120/0x6e8
> > > [ 104.019146]queue_work_on+0xa0/0xd8
> > > [ 104.023225]irq_set_affinity_locked+0xa8/0x178
> > > [ 104.028253]__irq_set_affinity+0x5c/0x90
> > > [ 104.032762]irq_set_affinity_hint+0x74/0xb0
> > > [ 104.037540]hns3_nic_init_irq+0xe0/0x210 [hns3]
> > > [ 104.042655]hns3_client_init+0x2d8/0x4e0 [hns3]
> > > [ 104.047779]hclge_init_client_instance+0xf0/0x3a8 [hclge]
> > > [ 104.053760]hnae3_init_client_instance.part.3+0x30/0x68
> > > [hnae3]
> > > [ 104.060257]hnae3_register_ae_dev+0x100/0x1f0 [hnae3]
> > > [ 104.065892]hns3_probe+0x60/0xa8 [hns3]
> >
> > Are you performing some kind of PCIe hot-plug here? Or is that done
> > at boot only? It seems to help triggering the splat.
>
>
> I am not sure how you can do that since HNS3 is integrated NIC so
> physical hot-plug is definitely ruled out. local_pci_probe()
> should also get called when we insert the hns3_enet module which
> eventually initializes the driver.
Or perhaps you meant below?
echo 1 > /sys/bus/pci/devices//xx.x/remove
echo 1 > /sys/bus/pci/devices/rescan
Above is not being used I did confirm this with Zenghui earlier.
RE: [REPORT] possible circular locking dependency when booting a VM on arm64 host
> From: Marc Zyngier [mailto:m...@kernel.org]
> Sent: Wednesday, July 15, 2020 5:09 PM
> To: yuzenghui
>
> Hi Zenghui,
>
> On 2020-07-09 11:41, Zenghui Yu wrote:
> > Hi All,
> >
> > I had seen the following lockdep splat when booting a guest on my
> > Kunpeng 920 with GICv4 enabled. I can also trigger the same splat
> > on v5.5 so it should already exist in the kernel for a while. I'm
> > not sure what the exact problem is and hope someone can have a look!
>
> I can't manage to trigger this splat on my D05, despite running guests
> with GICv4 enabled. A couple of questions below:
Sorry I forgot to update but I did try on Friday and I could not manage
to trigger it on D06/Kunpeng920 either. I used 5.8.0-rc4.
> > Thanks,
> > Zenghui
> >
> > [ 103.855511] ==
> > [ 103.861664] WARNING: possible circular locking dependency detected
> > [ 103.867817] 5.8.0-rc4+ #35 Tainted: GW
> > [ 103.872932] --
> > [ 103.879083] CPU 2/KVM/20515 is trying to acquire lock:
> > [ 103.884200] 202fcd5865b0 (_desc_lock_class){-.-.}-{2:2},
> > at: __irq_get_desc_lock+0x60/0xa0
> > [ 103.893127]
> >but task is already holding lock:
> > [ 103.898933] 202fcfd07f58 (>lock){-.-.}-{2:2}, at:
> > __schedule+0x114/0x8b8
> > [ 103.906301]
> >which lock already depends on the new lock.
> >
> > [ 103.914441]
> >the existing dependency chain (in reverse order) is:
> > [ 103.921888]
> >-> #3 (>lock){-.-.}-{2:2}:
> > [ 103.927438]_raw_spin_lock+0x54/0x70
> > [ 103.931605]task_fork_fair+0x48/0x150
> > [ 103.935860]sched_fork+0x100/0x268
> > [ 103.939856]copy_process+0x628/0x1868
> > [ 103.944106]_do_fork+0x74/0x710
> > [ 103.947840]kernel_thread+0x78/0xa0
> > [ 103.951917]rest_init+0x30/0x270
> > [ 103.955742]arch_call_rest_init+0x14/0x1c
> > [ 103.960339]start_kernel+0x534/0x568
> > [ 103.964503]
> >-> #2 (>pi_lock){-.-.}-{2:2}:
> > [ 103.970224]_raw_spin_lock_irqsave+0x70/0x98
> > [ 103.975080]try_to_wake_up+0x5c/0x5b0
> > [ 103.979330]wake_up_process+0x28/0x38
> > [ 103.983581]create_worker+0x128/0x1b8
> > [ 103.987834]workqueue_init+0x308/0x3bc
> > [ 103.992172]kernel_init_freeable+0x180/0x33c
> > [ 103.997027]kernel_init+0x18/0x118
> > [ 104.001020]ret_from_fork+0x10/0x18
> > [ 104.005097]
> >-> #1 (>lock){-.-.}-{2:2}:
> > [ 104.010817]_raw_spin_lock+0x54/0x70
> > [ 104.014983]__queue_work+0x120/0x6e8
> > [ 104.019146]queue_work_on+0xa0/0xd8
> > [ 104.023225]irq_set_affinity_locked+0xa8/0x178
> > [ 104.028253]__irq_set_affinity+0x5c/0x90
> > [ 104.032762]irq_set_affinity_hint+0x74/0xb0
> > [ 104.037540]hns3_nic_init_irq+0xe0/0x210 [hns3]
> > [ 104.042655]hns3_client_init+0x2d8/0x4e0 [hns3]
> > [ 104.047779]hclge_init_client_instance+0xf0/0x3a8 [hclge]
> > [ 104.053760]hnae3_init_client_instance.part.3+0x30/0x68
> > [hnae3]
> > [ 104.060257]hnae3_register_ae_dev+0x100/0x1f0 [hnae3]
> > [ 104.065892]hns3_probe+0x60/0xa8 [hns3]
>
> Are you performing some kind of PCIe hot-plug here? Or is that done
> at boot only? It seems to help triggering the splat.
I am not sure how you can do that since HNS3 is integrated NIC so
physical hot-plug is definitely ruled out. local_pci_probe()
should also get called when we insert the hns3_enet module which
eventually initializes the driver.
> > [ 104.070319]local_pci_probe+0x44/0x98
> > [ 104.074573]work_for_cpu_fn+0x20/0x30
> > [ 104.078823]process_one_work+0x258/0x618
> > [ 104.08]worker_thread+0x1c0/0x438
> > [ 104.087585]kthread+0x120/0x128
> > [ 104.091318]ret_from_fork+0x10/0x18
> > [ 104.095394]
> >-> #0 (_desc_lock_class){-.-.}-{2:2}:
> > [ 104.101895]__lock_acquire+0x11bc/0x1530
> > [ 104.106406]lock_acquire+0x100/0x3f8
> > [ 104.110570]_raw_spin_lock_irqsave+0x70/0x98
> > [ 104.115426]__irq_get_desc_lock+0x60/0xa0
> > [ 104.120021]irq_set_vcpu_affinity+0x48/0xc8
> > [ 104.124793]its_make_vpe_non_resident+0x6c/0xc0
> > [ 104.129910]vgic_v4_put+0x64/0x70
> > [ 104.133815]vgic_v3_put+0x28/0x100
> > [ 104.137806]kvm_vgic_put+0x3c/0x60
> > [ 104.141801]kvm_arch_vcpu_put+0x38/0x58
> > [ 104.146228]kvm_sched_out+0x38/0x58
> > [ 104.150306]__schedule+0x554/0x8b8
> > [ 104.154298]schedule+0x50/0xe0
> > [ 104.157946]kvm_arch_vcpu_ioctl_run+0x644/0x9e8
> > [ 104.163063]kvm_vcpu_ioctl+0x4b4/0x918
> > [ 104.167403]ksys_ioctl+0xb4/0xd0
> > [ 104.171222]__arm64_sys_ioctl+0x28/0xc8
> > [
RE: [REPORT] possible circular locking dependency when booting a VM on arm64 host
> From: yuzenghui > Sent: Thursday, July 9, 2020 12:50 PM > To: Salil Mehta > Cc: Marc Zyngier ; Thomas Gleixner ; > Linux > Kernel Mailing List ; > linux-arm-ker...@lists.infradead.org; Zhuangyuzeng (Yisen) > ; Wanghaibin (D) > Subject: Re: [REPORT] possible circular locking dependency when booting a VM > on arm64 host > > On 2020/7/9 18:54, Salil Mehta wrote: > > Hi Yuzenghui, > > I will try to reproduce it today at our platform. Just one question is it > > easily > > reproducible or is a rare occurrence? > > Salil, it's 100% reproducible once you start a guest. You don't even > need to assign hostdev to the VM. Thanks!
RE: [REPORT] possible circular locking dependency when booting a VM on arm64 host
Hi Yuzenghui,
I will try to reproduce it today at our platform. Just one question is it easily
reproducible or is a rare occurrence?
Thanks
Salil
> From: yuzenghui
> Sent: Thursday, July 9, 2020 11:41 AM
> To: Marc Zyngier ; Thomas Gleixner ;
> Linux
> Kernel Mailing List ;
> linux-arm-ker...@lists.infradead.org
> Cc: Zhuangyuzeng (Yisen) ; Salil Mehta
> ; Wanghaibin (D)
> Subject: [REPORT] possible circular locking dependency when booting a VM on
> arm64
> host
>
> Hi All,
>
> I had seen the following lockdep splat when booting a guest on my
> Kunpeng 920 with GICv4 enabled. I can also trigger the same splat
> on v5.5 so it should already exist in the kernel for a while. I'm
> not sure what the exact problem is and hope someone can have a look!
>
>
> Thanks,
> Zenghui
>
> [ 103.855511] ==
> [ 103.861664] WARNING: possible circular locking dependency detected
> [ 103.867817] 5.8.0-rc4+ #35 Tainted: GW
> [ 103.872932] --
> [ 103.879083] CPU 2/KVM/20515 is trying to acquire lock:
> [ 103.884200] 202fcd5865b0 (_desc_lock_class){-.-.}-{2:2}, at:
> __irq_get_desc_lock+0x60/0xa0
> [ 103.893127]
> but task is already holding lock:
> [ 103.898933] 202fcfd07f58 (>lock){-.-.}-{2:2}, at:
> __schedule+0x114/0x8b8
> [ 103.906301]
> which lock already depends on the new lock.
>
> [ 103.914441]
> the existing dependency chain (in reverse order) is:
> [ 103.921888]
> -> #3 (>lock){-.-.}-{2:2}:
> [ 103.927438]_raw_spin_lock+0x54/0x70
> [ 103.931605]task_fork_fair+0x48/0x150
> [ 103.935860]sched_fork+0x100/0x268
> [ 103.939856]copy_process+0x628/0x1868
> [ 103.944106]_do_fork+0x74/0x710
> [ 103.947840]kernel_thread+0x78/0xa0
> [ 103.951917]rest_init+0x30/0x270
> [ 103.955742]arch_call_rest_init+0x14/0x1c
> [ 103.960339]start_kernel+0x534/0x568
> [ 103.964503]
> -> #2 (>pi_lock){-.-.}-{2:2}:
> [ 103.970224]_raw_spin_lock_irqsave+0x70/0x98
> [ 103.975080]try_to_wake_up+0x5c/0x5b0
> [ 103.979330]wake_up_process+0x28/0x38
> [ 103.983581]create_worker+0x128/0x1b8
> [ 103.987834]workqueue_init+0x308/0x3bc
> [ 103.992172]kernel_init_freeable+0x180/0x33c
> [ 103.997027]kernel_init+0x18/0x118
> [ 104.001020]ret_from_fork+0x10/0x18
> [ 104.005097]
> -> #1 (>lock){-.-.}-{2:2}:
> [ 104.010817]_raw_spin_lock+0x54/0x70
> [ 104.014983]__queue_work+0x120/0x6e8
> [ 104.019146]queue_work_on+0xa0/0xd8
> [ 104.023225]irq_set_affinity_locked+0xa8/0x178
> [ 104.028253]__irq_set_affinity+0x5c/0x90
> [ 104.032762]irq_set_affinity_hint+0x74/0xb0
> [ 104.037540]hns3_nic_init_irq+0xe0/0x210 [hns3]
> [ 104.042655]hns3_client_init+0x2d8/0x4e0 [hns3]
> [ 104.047779]hclge_init_client_instance+0xf0/0x3a8 [hclge]
> [ 104.053760]hnae3_init_client_instance.part.3+0x30/0x68 [hnae3]
> [ 104.060257]hnae3_register_ae_dev+0x100/0x1f0 [hnae3]
> [ 104.065892]hns3_probe+0x60/0xa8 [hns3]
> [ 104.070319]local_pci_probe+0x44/0x98
> [ 104.074573]work_for_cpu_fn+0x20/0x30
> [ 104.078823]process_one_work+0x258/0x618
> [ 104.08]worker_thread+0x1c0/0x438
> [ 104.087585]kthread+0x120/0x128
> [ 104.091318]ret_from_fork+0x10/0x18
> [ 104.095394]
> -> #0 (_desc_lock_class){-.-.}-{2:2}:
> [ 104.101895]__lock_acquire+0x11bc/0x1530
> [ 104.106406]lock_acquire+0x100/0x3f8
> [ 104.110570]_raw_spin_lock_irqsave+0x70/0x98
> [ 104.115426]__irq_get_desc_lock+0x60/0xa0
> [ 104.120021]irq_set_vcpu_affinity+0x48/0xc8
> [ 104.124793]its_make_vpe_non_resident+0x6c/0xc0
> [ 104.129910]vgic_v4_put+0x64/0x70
> [ 104.133815]vgic_v3_put+0x28/0x100
> [ 104.137806]kvm_vgic_put+0x3c/0x60
> [ 104.141801]kvm_arch_vcpu_put+0x38/0x58
> [ 104.146228]kvm_sched_out+0x38/0x58
> [ 104.150306]__schedule+0x554/0x8b8
> [ 104.154298]schedule+0x50/0xe0
> [ 104.157946]kvm_arch_vcpu_ioctl_run+0x644/0x9e8
> [ 104.163063]kvm_vcpu_ioctl+0x4b4/0x918
> [ 104.167403]ksys_ioctl+0xb4/0xd0
> [ 104.171222]__arm64_sys_ioctl+0x28/0xc8
> [ 104.175647]el0_svc_common.constprop.2+0x74/0x138
> [ 104.180935]do_el0_svc+0x34/0xa0
> [ 104.184755]el0
RE: [PATCH RFC 0/4] Changes to Support *Virtual* CPU Hotplug for ARM64
Hi James, Thanks for taking time to respond. Please find my replies inline Thanks > From: James Morse [mailto:james.mo...@arm.com] > Sent: Wednesday, July 8, 2020 1:30 PM > To: Salil Mehta > > Hi Salil, > > On 07/07/2020 10:52, Salil Mehta wrote: > >> From: Salil Mehta > > > Disambiguation: by cpu-hotplug here, you don't mean > CONFIG_HOTPLUG_CPU backed by PSCI, which is commonly what we mean in the arm > world. You > mean: package hot-add. A bunch of CPUs (and maybe more) that weren't present > at boot have > turned up. Exactly, and hence the terminology of the possible, present and disabled comes from there. Present : which are present at boot time of the guest and were presented as 'ENABLED'(set in the flag) in the ACPI MADT Table cpu interface entry by QEMU Disabled : which were not-present at boot time of the guest and were presented as 'DISABLED'(not set in the flag) in the ACPI MADT Table cpu interface entry by QEMU Possible : (Present + Disabled) This series is meant to support infrastructure to hot-(un)plug of virtual cpus at QEMU level. It does not assumes any Hardware cpu hotplug support present at the host machine rather it is an attempt to make virtual cpu hotplug support fairly independent of the hardware. > >> Changes to support virtual cpu hotplug in QEMU[1] have been introduced to > >> the > >> community as RFC. These are under review. > >> > >> To support virtual cpu hotplug guest kernel must: > > Surely number 1 is: know its a virtual machine, and that whatever needs > doing/describing > on a real machine, doesn't need doing or describing here... > > We add support for virtual machines after support for the physical machine. Is > anyone building hardware that supports this? Do we really care about it if we could make virtual layer independent of the Hardware by pre-sizing the resources(vcpus, GIC etc.) at QEMU level? :) AFAIK, right now there is *no* known real benefit of the physical cpu hotplug except for some of the cases which are really hard to solve *physically* and perhaps require more comprehensive system architecture defined, like 1. Scalable servers, where cards could be purchased to add resources and compute on demand. This might be useful for small to medium enterprises who would like to start with something small but would want to scale up in time as their business grows. You would want to keep some resources closely coupled because of 'N' reasons 2. Die/SoC Hotplug, similar to above but more granular. This could be used for saving power as well. Again any of above looks to be a far-fetched idea right now. But there are definite benefits and use-cases(as described in QEMU patches) to support *virtual* cpu hotplug. Plus, we need to keep the way we support hotplug consistent with x86. Yes, there are some inherent differences between APIC of x86 and GIC of ARM but those workaround are in the QEMU and the guest kernel is agnostic about them and so is the host kernel. Why not let virtualizer deal with this? BTW, if you are aware of any physical cpu hotplug implementations then please do let us know. > We can assume some will exist during the lifetime of a stable-kernel. The > stable-kernel > will claim to support this, but in reality it will crash and burn in exciting > ways. > (e.g. parts of the interrupt controller in the hot-added package would need > configuring. > We'd either lock up during boot when we try, but its not there ... or not do > it when the > package is added because we assumed this was a VM) Sure, but right now we are not even aware of the physical cpu hotplug requirements (and look to be far-fetched) but *virtual* cpu hotplug requirement are very clear. As far as I can tell, the changes being presented are non-intrusive to the host and guest kernel but if there are any aspects of the patches which make you feel otherwise then please do clarify objectively that it will make our life easier. As such, broadly 2 types of changes are being presented in the patch: 1. Arch specific a. Reshuffling of the code where and how the present/disabled cpus are being counted and their corresponding mask set. b. Their cpu operations 2. Generic ACPI CPU hotplug hooks which lands in arch specific code. These must be implemented in any case. Changes in 1a. and 1b.(part of patches 01/04, 02/04, 03/04) are mere reshuffling to be frank. And rest changes in 2. are the hooks being called by hotplug specific framework. > I don't think linux can support this for virtual machines until it works for > real machines > too. We don't have a reliable way of determining we are running in a VM. x86 supports both physical and vcpu hotplug. And I could not see any code for x86 cpu hotplug support inside kerne
RE: [PATCH RFC 0/4] Changes to Support *Virtual* CPU Hotplug for ARM64
Hello, A gentle reminder, any comments regarding this series will help us know your opinion and also confirm/correct our understanding about the topic and will be much appreciated. Thanks in anticipation! Best regards Salil > From: Salil Mehta > Sent: Thursday, June 25, 2020 2:38 PM > To: linux-arm-ker...@lists.infradead.org > Cc: m...@kernel.org; w...@kernel.org; catalin.mari...@arm.com; > christoffer.d...@arm.com; andre.przyw...@arm.com; james.mo...@arm.com; > mark.rutl...@arm.com; lorenzo.pieral...@arm.com; sudeep.ho...@arm.com; > qemu-...@nongnu.org; peter.mayd...@linaro.org; richard.hender...@linaro.org; > imamm...@redhat.com; m...@redhat.com; drjo...@redhat.com; pbonz...@redhat.com; > eric.au...@redhat.com; gs...@redhat.com; da...@redhat.com; > k...@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm > ; mehta.salil@gmail.com; Salil Mehta > > Subject: [PATCH RFC 0/4] Changes to Support *Virtual* CPU Hotplug for ARM64 > > Changes to support virtual cpu hotplug in QEMU[1] have been introduced to the > community as RFC. These are under review. > > To support virtual cpu hotplug guest kernel must: > 1. Identify disabled/present vcpus and set/unset the present mask of the vcpu >during initialization and hotplug event. It must also set the possible mask >(which includes disabled vcpus) during init of guest kernel. > 2. Provide architecture specific ACPI hooks, for example to map/unmap the >logical cpuid to hwids/MPIDR. Linux kernel already has generic ACPI cpu >hotplug framework support. > > Changes introduced in this patch-set also ensures that initialization of the > cpus when virtual cpu hotplug is not supported remains un-affected. > > Repository: > (*) Kernel changes are at, > https://github.com/salil-mehta/linux.git virt-cpuhp-arm64/rfc-v1 > (*) QEMU changes for vcpu hotplug could be cloned from below site, > https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1 > > > THINGS TO DO: > 1. Handling of per-cpu variables especially the first-chunk allocations >(which are NUMA aware) when the vcpu is hotplugged needs further attention >and review. > 2. NUMA related stuff has not been fully tested both in QEMU and kernel. > 3. Comprehensive Testing including when cpu hotplug is not supported. > 4. Docs > > DISCLAIMER: > This is not a complete work but an effort to present the arm vcpu hotplug > implementation to the community. This RFC is being used as a way to verify > the idea mentioned above and to support changes presented for QEMU[1] to > support vcpu hotplug. As of now this is *not* a production level code and > might > have bugs. Only a basic testing has been done on HiSilicon Kunpeng920 ARM64 > based SoC for Servers to verify the proof-of-concept that has been found > working! > > Best regards > Salil. > > REFERENCES: > [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg712010.html > [2] https://lkml.org/lkml/2019/6/28/1157 > [3] https://lists.cs.columbia.edu/pipermail/kvmarm/2018-July/032316.html > > Organization of Patches: > [Patch 1-3] > (*) Changes required during guest boot time to support vcpu hotplug > (*) Max cpu overflow checks > (*) Changes required to pre-setup cpu-operations even for disabled cpus > [Patch 4] > (*) Arch changes required by guest kernel ACPI CPU Hotplug framework. > > > Salil Mehta (4): > arm64: kernel: Handle disabled[(+)present] cpus in MADT/GICC during > init > arm64: kernel: Bound the total(present+disabled) cpus with nr_cpu_ids > arm64: kernel: Init cpu operations for all possible vcpus > arm64: kernel: Arch specific ACPI hooks(like logical cpuid<->hwid > etc.) > > arch/arm64/kernel/smp.c | 153 > 1 file changed, 123 insertions(+), 30 deletions(-) > > -- > 2.17.1 >
[PATCH RFC 1/4] arm64: kernel: Handle disabled[(+)present] cpus in MADT/GICC during init
With ACPI enabled, cpus get identified by the presence of the GICC
entry in the MADT Table. Each GICC entry part of MADT presents cpu as
enabled or disabled. As of now, the disabled cpus are skipped as
physical cpu hotplug is not supported. These remain disabled even after
the kernel has booted.
To support virtual cpu hotplug(in which case disabled vcpus could be
hotplugged even after kernel has booted), QEMU will populate MADT Table
with appropriate details of GICC entry for each possible(present+disabled)
vcpu. Now, during the init time vcpus will be identified as present or
disabled. To achieve this, below changes have been made with respect to
the present/possible vcpu handling along with the mentioned reasoning:
1. Identify all possible(present+disabled) vcpus at boot/init time
and set their present mask and possible mask. In the existing code,
cpus are being marked present quite late within smp_prepare_cpus()
function, which gets called in context to the kernel thread. Since
the cpu hotplug is not supported, present cpus are always equal to
the possible cpus. But with cpu hotplug enabled, this assumption is
not true. Hence, present cpus should be marked while MADT GICC entries
are bring parsed for each vcpu.
2. Set possible cpus to include disabled. This needs to be done now
while parsing MADT GICC entries corresponding to each vcpu as the
disabled vcpu info is available only at this point as for hotplug
case possible vcpus is not equal to present vcpus.
3. We will store the parsed madt/gicc entry even for the disabled vcpus
during init time. This is needed as some modules like PMU registers
IRQs for each possible vcpus during init time. Therefore, a valid
entry of the MADT GICC should be present for all possible vcpus.
4. Refactoring related to DT/OF is also done to align it with the init
changes to support vcpu hotplug.
Signed-off-by: Salil Mehta
Signed-off-by: Xiongfeng Wang
---
arch/arm64/kernel/smp.c | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index e43a8ff19f0f..51a707928302 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -509,13 +509,12 @@ static int __init smp_cpu_setup(int cpu)
if (ops->cpu_init(cpu))
return -ENODEV;
- set_cpu_possible(cpu, true);
-
return 0;
}
static bool bootcpu_valid __initdata;
static unsigned int cpu_count = 1;
+static unsigned int disabled_cpu_count;
#ifdef CONFIG_ACPI
static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
@@ -534,10 +533,17 @@ struct acpi_madt_generic_interrupt
*acpi_cpu_get_madt_gicc(int cpu)
static void __init
acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
{
+ unsigned int total_cpu_count = disabled_cpu_count + cpu_count;
u64 hwid = processor->arm_mpidr;
if (!(processor->flags & ACPI_MADT_ENABLED)) {
+#ifndef CONFIG_ACPI_HOTPLUG_CPU
pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n",
hwid);
+#else
+ cpu_madt_gicc[total_cpu_count] = *processor;
+ set_cpu_possible(total_cpu_count, true);
+ disabled_cpu_count++;
+#endif
return;
}
@@ -546,7 +552,7 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
return;
}
- if (is_mpidr_duplicate(cpu_count, hwid)) {
+ if (is_mpidr_duplicate(total_cpu_count, hwid)) {
pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
return;
}
@@ -567,9 +573,9 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
return;
/* map the logical cpu id to cpu MPIDR */
- cpu_logical_map(cpu_count) = hwid;
+ cpu_logical_map(total_cpu_count) = hwid;
- cpu_madt_gicc[cpu_count] = *processor;
+ cpu_madt_gicc[total_cpu_count] = *processor;
/*
* Set-up the ACPI parking protocol cpu entries
@@ -580,8 +586,10 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
* initialize the cpu if the parking protocol is
* the only available enable method).
*/
- acpi_set_mailbox_entry(cpu_count, processor);
+ acpi_set_mailbox_entry(total_cpu_count, processor);
+ set_cpu_possible(total_cpu_count, true);
+ set_cpu_present(total_cpu_count, true);
cpu_count++;
}
@@ -614,6 +622,9 @@ static void __init acpi_parse_and_init_cpus(void)
acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
acpi_parse_gic_cpu_interface, 0);
+ pr_debug("possible cpus(%u) present cpus(%u) disabled cpus(%u)\n",
+cpu_count+disabled_cpu_count, cpu_count, disabled_cpu_count);
+
/*
* In ACPI, SMP and C
[PATCH RFC 4/4] arm64: kernel: Arch specific ACPI hooks(like logical cpuid<->hwid etc.)
To support virtual cpu hotplug, some arch specifc hooks must be
facilitated. These hooks are called by the generic ACPI cpu hotplug
framework during a vcpu hot-(un)plug event handling. The changes
required involve:
1. Allocation of the logical cpuid corresponding to the hwid/mpidr
2. Mapping of logical cpuid to hwid/mpidr and marking present
3. Removing vcpu from present mask during hot-unplug
4. For arm64, all possible cpus are registered within topology_init()
Hence, we need to override the weak ACPI call of arch_register_cpu()
(which returns -ENODEV) and return success.
5. NUMA node mapping set for this vcpu using SRAT Table info during init
time will be discarded as the logical cpu-ids used at that time
might not be correct. This mapping will be set again using the
proximity/node info obtained by evaluating _PXM ACPI method.
Note, during hot unplug of vcpu, we do not unmap the association between
the logical cpuid and hwid/mpidr. This remains persistent.
Signed-off-by: Salil Mehta
Signed-off-by: Xiongfeng Wang
---
arch/arm64/kernel/smp.c | 80 +
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 63f31ea23e55..f3315840e829 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -528,6 +528,86 @@ struct acpi_madt_generic_interrupt
*acpi_cpu_get_madt_gicc(int cpu)
return _madt_gicc[cpu];
}
+#ifdef CONFIG_ACPI_HOTPLUG_CPU
+int arch_register_cpu(int num)
+{
+ return 0;
+}
+
+static int set_numa_node_for_cpu(acpi_handle handle, int cpu)
+{
+#ifdef CONFIG_ACPI_NUMA
+ int node_id;
+
+ /* will evaluate _PXM */
+ node_id = acpi_get_node(handle);
+ if (node_id != NUMA_NO_NODE)
+ set_cpu_numa_node(cpu, node_id);
+#endif
+ return 0;
+}
+
+static void unset_numa_node_for_cpu(int cpu)
+{
+#ifdef CONFIG_ACPI_NUMA
+ set_cpu_numa_node(cpu, NUMA_NO_NODE);
+#endif
+}
+
+static int allocate_logical_cpuid(u64 physid)
+{
+ int first_invalid_idx = -1;
+ bool first = true;
+ int i;
+
+ for_each_possible_cpu(i) {
+ /*
+* logical cpuid<->hwid association remains persistent once
+* established
+*/
+ if (cpu_logical_map(i) == physid)
+ return i;
+
+ if ((cpu_logical_map(i) == INVALID_HWID) && first) {
+ first_invalid_idx = i;
+ first = false;
+ }
+ }
+
+ return first_invalid_idx;
+}
+
+int acpi_unmap_cpu(int cpu)
+{
+ set_cpu_present(cpu, false);
+ unset_numa_node_for_cpu(cpu);
+
+ return 0;
+}
+
+int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id,
+int *cpuid)
+{
+ int cpu;
+
+ cpu = allocate_logical_cpuid(physid);
+ if (cpu < 0) {
+ pr_warn("Unable to map logical cpuid to physid 0x%llx\n",
+ physid);
+ return -ENOSPC;
+ }
+
+ /* map the logical cpu id to cpu MPIDR */
+ cpu_logical_map(cpu) = physid;
+ set_numa_node_for_cpu(handle, cpu);
+
+ set_cpu_present(cpu, true);
+ *cpuid = cpu;
+
+ return 0;
+}
+#endif
+
/*
* acpi_map_gic_cpu_interface - parse processor MADT entry
*
--
2.17.1
[PATCH RFC 0/4] Changes to Support *Virtual* CPU Hotplug for ARM64
Changes to support virtual cpu hotplug in QEMU[1] have been introduced to the community as RFC. These are under review. To support virtual cpu hotplug guest kernel must: 1. Identify disabled/present vcpus and set/unset the present mask of the vcpu during initialization and hotplug event. It must also set the possible mask (which includes disabled vcpus) during init of guest kernel. 2. Provide architecture specific ACPI hooks, for example to map/unmap the logical cpuid to hwids/MPIDR. Linux kernel already has generic ACPI cpu hotplug framework support. Changes introduced in this patch-set also ensures that initialization of the cpus when virtual cpu hotplug is not supported remains un-affected. Repository: (*) Kernel changes are at, https://github.com/salil-mehta/linux.git virt-cpuhp-arm64/rfc-v1 (*) QEMU changes for vcpu hotplug could be cloned from below site, https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1 THINGS TO DO: 1. Handling of per-cpu variables especially the first-chunk allocations (which are NUMA aware) when the vcpu is hotplugged needs further attention and review. 2. NUMA related stuff has not been fully tested both in QEMU and kernel. 3. Comprehensive Testing including when cpu hotplug is not supported. 4. Docs DISCLAIMER: This is not a complete work but an effort to present the arm vcpu hotplug implementation to the community. This RFC is being used as a way to verify the idea mentioned above and to support changes presented for QEMU[1] to support vcpu hotplug. As of now this is *not* a production level code and might have bugs. Only a basic testing has been done on HiSilicon Kunpeng920 ARM64 based SoC for Servers to verify the proof-of-concept that has been found working! Best regards Salil. REFERENCES: [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg712010.html [2] https://lkml.org/lkml/2019/6/28/1157 [3] https://lists.cs.columbia.edu/pipermail/kvmarm/2018-July/032316.html Organization of Patches: [Patch 1-3] (*) Changes required during guest boot time to support vcpu hotplug (*) Max cpu overflow checks (*) Changes required to pre-setup cpu-operations even for disabled cpus [Patch 4] (*) Arch changes required by guest kernel ACPI CPU Hotplug framework. Salil Mehta (4): arm64: kernel: Handle disabled[(+)present] cpus in MADT/GICC during init arm64: kernel: Bound the total(present+disabled) cpus with nr_cpu_ids arm64: kernel: Init cpu operations for all possible vcpus arm64: kernel: Arch specific ACPI hooks(like logical cpuid<->hwid etc.) arch/arm64/kernel/smp.c | 153 1 file changed, 123 insertions(+), 30 deletions(-) -- 2.17.1
[PATCH RFC 3/4] arm64: kernel: Init cpu operations for all possible vcpus
Currently, cpu-operations are only initialized for the cpus which
already have logical cpuid to hwid assoication established. And this
only happens for the cpus which are present during boot time.
To support virtual cpu hotplug, we shall initialze the cpu-operations
for all possible(present+disabled) vcpus. This means logical cpuid to
hwid/mpidr association might not exists(i.e. might be INVALID_HWID)
during init. Later, when the vcpu is actually hotplugged logical cpuid
is allocated and associated with the hwid/mpidr.
This patch does some refactoring to support above change.
Signed-off-by: Salil Mehta
Signed-off-by: Xiongfeng Wang
---
arch/arm64/kernel/smp.c | 38 --
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 864ccd3da419..63f31ea23e55 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -503,13 +503,16 @@ static int __init smp_cpu_setup(int cpu)
const struct cpu_operations *ops;
if (init_cpu_ops(cpu))
- return -ENODEV;
+ goto out;
ops = get_cpu_ops(cpu);
if (ops->cpu_init(cpu))
- return -ENODEV;
+ goto out;
return 0;
+out:
+ cpu_logical_map(cpu) = INVALID_HWID;
+ return -ENODEV;
}
static bool bootcpu_valid __initdata;
@@ -547,7 +550,8 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n",
hwid);
#else
cpu_madt_gicc[total_cpu_count] = *processor;
- set_cpu_possible(total_cpu_count, true);
+ if (!smp_cpu_setup(total_cpu_count))
+ set_cpu_possible(total_cpu_count, true);
disabled_cpu_count++;
#endif
return;
@@ -591,8 +595,11 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
*/
acpi_set_mailbox_entry(total_cpu_count, processor);
- set_cpu_possible(total_cpu_count, true);
- set_cpu_present(total_cpu_count, true);
+ if (!smp_cpu_setup(total_cpu_count)) {
+ set_cpu_possible(total_cpu_count, true);
+ set_cpu_present(total_cpu_count, true);
+ }
+
cpu_count++;
}
@@ -701,8 +708,10 @@ static void __init of_parse_and_init_cpus(void)
early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
- set_cpu_possible(cpu_count, true);
- set_cpu_present(cpu_count, true);
+ if (!smp_cpu_setup(cpu_count)) {
+ set_cpu_possible(cpu_count, true);
+ set_cpu_present(cpu_count, true);
+ }
next:
cpu_count++;
}
@@ -716,7 +725,6 @@ static void __init of_parse_and_init_cpus(void)
void __init smp_init_cpus(void)
{
unsigned int total_cpu_count = disabled_cpu_count + cpu_count;
- int i;
if (acpi_disabled)
of_parse_and_init_cpus();
@@ -731,20 +739,6 @@ void __init smp_init_cpus(void)
pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
return;
}
-
- /*
-* We need to set the cpu_logical_map entries before enabling
-* the cpus so that cpu processor description entries (DT cpu nodes
-* and ACPI MADT entries) can be retrieved by matching the cpu hwid
-* with entries in cpu_logical_map while initializing the cpus.
-* If the cpu set-up fails, invalidate the cpu_logical_map entry.
-*/
- for (i = 1; i < nr_cpu_ids; i++) {
- if (cpu_logical_map(i) != INVALID_HWID) {
- if (smp_cpu_setup(i))
- cpu_logical_map(i) = INVALID_HWID;
- }
- }
}
void __init smp_prepare_cpus(unsigned int max_cpus)
--
2.17.1
[PATCH RFC 2/4] arm64: kernel: Bound the total(present+disabled) cpus with nr_cpu_ids
Bound the total number of identified cpus(including disabled cpus) by
maximum allowed limit by the kernel. Max value is either specified as
part of the kernel parameters 'nr_cpus' or specified during compile
time using CONFIG_NR_CPUS.
Signed-off-by: Salil Mehta
Signed-off-by: Xiongfeng Wang
---
arch/arm64/kernel/smp.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 51a707928302..864ccd3da419 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -513,6 +513,7 @@ static int __init smp_cpu_setup(int cpu)
}
static bool bootcpu_valid __initdata;
+static bool cpus_clipped __initdata = false;
static unsigned int cpu_count = 1;
static unsigned int disabled_cpu_count;
@@ -536,6 +537,11 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
unsigned int total_cpu_count = disabled_cpu_count + cpu_count;
u64 hwid = processor->arm_mpidr;
+ if (total_cpu_count > nr_cpu_ids) {
+ cpus_clipped = true;
+ return;
+ }
+
if (!(processor->flags & ACPI_MADT_ENABLED)) {
#ifndef CONFIG_ACPI_HOTPLUG_CPU
pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n",
hwid);
@@ -569,9 +575,6 @@ acpi_map_gic_cpu_interface(struct
acpi_madt_generic_interrupt *processor)
return;
}
- if (cpu_count >= NR_CPUS)
- return;
-
/* map the logical cpu id to cpu MPIDR */
cpu_logical_map(total_cpu_count) = hwid;
@@ -688,8 +691,10 @@ static void __init of_parse_and_init_cpus(void)
continue;
}
- if (cpu_count >= NR_CPUS)
+ if (cpu_count >= NR_CPUS) {
+ cpus_clipped = true;
goto next;
+ }
pr_debug("cpu logical map 0x%llx\n", hwid);
cpu_logical_map(cpu_count) = hwid;
@@ -710,6 +715,7 @@ static void __init of_parse_and_init_cpus(void)
*/
void __init smp_init_cpus(void)
{
+ unsigned int total_cpu_count = disabled_cpu_count + cpu_count;
int i;
if (acpi_disabled)
@@ -717,9 +723,9 @@ void __init smp_init_cpus(void)
else
acpi_parse_and_init_cpus();
- if (cpu_count > nr_cpu_ids)
+ if (cpus_clipped)
pr_warn("Number of cores (%d) exceeds configured maximum of %u
- clipping\n",
- cpu_count, nr_cpu_ids);
+ total_cpu_count, nr_cpu_ids);
if (!bootcpu_valid) {
pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
--
2.17.1
RE: [PATCH V2 net-next 0/2] net: hns3: adds two VLAN feature
Hi Jakub/David, > From: Jakub Kicinski [mailto:k...@kernel.org] > Sent: Wednesday, May 27, 2020 8:31 PM > To: tanhuazhong > Cc: David Miller ; net...@vger.kernel.org; > linux-kernel@vger.kernel.org; Salil Mehta ; > Zhuangyuzeng (Yisen) ; Linuxarm > Subject: Re: [PATCH V2 net-next 0/2] net: hns3: adds two VLAN feature > > On Wed, 27 May 2020 10:31:59 +0800 tanhuazhong wrote: > > Hi, Jakub & David. > > > > For patch#1, is it acceptable adding "ethtool --get-priv-flags" > > to query the VLAN. If yes, I will send a RFC for it. > > The recommended way of implementing vfs with advanced vlan > configurations is via "switchdev mode" & representors. AFAIK, switchdev ops only facilitates the standard abstract interface to any underlying standard or proprietary hardware which could be ASIC, eswitch etc. Therefore, standard tools like ip, bridge or even stacks like FRR etc. could be used while leveraging the below hardware forwarding. Not sure how will switchdev ops will be of help here? Just curious how does Mellanox supports Hybrid port mode? In general, We can have port being configured as Access/Trunk ports. Access port = Only untagged packets are sent or are expected. RX'ed Tagged packets are dropped. Trunk Port = Only Tagged packet are received or sent and any Untagged packets received are dropped. Mellanox also support Hybrid mode in Onyx platform: Hybrid - packets are sent tagged or untagged, the port expects both tagged and untagged packets. This mode is a combination of Access and Trunk modes. There is an option to configure multiple VLANs on the hybrid port. PVID is configured on the port for untagged ingress packets. First two configuration are easy to realize using the standard Linux configuration tools like ip/bridge but not sure about the hybrid? also, why do we even need to create a bridge to realize any of above port modes? Note: HNS hardware does not have eswitch support. Salil.
RE: [PATCH net-next 08/11] net: hns3: add interrupt affinity support for misc interrupt
> From: tanhuazhong
> Sent: Wednesday, July 24, 2019 4:19 AM
> To: da...@davemloft.net
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org; Salil Mehta
> ; Zhuangyuzeng (Yisen) ;
> Linuxarm ; linyunsheng ; lipeng
> (Y) ; tanhuazhong
> Subject: [PATCH net-next 08/11] net: hns3: add interrupt affinity support for
> misc interrupt
>
> From: Yunsheng Lin
>
> The misc interrupt is used to schedule the reset and mailbox
> subtask, and a 1 sec timer is used to schedule the service
> subtask, which does periodic work.
>
> This patch sets the above three subtask's affinity using the
> misc interrupt' affinity.
>
> Also this patch setups a affinity notify for misc interrupt to
> allow user to change the above three subtask's affinity.
>
> Signed-off-by: Yunsheng Lin
> Signed-off-by: Peng Li
> Signed-off-by: Huazhong Tan
> ---
> .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 59
> --
> .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 4 ++
> 2 files changed, 59 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> index f345095..fe45986 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> @@ -1270,6 +1270,12 @@ static int hclge_configure(struct hclge_dev *hdev)
>
> hclge_init_kdump_kernel_config(hdev);
>
> + /* Set the init affinity based on pci func number */
> + i = cpumask_weight(cpumask_of_node(dev_to_node(>pdev->dev)));
> + i = i ? PCI_FUNC(hdev->pdev->devfn) % i : 0;
> + cpumask_set_cpu(cpumask_local_spread(i, dev_to_node(>pdev->dev)),
> + >affinity_mask);
> +
> return ret;
> }
>
> @@ -2502,14 +2508,16 @@ static void hclge_mbx_task_schedule(struct hclge_dev
> *hdev)
> {
> if (!test_bit(HCLGE_STATE_CMD_DISABLE, >state) &&
> !test_and_set_bit(HCLGE_STATE_MBX_SERVICE_SCHED, >state))
> - schedule_work(>mbx_service_task);
> + queue_work_on(cpumask_first(>affinity_mask), system_wq,
Why we have to use system Work Queue here? This could adversely affect
other work scheduled not related to the HNS3 driver. Mailbox is internal
to the driver and depending upon utilization of the mbx channel(which could
be heavy if many VMs are running), this might stress other system tasks
as well. Have we thought of this?
> + >mbx_service_task);
> }
>
> static void hclge_reset_task_schedule(struct hclge_dev *hdev)
> {
> if (!test_bit(HCLGE_STATE_REMOVING, >state) &&
> !test_and_set_bit(HCLGE_STATE_RST_SERVICE_SCHED, >state))
> - schedule_work(>rst_service_task);
> + queue_work_on(cpumask_first(>affinity_mask), system_wq,
> + >rst_service_task);
> }
>
> static void hclge_task_schedule(struct hclge_dev *hdev)
> @@ -2517,7 +2525,8 @@ static void hclge_task_schedule(struct hclge_dev *hdev)
> if (!test_bit(HCLGE_STATE_DOWN, >state) &&
> !test_bit(HCLGE_STATE_REMOVING, >state) &&
> !test_and_set_bit(HCLGE_STATE_SERVICE_SCHED, >state))
> - (void)schedule_work(>service_task);
> + queue_work_on(cpumask_first(>affinity_mask), system_wq,
Same here.
Salil.
RE: [PATCH net-next 1/2] hinic: add rss support
> From: netdev-ow...@vger.kernel.org [mailto:netdev-
> ow...@vger.kernel.org] On Behalf Of Xue Chaojing
> Sent: Monday, June 10, 2019 4:35 AM
> To: da...@davemloft.net
> Cc: linux-kernel@vger.kernel.org; net...@vger.kernel.org; Luoshaokai
> (luoshaokai) ; Wangxiaoyun (Cloud, Network Chip
> Application Development Dept) ;
> xuechaojing ; chiqijun ;
> wulike (A)
> Subject: [PATCH net-next 1/2] hinic: add rss support
>
> This patch adds rss support for the HINIC driver.
>
> Signed-off-by: Xue Chaojing
> ---
[...]
> +
> +int hinic_set_rss_type(struct hinic_dev *nic_dev, u32 tmpl_idx,
> +struct hinic_rss_type rss_type)
> +{
> + struct hinic_hwdev *hwdev = nic_dev->hwdev;
> + struct hinic_func_to_io *func_to_io = >func_to_io;
> + struct hinic_hwif *hwif = hwdev->hwif;
> + struct hinic_rss_context_tbl *ctx_tbl;
> + struct pci_dev *pdev = hwif->pdev;
> + struct hinic_cmdq_buf cmd_buf;
> + u64 out_param;
> + u32 ctx = 0;
> + int err;
reverse Christmas tree order in defining local variables everywhere?
RE: [PATCH v2 net-next] net: link_watch: prevent starvation when processing linkwatch wq
> From: netdev-ow...@vger.kernel.org [mailto:netdev-
> ow...@vger.kernel.org] On Behalf Of Yunsheng Lin
> Sent: Friday, May 31, 2019 10:01 AM
> To: da...@davemloft.net
> Cc: hkallwe...@gmail.com; f.faine...@gmail.com;
> step...@networkplumber.org; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Linuxarm
> Subject: [PATCH v2 net-next] net: link_watch: prevent starvation when
> processing linkwatch wq
>
> When user has configured a large number of virtual netdev, such
> as 4K vlans, the carrier on/off operation of the real netdev
> will also cause it's virtual netdev's link state to be processed
> in linkwatch. Currently, the processing is done in a work queue,
> which may cause cpu and rtnl locking starvation problem.
>
> This patch releases the cpu and rtnl lock when link watch worker
> has processed a fixed number of netdev' link watch event.
>
> Currently __linkwatch_run_queue is called with rtnl lock, so
> enfore it with ASSERT_RTNL();
>
> Signed-off-by: Yunsheng Lin
> ---
> V2: use cond_resched and rtnl_unlock after processing a fixed
> number of events
> ---
> net/core/link_watch.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/net/core/link_watch.c b/net/core/link_watch.c
> index 7f51efb..07eebfb 100644
> --- a/net/core/link_watch.c
> +++ b/net/core/link_watch.c
> @@ -168,9 +168,18 @@ static void linkwatch_do_dev(struct net_device
> *dev)
>
> static void __linkwatch_run_queue(int urgent_only)
> {
> +#define MAX_DO_DEV_PER_LOOP 100
> +
> + int do_dev = MAX_DO_DEV_PER_LOOP;
> struct net_device *dev;
> LIST_HEAD(wrk);
>
> + ASSERT_RTNL();
> +
> + /* Give urgent case more budget */
> + if (urgent_only)
> + do_dev += MAX_DO_DEV_PER_LOOP;
> +
> /*
>* Limit the number of linkwatch events to one
>* per second so that a runaway driver does not
> @@ -200,6 +209,14 @@ static void __linkwatch_run_queue(int urgent_only)
> }
> spin_unlock_irq(_lock);
> linkwatch_do_dev(dev);
> +
> + if (--do_dev < 0) {
> + rtnl_unlock();
> + cond_resched();
Sorry, missed in my earlier comment. I could see multiple problems here
and please correct me if I am wrong:
1. It looks like releasing the rtnl_lock here and then res-scheduling might
not be safe, especially when you have already held *lweventlist_lock*
(which is global and not per-netdev), and when you are trying to
reschedule. This can cause *deadlock* with itself.
Reason: once you release the rtnl_lock() the similar leg of function
netdev_wait_allrefs() could be called for some other netdevice which
might end up in waiting for same global linkwatch event list lock
i.e. *lweventlist_lock*.
2. After releasing the rtnl_lock() we have not ensured that all the rcu
operations are complete. Perhaps we need to take rcu_barrier() before
retaking the rtnl_lock()
> + do_dev = MAX_DO_DEV_PER_LOOP;
Here, I think rcu_barrier() should exist.
> + rtnl_lock();
> + }
> +
> spin_lock_irq(_lock);
> }
RE: [PATCH v2 net-next] net: link_watch: prevent starvation when processing linkwatch wq
> From: netdev-ow...@vger.kernel.org On Behalf Of Yunsheng Lin
> Sent: Friday, May 31, 2019 10:01 AM
> To: da...@davemloft.net
> Cc: hkallwe...@gmail.com; f.faine...@gmail.com;
> step...@networkplumber.org; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; Linuxarm
> Subject: [PATCH v2 net-next] net: link_watch: prevent starvation when
> processing linkwatch wq
>
> When user has configured a large number of virtual netdev, such
> as 4K vlans, the carrier on/off operation of the real netdev
> will also cause it's virtual netdev's link state to be processed
> in linkwatch. Currently, the processing is done in a work queue,
> which may cause cpu and rtnl locking starvation problem.
>
> This patch releases the cpu and rtnl lock when link watch worker
> has processed a fixed number of netdev' link watch event.
>
> Currently __linkwatch_run_queue is called with rtnl lock, so
> enfore it with ASSERT_RTNL();
Typo enfore --> enforce ?
> Signed-off-by: Yunsheng Lin
> ---
> V2: use cond_resched and rtnl_unlock after processing a fixed
> number of events
> ---
> net/core/link_watch.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/net/core/link_watch.c b/net/core/link_watch.c
> index 7f51efb..07eebfb 100644
> --- a/net/core/link_watch.c
> +++ b/net/core/link_watch.c
> @@ -168,9 +168,18 @@ static void linkwatch_do_dev(struct net_device
> *dev)
>
> static void __linkwatch_run_queue(int urgent_only)
> {
> +#define MAX_DO_DEV_PER_LOOP 100
> +
> + int do_dev = MAX_DO_DEV_PER_LOOP;
> struct net_device *dev;
> LIST_HEAD(wrk);
>
> + ASSERT_RTNL();
> +
> + /* Give urgent case more budget */
> + if (urgent_only)
> + do_dev += MAX_DO_DEV_PER_LOOP;
> +
> /*
>* Limit the number of linkwatch events to one
>* per second so that a runaway driver does not
> @@ -200,6 +209,14 @@ static void __linkwatch_run_queue(int urgent_only)
> }
> spin_unlock_irq(_lock);
> linkwatch_do_dev(dev);
> +
A comment like below would be helpful in explaining the reason of the code.
/* This function is called with rtnl_lock held. If excessive events
* are present as part of the watch list, their processing could
* monopolize the rtnl_lock and which could lead to starvation in
* other modules which want to acquire this lock. Hence, co-operative
* scheme like below might be helpful in mitigating the problem.
* This also tries to be fair CPU wise by conditional rescheduling.
*/
> + if (--do_dev < 0) {
> + rtnl_unlock();
> + cond_resched();
> + do_dev = MAX_DO_DEV_PER_LOOP;
> + rtnl_lock();
> + }
> +
> spin_lock_irq(_lock);
> }
RE: [PATCH net-next] net: link_watch: prevent starvation when processing linkwatch wq
> From: netdev-ow...@vger.kernel.org [mailto:netdev-ow...@vger.kernel.org] On > Behalf Of Yunsheng Lin > Sent: Tuesday, May 28, 2019 2:04 AM > > On 2019/5/27 22:58, Stephen Hemminger wrote: > > On Mon, 27 May 2019 09:47:54 +0800 > > Yunsheng Lin wrote: > > > >> When user has configured a large number of virtual netdev, such > >> as 4K vlans, the carrier on/off operation of the real netdev > >> will also cause it's virtual netdev's link state to be processed > >> in linkwatch. Currently, the processing is done in a work queue, > >> which may cause worker starvation problem for other work queue. I think we had already discussed about this internally and using separate workqueue with WQ_UNBOUND should solve this problem. HNS3 driver was sharing workqueue with the system workqueue. > >> This patch releases the cpu when link watch worker has processed > >> a fixed number of netdev' link watch event, and schedule the > >> work queue again when there is still link watch event remaining. We need proper examples/use-cases because of which we require above kind of co-operative scheduling. Touching the common shared queue logic which solid argument might invite for more problem to other modules. > >> Signed-off-by: Yunsheng Lin > > > > Why not put link watch in its own workqueue so it is scheduled > > separately from the system workqueue? > > From testing and debuging, the workqueue runs on the cpu where the > workqueue is schedule when using normal workqueue, even using its > own workqueue instead of system workqueue. So if the cpu is busy > processing the linkwatch event, it is not able to process other > workqueue' work when the workqueue is scheduled on the same cpu. > > Using unbound workqueue may solve the cpu starvation problem. [...] > But the __linkwatch_run_queue is called with rtnl_lock, so if it > takes a lot time to process, other need to take the rtnl_lock may > not be able to move forward. Please help me in understanding, Are you trying to pitch this patch to solve more general system issue OR still your argument/concern is related to the HNS3 driver problem mentioned in this patch? Salil.
RE: [PATCH] net: hns: Fix object reference leaks in hns_dsaf_roce_reset()
> From: John Garry
> Sent: Friday, February 15, 2019 12:00 PM
>
> On 15/02/2019 11:25, Salil Mehta wrote:
> >> From: John Garry
> >> Sent: Friday, February 15, 2019 10:52 AM
> >>
> >> On 14/02/2019 06:41, Huang Zijiang wrote:
> >>> The of_find_device_by_node() takes a reference to the underlying device
> >>> structure, we should release that reference.
> >>
> >> of_find_device_by_node() is not called for every path, so is this change
> >> proper:
> >
> >
> > It looks okay to me and with the suggested device reference is being
> > released from every possible error leg in the function. Could you be
> > more specific which error path is not being addressed?
> >
> >>/* find the platform device corresponding to fwnode */
> >>if (is_of_node(dsaf_fwnode)) {
> >>pdev = of_find_device_by_node(to_of_node(dsaf_fwnode));
> >
> >
> > This will get the reference to the device, which needs to be
> > released later.
> >
> >
> >>} else if (is_acpi_device_node(dsaf_fwnode)) {
> >>pdev = hns_dsaf_find_platform_device(dsaf_fwnode);
> >
> >
> > This will also get the reference to the device when bus_find_device()
> > gets called and returns the 'device'. Therefore, this needs to be
> > released as well using put_device()
>
> OK, I see. That's non-obvious.
>
> And so the commit message was simply incomplete.
>
> So who finally drops this reference? This patch only seems to release on
> error path. I checked the callers and they don't seem to.
Yes, in the positive leg the put_device() was missing. Thanks for identifying!
I have floated the patch to fix it https://www.lkml.org/lkml/2019/2/18/1161
Salil.
[PATCH net] net: hns: Fixes the missing put_device in positive leg for roce reset
This patch fixes the missing device reference release-after-use in
the positive leg of the roce reset API of the HNS DSAF.
Fixes: c969c6e7ab8c ("net: hns: Fix object reference leaks in
hns_dsaf_roce_reset()")
Reported-by: John Garry
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
index b8155f5..ac55db0 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
@@ -3128,6 +3128,9 @@ int hns_dsaf_roce_reset(struct fwnode_handle
*dsaf_fwnode, bool dereset)
dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 1);
dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);
}
+
+ put_device(>dev);
+
return 0;
}
EXPORT_SYMBOL(hns_dsaf_roce_reset);
--
2.7.4
RE: [PATCH] net: hns: Fix object reference leaks in hns_dsaf_roce_reset()
> From: John Garry
> Sent: Friday, February 15, 2019 10:52 AM
>
> On 14/02/2019 06:41, Huang Zijiang wrote:
> > The of_find_device_by_node() takes a reference to the underlying device
> > structure, we should release that reference.
>
> of_find_device_by_node() is not called for every path, so is this change
> proper:
It looks okay to me and with the suggested device reference is being
released from every possible error leg in the function. Could you be
more specific which error path is not being addressed?
> /* find the platform device corresponding to fwnode */
> if (is_of_node(dsaf_fwnode)) {
> pdev = of_find_device_by_node(to_of_node(dsaf_fwnode));
This will get the reference to the device, which needs to be
released later.
> } else if (is_acpi_device_node(dsaf_fwnode)) {
> pdev = hns_dsaf_find_platform_device(dsaf_fwnode);
This will also get the reference to the device when bus_find_device()
gets called and returns the 'device'. Therefore, this needs to be
released as well using put_device()
> } else {
> pr_err("fwnode is neither OF or ACPI type\n");
> return -EINVAL;
> }
>
> /* check if we were a success in fetching pdev */
> if (!pdev) {
> pr_err("couldn't find platform device for node\n");
> return -ENODEV;
> }
>
> /* retrieve the dsaf_device from the driver data */
> dsaf_dev = dev_get_drvdata(>dev);
> if (!dsaf_dev) {
> dev_err(>dev, "dsaf_dev is NULL\n");
> return -ENODEV;
> }
>
> John
[...]
> > --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> > +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
> > @@ -3081,6 +3081,7 @@ int hns_dsaf_roce_reset(struct fwnode_handle
> > *dsaf_fwnode, bool dereset)
> > dsaf_dev = dev_get_drvdata(>dev);
> > if (!dsaf_dev) {
> > dev_err(>dev, "dsaf_dev is NULL\n");
> > + put_device(>dev);
This looks okay.
> > return -ENODEV;
> > }
> >
> > @@ -3088,6 +3089,7 @@ int hns_dsaf_roce_reset(struct fwnode_handle
> > *dsaf_fwnode, bool dereset)
> > if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
> > dev_err(dsaf_dev->dev, "%s v1 chip doesn't support RoCE!\n",
> > dsaf_dev->ae_dev.name);
> > + put_device(>dev);
This looks okay.
Salil.
RE: [PATCH net-next] net: hns3: Fix potential NULL dereference on allocation error
> From: yuehaibing
> Sent: Friday, January 25, 2019 3:14 AM
> To: da...@davemloft.net; Zhuangyuzeng (Yisen) ;
> Salil Mehta ; lipeng (Y)
> Cc: linux-kernel@vger.kernel.org; net...@vger.kernel.org; yuehaibing
>
> Subject: [PATCH net-next] net: hns3: Fix potential NULL dereference on
> allocation error
>
> hclge_mac_update_stats_complete doesn't check for NULL
> returns of kcalloc, it may result in an Oops.
>
> Fixes: d174ea75c96a ("net: hns3: add statistics for PFC frames and MAC
> control frames")
> Signed-off-by: YueHaibing
> ---
> drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> index 64b1589..7971606 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
> @@ -343,6 +343,9 @@ static int hclge_mac_update_stats_complete(struct
> hclge_dev *hdev, u32 desc_num)
> int ret;
>
> desc = kcalloc(desc_num, sizeof(struct hclge_desc), GFP_KERNEL);
> + if (!desc)
> + return -ENOMEM;
> +
looks good to me.
Reviewed-by: Salil Mehta
RE: hns: question regarding ae_node device node refcounting
Hi Alexey, > From: Alexey Khoroshilov [mailto:khoroshi...@ispras.ru] > Sent: Saturday, December 22, 2018 9:55 PM > To: Zhuangyuzeng (Yisen) ; Salil Mehta > ; lipeng (Y) > Cc: Alexey Khoroshilov ; David S. Miller > ; net...@vger.kernel.org; linux- > ker...@vger.kernel.org; ldv-proj...@linuxtesting.org > Subject: net: hns: question regarding ae_node device node refcounting > > Hello, > > hns_nic_dev_probe() increments refcount of ae_node device node: > ae_node = of_parse_phandle(dev->of_node, "ae-handle", 0); > > But there is no of_node_put() for ae_node. > What is the right place to decrement the ae_node refount? > > Should it be placed in hns_nic_dev_probe() or in hns_nic_dev_remove()? > Or may be it is managed by fwnode somehow? Thanks for bringing this to notice. Yes, you are right of_node_put() is missing. We will float a fix for this soon. Cheers Salil
[PATCH V2 net-next 0/6] net: hns3: Add more commands to Debugfs in HNS3 driver
This patch-set adds few more debugfs commands to HNS3 Ethernet
Driver. Support has been added to query info related to below
items:
1. Packet buffer descriptor ("echo bd info [queue no] [bd index] > cmd")
2. Manager table("echo dump mng tbl > cmd")
3. Dfx status register("echo dump reg ssu [prt id] > cmd")
4. Dcb status register("echo dump reg dcb [port id] > cmd")
5. Queue map ("echo queue map [queue no] > cmd")
6. Tm map ("echo tm map [queue no] > cmd")
NOTE: Above commands are *read-only* and are only intended to
query the information from the SoC(and dump inside the kernel,
for now) and in no way tries to perform write operations for
the purpose of configuration etc.
Change Log:
V1-->V2:
1. Addressed the GCC-8.2 compiler issue reported by David S. Miller.
Link: https://lkml.org/lkml/2018/12/14/1298
liuzhongzhu (6):
net: hns3: Add "bd info" query function
net: hns3: Add "manager table" information query function
net: hns3: Add "status register" information query function
net: hns3: Add "dcb register" status information query function
net: hns3: Add "queue map" information query function
net: hns3: Add "tm map" status information query function
drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 140 -
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 43 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 446 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 690 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 20 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 7 +
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 18 +
11 files changed, 1366 insertions(+), 5 deletions(-)
--
2.11.0
[PATCH V2 net-next 1/6] net: hns3: Add "bd info" query function
From: liuzhongzhu
This patch prints Sending and receiving
package descriptor information.
debugfs command:
echo dump bd info 1 > cmd
Sample Command:
root@(none)# echo bd info 1 > cmd
hns3 :7d:00.0: TX Queue Num: 0, BD Index: 0
hns3 :7d:00.0: (TX) addr: 0x0
hns3 :7d:00.0: (TX)vlan_tag: 0
hns3 :7d:00.0: (TX)send_size: 0
hns3 :7d:00.0: (TX)vlan_tso: 0
hns3 :7d:00.0: (TX)l2_len: 0
hns3 :7d:00.0: (TX)l3_len: 0
hns3 :7d:00.0: (TX)l4_len: 0
hns3 :7d:00.0: (TX)vlan_tag: 0
hns3 :7d:00.0: (TX)tv: 0
hns3 :7d:00.0: (TX)vlan_msec: 0
hns3 :7d:00.0: (TX)ol2_len: 0
hns3 :7d:00.0: (TX)ol3_len: 0
hns3 :7d:00.0: (TX)ol4_len: 0
hns3 :7d:00.0: (TX)paylen: 0
hns3 :7d:00.0: (TX)vld_ra_ri: 0
hns3 :7d:00.0: (TX)mss: 0
hns3 :7d:00.0: RX Queue Num: 0, BD Index: 120
hns3 :7d:00.0: (RX)addr: 0xffee7000
hns3 :7d:00.0: (RX)pkt_len: 0
hns3 :7d:00.0: (RX)size: 0
hns3 :7d:00.0: (RX)rss_hash: 0
hns3 :7d:00.0: (RX)fd_id: 0
hns3 :7d:00.0: (RX)vlan_tag: 0
hns3 :7d:00.0: (RX)o_dm_vlan_id_fb: 0
hns3 :7d:00.0: (RX)ot_vlan_tag: 0
hns3 :7d:00.0: (RX)bd_base_info: 0
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 79 +-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 86d667a3730a..9a026556df0e 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -52,7 +52,7 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h, char
*cmd_buf)
test_bit(HNS3_NIC_STATE_RESETTING, >state))
return -EPERM;
- ring = ring_data[i + h->kinfo.num_tqps].ring;
+ ring = ring_data[(u32)(i + h->kinfo.num_tqps)].ring;
base_add_h = readl_relaxed(ring->tqp->io_base +
HNS3_RING_RX_RING_BASEADDR_H_REG);
base_add_l = readl_relaxed(ring->tqp->io_base +
@@ -125,10 +125,85 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h,
char *cmd_buf)
return 0;
}
+static int hns3_dbg_bd_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_desc *rx_desc, *tx_desc;
+ struct device *dev = >pdev->dev;
+ struct hns3_enet_ring *ring;
+ u32 tx_index, rx_index;
+ u32 q_num, value;
+ int cnt;
+
+ cnt = sscanf(_buf[8], "%u %u", _num, _index);
+ if (cnt == 2) {
+ rx_index = tx_index;
+ } else if (cnt != 1) {
+ dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
+ return -EINVAL;
+ }
+
+ if (q_num >= h->kinfo.num_tqps) {
+ dev_err(dev, "Queue number(%u) is out of range(%u)\n", q_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ ring = ring_data[q_num].ring;
+ value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
+ tx_index = (cnt == 1) ? value : tx_index;
+
+ if (tx_index >= ring->desc_num) {
+ dev_err(dev, "bd index (%u) is out of range(%u)\n", tx_index,
+ ring->desc_num - 1);
+ return -EINVAL;
+ }
+
+ tx_desc = >desc[tx_index];
+ dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
+ dev_info(dev, "(TX) addr: 0x%llx\n", tx_desc->addr);
+ dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.vlan_tag);
+ dev_info(dev, "(TX)send_size: %u\n", tx_desc->tx.send_size);
+ dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
+ dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
+ dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
+ dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
+ dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.outer_vlan_tag);
+ dev_info(dev, "(TX)tv: %u\n", tx_desc->tx.tv);
+ dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
+ dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
+ dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
+ dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
+ dev_info(dev, "(TX)paylen: %u\n", tx_desc->tx.paylen);
+ dev_info(dev, "(TX)vld_ra_ri: %u\n", tx_desc->tx.bdtp_fe_sc_vld_ra_ri);
+ dev_info(dev, "(TX)mss: %u\n",
[PATCH V2 net-next 2/6] net: hns3: Add "manager table" information query function
From: liuzhongzhu
This patch prints manager table information.
debugfs command:
echo dump mng tbl > cmd
Sample Command:
root@(none)# echo dump mng tbl > cmd
entry|mac_addr |mask|ether|mask|vlan|mask|i_map|i_dir|e_type
00 |01:00:5e:00:00:01|0 |0|0 ||0 |00 |00 |0
01 |c2:f1:c5:82:68:17|0 |0|0 ||0 |00 |00 |0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 5 +-
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 19 +++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 66 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 12
4 files changed, 100 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 9a026556df0e..4c5a421456b7 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -48,7 +48,7 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h, char
*cmd_buf)
* to prevent reference to invalid memory. And need to ensure
* that the following code is executed within 100ms.
*/
- if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ if (!test_bit(HNS3_NIC_STATE_INITED, >state) ||
test_bit(HNS3_NIC_STATE_RESETTING, >state))
return -EPERM;
@@ -210,6 +210,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
dev_info(>pdev->dev, "dump qos buf cfg\n");
+ dev_info(>pdev->dev, "dump mng tbl\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
@@ -254,7 +255,7 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const
char __user *buffer,
return 0;
/* Judge if the instance is being reset. */
- if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ if (!test_bit(HNS3_NIC_STATE_INITED, >state) ||
test_bit(HNS3_NIC_STATE_RESETTING, >state))
return 0;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index b1ee6feb0caf..dcacfa089b74 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -237,6 +237,7 @@ enum hclge_opcode_type {
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
HCLGE_PPP_CMD0_INT_CMD = 0x2100,
HCLGE_PPP_CMD1_INT_CMD = 0x2101,
+ HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105,
HCLGE_NCSI_INT_EN = 0x2401,
};
@@ -744,6 +745,24 @@ struct hclge_cfg_tx_queue_pointer_cmd {
u8 rsv[14];
};
+#pragma pack(1)
+struct hclge_mac_ethertype_idx_rd_cmd {
+ u8 flags;
+ u8 resp_code;
+ __le16 vlan_tag;
+ u8 mac_add[6];
+ __le16 index;
+ __le16 ethter_type;
+ __le16 egress_port;
+ __le16 egress_queue;
+ __le16 rev0;
+ u8 i_port_bitmap;
+ u8 i_port_direction;
+ u8 rev1[2];
+};
+
+#pragma pack()
+
#define HCLGE_TSO_MSS_MIN_S0
#define HCLGE_TSO_MSS_MIN_MGENMASK(13, 0)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 14577bbf3e11..77a11618040d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -407,6 +407,70 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev
*hdev)
"dump qos buf cfg fail(0x%x), status is %d\n", cmd, ret);
}
+static void hclge_dbg_dump_mng_table(struct hclge_dev *hdev)
+{
+ struct hclge_mac_ethertype_idx_rd_cmd *req0;
+ char printf_buf[HCLGE_DBG_BUF_LEN];
+ struct hclge_desc desc;
+ int ret, i;
+
+ dev_info(>pdev->dev, "mng tab:\n");
+ memset(printf_buf, 0, HCLGE_DBG_BUF_LEN);
+ strncat(printf_buf,
+ "entry|mac_addr |mask|ether|mask|vlan|mask",
+ HCLGE_DBG_BUF_LEN - 1);
+ strncat(printf_buf + strlen(printf_buf),
+ "|i_map|i_dir|e_type|pf_id|vf_id|q_id|drop\n",
+ HCLGE_DBG_BUF_LEN - strlen(printf_buf) - 1);
+
+ dev_info(>pdev->dev, "%s", printf_buf);
+
+ for (i = 0; i < HCLGE_DBG_MNG_TBL_MAX; i++) {
+ hclge_cmd_setup_basic_desc(, HCLGE_MAC_ETHERTYPE_IDX_RD,
+ true);
+ req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)
+
[PATCH V2 net-next 6/6] net: hns3: Add "tm map" status information query function
From: liuzhongzhu
This patch prints dcb register status information by module.
debugfs command:
root@(none)# echo dump tm map 100 > cmd
queue_id | qset_id | pri_id | tc_id
0100 | 0065| 08 | 00
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 84 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 7 ++
4 files changed, 93 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 76c74b4b9777..0de543faa5b1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -241,6 +241,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "bd info [q_num] \n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump tc\n");
+ dev_info(>pdev->dev, "dump tm map [q_num]\n");
dev_info(>pdev->dev, "dump tm\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index c3758f7cb9a0..47717800e0b5 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -165,6 +165,7 @@ enum hclge_opcode_type {
HCLGE_OPC_CFG_TX_QUEUE = 0x0B01,
HCLGE_OPC_QUERY_TX_POINTER = 0x0B02,
HCLGE_OPC_QUERY_TX_STATUS = 0x0B03,
+ HCLGE_OPC_TQP_TX_QUEUE_TC = 0x0B04,
HCLGE_OPC_CFG_RX_QUEUE = 0x0B11,
HCLGE_OPC_QUERY_RX_POINTER = 0x0B12,
HCLGE_OPC_QUERY_RX_STATUS = 0x0B13,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 2d43d347ddfd..26d80504c730 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -537,6 +537,88 @@ static void hclge_dbg_dump_tm(struct hclge_dev *hdev)
cmd, ret);
}
+static void hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *cmd_buf)
+{
+ struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd;
+ struct hclge_nq_to_qs_link_cmd *nq_to_qs_map;
+ struct hclge_qs_to_pri_link_cmd *map;
+ struct hclge_tqp_tx_queue_tc_cmd *tc;
+ enum hclge_opcode_type cmd;
+ struct hclge_desc desc;
+ int queue_id, group_id;
+ u32 qset_maping[32];
+ int tc_id, qset_id;
+ int pri_id, ret;
+ u32 i;
+
+ ret = kstrtouint(_buf[12], 10, _id);
+ queue_id = (ret != 0) ? 0 : queue_id;
+
+ cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK;
+ nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ nq_to_qs_map->nq_id = cpu_to_le16(queue_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ qset_id = nq_to_qs_map->qset_id & 0x3FF;
+
+ cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK;
+ map = (struct hclge_qs_to_pri_link_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ map->qs_id = cpu_to_le16(qset_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ pri_id = map->priority;
+
+ cmd = HCLGE_OPC_TQP_TX_QUEUE_TC;
+ tc = (struct hclge_tqp_tx_queue_tc_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ tc->queue_id = cpu_to_le16(queue_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ tc_id = tc->tc_id & 0x7;
+
+ dev_info(>pdev->dev, "queue_id | qset_id | pri_id | tc_id\n");
+ dev_info(>pdev->dev, "%04d | %04d| %02d | %02d\n",
+queue_id, qset_id, pri_id, tc_id);
+
+ cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING;
+ bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data;
+ for (group_id = 0; group_id < 32; group_id++) {
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ bp_to_qs_map_cmd->tc_id = tc_id;
+ bp_to_qs_map_cmd->qs_group_id = group_id;
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+
+ qset_maping[group_id] = bp_to_qs_map_cmd->qs_bit_map;
+ }
+
+ dev_info(>pdev->dev, "index | tm bp qset maping:\n");
+
+ i = 0;
+ f
[PATCH V2 net-next 5/6] net: hns3: Add "queue map" information query function
From: liuzhongzhu
This patch prints queue map information.
debugfs command:
echo dump queue map > cmd
Sample Command:
root@(none)# echo queue map > cmd
local queue id | global queue id | vector id
0 32 769
1 33 770
2 34 771
3 35 772
4 36 773
5 37 774
6 38 775
7 39 776
8 40 777
9 41 778
10 42 779
11 43 780
12 44 781
13 45 782
14 46 783
15 47 784
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 33 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4 +--
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 20 +
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 18
7 files changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
index 4d9cf39da48c..691d12174902 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
@@ -39,6 +39,7 @@ enum HCLGE_MBX_OPCODE {
HCLGE_MBX_KEEP_ALIVE, /* (VF -> PF) send keep alive cmd */
HCLGE_MBX_SET_ALIVE,/* (VF -> PF) set alive state */
HCLGE_MBX_SET_MTU, /* (VF -> PF) set mtu */
+ HCLGE_MBX_GET_QID_IN_PF,/* (VF -> PF) get queue id in pf */
};
/* below are per-VF mac-vlan subcodes */
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 294e725c7c44..845d43d3a920 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -460,6 +460,7 @@ struct hnae3_ae_ops {
bool (*ae_dev_resetting)(struct hnae3_handle *handle);
unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
int (*set_gro_en)(struct hnae3_handle *handle, int enable);
+ u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
};
struct hnae3_dcb_ops {
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 005b7e77c3f3..76c74b4b9777 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -125,6 +125,36 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h,
char *cmd_buf)
return 0;
}
+static int hns3_dbg_queue_map(struct hnae3_handle *h)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ int i;
+
+ if (!h->ae_algo->ops->get_global_queue_id)
+ return -EOPNOTSUPP;
+
+ dev_info(>pdev->dev, "map info for queue id and vector id\n");
+ dev_info(>pdev->dev,
+"local queue id | global queue id | vector id\n");
+ for (i = 0; i < h->kinfo.num_tqps; i++) {
+ u16 global_qid;
+
+ global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
+ ring_data = >ring_data[i];
+ if (!ring_data || !ring_data->ring ||
+ !ring_data->ring->tqp_vector)
+ continue;
+
+ dev_info(>pdev->dev,
+" %4d%4d%4d\n",
+i, global_qid,
+ring_data->ring->tqp_vector->vector_irq);
+ }
+
+ return 0;
+}
+
static int hns3_dbg_bd_info(struct hnae3_handle *h, char *cmd_buf)
{
struct hns3_nic_priv *priv = h->priv;
@@ -207,6 +237,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "available commands\n");
dev_info(>pdev->dev, "queue info [number]\n");
+ dev_info(>pdev->dev, "queue map\n");
dev_info(>pdev->dev, "bd info [q_num] \n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump tc\n");
@@ -303,6 +334,8 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const
char __user *buffer,
hns3_dbg_help(handle);
else if (strncm
[PATCH V2 net-next 4/6] net: hns3: Add "dcb register" status information query function
From: liuzhongzhu
This patch prints dcb register status information by module.
debugfs command:
root@(none)# echo dump reg dcb > cmd
roce_qset_mask: 0x0
nic_qs_mask: 0x0
qs_shaping_pass: 0x0
qs_bp_sts: 0x0
pri_mask: 0x0
pri_cshaping_pass: 0x0
pri_pshaping_pass: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 7 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 9 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 102 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 16
4 files changed, 134 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index e6268e03d221..005b7e77c3f3 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -226,6 +226,13 @@ static void hns3_dbg_help(struct hnae3_handle *h)
" [rtc] [ppp] [rcb] [tqp ]]\n",
HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
dev_info(>pdev->dev, "%s", printf_buf);
+
+ memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
+ strncat(printf_buf, "dump reg dcb [port_id] [pri_id] [pg_id]",
+ HNS3_DBG_BUF_LEN - 1);
+ strncat(printf_buf + strlen(printf_buf), " [rq_id] [nq_id] [qset_id]\n",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
+ dev_info(>pdev->dev, "%s", printf_buf);
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 2b281d909f51..c3758f7cb9a0 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -140,6 +140,15 @@ enum hclge_opcode_type {
HCLGE_OPC_TM_QS_SCH_MODE_CFG= 0x0814,
HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815,
HCLGE_OPC_ETS_TC_WEIGHT = 0x0843,
+ HCLGE_OPC_QSET_DFX_STS = 0x0844,
+ HCLGE_OPC_PRI_DFX_STS = 0x0845,
+ HCLGE_OPC_PG_DFX_STS= 0x0846,
+ HCLGE_OPC_PORT_DFX_STS = 0x0847,
+ HCLGE_OPC_SCH_NQ_CNT= 0x0848,
+ HCLGE_OPC_SCH_RQ_CNT= 0x0849,
+ HCLGE_OPC_TM_INTERNAL_STS = 0x0850,
+ HCLGE_OPC_TM_INTERNAL_CNT = 0x0851,
+ HCLGE_OPC_TM_INTERNAL_STS_1 = 0x0852,
/* Packet buffer allocate commands */
HCLGE_OPC_TX_BUFF_ALLOC = 0x0901,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 7d18ed8e17f0..2d43d347ddfd 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -107,6 +107,106 @@ static void hclge_dbg_dump_reg_common(struct hclge_dev
*hdev,
kfree(desc_src);
}
+static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, char *cmd_buf)
+{
+ struct device *dev = >pdev->dev;
+ struct hclge_dbg_bitmap_cmd *bitmap;
+ int rq_id, pri_id, qset_id;
+ int port_id, nq_id, pg_id;
+ struct hclge_desc desc[2];
+
+ int cnt, ret;
+
+ cnt = sscanf(cmd_buf, "%i %i %i %i %i %i",
+_id, _id, _id, _id, _id, _id);
+ if (cnt != 6) {
+ dev_err(>pdev->dev,
+ "dump dcb: bad command parameter, cnt=%d\n", cnt);
+ return;
+ }
+
+ ret = hclge_dbg_cmd_send(hdev, desc, qset_id, 1,
+HCLGE_OPC_QSET_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "roce_qset_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "nic_qs_mask: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "qs_shaping_pass: 0x%x\n", bitmap->bit2);
+ dev_info(dev, "qs_bp_sts: 0x%x\n", bitmap->bit3);
+
+ ret = hclge_dbg_cmd_send(hdev, desc, pri_id, 1, HCLGE_OPC_PRI_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "pri_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "pri_cshaping_pass: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "pri_pshaping_pass: 0x%x\n", bitmap->bit2);
+
+ ret = hclge_dbg_cmd_send(hdev, desc, pg_id, 1, HCLGE_OPC_PG_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "pg_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "pg_cshaping_pass: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "pg_psha
[PATCH V2 net-next 3/6] net: hns3: Add "status register" information query function
From: liuzhongzhu
This patch prints status register information by module.
debugfs command:
echo dump reg [mode name] > cmd
Sample Command:
root@(none)# echo dump reg bios common > cmd
BP_CPU_STATE: 0x0
DFX_MSIX_INFO_NIC_0: 0xc000
DFX_MSIX_INFO_NIC_1: 0xf
DFX_MSIX_INFO_NIC_2: 0x2
DFX_MSIX_INFO_NIC_3: 0x2
DFX_MSIX_INFO_ROC_0: 0xc000
DFX_MSIX_INFO_ROC_1: 0x0
DFX_MSIX_INFO_ROC_2: 0x0
DFX_MSIX_INFO_ROC_3: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 15 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 14 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 194 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 662 +
4 files changed, 885 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 4c5a421456b7..e6268e03d221 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -201,6 +201,10 @@ static int hns3_dbg_bd_info(struct hnae3_handle *h, char
*cmd_buf)
static void hns3_dbg_help(struct hnae3_handle *h)
{
+#define HNS3_DBG_BUF_LEN 256
+
+ char printf_buf[HNS3_DBG_BUF_LEN];
+
dev_info(>pdev->dev, "available commands\n");
dev_info(>pdev->dev, "queue info [number]\n");
dev_info(>pdev->dev, "bd info [q_num] \n");
@@ -211,6 +215,17 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump qos pri map\n");
dev_info(>pdev->dev, "dump qos buf cfg\n");
dev_info(>pdev->dev, "dump mng tbl\n");
+
+ memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
+ strncat(printf_buf, "dump reg [[bios common] [ssu ]",
+ HNS3_DBG_BUF_LEN - 1);
+ strncat(printf_buf + strlen(printf_buf),
+ " [igu egu ] [rpu ]",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
+ strncat(printf_buf + strlen(printf_buf),
+ " [rtc] [ppp] [rcb] [tqp ]]\n",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
+ dev_info(>pdev->dev, "%s", printf_buf);
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index dcacfa089b74..2b281d909f51 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -86,6 +86,20 @@ enum hclge_opcode_type {
HCLGE_OPC_QUERY_REG_NUM = 0x0040,
HCLGE_OPC_QUERY_32_BIT_REG = 0x0041,
HCLGE_OPC_QUERY_64_BIT_REG = 0x0042,
+ HCLGE_OPC_DFX_BD_NUM= 0x0043,
+ HCLGE_OPC_DFX_BIOS_COMMON_REG = 0x0044,
+ HCLGE_OPC_DFX_SSU_REG_0 = 0x0045,
+ HCLGE_OPC_DFX_SSU_REG_1 = 0x0046,
+ HCLGE_OPC_DFX_IGU_EGU_REG = 0x0047,
+ HCLGE_OPC_DFX_RPU_REG_0 = 0x0048,
+ HCLGE_OPC_DFX_RPU_REG_1 = 0x0049,
+ HCLGE_OPC_DFX_NCSI_REG = 0x004A,
+ HCLGE_OPC_DFX_RTC_REG = 0x004B,
+ HCLGE_OPC_DFX_PPP_REG = 0x004C,
+ HCLGE_OPC_DFX_RCB_REG = 0x004D,
+ HCLGE_OPC_DFX_TQP_REG = 0x004E,
+ HCLGE_OPC_DFX_SSU_REG_2 = 0x004F,
+ HCLGE_OPC_DFX_QUERY_CHIP_CAP= 0x0050,
/* MAC command */
HCLGE_OPC_CONFIG_MAC_MODE = 0x0301,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 77a11618040d..7d18ed8e17f0 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -9,6 +9,198 @@
#include "hclge_tm.h"
#include "hnae3.h"
+static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset)
+{
+ struct hclge_desc desc[4];
+ int ret;
+
+ hclge_cmd_setup_basic_desc([0], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([1], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[1].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([2], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[2].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([3], HCLGE_OPC_DFX_BD_NUM, true);
+
+ ret = hclge_cmd_send(>hw, desc, 4);
+ if (ret != HCLGE_CMD_EXEC_SUCCESS) {
+ dev_err(>pdev->dev,
+ "get dfx bdnum fail, status is %d.\n", ret);
+ return ret;
+ }
+
+ return (int)desc[offset / 6].data[offset % 6];
+}
+
+static int hclge_dbg_cmd_send(struc
RE: [PATCH net-next 0/6] net: hns3: Add more commands to Debugfs in HNS3 driver
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Friday, December 14, 2018 10:37 PM
> To: Salil Mehta
> Cc: Zhuangyuzeng (Yisen) ; lipeng (Y)
> ; mehta.sa...@opnsrc.net; net...@vger.kernel.org;
> linux-kernel@vger.kernel.org; Linuxarm
> Subject: Re: [PATCH net-next 0/6] net: hns3: Add more commands to
> Debugfs in HNS3 driver
>
> From: David Miller
> Date: Fri, 14 Dec 2018 14:30:46 -0800 (PST)
>
> > From: Salil Mehta
> > Date: Tue, 11 Dec 2018 17:13:24 +
> >
> >> This patch-set adds few more debugfs commands to HNS3 Ethernet
> >> Driver. Support has been added to query info related to below
> >> items:
> >> 1. Packet buffer descriptor ("echo bd info [queue no] [bd index] > cmd")
> >> 2. Manager table("echo dump mng tbl > cmd")
> >> 3. Dfx status register("echo dump reg ssu [prt id] > cmd")
> >> 4. Dcb status register("echo dump reg dcb [port id] > cmd")
> >> 5. Queue map ("echo queue map [queue no] > cmd")
> >> 6. Tm map ("echo tm map [queue no] > cmd")
> >>
> >> NOTE: Above commands are *read-only* and are only intended to
> >> query the information from the SoC(and dump inside the kernel,
> >> for now) and in no way tries to perform write operations for
> >> the purpose of configuration etc.
> >
> > Series applied.
>
> Actually, reverted.
>
> Please fix these warnings and resubmit (with gcc version
> "gcc (GCC) 8.2.1 20181105 (Red Hat 8.2.1-5)"):
>
> In file included from ./include/linux/bitmap.h:9,
> from ./include/linux/cpumask.h:12,
> from ./arch/x86/include/asm/cpumask.h:5,
> from ./arch/x86/include/asm/msr.h:11,
> from ./arch/x86/include/asm/processor.h:21,
> from ./arch/x86/include/asm/cpufeature.h:8,
> from ./arch/x86/include/asm/thread_info.h:53,
> from ./include/linux/thread_info.h:38,
> from ./arch/x86/include/asm/preempt.h:7,
> from ./include/linux/preempt.h:81,
> from ./include/linux/spinlock.h:51,
> from ./include/linux/wait.h:9,
> from ./include/linux/wait_bit.h:8,
> from ./include/linux/fs.h:6,
> from ./include/linux/debugfs.h:15,
> from
> drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:4:
> In function ‘strncat’,
> inlined from ‘hns3_dbg_help’ at
> drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:263:2:
> ./include/linux/string.h:320:10: warning: ‘__builtin_strncat’ specified
> bound 256 equals destination size [-Wstringop-overflow=]
>return __builtin_strncat(p, q, count);
> ^~
> In function ‘strncat’,
> inlined from ‘hns3_dbg_help’ at
> drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:252:2:
> ./include/linux/string.h:320:10: warning: ‘__builtin_strncat’ specified
> bound 256 equals destination size [-Wstringop-overflow=]
>return __builtin_strncat(p, q, count);
> ^~
> In file included from ./include/linux/bitmap.h:9,
> from ./include/linux/cpumask.h:12,
> from ./arch/x86/include/asm/cpumask.h:5,
> from ./arch/x86/include/asm/msr.h:11,
> from ./arch/x86/include/asm/processor.h:21,
> from ./include/linux/mutex.h:19,
> from ./include/linux/kernfs.h:13,
> from ./include/linux/sysfs.h:16,
> from ./include/linux/kobject.h:20,
> from ./include/linux/device.h:16,
> from
> drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c:4:
> In function ‘strncat’,
> inlined from ‘hclge_dbg_dump_mng_table’ at
> drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c:795:2:
> ./include/linux/string.h:320:10: warning: ‘__builtin_strncat’ specified
> bound 256 equals destination size [-Wstringop-overflow=]
>return __builtin_strncat(p, q, count);
> ^~
Ahh, goodness. Perhaps, I have been using outdated compiler.
I will float the V2 version today after fixing above.
Thanks
Dave
[PATCH net-next 0/6] net: hns3: Add more commands to Debugfs in HNS3 driver
This patch-set adds few more debugfs commands to HNS3 Ethernet
Driver. Support has been added to query info related to below
items:
1. Packet buffer descriptor ("echo bd info [queue no] [bd index] > cmd")
2. Manager table("echo dump mng tbl > cmd")
3. Dfx status register("echo dump reg ssu [prt id] > cmd")
4. Dcb status register("echo dump reg dcb [port id] > cmd")
5. Queue map ("echo queue map [queue no] > cmd")
6. Tm map ("echo tm map [queue no] > cmd")
NOTE: Above commands are *read-only* and are only intended to
query the information from the SoC(and dump inside the kernel,
for now) and in no way tries to perform write operations for
the purpose of configuration etc.
liuzhongzhu (6):
net: hns3: Add "bd info" query function
net: hns3: Add "manager table" information query function
net: hns3: Add "status register" information query function
net: hns3: Add "dcb register" status information query function
net: hns3: Add "queue map" information query function
net: hns3: Add "tm map" status information query function
drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 136 +++-
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 43 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 446 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 690 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 20 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 7 +
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 18 +
11 files changed, 1364 insertions(+), 3 deletions(-)
--
2.7.4
[PATCH net-next 5/6] net: hns3: Add "queue map" information query function
From: liuzhongzhu
This patch prints queue map information.
debugfs command:
echo dump queue map > cmd
Sample Command:
root@(none)# echo queue map > cmd
local queue id | global queue id | vector id
0 32 769
1 33 770
2 34 771
3 35 772
4 36 773
5 37 774
6 38 775
7 39 776
8 40 777
9 41 778
10 42 779
11 43 780
12 44 781
13 45 782
14 46 783
15 47 784
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 33 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 4 +--
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 20 +
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 18
7 files changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
index 4d9cf39..691d121 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h
@@ -39,6 +39,7 @@ enum HCLGE_MBX_OPCODE {
HCLGE_MBX_KEEP_ALIVE, /* (VF -> PF) send keep alive cmd */
HCLGE_MBX_SET_ALIVE,/* (VF -> PF) set alive state */
HCLGE_MBX_SET_MTU, /* (VF -> PF) set mtu */
+ HCLGE_MBX_GET_QID_IN_PF,/* (VF -> PF) get queue id in pf */
};
/* below are per-VF mac-vlan subcodes */
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 294e725..845d43d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -460,6 +460,7 @@ struct hnae3_ae_ops {
bool (*ae_dev_resetting)(struct hnae3_handle *handle);
unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
int (*set_gro_en)(struct hnae3_handle *handle, int enable);
+ u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
};
struct hnae3_dcb_ops {
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index be11e3d..fe5ec68 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -125,6 +125,36 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h,
char *cmd_buf)
return 0;
}
+static int hns3_dbg_queue_map(struct hnae3_handle *h)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ int i;
+
+ if (!h->ae_algo->ops->get_global_queue_id)
+ return -EOPNOTSUPP;
+
+ dev_info(>pdev->dev, "map info for queue id and vector id\n");
+ dev_info(>pdev->dev,
+"local queue id | global queue id | vector id\n");
+ for (i = 0; i < h->kinfo.num_tqps; i++) {
+ u16 global_qid;
+
+ global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
+ ring_data = >ring_data[i];
+ if (!ring_data || !ring_data->ring ||
+ !ring_data->ring->tqp_vector)
+ continue;
+
+ dev_info(>pdev->dev,
+" %4d%4d%4d\n",
+i, global_qid,
+ring_data->ring->tqp_vector->vector_irq);
+ }
+
+ return 0;
+}
+
static int hns3_dbg_bd_info(struct hnae3_handle *h, char *cmd_buf)
{
struct hns3_nic_priv *priv = h->priv;
@@ -207,6 +237,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "available commands\n");
dev_info(>pdev->dev, "queue info [number]\n");
+ dev_info(>pdev->dev, "queue map\n");
dev_info(>pdev->dev, "bd info [q_num] \n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump tc\n");
@@ -303,6 +334,8 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const
char __user *buffer,
hns3_dbg_help(handle);
else if (strncmp(cmd_buf, "queue info",
[PATCH net-next 2/6] net: hns3: Add "manager table" information query function
From: liuzhongzhu
This patch prints manager table information.
debugfs command:
echo dump mng tbl > cmd
Sample Command:
root@(none)# echo dump mng tbl > cmd
entry|mac_addr |mask|ether|mask|vlan|mask|i_map|i_dir|e_type
00 |01:00:5e:00:00:01|0 |0|0 ||0 |00 |00 |0
01 |c2:f1:c5:82:68:17|0 |0|0 ||0 |00 |00 |0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 19 +++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 66 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 12
4 files changed, 98 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 9a02655..5067ee3 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -210,6 +210,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
dev_info(>pdev->dev, "dump qos buf cfg\n");
+ dev_info(>pdev->dev, "dump mng tbl\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index b1ee6fe..61b617c 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -237,6 +237,7 @@ enum hclge_opcode_type {
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
HCLGE_PPP_CMD0_INT_CMD = 0x2100,
HCLGE_PPP_CMD1_INT_CMD = 0x2101,
+ HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105,
HCLGE_NCSI_INT_EN = 0x2401,
};
@@ -744,6 +745,24 @@ struct hclge_cfg_tx_queue_pointer_cmd {
u8 rsv[14];
};
+#pragma pack(1)
+struct hclge_mac_ethertype_idx_rd_cmd {
+ u8 flags;
+ u8 resp_code;
+ __le16 vlan_tag;
+ u8 mac_add[6];
+ __le16 index;
+ __le16 ethter_type;
+ __le16 egress_port;
+ __le16 egress_queue;
+ __le16 rev0;
+ u8 i_port_bitmap;
+ u8 i_port_direction;
+ u8 rev1[2];
+};
+
+#pragma pack()
+
#define HCLGE_TSO_MSS_MIN_S0
#define HCLGE_TSO_MSS_MIN_MGENMASK(13, 0)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 14577bb..832c7f4 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -407,6 +407,70 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev
*hdev)
"dump qos buf cfg fail(0x%x), status is %d\n", cmd, ret);
}
+static void hclge_dbg_dump_mng_table(struct hclge_dev *hdev)
+{
+ struct hclge_mac_ethertype_idx_rd_cmd *req0;
+ char printf_buf[HCLGE_DBG_BUF_LEN];
+ struct hclge_desc desc;
+ int ret, i;
+
+ dev_info(>pdev->dev, "mng tab:\n");
+ memset(printf_buf, 0, HCLGE_DBG_BUF_LEN);
+ strncat(printf_buf,
+ "entry|mac_addr |mask|ether|mask|vlan|mask",
+ HCLGE_DBG_BUF_LEN);
+ strncat(printf_buf + strlen(printf_buf),
+ "|i_map|i_dir|e_type|pf_id|vf_id|q_id|drop\n",
+ HCLGE_DBG_BUF_LEN - strlen(printf_buf));
+
+ dev_info(>pdev->dev, "%s", printf_buf);
+
+ for (i = 0; i < HCLGE_DBG_MNG_TBL_MAX; i++) {
+ hclge_cmd_setup_basic_desc(, HCLGE_MAC_ETHERTYPE_IDX_RD,
+ true);
+ req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)
+ req0->index = cpu_to_le16(i);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret) {
+ dev_err(>pdev->dev,
+ "call hclge_cmd_send fail, ret = %d\n", ret);
+ return;
+ }
+
+ if (!req0->resp_code)
+ continue;
+
+ memset(printf_buf, 0, HCLGE_DBG_BUF_LEN);
+ snprintf(printf_buf, HCLGE_DBG_BUF_LEN,
+"%02u |%02x:%02x:%02x:%02x:%02x:%02x|",
+req0->index, req0->mac_add[0], req0->mac_add[1],
+req0->mac_add[2], req0->mac_add[3], req0->mac_add[4],
+req0->mac_add[5]);
+
+ snprintf(printf_buf + strlen(printf_buf),
+HCLGE_DBG_BUF_LEN - strlen(printf_buf),
+"%x
[PATCH net-next 6/6] net: hns3: Add "tm map" status information query function
From: liuzhongzhu
This patch prints dcb register status information by module.
debugfs command:
root@(none)# echo dump tm map 100 > cmd
queue_id | qset_id | pri_id | tc_id
0100 | 0065| 08 | 00
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 84 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 7 ++
4 files changed, 93 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index fe5ec68..0872ca5 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -241,6 +241,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "bd info [q_num] \n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump tc\n");
+ dev_info(>pdev->dev, "dump tm map [q_num]\n");
dev_info(>pdev->dev, "dump tm\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index dc8b7c2..71c1678 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -165,6 +165,7 @@ enum hclge_opcode_type {
HCLGE_OPC_CFG_TX_QUEUE = 0x0B01,
HCLGE_OPC_QUERY_TX_POINTER = 0x0B02,
HCLGE_OPC_QUERY_TX_STATUS = 0x0B03,
+ HCLGE_OPC_TQP_TX_QUEUE_TC = 0x0B04,
HCLGE_OPC_CFG_RX_QUEUE = 0x0B11,
HCLGE_OPC_QUERY_RX_POINTER = 0x0B12,
HCLGE_OPC_QUERY_RX_STATUS = 0x0B13,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index d1d693b..dda5f00 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -537,6 +537,88 @@ static void hclge_dbg_dump_tm(struct hclge_dev *hdev)
cmd, ret);
}
+static void hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *cmd_buf)
+{
+ struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd;
+ struct hclge_nq_to_qs_link_cmd *nq_to_qs_map;
+ struct hclge_qs_to_pri_link_cmd *map;
+ struct hclge_tqp_tx_queue_tc_cmd *tc;
+ enum hclge_opcode_type cmd;
+ struct hclge_desc desc;
+ int queue_id, group_id;
+ u32 qset_maping[32];
+ int tc_id, qset_id;
+ int pri_id, ret;
+ u32 i;
+
+ ret = kstrtouint(_buf[12], 10, _id);
+ queue_id = (ret != 0) ? 0 : queue_id;
+
+ cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK;
+ nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ nq_to_qs_map->nq_id = cpu_to_le16(queue_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ qset_id = nq_to_qs_map->qset_id & 0x3FF;
+
+ cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK;
+ map = (struct hclge_qs_to_pri_link_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ map->qs_id = cpu_to_le16(qset_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ pri_id = map->priority;
+
+ cmd = HCLGE_OPC_TQP_TX_QUEUE_TC;
+ tc = (struct hclge_tqp_tx_queue_tc_cmd *)desc.data;
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ tc->queue_id = cpu_to_le16(queue_id);
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+ tc_id = tc->tc_id & 0x7;
+
+ dev_info(>pdev->dev, "queue_id | qset_id | pri_id | tc_id\n");
+ dev_info(>pdev->dev, "%04d | %04d| %02d | %02d\n",
+queue_id, qset_id, pri_id, tc_id);
+
+ cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING;
+ bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data;
+ for (group_id = 0; group_id < 32; group_id++) {
+ hclge_cmd_setup_basic_desc(, cmd, true);
+ bp_to_qs_map_cmd->tc_id = tc_id;
+ bp_to_qs_map_cmd->qs_group_id = group_id;
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ goto err_tm_map_cmd_send;
+
+ qset_maping[group_id] = bp_to_qs_map_cmd->qs_bit_map;
+ }
+
+ dev_info(>pdev->dev, "index | tm bp qset maping:\n");
+
+ i = 0;
+ for (group_id
[PATCH net-next 1/6] net: hns3: Add "bd info" query function
From: liuzhongzhu
This patch prints Sending and receiving
packet descriptor information.
debugfs command:
echo dump bd info 1 > cmd
Sample Command:
root@(none)# echo bd info 1 > cmd
hns3 :7d:00.0: TX Queue Num: 0, BD Index: 0
hns3 :7d:00.0: (TX) addr: 0x0
hns3 :7d:00.0: (TX)vlan_tag: 0
hns3 :7d:00.0: (TX)send_size: 0
hns3 :7d:00.0: (TX)vlan_tso: 0
hns3 :7d:00.0: (TX)l2_len: 0
hns3 :7d:00.0: (TX)l3_len: 0
hns3 :7d:00.0: (TX)l4_len: 0
hns3 :7d:00.0: (TX)vlan_tag: 0
hns3 :7d:00.0: (TX)tv: 0
hns3 :7d:00.0: (TX)vlan_msec: 0
hns3 :7d:00.0: (TX)ol2_len: 0
hns3 :7d:00.0: (TX)ol3_len: 0
hns3 :7d:00.0: (TX)ol4_len: 0
hns3 :7d:00.0: (TX)paylen: 0
hns3 :7d:00.0: (TX)vld_ra_ri: 0
hns3 :7d:00.0: (TX)mss: 0
hns3 :7d:00.0: RX Queue Num: 0, BD Index: 120
hns3 :7d:00.0: (RX)addr: 0xffee7000
hns3 :7d:00.0: (RX)pkt_len: 0
hns3 :7d:00.0: (RX)size: 0
hns3 :7d:00.0: (RX)rss_hash: 0
hns3 :7d:00.0: (RX)fd_id: 0
hns3 :7d:00.0: (RX)vlan_tag: 0
hns3 :7d:00.0: (RX)o_dm_vlan_id_fb: 0
hns3 :7d:00.0: (RX)ot_vlan_tag: 0
hns3 :7d:00.0: (RX)bd_base_info: 0
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 79 +-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 86d667a..9a02655 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -52,7 +52,7 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h, char
*cmd_buf)
test_bit(HNS3_NIC_STATE_RESETTING, >state))
return -EPERM;
- ring = ring_data[i + h->kinfo.num_tqps].ring;
+ ring = ring_data[(u32)(i + h->kinfo.num_tqps)].ring;
base_add_h = readl_relaxed(ring->tqp->io_base +
HNS3_RING_RX_RING_BASEADDR_H_REG);
base_add_l = readl_relaxed(ring->tqp->io_base +
@@ -125,10 +125,85 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h,
char *cmd_buf)
return 0;
}
+static int hns3_dbg_bd_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_desc *rx_desc, *tx_desc;
+ struct device *dev = >pdev->dev;
+ struct hns3_enet_ring *ring;
+ u32 tx_index, rx_index;
+ u32 q_num, value;
+ int cnt;
+
+ cnt = sscanf(_buf[8], "%u %u", _num, _index);
+ if (cnt == 2) {
+ rx_index = tx_index;
+ } else if (cnt != 1) {
+ dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
+ return -EINVAL;
+ }
+
+ if (q_num >= h->kinfo.num_tqps) {
+ dev_err(dev, "Queue number(%u) is out of range(%u)\n", q_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ ring = ring_data[q_num].ring;
+ value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
+ tx_index = (cnt == 1) ? value : tx_index;
+
+ if (tx_index >= ring->desc_num) {
+ dev_err(dev, "bd index (%u) is out of range(%u)\n", tx_index,
+ ring->desc_num - 1);
+ return -EINVAL;
+ }
+
+ tx_desc = >desc[tx_index];
+ dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
+ dev_info(dev, "(TX) addr: 0x%llx\n", tx_desc->addr);
+ dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.vlan_tag);
+ dev_info(dev, "(TX)send_size: %u\n", tx_desc->tx.send_size);
+ dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
+ dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
+ dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
+ dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
+ dev_info(dev, "(TX)vlan_tag: %u\n", tx_desc->tx.outer_vlan_tag);
+ dev_info(dev, "(TX)tv: %u\n", tx_desc->tx.tv);
+ dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
+ dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
+ dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
+ dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
+ dev_info(dev, "(TX)paylen: %u\n", tx_desc->tx.paylen);
+ dev_info(dev, "(TX)vld_ra_ri: %u\n", tx_desc->tx.bdtp_fe_sc_vld_ra_ri);
+ dev_info(dev, "(TX)mss: %u\n",
[PATCH net-next 4/6] net: hns3: Add "dcb register" status information query function
From: liuzhongzhu
This patch prints dcb register status information by module.
debugfs command:
root@(none)# echo dump reg dcb > cmd
roce_qset_mask: 0x0
nic_qs_mask: 0x0
qs_shaping_pass: 0x0
qs_bp_sts: 0x0
pri_mask: 0x0
pri_cshaping_pass: 0x0
pri_pshaping_pass: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 7 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 9 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 102 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 16
4 files changed, 134 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index c34d412..be11e3d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -226,6 +226,13 @@ static void hns3_dbg_help(struct hnae3_handle *h)
" [rtc] [ppp] [rcb] [tqp ]]\n",
HNS3_DBG_BUF_LEN - strlen(printf_buf));
dev_info(>pdev->dev, "%s", printf_buf);
+
+ memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
+ strncat(printf_buf, "dump reg dcb [port_id] [pri_id] [pg_id]",
+ HNS3_DBG_BUF_LEN);
+ strncat(printf_buf + strlen(printf_buf), " [rq_id] [nq_id] [qset_id]\n",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf));
+ dev_info(>pdev->dev, "%s", printf_buf);
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 5d69e0d..dc8b7c2 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -140,6 +140,15 @@ enum hclge_opcode_type {
HCLGE_OPC_TM_QS_SCH_MODE_CFG= 0x0814,
HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815,
HCLGE_OPC_ETS_TC_WEIGHT = 0x0843,
+ HCLGE_OPC_QSET_DFX_STS = 0x0844,
+ HCLGE_OPC_PRI_DFX_STS = 0x0845,
+ HCLGE_OPC_PG_DFX_STS= 0x0846,
+ HCLGE_OPC_PORT_DFX_STS = 0x0847,
+ HCLGE_OPC_SCH_NQ_CNT= 0x0848,
+ HCLGE_OPC_SCH_RQ_CNT= 0x0849,
+ HCLGE_OPC_TM_INTERNAL_STS = 0x0850,
+ HCLGE_OPC_TM_INTERNAL_CNT = 0x0851,
+ HCLGE_OPC_TM_INTERNAL_STS_1 = 0x0852,
/* Packet buffer allocate commands */
HCLGE_OPC_TX_BUFF_ALLOC = 0x0901,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 3aa3483..d1d693b 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -107,6 +107,106 @@ static void hclge_dbg_dump_reg_common(struct hclge_dev
*hdev,
kfree(desc_src);
}
+static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, char *cmd_buf)
+{
+ struct device *dev = >pdev->dev;
+ struct hclge_dbg_bitmap_cmd *bitmap;
+ int rq_id, pri_id, qset_id;
+ int port_id, nq_id, pg_id;
+ struct hclge_desc desc[2];
+
+ int cnt, ret;
+
+ cnt = sscanf(cmd_buf, "%i %i %i %i %i %i",
+_id, _id, _id, _id, _id, _id);
+ if (cnt != 6) {
+ dev_err(>pdev->dev,
+ "dump dcb: bad command parameter, cnt=%d\n", cnt);
+ return;
+ }
+
+ ret = hclge_dbg_cmd_send(hdev, desc, qset_id, 1,
+HCLGE_OPC_QSET_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "roce_qset_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "nic_qs_mask: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "qs_shaping_pass: 0x%x\n", bitmap->bit2);
+ dev_info(dev, "qs_bp_sts: 0x%x\n", bitmap->bit3);
+
+ ret = hclge_dbg_cmd_send(hdev, desc, pri_id, 1, HCLGE_OPC_PRI_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "pri_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "pri_cshaping_pass: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "pri_pshaping_pass: 0x%x\n", bitmap->bit2);
+
+ ret = hclge_dbg_cmd_send(hdev, desc, pg_id, 1, HCLGE_OPC_PG_DFX_STS);
+ if (ret)
+ return;
+
+ bitmap = (struct hclge_dbg_bitmap_cmd *)[0].data[1];
+ dev_info(dev, "pg_mask: 0x%x\n", bitmap->bit0);
+ dev_info(dev, "pg_cshaping_pass: 0x%x\n", bitmap->bit1);
+ dev_info(dev, "pg_pshaping_pass: 0x%x\n", bitmap-&g
[PATCH net-next 3/6] net: hns3: Add "status register" information query function
From: liuzhongzhu
This patch prints status register information by module.
debugfs command:
echo dump reg [mode name] > cmd
Sample Command:
root@(none)# echo dump reg bios common > cmd
BP_CPU_STATE: 0x0
DFX_MSIX_INFO_NIC_0: 0xc000
DFX_MSIX_INFO_NIC_1: 0xf
DFX_MSIX_INFO_NIC_2: 0x2
DFX_MSIX_INFO_NIC_3: 0x2
DFX_MSIX_INFO_ROC_0: 0xc000
DFX_MSIX_INFO_ROC_1: 0x0
DFX_MSIX_INFO_ROC_2: 0x0
DFX_MSIX_INFO_ROC_3: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 15 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 14 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 194 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 662 +
4 files changed, 885 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 5067ee3..c34d412 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -201,6 +201,10 @@ static int hns3_dbg_bd_info(struct hnae3_handle *h, char
*cmd_buf)
static void hns3_dbg_help(struct hnae3_handle *h)
{
+#define HNS3_DBG_BUF_LEN 256
+
+ char printf_buf[HNS3_DBG_BUF_LEN];
+
dev_info(>pdev->dev, "available commands\n");
dev_info(>pdev->dev, "queue info [number]\n");
dev_info(>pdev->dev, "bd info [q_num] \n");
@@ -211,6 +215,17 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump qos pri map\n");
dev_info(>pdev->dev, "dump qos buf cfg\n");
dev_info(>pdev->dev, "dump mng tbl\n");
+
+ memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
+ strncat(printf_buf, "dump reg [[bios common] [ssu ]",
+ HNS3_DBG_BUF_LEN);
+ strncat(printf_buf + strlen(printf_buf),
+ " [igu egu ] [rpu ]",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf));
+ strncat(printf_buf + strlen(printf_buf),
+ " [rtc] [ppp] [rcb] [tqp ]]\n",
+ HNS3_DBG_BUF_LEN - strlen(printf_buf));
+ dev_info(>pdev->dev, "%s", printf_buf);
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 61b617c..5d69e0d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -86,6 +86,20 @@ enum hclge_opcode_type {
HCLGE_OPC_QUERY_REG_NUM = 0x0040,
HCLGE_OPC_QUERY_32_BIT_REG = 0x0041,
HCLGE_OPC_QUERY_64_BIT_REG = 0x0042,
+ HCLGE_OPC_DFX_BD_NUM= 0x0043,
+ HCLGE_OPC_DFX_BIOS_COMMON_REG = 0x0044,
+ HCLGE_OPC_DFX_SSU_REG_0 = 0x0045,
+ HCLGE_OPC_DFX_SSU_REG_1 = 0x0046,
+ HCLGE_OPC_DFX_IGU_EGU_REG = 0x0047,
+ HCLGE_OPC_DFX_RPU_REG_0 = 0x0048,
+ HCLGE_OPC_DFX_RPU_REG_1 = 0x0049,
+ HCLGE_OPC_DFX_NCSI_REG = 0x004A,
+ HCLGE_OPC_DFX_RTC_REG = 0x004B,
+ HCLGE_OPC_DFX_PPP_REG = 0x004C,
+ HCLGE_OPC_DFX_RCB_REG = 0x004D,
+ HCLGE_OPC_DFX_TQP_REG = 0x004E,
+ HCLGE_OPC_DFX_SSU_REG_2 = 0x004F,
+ HCLGE_OPC_DFX_QUERY_CHIP_CAP= 0x0050,
/* MAC command */
HCLGE_OPC_CONFIG_MAC_MODE = 0x0301,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 832c7f4..3aa3483 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -9,6 +9,198 @@
#include "hclge_tm.h"
#include "hnae3.h"
+static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset)
+{
+ struct hclge_desc desc[4];
+ int ret;
+
+ hclge_cmd_setup_basic_desc([0], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([1], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[1].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([2], HCLGE_OPC_DFX_BD_NUM, true);
+ desc[2].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([3], HCLGE_OPC_DFX_BD_NUM, true);
+
+ ret = hclge_cmd_send(>hw, desc, 4);
+ if (ret != HCLGE_CMD_EXEC_SUCCESS) {
+ dev_err(>pdev->dev,
+ "get dfx bdnum fail, status is %d.\n", ret);
+ return ret;
+ }
+
+ return (int)desc[offset / 6].data[offset % 6];
+}
+
+static int hclge_dbg_cmd_send(struct hclge_dev *hdev,
+
[PATCH net-next 09/14] net: hns3: add handling of hw errors reported through MSIX
This patch adds handling for HNS3 hardware errors(non-standard)
which are reported through MSIX interrupts and not through
PCIe AER channel.
These MSIX reported hardware errors are handled using common
misc. interrupt handler. Hardware error related registers
cannot be cleared in context to the interrupt received as
they require *heavy* access to hardware using IMP(Integrated
Mangement Processor) commands. Hence, we defer the clearing
of such error events till later time.
Since, we have defered exact identification of errors we
will have to defer the level of receovery/reset which
might be required. Hence, a new reset type UNKNOWN reset
has been introduced which effectively defers the assertion
of the reset till we get hold of kind of errors at later
time.
Signed-off-by: Salil Mehta
Signed-off-by: Shiju Jose
---
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 3 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 93 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 5 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 39 -
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 1 +
6 files changed, 140 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 9d9f4f9..294e725 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -136,6 +136,7 @@ enum hnae3_reset_type {
HNAE3_CORE_RESET,
HNAE3_GLOBAL_RESET,
HNAE3_IMP_RESET,
+ HNAE3_UNKNOWN_RESET,
HNAE3_NONE_RESET,
};
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 0a0eb6c..08d02b9 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -220,6 +220,9 @@ enum hclge_opcode_type {
HCLGE_QUERY_RAS_INT_STS_BD_NUM = 0x1510,
HCLGE_QUERY_CLEAR_MPF_RAS_INT = 0x1511,
HCLGE_QUERY_CLEAR_PF_RAS_INT= 0x1512,
+ HCLGE_QUERY_MSIX_INT_STS_BD_NUM = 0x1513,
+ HCLGE_QUERY_CLEAR_ALL_MPF_MSIX_INT = 0x1514,
+ HCLGE_QUERY_CLEAR_ALL_PF_MSIX_INT = 0x1515,
HCLGE_IGU_EGU_TNL_INT_EN= 0x1803,
HCLGE_IGU_COMMON_INT_EN = 0x1806,
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 7371ae4..0676670 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -727,3 +727,96 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct
hnae3_ae_dev *ae_dev)
return PCI_ERS_RESULT_RECOVERED;
}
+
+int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
+ unsigned long *reset_requests)
+{
+ struct device *dev = >pdev->dev;
+ u32 mpf_bd_num, pf_bd_num, bd_num;
+ struct hclge_desc desc_bd;
+ struct hclge_desc *desc;
+ int ret = 0;
+
+ /* set default handling */
+ set_bit(HNAE3_FUNC_RESET, reset_requests);
+
+ /* query the number of bds for the MSIx int status */
+ hclge_cmd_setup_basic_desc(_bd, HCLGE_QUERY_MSIX_INT_STS_BD_NUM,
+ true);
+ ret = hclge_cmd_send(>hw, _bd, 1);
+ if (ret) {
+ dev_err(dev, "fail(%d) to query msix int status bd num\n",
+ ret);
+ /* reset everything for now */
+ set_bit(HNAE3_GLOBAL_RESET, reset_requests);
+ return ret;
+ }
+
+ mpf_bd_num = le32_to_cpu(desc_bd.data[0]);
+ pf_bd_num = le32_to_cpu(desc_bd.data[1]);
+ bd_num = max_t(u32, mpf_bd_num, pf_bd_num);
+
+ desc = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);
+ if (!desc)
+ goto out;
+
+ /* query all main PF MSIx errors */
+ hclge_cmd_setup_basic_desc([0], HCLGE_QUERY_CLEAR_ALL_MPF_MSIX_INT,
+ true);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+
+ ret = hclge_cmd_send(>hw, [0], mpf_bd_num);
+ if (ret) {
+ dev_err(dev, "query all mpf msix int cmd failed (%d)\n",
+ ret);
+ /* reset everything for now */
+ set_bit(HNAE3_GLOBAL_RESET, reset_requests);
+ goto msi_error;
+ }
+
+ /* clear all main PF MSIx errors */
+ hclge_cmd_reuse_desc([0], false);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+
+ ret = hclge_cmd_send(>hw, [0], mpf_bd_num);
+ if (ret) {
+ dev_err(dev, "clear all mpf msix int cmd failed (%d)\n",
+ ret);
+ /* reset
[PATCH net-next 08/14] net: hns3: deleted logging 1 bit errors
From: Shiju Jose
This patch deletes logging 1 bit errors for the following reasons.
1. AER does not notify 1 bit errors to the device drivers.
However AER reports 1 bit errors to the userspace through the
trace_aer_event for logging in the rasdaemon.
2. Firmware clears the status of 1 bit errors in the hw registers.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 37 --
1 file changed, 37 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 22e7c5b..7371ae4 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -4,42 +4,26 @@
#include "hclge_err.h"
static const struct hclge_hw_error hclge_imp_tcm_ecc_int[] = {
- { .int_msk = BIT(0), .msg = "imp_itcm0_ecc_1bit_err" },
{ .int_msk = BIT(1), .msg = "imp_itcm0_ecc_mbit_err" },
- { .int_msk = BIT(2), .msg = "imp_itcm1_ecc_1bit_err" },
{ .int_msk = BIT(3), .msg = "imp_itcm1_ecc_mbit_err" },
- { .int_msk = BIT(4), .msg = "imp_itcm2_ecc_1bit_err" },
{ .int_msk = BIT(5), .msg = "imp_itcm2_ecc_mbit_err" },
- { .int_msk = BIT(6), .msg = "imp_itcm3_ecc_1bit_err" },
{ .int_msk = BIT(7), .msg = "imp_itcm3_ecc_mbit_err" },
- { .int_msk = BIT(8), .msg = "imp_dtcm0_mem0_ecc_1bit_err" },
{ .int_msk = BIT(9), .msg = "imp_dtcm0_mem0_ecc_mbit_err" },
- { .int_msk = BIT(10), .msg = "imp_dtcm0_mem1_ecc_1bit_err" },
{ .int_msk = BIT(11), .msg = "imp_dtcm0_mem1_ecc_mbit_err" },
- { .int_msk = BIT(12), .msg = "imp_dtcm1_mem0_ecc_1bit_err" },
{ .int_msk = BIT(13), .msg = "imp_dtcm1_mem0_ecc_mbit_err" },
- { .int_msk = BIT(14), .msg = "imp_dtcm1_mem1_ecc_1bit_err" },
{ .int_msk = BIT(15), .msg = "imp_dtcm1_mem1_ecc_mbit_err" },
{ .int_msk = BIT(17), .msg = "imp_itcm4_ecc_mbit_err" },
{ /* sentinel */ }
};
static const struct hclge_hw_error hclge_cmdq_nic_mem_ecc_int[] = {
- { .int_msk = BIT(0), .msg = "cmdq_nic_rx_depth_ecc_1bit_err" },
{ .int_msk = BIT(1), .msg = "cmdq_nic_rx_depth_ecc_mbit_err" },
- { .int_msk = BIT(2), .msg = "cmdq_nic_tx_depth_ecc_1bit_err" },
{ .int_msk = BIT(3), .msg = "cmdq_nic_tx_depth_ecc_mbit_err" },
- { .int_msk = BIT(4), .msg = "cmdq_nic_rx_tail_ecc_1bit_err" },
{ .int_msk = BIT(5), .msg = "cmdq_nic_rx_tail_ecc_mbit_err" },
- { .int_msk = BIT(6), .msg = "cmdq_nic_tx_tail_ecc_1bit_err" },
{ .int_msk = BIT(7), .msg = "cmdq_nic_tx_tail_ecc_mbit_err" },
- { .int_msk = BIT(8), .msg = "cmdq_nic_rx_head_ecc_1bit_err" },
{ .int_msk = BIT(9), .msg = "cmdq_nic_rx_head_ecc_mbit_err" },
- { .int_msk = BIT(10), .msg = "cmdq_nic_tx_head_ecc_1bit_err" },
{ .int_msk = BIT(11), .msg = "cmdq_nic_tx_head_ecc_mbit_err" },
- { .int_msk = BIT(12), .msg = "cmdq_nic_rx_addr_ecc_1bit_err" },
{ .int_msk = BIT(13), .msg = "cmdq_nic_rx_addr_ecc_mbit_err" },
- { .int_msk = BIT(14), .msg = "cmdq_nic_tx_addr_ecc_1bit_err" },
{ .int_msk = BIT(15), .msg = "cmdq_nic_tx_addr_ecc_mbit_err" },
{ .int_msk = BIT(17), .msg = "cmdq_rocee_rx_depth_ecc_mbit_err" },
{ .int_msk = BIT(19), .msg = "cmdq_rocee_tx_depth_ecc_mbit_err" },
@@ -53,12 +37,6 @@ static const struct hclge_hw_error
hclge_cmdq_nic_mem_ecc_int[] = {
};
static const struct hclge_hw_error hclge_tqp_int_ecc_int[] = {
- { .int_msk = BIT(0), .msg = "tqp_int_cfg_even_ecc_1bit_err" },
- { .int_msk = BIT(1), .msg = "tqp_int_cfg_odd_ecc_1bit_err" },
- { .int_msk = BIT(2), .msg = "tqp_int_ctrl_even_ecc_1bit_err" },
- { .int_msk = BIT(3), .msg = "tqp_int_ctrl_odd_ecc_1bit_err" },
- { .int_msk = BIT(4), .msg = "tx_que_scan_int_ecc_1bit_err" },
- { .int_msk = BIT(5), .msg = "rx_que_scan_int_ecc_1bit_err" },
{ .int_msk = BIT(6), .msg = "tqp_int_cfg_even_ecc_mbit_err" },
{ .int_msk = BIT(7), .msg = "tqp_int_cfg_odd_ecc_mbit_err" },
{ .int_msk = BIT(8), .msg = "tqp_int_ctrl_even_ecc_mbit_err" },
@@ -76,9 +54,7 @@ static const struct hclge_hw_error hclge_msix_sram_ecc_int[]
= {
static const struct hclge_hw_error hclge_igu_int[] = {
{ .int_msk = BIT(0), .msg = "igu_rx_buf0_ecc_mbit_err" },
- { .int_msk = BIT(1), .msg = "igu_rx_buf0_ecc_1bit_err" },
{ .int_msk = BIT(2), .msg = &
[PATCH net-next 10/14] net: hns3: add handling of hw errors of MAC
From: Shiju Jose
This patch adds enable and handling of hw errors of
the MAC block.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 48 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 2 +
3 files changed, 51 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 08d02b9..46af567 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -215,6 +215,7 @@ enum hclge_opcode_type {
HCLGE_OPC_SFP_GET_SPEED = 0x7104,
/* Error INT commands */
+ HCLGE_MAC_COMMON_INT_EN = 0x030E,
HCLGE_TM_SCH_ECC_INT_EN = 0x0829,
HCLGE_COMMON_ECC_INT_CFG= 0x1505,
HCLGE_QUERY_RAS_INT_STS_BD_NUM = 0x1510,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 0676670..20f8bb5 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -210,6 +210,18 @@ static const struct hclge_hw_error hclge_qcn_ecc_rint[] = {
{ /* sentinel */ }
};
+static const struct hclge_hw_error hclge_mac_afifo_tnl_int[] = {
+ { .int_msk = BIT(0), .msg = "egu_cge_afifo_ecc_1bit_err" },
+ { .int_msk = BIT(1), .msg = "egu_cge_afifo_ecc_mbit_err" },
+ { .int_msk = BIT(2), .msg = "egu_lge_afifo_ecc_1bit_err" },
+ { .int_msk = BIT(3), .msg = "egu_lge_afifo_ecc_mbit_err" },
+ { .int_msk = BIT(4), .msg = "cge_igu_afifo_ecc_1bit_err" },
+ { .int_msk = BIT(5), .msg = "cge_igu_afifo_ecc_mbit_err" },
+ { .int_msk = BIT(6), .msg = "lge_igu_afifo_ecc_1bit_err" },
+ { .int_msk = BIT(7), .msg = "lge_igu_afifo_ecc_mbit_err" },
+ { /* sentinel */ }
+};
+
static void hclge_log_error(struct device *dev, char *reg,
const struct hclge_hw_error *err,
u32 err_sts)
@@ -452,6 +464,27 @@ static int hclge_config_tm_hw_err_int(struct hclge_dev
*hdev, bool en)
return ret;
}
+static int hclge_config_mac_err_int(struct hclge_dev *hdev, bool en)
+{
+ struct device *dev = >pdev->dev;
+ struct hclge_desc desc;
+ int ret;
+
+ /* configure MAC common error interrupts */
+ hclge_cmd_setup_basic_desc(, HCLGE_MAC_COMMON_INT_EN, false);
+ if (en)
+ desc.data[0] = cpu_to_le32(HCLGE_MAC_COMMON_ERR_INT_EN);
+
+ desc.data[1] = cpu_to_le32(HCLGE_MAC_COMMON_ERR_INT_EN_MASK);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret)
+ dev_err(dev,
+ "fail(%d) to configure MAC COMMON error intr\n", ret);
+
+ return ret;
+}
+
#define HCLGE_SET_DEFAULT_RESET_REQUEST(reset_type) \
do { \
if (ae_dev->ops->set_default_reset_request) \
@@ -688,6 +721,10 @@ static const struct hclge_hw_blk hw_blk[] = {
.msk = BIT(5), .name = "COMMON",
.config_err_int = hclge_config_common_hw_err_int,
},
+ {
+ .msk = BIT(8), .name = "MAC",
+ .config_err_int = hclge_config_mac_err_int,
+ },
{ /* sentinel */ }
};
@@ -735,7 +772,9 @@ int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
u32 mpf_bd_num, pf_bd_num, bd_num;
struct hclge_desc desc_bd;
struct hclge_desc *desc;
+ __le32 *desc_data;
int ret = 0;
+ u32 status;
/* set default handling */
set_bit(HNAE3_FUNC_RESET, reset_requests);
@@ -774,6 +813,15 @@ int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
goto msi_error;
}
+ /* log MAC errors */
+ desc_data = (__le32 *)[1];
+ status = le32_to_cpu(*desc_data);
+ if (status) {
+ hclge_log_error(dev, "MAC_AFIFO_TNL_INT_R",
+ _mac_afifo_tnl_int[0], status);
+ set_bit(HNAE3_GLOBAL_RESET, reset_requests);
+ }
+
/* clear all main PF MSIx errors */
hclge_cmd_reuse_desc([0], false);
desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index 05adccb..8e7d151 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -44,6 +44,8 @@
#define HCLGE_TM_QCN_MEM_ERR_INT_EN0xFF
#define HCLGE_NCSI_ERR_INT_EN 0x3
#define HCLGE_NCSI_ERR_INT_TYPE0x9
+#define HCLGE_MAC_COMMON_ERR_INT_ENGENMASK(7, 0)
+#define HCLGE_MAC_COMMON_ERR_INT_E
[PATCH net-next 02/14] net: hns3: rename enable error interrupt functions
From: Shiju Jose
This patch
- renames the enable error interrupt functions.
The reason is that these functions
are used for both enable and disable error interrupts.
- removes redundant logs from the enable error interrupt functions.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 83 --
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 4 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 2 +-
3 files changed, 34 insertions(+), 55 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index ac9ab3c..21437fe 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -372,18 +372,18 @@ static int hclge_cmd_query_error(struct hclge_dev *hdev,
return ret;
}
-static int hclge_enable_common_error(struct hclge_dev *hdev, bool en)
+static int hclge_config_common_hw_err_int(struct hclge_dev *hdev, bool en)
{
struct device *dev = >pdev->dev;
struct hclge_desc desc[2];
int ret;
+ /* configure common error interrupts */
hclge_cmd_setup_basic_desc([0], HCLGE_COMMON_ECC_INT_CFG, false);
desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
hclge_cmd_setup_basic_desc([1], HCLGE_COMMON_ECC_INT_CFG, false);
if (en) {
- /* enable COMMON error interrupts */
desc[0].data[0] = cpu_to_le32(HCLGE_IMP_TCM_ECC_ERR_INT_EN);
desc[0].data[2] = cpu_to_le32(HCLGE_CMDQ_NIC_ECC_ERR_INT_EN |
HCLGE_CMDQ_ROCEE_ECC_ERR_INT_EN);
@@ -391,7 +391,6 @@ static int hclge_enable_common_error(struct hclge_dev
*hdev, bool en)
desc[0].data[4] = cpu_to_le32(HCLGE_TQP_ECC_ERR_INT_EN);
desc[0].data[5] = cpu_to_le32(HCLGE_IMP_ITCM4_ECC_ERR_INT_EN);
} else {
- /* disable COMMON error interrupts */
desc[0].data[0] = 0;
desc[0].data[2] = 0;
desc[0].data[3] = 0;
@@ -408,13 +407,12 @@ static int hclge_enable_common_error(struct hclge_dev
*hdev, bool en)
ret = hclge_cmd_send(>hw, [0], 2);
if (ret)
dev_err(dev,
- "failed(%d) to enable/disable COMMON err interrupts\n",
- ret);
+ "fail(%d) to configure common err interrupts\n", ret);
return ret;
}
-static int hclge_enable_ncsi_error(struct hclge_dev *hdev, bool en)
+static int hclge_config_ncsi_hw_err_int(struct hclge_dev *hdev, bool en)
{
struct device *dev = >pdev->dev;
struct hclge_desc desc;
@@ -423,7 +421,7 @@ static int hclge_enable_ncsi_error(struct hclge_dev *hdev,
bool en)
if (hdev->pdev->revision < 0x21)
return 0;
- /* enable/disable NCSI error interrupts */
+ /* configure NCSI error interrupts */
hclge_cmd_setup_basic_desc(, HCLGE_NCSI_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_NCSI_ERR_INT_EN);
@@ -433,19 +431,18 @@ static int hclge_enable_ncsi_error(struct hclge_dev
*hdev, bool en)
ret = hclge_cmd_send(>hw, , 1);
if (ret)
dev_err(dev,
- "failed(%d) to enable/disable NCSI error interrupts\n",
- ret);
+ "fail(%d) to configure NCSI error interrupts\n", ret);
return ret;
}
-static int hclge_enable_igu_egu_error(struct hclge_dev *hdev, bool en)
+static int hclge_config_igu_egu_hw_err_int(struct hclge_dev *hdev, bool en)
{
struct device *dev = >pdev->dev;
struct hclge_desc desc;
int ret;
- /* enable/disable error interrupts */
+ /* configure IGU,EGU error interrupts */
hclge_cmd_setup_basic_desc(, HCLGE_IGU_COMMON_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_IGU_ERR_INT_EN);
@@ -456,8 +453,7 @@ static int hclge_enable_igu_egu_error(struct hclge_dev
*hdev, bool en)
ret = hclge_cmd_send(>hw, , 1);
if (ret) {
dev_err(dev,
- "failed(%d) to enable/disable IGU common interrupts\n",
- ret);
+ "fail(%d) to configure IGU common interrupts\n", ret);
return ret;
}
@@ -471,26 +467,23 @@ static int hclge_enable_igu_egu_error(struct hclge_dev
*hdev, bool en)
ret = hclge_cmd_send(>hw, , 1);
if (ret) {
dev_err(dev,
- "failed(%d) to enable/disable IGU-EGU TNL interrupts\n",
- ret);
+ "fail(%d) to configure IGU-EGU TNL interrupts\n", ret);
return r
[PATCH net-next 12/14] net: hns3: handle hw errors of PPU(RCB)
From: Shiju Jose
This patch enables and handles hw RAS and MSIx errors of PPU(RCB).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 3 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 162 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 15 ++
3 files changed, 180 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 46af567..0223e83 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -217,6 +217,9 @@ enum hclge_opcode_type {
/* Error INT commands */
HCLGE_MAC_COMMON_INT_EN = 0x030E,
HCLGE_TM_SCH_ECC_INT_EN = 0x0829,
+ HCLGE_PPU_MPF_ECC_INT_CMD = 0x0B40,
+ HCLGE_PPU_MPF_OTHER_INT_CMD = 0x0B41,
+ HCLGE_PPU_PF_OTHER_INT_CMD = 0x0B42,
HCLGE_COMMON_ECC_INT_CFG= 0x1505,
HCLGE_QUERY_RAS_INT_STS_BD_NUM = 0x1510,
HCLGE_QUERY_CLEAR_MPF_RAS_INT = 0x1511,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index e82ef4f..00086ce 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -222,6 +222,47 @@ static const struct hclge_hw_error
hclge_mac_afifo_tnl_int[] = {
{ /* sentinel */ }
};
+static const struct hclge_hw_error hclge_ppu_mpf_abnormal_int_st2[] = {
+ { .int_msk = BIT(13), .msg = "rpu_rx_pkt_bit32_ecc_mbit_err" },
+ { .int_msk = BIT(14), .msg = "rpu_rx_pkt_bit33_ecc_mbit_err" },
+ { .int_msk = BIT(15), .msg = "rpu_rx_pkt_bit34_ecc_mbit_err" },
+ { .int_msk = BIT(16), .msg = "rpu_rx_pkt_bit35_ecc_mbit_err" },
+ { .int_msk = BIT(17), .msg = "rcb_tx_ring_ecc_mbit_err" },
+ { .int_msk = BIT(18), .msg = "rcb_rx_ring_ecc_mbit_err" },
+ { .int_msk = BIT(19), .msg = "rcb_tx_fbd_ecc_mbit_err" },
+ { .int_msk = BIT(20), .msg = "rcb_rx_ebd_ecc_mbit_err" },
+ { .int_msk = BIT(21), .msg = "rcb_tso_info_ecc_mbit_err" },
+ { .int_msk = BIT(22), .msg = "rcb_tx_int_info_ecc_mbit_err" },
+ { .int_msk = BIT(23), .msg = "rcb_rx_int_info_ecc_mbit_err" },
+ { .int_msk = BIT(24), .msg = "tpu_tx_pkt_0_ecc_mbit_err" },
+ { .int_msk = BIT(25), .msg = "tpu_tx_pkt_1_ecc_mbit_err" },
+ { .int_msk = BIT(26), .msg = "rd_bus_err" },
+ { .int_msk = BIT(27), .msg = "wr_bus_err" },
+ { .int_msk = BIT(28), .msg = "reg_search_miss" },
+ { .int_msk = BIT(29), .msg = "rx_q_search_miss" },
+ { .int_msk = BIT(30), .msg = "ooo_ecc_err_detect" },
+ { .int_msk = BIT(31), .msg = "ooo_ecc_err_multpl" },
+ { /* sentinel */ }
+};
+
+static const struct hclge_hw_error hclge_ppu_mpf_abnormal_int_st3[] = {
+ { .int_msk = BIT(4), .msg = "gro_bd_ecc_mbit_err" },
+ { .int_msk = BIT(5), .msg = "gro_context_ecc_mbit_err" },
+ { .int_msk = BIT(6), .msg = "rx_stash_cfg_ecc_mbit_err" },
+ { .int_msk = BIT(7), .msg = "axi_rd_fbd_ecc_mbit_err" },
+ { /* sentinel */ }
+};
+
+static const struct hclge_hw_error hclge_ppu_pf_abnormal_int[] = {
+ { .int_msk = BIT(0), .msg = "over_8bd_no_fe" },
+ { .int_msk = BIT(1), .msg = "tso_mss_cmp_min_err" },
+ { .int_msk = BIT(2), .msg = "tso_mss_cmp_max_err" },
+ { .int_msk = BIT(3), .msg = "tx_rd_fbd_poison" },
+ { .int_msk = BIT(4), .msg = "rx_rd_ebd_poison" },
+ { .int_msk = BIT(5), .msg = "buf_wait_timeout" },
+ { /* sentinel */ }
+};
+
static void hclge_log_error(struct device *dev, char *reg,
const struct hclge_hw_error *err,
u32 err_sts)
@@ -489,6 +530,82 @@ static int hclge_config_mac_err_int(struct hclge_dev
*hdev, bool en)
return ret;
}
+static int hclge_config_ppu_error_interrupts(struct hclge_dev *hdev, u32 cmd,
+bool en)
+{
+ struct device *dev = >pdev->dev;
+ struct hclge_desc desc[2];
+ int num = 1;
+ int ret;
+
+ /* configure PPU error interrupts */
+ if (cmd == HCLGE_PPU_MPF_ECC_INT_CMD) {
+ hclge_cmd_setup_basic_desc([0], cmd, false);
+ desc[0].flag |= HCLGE_CMD_FLAG_NEXT;
+ hclge_cmd_setup_basic_desc([1], cmd, false);
+ if (en) {
+ desc[0].data[0] = HCLGE_PPU_MPF_ABNORMAL_INT0_EN;
+ desc[0].data[1] = HCLGE_PPU_MPF_ABNORMAL_INT1_EN;
+
[PATCH net-next 14/14] net: hns3: add handling of RDMA RAS errors
From: Shiju Jose
This patch handles the RDMA RAS errors.
1. Enable RAS interrupt, print error detail info and clear error status.
2. Do CORE reset to recovery when these non-fatal errors happened.
Signed-off-by: Xiaofei Tan
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 3 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 185 -
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 12 ++
3 files changed, 199 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index eb91519..b1ee6fe 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -229,6 +229,9 @@ enum hclge_opcode_type {
HCLGE_QUERY_MSIX_INT_STS_BD_NUM = 0x1513,
HCLGE_QUERY_CLEAR_ALL_MPF_MSIX_INT = 0x1514,
HCLGE_QUERY_CLEAR_ALL_PF_MSIX_INT = 0x1515,
+ HCLGE_CONFIG_ROCEE_RAS_INT_EN = 0x1580,
+ HCLGE_QUERY_CLEAR_ROCEE_RAS_INT = 0x1581,
+ HCLGE_ROCEE_PF_RAS_INT_CMD = 0x1584,
HCLGE_IGU_EGU_TNL_INT_EN= 0x1803,
HCLGE_IGU_COMMON_INT_EN = 0x1806,
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 660320d..2b52a51 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -337,6 +337,30 @@ static const struct hclge_hw_error
hclge_ssu_port_based_pf_int[] = {
{ /* sentinel */ }
};
+static const struct hclge_hw_error hclge_rocee_qmm_ovf_err_int[] = {
+ { .int_msk = 0, .msg = "rocee qmm ovf: sgid invalid err" },
+ { .int_msk = 0x4, .msg = "rocee qmm ovf: sgid ovf err" },
+ { .int_msk = 0x8, .msg = "rocee qmm ovf: smac invalid err" },
+ { .int_msk = 0xC, .msg = "rocee qmm ovf: smac ovf err" },
+ { .int_msk = 0x10, .msg = "rocee qmm ovf: cqc invalid err" },
+ { .int_msk = 0x11, .msg = "rocee qmm ovf: cqc ovf err" },
+ { .int_msk = 0x12, .msg = "rocee qmm ovf: cqc hopnum err" },
+ { .int_msk = 0x13, .msg = "rocee qmm ovf: cqc ba0 err" },
+ { .int_msk = 0x14, .msg = "rocee qmm ovf: srqc invalid err" },
+ { .int_msk = 0x15, .msg = "rocee qmm ovf: srqc ovf err" },
+ { .int_msk = 0x16, .msg = "rocee qmm ovf: srqc hopnum err" },
+ { .int_msk = 0x17, .msg = "rocee qmm ovf: srqc ba0 err" },
+ { .int_msk = 0x18, .msg = "rocee qmm ovf: mpt invalid err" },
+ { .int_msk = 0x19, .msg = "rocee qmm ovf: mpt ovf err" },
+ { .int_msk = 0x1A, .msg = "rocee qmm ovf: mpt hopnum err" },
+ { .int_msk = 0x1B, .msg = "rocee qmm ovf: mpt ba0 err" },
+ { .int_msk = 0x1C, .msg = "rocee qmm ovf: qpc invalid err" },
+ { .int_msk = 0x1D, .msg = "rocee qmm ovf: qpc ovf err" },
+ { .int_msk = 0x1E, .msg = "rocee qmm ovf: qpc hopnum err" },
+ { .int_msk = 0x1F, .msg = "rocee qmm ovf: qpc ba0 err" },
+ { /* sentinel */ }
+};
+
static void hclge_log_error(struct device *dev, char *reg,
const struct hclge_hw_error *err,
u32 err_sts)
@@ -1023,6 +1047,148 @@ static int hclge_handle_all_ras_errors(struct hclge_dev
*hdev)
return ret;
}
+static int hclge_log_rocee_ovf_error(struct hclge_dev *hdev)
+{
+ struct device *dev = >pdev->dev;
+ struct hclge_desc desc[2];
+ int ret;
+
+ /* read overflow error status */
+ ret = hclge_cmd_query_error(hdev, [0],
+ HCLGE_ROCEE_PF_RAS_INT_CMD,
+ 0, 0, 0);
+ if (ret) {
+ dev_err(dev, "failed(%d) to query ROCEE OVF error sts\n", ret);
+ return ret;
+ }
+
+ /* log overflow error */
+ if (le32_to_cpu(desc[0].data[0]) & HCLGE_ROCEE_OVF_ERR_INT_MASK) {
+ const struct hclge_hw_error *err;
+ u32 err_sts;
+
+ err = _rocee_qmm_ovf_err_int[0];
+ err_sts = HCLGE_ROCEE_OVF_ERR_TYPE_MASK &
+ le32_to_cpu(desc[0].data[0]);
+ while (err->msg) {
+ if (err->int_msk == err_sts) {
+ dev_warn(dev, "%s [error status=0x%x] found\n",
+err->msg,
+le32_to_cpu(desc[0].data[0]));
+ break;
+ }
+ err++;
+ }
+ }
+
+ if (l
[PATCH net-next 03/14] net: hns3: re-enable error interrupts on hw reset
From: Shiju Jose
This patch adds calling hclge_hw_error_set_state function
to re-enable the error interrupts those will be disabled on
the hw reset.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 2 +-
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 1 -
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 14 +-
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 21437fe..7e23d36 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -540,7 +540,7 @@ static int hclge_config_ppp_hw_err_int(struct hclge_dev
*hdev, bool en)
return ret;
}
-int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en)
+static int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en)
{
struct device *dev = >pdev->dev;
struct hclge_desc desc;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index 856374c..405739b 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -59,6 +59,5 @@ struct hclge_hw_error {
};
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
-int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en);
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 5cea95c..431d92a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -7269,7 +7269,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
ret = hclge_hw_error_set_state(hdev, true);
if (ret) {
dev_err(>dev,
- "hw error interrupts enable failed, ret =%d\n", ret);
+ "fail(%d) to enable hw error interrupts\n", ret);
goto err_mdiobus_unreg;
}
@@ -7405,11 +7405,15 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev
*ae_dev)
return ret;
}
- /* Re-enable the TM hw error interrupts because
-* they get disabled on core/global reset.
+ /* Re-enable the hw error interrupts because
+* the interrupts get disabled on core/global reset.
*/
- if (hclge_config_tm_hw_err_int(hdev, true))
- dev_err(>dev, "failed to enable TM hw error
interrupts\n");
+ ret = hclge_hw_error_set_state(hdev, true);
+ if (ret) {
+ dev_err(>dev,
+ "fail(%d) to re-enable HNS hw error interrupts\n", ret);
+ return ret;
+ }
hclge_reset_vport_state(hdev);
--
2.7.4
[PATCH net-next 13/14] net: hns3: handle hw errors of SSU
From: Shiju Jose
This patch enables and handles hw errors of the Storage Switch Unit(SSU).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 2 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 187 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 14 ++
3 files changed, 203 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 0223e83..eb91519 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -217,6 +217,8 @@ enum hclge_opcode_type {
/* Error INT commands */
HCLGE_MAC_COMMON_INT_EN = 0x030E,
HCLGE_TM_SCH_ECC_INT_EN = 0x0829,
+ HCLGE_SSU_ECC_INT_CMD = 0x0989,
+ HCLGE_SSU_COMMON_INT_CMD= 0x098C,
HCLGE_PPU_MPF_ECC_INT_CMD = 0x0B40,
HCLGE_PPU_MPF_OTHER_INT_CMD = 0x0B41,
HCLGE_PPU_PF_OTHER_INT_CMD = 0x0B42,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 00086ce..660320d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -263,6 +263,80 @@ static const struct hclge_hw_error
hclge_ppu_pf_abnormal_int[] = {
{ /* sentinel */ }
};
+static const struct hclge_hw_error hclge_ssu_com_err_int[] = {
+ { .int_msk = BIT(0), .msg = "buf_sum_err" },
+ { .int_msk = BIT(1), .msg = "ppp_mb_num_err" },
+ { .int_msk = BIT(2), .msg = "ppp_mbid_err" },
+ { .int_msk = BIT(3), .msg = "ppp_rlt_mac_err" },
+ { .int_msk = BIT(4), .msg = "ppp_rlt_host_err" },
+ { .int_msk = BIT(5), .msg = "cks_edit_position_err" },
+ { .int_msk = BIT(6), .msg = "cks_edit_condition_err" },
+ { .int_msk = BIT(7), .msg = "vlan_edit_condition_err" },
+ { .int_msk = BIT(8), .msg = "vlan_num_ot_err" },
+ { .int_msk = BIT(9), .msg = "vlan_num_in_err" },
+ { /* sentinel */ }
+};
+
+static const struct hclge_hw_error hclge_ssu_port_based_err_int[] = {
+ { .int_msk = BIT(0), .msg = "roc_pkt_without_key_port" },
+ { .int_msk = BIT(1), .msg = "tpu_pkt_without_key_port" },
+ { .int_msk = BIT(2), .msg = "igu_pkt_without_key_port" },
+ { .int_msk = BIT(3), .msg = "roc_eof_mis_match_port" },
+ { .int_msk = BIT(4), .msg = "tpu_eof_mis_match_port" },
+ { .int_msk = BIT(5), .msg = "igu_eof_mis_match_port" },
+ { .int_msk = BIT(6), .msg = "roc_sof_mis_match_port" },
+ { .int_msk = BIT(7), .msg = "tpu_sof_mis_match_port" },
+ { .int_msk = BIT(8), .msg = "igu_sof_mis_match_port" },
+ { .int_msk = BIT(11), .msg = "ets_rd_int_rx_port" },
+ { .int_msk = BIT(12), .msg = "ets_wr_int_rx_port" },
+ { .int_msk = BIT(13), .msg = "ets_rd_int_tx_port" },
+ { .int_msk = BIT(14), .msg = "ets_wr_int_tx_port" },
+ { /* sentinel */ }
+};
+
+static const struct hclge_hw_error hclge_ssu_fifo_overflow_int[] = {
+ { .int_msk = BIT(0), .msg = "ig_mac_inf_int" },
+ { .int_msk = BIT(1), .msg = "ig_host_inf_int" },
+ { .int_msk = BIT(2), .msg = "ig_roc_buf_int" },
+ { .int_msk = BIT(3), .msg = "ig_host_data_fifo_int" },
+ { .int_msk = BIT(4), .msg = "ig_host_key_fifo_int" },
+ { .int_msk = BIT(5), .msg = "tx_qcn_fifo_int" },
+ { .int_msk = BIT(6), .msg = "rx_qcn_fifo_int" },
+ { .int_msk = BIT(7), .msg = "tx_pf_rd_fifo_int" },
+ { .int_msk = BIT(8), .msg = "rx_pf_rd_fifo_int" },
+ { .int_msk = BIT(9), .msg = "qm_eof_fifo_int" },
+ { .int_msk = BIT(10), .msg = "mb_rlt_fifo_int" },
+ { .int_msk = BIT(11), .msg = "dup_uncopy_fifo_int" },
+ { .int_msk = BIT(12), .msg = "dup_cnt_rd_fifo_int" },
+ { .int_msk = BIT(13), .msg = "dup_cnt_drop_fifo_int" },
+ { .int_msk = BIT(14), .msg = "dup_cnt_wrb_fifo_int" },
+ { .int_msk = BIT(15), .msg = "host_cmd_fifo_int" },
+ { .int_msk = BIT(16), .msg = "mac_cmd_fifo_int" },
+ { .int_msk = BIT(17), .msg = "host_cmd_bitmap_empty_int" },
+ { .int_msk = BIT(18), .msg = "mac_cmd_bitmap_empty_int" },
+ { .int_msk = BIT(19), .msg = "dup_bitmap_empty_int" },
+ { .int_msk = BIT(20), .msg = "out_queue_bitmap_empty_int" },
+ { .int_msk = BIT(21), .msg = "bank2_bitmap_empty_int" },
+
[PATCH net-next 05/14] net: hns3: rename process_hw_error function
From: Shiju Jose
This patch renames process_hw_error function to
handle_hw_ras_error function to match the purpose
of the function. This is because hw errors reported through
ras and msix interrupts will be handled separately.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 +-
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 4 ++--
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 2 +-
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 2 +-
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index a1707b7..9d9f4f9 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -454,7 +454,7 @@ struct hnae3_ae_ops {
int (*restore_fd_rules)(struct hnae3_handle *handle);
void (*enable_fd)(struct hnae3_handle *handle, bool enable);
int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf);
- pci_ers_result_t (*process_hw_error)(struct hnae3_ae_dev *ae_dev);
+ pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
bool (*ae_dev_resetting)(struct hnae3_handle *handle);
unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index d1b2de2..69142a3 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -1828,8 +1828,8 @@ static pci_ers_result_t hns3_error_detected(struct
pci_dev *pdev,
return PCI_ERS_RESULT_NONE;
}
- if (ae_dev->ops->process_hw_error)
- ret = ae_dev->ops->process_hw_error(ae_dev);
+ if (ae_dev->ops->handle_hw_ras_error)
+ ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
else
return PCI_ERS_RESULT_NONE;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 62fab23..2d07be8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -603,7 +603,7 @@ int hclge_hw_error_set_state(struct hclge_dev *hdev, bool
state)
return ret;
}
-pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev)
+pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev)
{
struct hclge_dev *hdev = ae_dev->priv;
struct device *dev = >pdev->dev;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index 405739b..9fe1c96 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -59,5 +59,5 @@ struct hclge_hw_error {
};
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
-pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev);
+pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 431d92a..354ac5f 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -7935,7 +7935,7 @@ static const struct hnae3_ae_ops hclge_ops = {
.restore_fd_rules = hclge_restore_fd_entries,
.enable_fd = hclge_enable_fd,
.dbg_run_cmd = hclge_dbg_run_cmd,
- .process_hw_error = hclge_process_ras_hw_error,
+ .handle_hw_ras_error = hclge_handle_hw_ras_error,
.get_hw_reset_stat = hclge_get_hw_reset_stat,
.ae_dev_resetting = hclge_ae_dev_resetting,
.ae_dev_reset_cnt = hclge_ae_dev_reset_cnt,
--
2.7.4
[PATCH net-next 11/14] net: hns3: handle hw errors of PPP PF
From: Shiju Jose
This patch handles PF hw errors of PPP(Programmable Packet Processor).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 20f8bb5..e82ef4f 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -112,8 +112,8 @@ static const struct hclge_hw_error
hclge_ppp_mpf_abnormal_int_st1[] = {
{ /* sentinel */ }
};
-static const struct hclge_hw_error hclge_ppp_pf_int[] = {
- { .int_msk = BIT(0), .msg = "Tx_vlan_tag_err" },
+static const struct hclge_hw_error hclge_ppp_pf_abnormal_int[] = {
+ { .int_msk = BIT(0), .msg = "tx_vlan_tag_err" },
{ .int_msk = BIT(1), .msg = "rss_list_tc_unassigned_queue_err" },
{ /* sentinel */ }
};
@@ -385,12 +385,16 @@ static int hclge_config_ppp_error_interrupt(struct
hclge_dev *hdev, u32 cmd,
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN);
desc[0].data[1] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN);
+ desc[0].data[4] = cpu_to_le32(HCLGE_PPP_PF_ERR_INT_EN);
}
desc[1].data[0] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN_MASK);
desc[1].data[1] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN_MASK);
+ if (hdev->pdev->revision >= 0x21)
+ desc[1].data[2] =
+ cpu_to_le32(HCLGE_PPP_PF_ERR_INT_EN_MASK);
} else if (cmd == HCLGE_PPP_CMD1_INT_CMD) {
if (en) {
desc[0].data[0] =
@@ -850,6 +854,13 @@ int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
goto msi_error;
}
+ /* read and log PPP PF errors */
+ desc_data = (__le32 *)[2];
+ status = le32_to_cpu(*desc_data);
+ if (status)
+ hclge_log_error(dev, "PPP_PF_ABNORMAL_INT_ST0",
+ _ppp_pf_abnormal_int[0], status);
+
/* clear all PF MSIx errors */
hclge_cmd_reuse_desc([0], false);
desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
--
2.7.4
[PATCH net-next 07/14] net: hns3: add handling of hw ras errors using new set of commands
From: Shiju Jose
1. This patch adds handling of hw ras errors using new set of
common commands.
2. Updated the error message tables to match the register's name and
error status returned by the commands.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 3 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 489 ++---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 9 +
3 files changed, 331 insertions(+), 170 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index d2fb210..0a0eb6c 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -217,6 +217,9 @@ enum hclge_opcode_type {
/* Error INT commands */
HCLGE_TM_SCH_ECC_INT_EN = 0x0829,
HCLGE_COMMON_ECC_INT_CFG= 0x1505,
+ HCLGE_QUERY_RAS_INT_STS_BD_NUM = 0x1510,
+ HCLGE_QUERY_CLEAR_MPF_RAS_INT = 0x1511,
+ HCLGE_QUERY_CLEAR_PF_RAS_INT= 0x1512,
HCLGE_IGU_EGU_TNL_INT_EN= 0x1803,
HCLGE_IGU_COMMON_INT_EN = 0x1806,
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index d1c9f7a..22e7c5b 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -20,12 +20,7 @@ static const struct hclge_hw_error hclge_imp_tcm_ecc_int[] =
{
{ .int_msk = BIT(13), .msg = "imp_dtcm1_mem0_ecc_mbit_err" },
{ .int_msk = BIT(14), .msg = "imp_dtcm1_mem1_ecc_1bit_err" },
{ .int_msk = BIT(15), .msg = "imp_dtcm1_mem1_ecc_mbit_err" },
- { /* sentinel */ }
-};
-
-static const struct hclge_hw_error hclge_imp_itcm4_ecc_int[] = {
- { .int_msk = BIT(0), .msg = "imp_itcm4_ecc_1bit_err" },
- { .int_msk = BIT(1), .msg = "imp_itcm4_ecc_mbit_err" },
+ { .int_msk = BIT(17), .msg = "imp_itcm4_ecc_mbit_err" },
{ /* sentinel */ }
};
@@ -46,26 +41,14 @@ static const struct hclge_hw_error
hclge_cmdq_nic_mem_ecc_int[] = {
{ .int_msk = BIT(13), .msg = "cmdq_nic_rx_addr_ecc_mbit_err" },
{ .int_msk = BIT(14), .msg = "cmdq_nic_tx_addr_ecc_1bit_err" },
{ .int_msk = BIT(15), .msg = "cmdq_nic_tx_addr_ecc_mbit_err" },
- { /* sentinel */ }
-};
-
-static const struct hclge_hw_error hclge_cmdq_rocee_mem_ecc_int[] = {
- { .int_msk = BIT(0), .msg = "cmdq_rocee_rx_depth_ecc_1bit_err" },
- { .int_msk = BIT(1), .msg = "cmdq_rocee_rx_depth_ecc_mbit_err" },
- { .int_msk = BIT(2), .msg = "cmdq_rocee_tx_depth_ecc_1bit_err" },
- { .int_msk = BIT(3), .msg = "cmdq_rocee_tx_depth_ecc_mbit_err" },
- { .int_msk = BIT(4), .msg = "cmdq_rocee_rx_tail_ecc_1bit_err" },
- { .int_msk = BIT(5), .msg = "cmdq_rocee_rx_tail_ecc_mbit_err" },
- { .int_msk = BIT(6), .msg = "cmdq_rocee_tx_tail_ecc_1bit_err" },
- { .int_msk = BIT(7), .msg = "cmdq_rocee_tx_tail_ecc_mbit_err" },
- { .int_msk = BIT(8), .msg = "cmdq_rocee_rx_head_ecc_1bit_err" },
- { .int_msk = BIT(9), .msg = "cmdq_rocee_rx_head_ecc_mbit_err" },
- { .int_msk = BIT(10), .msg = "cmdq_rocee_tx_head_ecc_1bit_err" },
- { .int_msk = BIT(11), .msg = "cmdq_rocee_tx_head_ecc_mbit_err" },
- { .int_msk = BIT(12), .msg = "cmdq_rocee_rx_addr_ecc_1bit_err" },
- { .int_msk = BIT(13), .msg = "cmdq_rocee_rx_addr_ecc_mbit_err" },
- { .int_msk = BIT(14), .msg = "cmdq_rocee_tx_addr_ecc_1bit_err" },
- { .int_msk = BIT(15), .msg = "cmdq_rocee_tx_addr_ecc_mbit_err" },
+ { .int_msk = BIT(17), .msg = "cmdq_rocee_rx_depth_ecc_mbit_err" },
+ { .int_msk = BIT(19), .msg = "cmdq_rocee_tx_depth_ecc_mbit_err" },
+ { .int_msk = BIT(21), .msg = "cmdq_rocee_rx_tail_ecc_mbit_err" },
+ { .int_msk = BIT(23), .msg = "cmdq_rocee_tx_tail_ecc_mbit_err" },
+ { .int_msk = BIT(25), .msg = "cmdq_rocee_rx_head_ecc_mbit_err" },
+ { .int_msk = BIT(27), .msg = "cmdq_rocee_tx_head_ecc_mbit_err" },
+ { .int_msk = BIT(29), .msg = "cmdq_rocee_rx_addr_ecc_mbit_err" },
+ { .int_msk = BIT(31), .msg = "cmdq_rocee_tx_addr_ecc_mbit_err" },
{ /* sentinel */ }
};
@@ -85,7 +68,13 @@ static const struct hclge_hw_error hclge_tqp_int_ecc_int[] =
{
{ /* sentinel */ }
};
-static const struct hclge_hw_error hclge_igu_com_err_int[] = {
+static const struct hclge_hw_error hclge_msix_sram_ecc_int[] = {
+ { .int
[PATCH net-next 04/14] net: hns3: deletes unnecessary settings of the descriptor data
From: Shiju Jose
This patch deletes unnecessary setting of the descriptor data
to 0 for disabling error interrupts because
it is already done by the hclge_cmd_setup_basic_desc function.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 27 --
1 file changed, 5 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 7e23d36..62fab23 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -390,13 +390,8 @@ static int hclge_config_common_hw_err_int(struct hclge_dev
*hdev, bool en)
desc[0].data[3] = cpu_to_le32(HCLGE_IMP_RD_POISON_ERR_INT_EN);
desc[0].data[4] = cpu_to_le32(HCLGE_TQP_ECC_ERR_INT_EN);
desc[0].data[5] = cpu_to_le32(HCLGE_IMP_ITCM4_ECC_ERR_INT_EN);
- } else {
- desc[0].data[0] = 0;
- desc[0].data[2] = 0;
- desc[0].data[3] = 0;
- desc[0].data[4] = 0;
- desc[0].data[5] = 0;
}
+
desc[1].data[0] = cpu_to_le32(HCLGE_IMP_TCM_ECC_ERR_INT_EN_MASK);
desc[1].data[2] = cpu_to_le32(HCLGE_CMDQ_NIC_ECC_ERR_INT_EN_MASK |
HCLGE_CMDQ_ROCEE_ECC_ERR_INT_EN_MASK);
@@ -425,8 +420,6 @@ static int hclge_config_ncsi_hw_err_int(struct hclge_dev
*hdev, bool en)
hclge_cmd_setup_basic_desc(, HCLGE_NCSI_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_NCSI_ERR_INT_EN);
- else
- desc.data[0] = 0;
ret = hclge_cmd_send(>hw, , 1);
if (ret)
@@ -446,8 +439,7 @@ static int hclge_config_igu_egu_hw_err_int(struct hclge_dev
*hdev, bool en)
hclge_cmd_setup_basic_desc(, HCLGE_IGU_COMMON_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_IGU_ERR_INT_EN);
- else
- desc.data[0] = 0;
+
desc.data[1] = cpu_to_le32(HCLGE_IGU_ERR_INT_EN_MASK);
ret = hclge_cmd_send(>hw, , 1);
@@ -460,8 +452,7 @@ static int hclge_config_igu_egu_hw_err_int(struct hclge_dev
*hdev, bool en)
hclge_cmd_setup_basic_desc(, HCLGE_IGU_EGU_TNL_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_IGU_TNL_ERR_INT_EN);
- else
- desc.data[0] = 0;
+
desc.data[1] = cpu_to_le32(HCLGE_IGU_TNL_ERR_INT_EN_MASK);
ret = hclge_cmd_send(>hw, , 1);
@@ -494,10 +485,8 @@ static int hclge_config_ppp_error_interrupt(struct
hclge_dev *hdev, u32 cmd,
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN);
desc[0].data[1] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN);
- } else {
- desc[0].data[0] = 0;
- desc[0].data[1] = 0;
}
+
desc[1].data[0] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN_MASK);
desc[1].data[1] =
@@ -508,10 +497,8 @@ static int hclge_config_ppp_error_interrupt(struct
hclge_dev *hdev, u32 cmd,
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT2_EN);
desc[0].data[1] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT3_EN);
- } else {
- desc[0].data[0] = 0;
- desc[0].data[1] = 0;
}
+
desc[1].data[0] =
cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT2_EN_MASK);
desc[1].data[1] =
@@ -550,8 +537,6 @@ static int hclge_config_tm_hw_err_int(struct hclge_dev
*hdev, bool en)
hclge_cmd_setup_basic_desc(, HCLGE_TM_SCH_ECC_INT_EN, false);
if (en)
desc.data[0] = cpu_to_le32(HCLGE_TM_SCH_ECC_ERR_INT_EN);
- else
- desc.data[0] = 0;
ret = hclge_cmd_send(>hw, , 1);
if (ret) {
@@ -570,8 +555,6 @@ static int hclge_config_tm_hw_err_int(struct hclge_dev
*hdev, bool en)
hclge_cmd_reuse_desc(, false);
if (en)
desc.data[1] = cpu_to_le32(HCLGE_TM_QCN_MEM_ERR_INT_EN);
- else
- desc.data[1] = 0;
ret = hclge_cmd_send(>hw, , 1);
if (ret)
--
2.7.4
[PATCH net-next 06/14] net: hns3: add optimization in the hclge_hw_error_set_state
From: Shiju Jose
1. This patch adds minor loop optimization in the
hclge_hw_error_set_state function.
2. Adds logging module's name if it fails to configure the
error interrupts.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 2d07be8..d1c9f7a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -586,18 +586,16 @@ static const struct hclge_hw_blk hw_blk[] = {
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state)
{
+ const struct hclge_hw_blk *module = hw_blk;
int ret = 0;
- int i = 0;
- while (hw_blk[i].name) {
- if (!hw_blk[i].config_err_int) {
- i++;
- continue;
+ while (module->name) {
+ if (module->config_err_int) {
+ ret = module->config_err_int(hdev, state);
+ if (ret)
+ return ret;
}
- ret = hw_blk[i].config_err_int(hdev, state);
- if (ret)
- return ret;
- i++;
+ module++;
}
return ret;
--
2.7.4
[PATCH net-next 00/14] net: hns3: Additions/optimizations related to HNS3 H/W err handling
This patch set primarily does following addtions and optimizations related to error handling in HNS3 Ethernet driver: 1. Name changes for enable and process functions and minor loop optimizations. [PATCH 1-6] 2. Modify query and clearing of RAS errors using new set of commands because modules specific commands for clearing RCB PPP PF, SSU are obselete. [PATCH 7] 3. Deletes logging 1-bit errors for RAS in HNS3 driver as these never get reported to the driver. [PATCH 8] 4. Add handling of NIC hw errors reported through MSIx rather than PCIe AER channel. [PATCH 9] 5. Add handling for the HW RAS and MSIx errors in the modules MAC, PPP PF, MSIx SRAM, RCB and SSU. [PATCH 10-13] 6. Add handling of RoCEE RAS errors. [PATCH 14] Salil Mehta (1): net: hns3: add handling of hw errors reported through MSIX Shiju Jose (13): net: hns3: remove existing process error functions and reorder hw_blk table net: hns3: rename enable error interrupt functions net: hns3: re-enable error interrupts on hw reset net: hns3: deletes unnecessary settings of the descriptor data net: hns3: rename process_hw_error function net: hns3: add optimization in the hclge_hw_error_set_state net: hns3: add handling of hw ras errors using new set of commands net: hns3: deleted logging 1 bit errors net: hns3: add handling of hw errors of MAC net: hns3: handle hw errors of PPP PF net: hns3: handle hw errors of PPU(RCB) net: hns3: handle hw errors of SSU net: hns3: add handling of RDMA RAS errors drivers/net/ethernet/hisilicon/hns3/hnae3.h|3 +- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c|4 +- .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 27 +- .../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 1554 .../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 79 +- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 55 +- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h|1 + 7 files changed, 1067 insertions(+), 656 deletions(-) -- 2.7.4
[PATCH net-next 01/14] net: hns3: remove existing process error functions and reorder hw_blk table
From: Shiju Jose
1.The command interface for queryng and clearing hw errors is
changed, which requires the new process error functions to be added.
This patch removes all the current process error functions and
associated definitions. The new functions to handle ras errors
would be added in this patch set.
2. Fixed order issue of the hw_blk table.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 12 -
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 462 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 19 -
3 files changed, 18 insertions(+), 475 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index e1805b9..d2fb210 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -216,25 +216,13 @@ enum hclge_opcode_type {
/* Error INT commands */
HCLGE_TM_SCH_ECC_INT_EN = 0x0829,
- HCLGE_TM_SCH_ECC_ERR_RINT_CMD = 0x082d,
- HCLGE_TM_SCH_ECC_ERR_RINT_CE= 0x082f,
- HCLGE_TM_SCH_ECC_ERR_RINT_NFE = 0x0830,
- HCLGE_TM_SCH_ECC_ERR_RINT_FE= 0x0831,
- HCLGE_TM_SCH_MBIT_ECC_INFO_CMD = 0x0833,
HCLGE_COMMON_ECC_INT_CFG= 0x1505,
- HCLGE_IGU_EGU_TNL_INT_QUERY = 0x1802,
HCLGE_IGU_EGU_TNL_INT_EN= 0x1803,
- HCLGE_IGU_EGU_TNL_INT_CLR = 0x1804,
- HCLGE_IGU_COMMON_INT_QUERY = 0x1805,
HCLGE_IGU_COMMON_INT_EN = 0x1806,
- HCLGE_IGU_COMMON_INT_CLR= 0x1807,
HCLGE_TM_QCN_MEM_INT_CFG= 0x1A14,
- HCLGE_TM_QCN_MEM_INT_INFO_CMD = 0x1A17,
HCLGE_PPP_CMD0_INT_CMD = 0x2100,
HCLGE_PPP_CMD1_INT_CMD = 0x2101,
- HCLGE_NCSI_INT_QUERY= 0x2400,
HCLGE_NCSI_INT_EN = 0x2401,
- HCLGE_NCSI_INT_CLR = 0x2402,
};
#define HCLGE_TQP_REG_OFFSET 0x8
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 6da9e22..ac9ab3c 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -336,25 +336,6 @@ static const struct hclge_hw_error hclge_qcn_ecc_err_int[]
= {
{ /* sentinel */ }
};
-static void hclge_log_error(struct device *dev,
- const struct hclge_hw_error *err_list,
- u32 err_sts)
-{
- const struct hclge_hw_error *err;
- int i = 0;
-
- while (err_list[i].msg) {
- err = _list[i];
- if (!(err->int_msk & err_sts)) {
- i++;
- continue;
- }
- dev_warn(dev, "%s [error status=0x%x] found\n",
-err->msg, err_sts);
- i++;
- }
-}
-
/* hclge_cmd_query_error: read the error information
* @hdev: pointer to struct hclge_dev
* @desc: descriptor for describing the command
@@ -391,53 +372,6 @@ static int hclge_cmd_query_error(struct hclge_dev *hdev,
return ret;
}
-/* hclge_cmd_clear_error: clear the error status
- * @hdev: pointer to struct hclge_dev
- * @desc: descriptor for describing the command
- * @desc_src: prefilled descriptor from the previous command for reusing
- * @cmd: command opcode
- * @flag: flag for extended command structure
- *
- * This function clear the error status in the hw register/s using command
- */
-static int hclge_cmd_clear_error(struct hclge_dev *hdev,
-struct hclge_desc *desc,
-struct hclge_desc *desc_src,
-u32 cmd, u16 flag)
-{
- struct device *dev = >pdev->dev;
- int num = 1;
- int ret, i;
-
- if (cmd) {
- hclge_cmd_setup_basic_desc([0], cmd, false);
- if (flag) {
- desc[0].flag |= cpu_to_le16(flag);
- hclge_cmd_setup_basic_desc([1], cmd, false);
- num = 2;
- }
- if (desc_src) {
- for (i = 0; i < 6; i++) {
- desc[0].data[i] = desc_src[0].data[i];
- if (flag)
- desc[1].data[i] = desc_src[1].data[i];
- }
- }
- } else {
- hclge_cmd_reuse_desc([0], false);
- if (flag) {
- desc[0].flag |= cpu_to_le16(flag);
- hclge_cmd_reuse_desc([1], false);
- num = 2;
- }
- }
- ret = hclge_cmd_send(>hw, [0], num);
- if (ret)
- dev_err(dev, &quo
[PATCH net-next 2/8] net: hns3: Add "queue info" query function
From: liuzhongzhu
Query the queue information of the current NIC
such as BD size, queue header and tail pointer.
This patch adds support for debugfs command:
echo queue info 1 > cmd
it can print queue config information...
root@(none)# echo queue info 1 > cmd
hns3 :7d:00.0: queue info
hns3 :7d:00.0: RX(1) BASE ADD: 0xffb58000
hns3 :7d:00.0: RX(1) RING BD NUM: 127
hns3 :7d:00.0: RX(1) RING BD LEN: 2
hns3 :7d:00.0: RX(1) RING TAIL: 120
hns3 :7d:00.0: RX(1) RING HEAD: 0
hns3 :7d:00.0: RX(1) RING FBDNUM: 0
hns3 :7d:00.0: RX(1) RING PKTNUM: 0
hns3 :7d:00.0: TX(1) BASE ADD: 0xfffd8000
hns3 :7d:00.0: TX(1) RING BD NUM: 127
hns3 :7d:00.0: TX(1) RING TC: 0
hns3 :7d:00.0: TX(1) RING TAIL: 2
hns3 :7d:00.0: TX(1) RING HEAD: 2
hns3 :7d:00.0: TX(1) RING FBDNUM: 0
hns3 :7d:00.0: TX(1) RING OFFSET: 0
hns3 :7d:00.0: TX(1) RING PKTNUM: 0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
.../ethernet/hisilicon/hns3/hns3_debugfs.c| 122 ++
1 file changed, 122 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 9bc6ceb6fbc1..04b0789d439d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -11,6 +11,120 @@
static struct dentry *hns3_dbgfs_root;
+static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_enet_ring *ring;
+ u32 base_add_l, base_add_h;
+ u32 queue_num, queue_max;
+ u32 value, i = 0;
+ int cnt;
+
+ if (!priv->ring_data) {
+ dev_err(>pdev->dev, "ring_data is NULL\n");
+ return -EFAULT;
+ }
+
+ queue_max = h->kinfo.num_tqps;
+ cnt = kstrtouint(_buf[11], 0, _num);
+ if (cnt)
+ queue_num = 0;
+ else
+ queue_max = queue_num + 1;
+
+ dev_info(>pdev->dev, "queue info\n");
+
+ if (queue_num >= h->kinfo.num_tqps) {
+ dev_err(>pdev->dev,
+ "Queue number(%u) is out of range(%u)\n", queue_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ for (i = queue_num; i < queue_max; i++) {
+ /* Each cycle needs to determine whether the instance is reset,
+* to prevent reference to invalid memory. And need to ensure
+* that the following code is executed within 100ms.
+*/
+ if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ test_bit(HNS3_NIC_STATE_RESETTING, >state))
+ return -EPERM;
+
+ ring = ring_data[i + h->kinfo.num_tqps].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_H_REG);
+ base_add_l = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_L_REG);
+ dev_info(>pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
+base_add_h, base_add_l);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_NUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_LEN_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_TAIL_REG);
+ dev_info(>pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_HEAD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_FBDNUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
+
+ ring = ring_data[i].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+
[PATCH net-next 2/8] net: hns3: Add "queue info" query function
From: liuzhongzhu
Query the queue information of the current NIC
such as BD size, queue header and tail pointer.
This patch adds support for debugfs command:
echo queue info 1 > cmd
it can print queue config information...
root@(none)# echo queue info 1 > cmd
hns3 :7d:00.0: queue info
hns3 :7d:00.0: RX(1) BASE ADD: 0xffb58000
hns3 :7d:00.0: RX(1) RING BD NUM: 127
hns3 :7d:00.0: RX(1) RING BD LEN: 2
hns3 :7d:00.0: RX(1) RING TAIL: 120
hns3 :7d:00.0: RX(1) RING HEAD: 0
hns3 :7d:00.0: RX(1) RING FBDNUM: 0
hns3 :7d:00.0: RX(1) RING PKTNUM: 0
hns3 :7d:00.0: TX(1) BASE ADD: 0xfffd8000
hns3 :7d:00.0: TX(1) RING BD NUM: 127
hns3 :7d:00.0: TX(1) RING TC: 0
hns3 :7d:00.0: TX(1) RING TAIL: 2
hns3 :7d:00.0: TX(1) RING HEAD: 2
hns3 :7d:00.0: TX(1) RING FBDNUM: 0
hns3 :7d:00.0: TX(1) RING OFFSET: 0
hns3 :7d:00.0: TX(1) RING PKTNUM: 0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
.../ethernet/hisilicon/hns3/hns3_debugfs.c| 122 ++
1 file changed, 122 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 9bc6ceb6fbc1..04b0789d439d 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -11,6 +11,120 @@
static struct dentry *hns3_dbgfs_root;
+static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_enet_ring *ring;
+ u32 base_add_l, base_add_h;
+ u32 queue_num, queue_max;
+ u32 value, i = 0;
+ int cnt;
+
+ if (!priv->ring_data) {
+ dev_err(>pdev->dev, "ring_data is NULL\n");
+ return -EFAULT;
+ }
+
+ queue_max = h->kinfo.num_tqps;
+ cnt = kstrtouint(_buf[11], 0, _num);
+ if (cnt)
+ queue_num = 0;
+ else
+ queue_max = queue_num + 1;
+
+ dev_info(>pdev->dev, "queue info\n");
+
+ if (queue_num >= h->kinfo.num_tqps) {
+ dev_err(>pdev->dev,
+ "Queue number(%u) is out of range(%u)\n", queue_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ for (i = queue_num; i < queue_max; i++) {
+ /* Each cycle needs to determine whether the instance is reset,
+* to prevent reference to invalid memory. And need to ensure
+* that the following code is executed within 100ms.
+*/
+ if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ test_bit(HNS3_NIC_STATE_RESETTING, >state))
+ return -EPERM;
+
+ ring = ring_data[i + h->kinfo.num_tqps].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_H_REG);
+ base_add_l = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_L_REG);
+ dev_info(>pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
+base_add_h, base_add_l);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_NUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_LEN_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_TAIL_REG);
+ dev_info(>pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_HEAD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_FBDNUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
+
+ ring = ring_data[i].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+
[RFC PATCH 10/10] net: hns3: Add "qos buffer" config info query function
From: liuzhongzhu
This patch prints qos buffer config information.
debugfs command:
echo dump qos buf cfg > cmd
Sample Command:
root@(none)# echo dump qos buf cfg > cmd
hns3 :7d:00.0: dump qos buf cfg
hns3 :7d:00.0: tx_packet_buf_tc_0: 0x1aa
hns3 :7d:00.0: tx_packet_buf_tc_1: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_2: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_3: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_4: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_5: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_6: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_7: 0x0
hns3 :7d:00.0:
hns3 :7d:00.0: rx_packet_buf_tc_0: 0x130
hns3 :7d:00.0: rx_packet_buf_tc_1: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_2: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_3: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_4: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_5: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_6: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_7: 0x0
hns3 :7d:00.0: rx_share_buf: 0x1e0e
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 115 +
2 files changed, 116 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 6c0d237..7c218cf 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -135,6 +135,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump checksum\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
+ dev_info(>pdev->dev, "dump qos buf cfg\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index b8921a8..a5f7741 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -392,6 +392,119 @@ static void hclge_dbg_dump_qos_pri_map(struct hclge_dev
*hdev)
dev_info(>pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
}
+static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
+{
+ struct hclge_tx_buff_alloc_cmd *tx_buf_cmd;
+ struct hclge_rx_priv_buff_cmd *rx_buf_cmd;
+ struct hclge_rx_priv_wl_buf *rx_priv_wl;
+ struct hclge_rx_com_wl *rx_packet_cnt;
+ struct hclge_rx_com_thrd *rx_com_thrd;
+ struct hclge_rx_com_wl *rx_com_wl;
+ enum hclge_opcode_type cmd;
+ struct hclge_desc desc[2];
+ int i, ret;
+
+ cmd = HCLGE_OPC_TX_BUFF_ALLOC;
+ hclge_cmd_setup_basic_desc(desc, cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 1);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "dump qos buf cfg\n");
+
+ tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM; i++)
+ dev_info(>pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i,
+tx_buf_cmd->tx_pkt_buff[i]);
+
+ cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC;
+ hclge_cmd_setup_basic_desc(desc, cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 1);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "\n");
+ rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM; i++)
+ dev_info(>pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i,
+rx_buf_cmd->buf_num[i]);
+
+ dev_info(>pdev->dev, "rx_share_buf: 0x%x\n",
+rx_buf_cmd->shared_buf);
+
+ cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC;
+ hclge_cmd_setup_basic_desc([0], cmd, true);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([1], cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 2);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "\n");
+ rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++)
+ dev_info(>pdev->dev,
+"rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i,
+rx_priv_wl->tc_wl[i].high, rx_priv_wl->tc_wl[i].low);
+
+ rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data;
+ for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++)
+ dev_info(>pdev->dev,
+"rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i + 4,
+rx_priv_wl->tc_wl[i].high, rx_priv_wl->tc_w
[RFC PATCH 10/10] net: hns3: Add "qos buffer" config info query function
From: liuzhongzhu
This patch prints qos buffer config information.
debugfs command:
echo dump qos buf cfg > cmd
Sample Command:
root@(none)# echo dump qos buf cfg > cmd
hns3 :7d:00.0: dump qos buf cfg
hns3 :7d:00.0: tx_packet_buf_tc_0: 0x1aa
hns3 :7d:00.0: tx_packet_buf_tc_1: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_2: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_3: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_4: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_5: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_6: 0x0
hns3 :7d:00.0: tx_packet_buf_tc_7: 0x0
hns3 :7d:00.0:
hns3 :7d:00.0: rx_packet_buf_tc_0: 0x130
hns3 :7d:00.0: rx_packet_buf_tc_1: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_2: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_3: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_4: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_5: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_6: 0x0
hns3 :7d:00.0: rx_packet_buf_tc_7: 0x0
hns3 :7d:00.0: rx_share_buf: 0x1e0e
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 115 +
2 files changed, 116 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 6c0d237..7c218cf 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -135,6 +135,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump checksum\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
dev_info(>pdev->dev, "dump qos pri map\n");
+ dev_info(>pdev->dev, "dump qos buf cfg\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index b8921a8..a5f7741 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -392,6 +392,119 @@ static void hclge_dbg_dump_qos_pri_map(struct hclge_dev
*hdev)
dev_info(>pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
}
+static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
+{
+ struct hclge_tx_buff_alloc_cmd *tx_buf_cmd;
+ struct hclge_rx_priv_buff_cmd *rx_buf_cmd;
+ struct hclge_rx_priv_wl_buf *rx_priv_wl;
+ struct hclge_rx_com_wl *rx_packet_cnt;
+ struct hclge_rx_com_thrd *rx_com_thrd;
+ struct hclge_rx_com_wl *rx_com_wl;
+ enum hclge_opcode_type cmd;
+ struct hclge_desc desc[2];
+ int i, ret;
+
+ cmd = HCLGE_OPC_TX_BUFF_ALLOC;
+ hclge_cmd_setup_basic_desc(desc, cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 1);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "dump qos buf cfg\n");
+
+ tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM; i++)
+ dev_info(>pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i,
+tx_buf_cmd->tx_pkt_buff[i]);
+
+ cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC;
+ hclge_cmd_setup_basic_desc(desc, cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 1);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "\n");
+ rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM; i++)
+ dev_info(>pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i,
+rx_buf_cmd->buf_num[i]);
+
+ dev_info(>pdev->dev, "rx_share_buf: 0x%x\n",
+rx_buf_cmd->shared_buf);
+
+ cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC;
+ hclge_cmd_setup_basic_desc([0], cmd, true);
+ desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
+ hclge_cmd_setup_basic_desc([1], cmd, true);
+ ret = hclge_cmd_send(>hw, desc, 2);
+ if (ret)
+ goto err_qos_cmd_send;
+
+ dev_info(>pdev->dev, "\n");
+ rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data;
+ for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++)
+ dev_info(>pdev->dev,
+"rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i,
+rx_priv_wl->tc_wl[i].high, rx_priv_wl->tc_wl[i].low);
+
+ rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data;
+ for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++)
+ dev_info(>pdev->dev,
+"rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i + 4,
+rx_priv_wl->tc_wl[i].high, rx_priv_wl->tc_w
[RFC PATCH 05/10] net: hns3: Add "tc config" info query function
From: liuzhongzhu
This patch prints tc config information.
debugfs command:
echo dump tc > cmd
Sample Output:
root@(none)# echo dump tc > cmd
hns3 :7d:00.0: weight_offset: 14
hns3 :7d:00.0: tc(0): no sp mode
hns3 :7d:00.0: tc(1): no sp mode
hns3 :7d:00.0: tc(2): no sp mode
hns3 :7d:00.0: tc(3): no sp mode
hns3 :7d:00.0: tc(4): no sp mode
hns3 :7d:00.0: tc(5): no sp mode
hns3 :7d:00.0: tc(6): no sp mode
hns3 :7d:00.0: tc(7): no sp mode
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 40 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 6
4 files changed, 48 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 47afdcd..da009f8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -130,6 +130,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "queue info [number]\n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump promisc [vf id]\n");
+ dev_info(>pdev->dev, "dump tc\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 872cd4b..cc0f214 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -126,6 +126,7 @@ enum hclge_opcode_type {
HCLGE_OPC_TM_PRI_SCH_MODE_CFG = 0x0813,
HCLGE_OPC_TM_QS_SCH_MODE_CFG= 0x0814,
HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815,
+ HCLGE_OPC_ETS_TC_WEIGHT = 0x0843,
/* Packet buffer allocate commands */
HCLGE_OPC_TX_BUFF_ALLOC = 0x0901,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 0a12473..901dc41 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -5,6 +5,7 @@
#include "hclge_cmd.h"
#include "hclge_main.h"
+#include "hclge_tm.h"
#include "hnae3.h"
static void hclge_print(struct hclge_dev *hdev, bool flag, char *true_buf,
@@ -16,6 +17,18 @@ static void hclge_print(struct hclge_dev *hdev, bool flag,
char *true_buf,
dev_info(>pdev->dev, "%s\n", false_buf);
}
+static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index,
+ char *title_buf, char *true_buf,
+ char *false_buf)
+{
+ if (flag)
+ dev_info(>pdev->dev, "%s(%d): %s\n", title_buf, index,
+true_buf);
+ else
+ dev_info(>pdev->dev, "%s(%d): %s\n", title_buf, index,
+false_buf);
+}
+
static void hclge_dbg_dump_promisc_cfg(struct hclge_dev *hdev, char *cmd_buf)
{
#define HCLGE_DBG_UC_MODE_B BIT(1)
@@ -58,6 +71,31 @@ static void hclge_dbg_dump_promisc_cfg(struct hclge_dev
*hdev, char *cmd_buf)
"bc: enable", "bc: disable");
}
+static void hclge_dbg_dump_tc(struct hclge_dev *hdev)
+{
+ struct hclge_ets_tc_weight_cmd *ets_weight;
+ struct hclge_desc desc;
+ int i, ret;
+
+ hclge_cmd_setup_basic_desc(, HCLGE_OPC_ETS_TC_WEIGHT, true);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret) {
+ dev_err(>pdev->dev, "dump tc fail, status is %d.\n", ret);
+ return;
+ }
+
+ ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data;
+
+ dev_info(>pdev->dev, "dump tc\n");
+ dev_info(>pdev->dev, "weight_offset: %u\n",
+ets_weight->weight_offset);
+
+ for (i = 0; i < HNAE3_MAX_TC; i++)
+ hclge_title_idx_print(hdev, ets_weight->tc_weight[i], i,
+ "tc", "no sp mode", "sp mode");
+}
+
static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage,
bool sel_x, u32 loc)
{
@@ -121,6 +159,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char
*cmd_buf)
hclge_dbg_fd_tcam(hdev);
} else if (strncmp(cmd_buf, "dump promisc", 12) == 0) {
hclge_dbg_dump_promisc_cfg(hdev, cmd_buf);
+ } else if (strncmp(cmd_buf, "dump tc", 7) == 0) {
+
[RFC PATCH 09/10] net: hns3: Add "qos prio map" info query function
From: liuzhongzhu
This patch prints qos priority map information.
debugfs command:
echo dump qos pri map > cmd
Sample Command:
root@(none)# echo dump qos pri map > cmd
hns3 :7d:00.0: dump qos pri map
hns3 :7d:00.0: vlan_to_pri: 0x0
hns3 :7d:00.0: pri_0_to_tc: 0x0
hns3 :7d:00.0: pri_1_to_tc: 0x0
hns3 :7d:00.0: pri_2_to_tc: 0x0
hns3 :7d:00.0: pri_3_to_tc: 0x0
hns3 :7d:00.0: pri_4_to_tc: 0x0
hns3 :7d:00.0: pri_5_to_tc: 0x0
hns3 :7d:00.0: pri_6_to_tc: 0x0
hns3 :7d:00.0: pri_7_to_tc: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 30 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 13 ++
3 files changed, 44 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 8edb4e9..6c0d237 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -134,6 +134,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump tm\n");
dev_info(>pdev->dev, "dump checksum\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
+ dev_info(>pdev->dev, "dump qos pri map\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index a71e9d0..b8921a8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -364,6 +364,34 @@ static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev
*hdev)
pause_param->pause_trans_time);
}
+static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev)
+{
+ struct hclge_qos_pri_map_cmd *pri_map;
+ struct hclge_desc desc;
+ int ret;
+
+ hclge_cmd_setup_basic_desc(, HCLGE_OPC_PRI_TO_TC_MAPPING, true);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret) {
+ dev_err(>pdev->dev,
+ "dump qos pri map fail, status is %d.\n", ret);
+ return;
+ }
+
+ pri_map = (struct hclge_qos_pri_map_cmd *)desc.data;
+ dev_info(>pdev->dev, "dump qos pri map\n");
+ dev_info(>pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri);
+ dev_info(>pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc);
+ dev_info(>pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc);
+ dev_info(>pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc);
+ dev_info(>pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc);
+ dev_info(>pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc);
+ dev_info(>pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc);
+ dev_info(>pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc);
+ dev_info(>pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
+}
+
static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage,
bool sel_x, u32 loc)
{
@@ -435,6 +463,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char
*cmd_buf)
hclge_dbg_dump_checksum(hdev);
} else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) {
hclge_dbg_dump_qos_pause_cfg(hdev);
+ } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) {
+ hclge_dbg_dump_qos_pri_map(hdev);
} else {
dev_info(>pdev->dev, "unknown command\n");
return -EINVAL;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
index 4ec9ced..6c839ee 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
@@ -8,4 +8,17 @@ struct hclge_checksum_cmd {
u8 outer;
u8 inner;
};
+
+struct hclge_qos_pri_map_cmd {
+ u8 pri0_tc : 4,
+ pri1_tc : 4;
+ u8 pri2_tc : 4,
+ pri3_tc : 4;
+ u8 pri4_tc : 4,
+ pri5_tc : 4;
+ u8 pri6_tc : 4,
+ pri7_tc : 4;
+ u8 vlan_pri : 4,
+ rev : 4;
+};
#endif
--
2.7.4
[RFC PATCH 05/10] net: hns3: Add "tc config" info query function
From: liuzhongzhu
This patch prints tc config information.
debugfs command:
echo dump tc > cmd
Sample Output:
root@(none)# echo dump tc > cmd
hns3 :7d:00.0: weight_offset: 14
hns3 :7d:00.0: tc(0): no sp mode
hns3 :7d:00.0: tc(1): no sp mode
hns3 :7d:00.0: tc(2): no sp mode
hns3 :7d:00.0: tc(3): no sp mode
hns3 :7d:00.0: tc(4): no sp mode
hns3 :7d:00.0: tc(5): no sp mode
hns3 :7d:00.0: tc(6): no sp mode
hns3 :7d:00.0: tc(7): no sp mode
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 40 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 6
4 files changed, 48 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 47afdcd..da009f8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -130,6 +130,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "queue info [number]\n");
dev_info(>pdev->dev, "dump fd tcam\n");
dev_info(>pdev->dev, "dump promisc [vf id]\n");
+ dev_info(>pdev->dev, "dump tc\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 872cd4b..cc0f214 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -126,6 +126,7 @@ enum hclge_opcode_type {
HCLGE_OPC_TM_PRI_SCH_MODE_CFG = 0x0813,
HCLGE_OPC_TM_QS_SCH_MODE_CFG= 0x0814,
HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815,
+ HCLGE_OPC_ETS_TC_WEIGHT = 0x0843,
/* Packet buffer allocate commands */
HCLGE_OPC_TX_BUFF_ALLOC = 0x0901,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index 0a12473..901dc41 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -5,6 +5,7 @@
#include "hclge_cmd.h"
#include "hclge_main.h"
+#include "hclge_tm.h"
#include "hnae3.h"
static void hclge_print(struct hclge_dev *hdev, bool flag, char *true_buf,
@@ -16,6 +17,18 @@ static void hclge_print(struct hclge_dev *hdev, bool flag,
char *true_buf,
dev_info(>pdev->dev, "%s\n", false_buf);
}
+static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index,
+ char *title_buf, char *true_buf,
+ char *false_buf)
+{
+ if (flag)
+ dev_info(>pdev->dev, "%s(%d): %s\n", title_buf, index,
+true_buf);
+ else
+ dev_info(>pdev->dev, "%s(%d): %s\n", title_buf, index,
+false_buf);
+}
+
static void hclge_dbg_dump_promisc_cfg(struct hclge_dev *hdev, char *cmd_buf)
{
#define HCLGE_DBG_UC_MODE_B BIT(1)
@@ -58,6 +71,31 @@ static void hclge_dbg_dump_promisc_cfg(struct hclge_dev
*hdev, char *cmd_buf)
"bc: enable", "bc: disable");
}
+static void hclge_dbg_dump_tc(struct hclge_dev *hdev)
+{
+ struct hclge_ets_tc_weight_cmd *ets_weight;
+ struct hclge_desc desc;
+ int i, ret;
+
+ hclge_cmd_setup_basic_desc(, HCLGE_OPC_ETS_TC_WEIGHT, true);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret) {
+ dev_err(>pdev->dev, "dump tc fail, status is %d.\n", ret);
+ return;
+ }
+
+ ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data;
+
+ dev_info(>pdev->dev, "dump tc\n");
+ dev_info(>pdev->dev, "weight_offset: %u\n",
+ets_weight->weight_offset);
+
+ for (i = 0; i < HNAE3_MAX_TC; i++)
+ hclge_title_idx_print(hdev, ets_weight->tc_weight[i], i,
+ "tc", "no sp mode", "sp mode");
+}
+
static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage,
bool sel_x, u32 loc)
{
@@ -121,6 +159,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char
*cmd_buf)
hclge_dbg_fd_tcam(hdev);
} else if (strncmp(cmd_buf, "dump promisc", 12) == 0) {
hclge_dbg_dump_promisc_cfg(hdev, cmd_buf);
+ } else if (strncmp(cmd_buf, "dump tc", 7) == 0) {
+
[RFC PATCH 09/10] net: hns3: Add "qos prio map" info query function
From: liuzhongzhu
This patch prints qos priority map information.
debugfs command:
echo dump qos pri map > cmd
Sample Command:
root@(none)# echo dump qos pri map > cmd
hns3 :7d:00.0: dump qos pri map
hns3 :7d:00.0: vlan_to_pri: 0x0
hns3 :7d:00.0: pri_0_to_tc: 0x0
hns3 :7d:00.0: pri_1_to_tc: 0x0
hns3 :7d:00.0: pri_2_to_tc: 0x0
hns3 :7d:00.0: pri_3_to_tc: 0x0
hns3 :7d:00.0: pri_4_to_tc: 0x0
hns3 :7d:00.0: pri_5_to_tc: 0x0
hns3 :7d:00.0: pri_6_to_tc: 0x0
hns3 :7d:00.0: pri_7_to_tc: 0x0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 +
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 30 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h | 13 ++
3 files changed, 44 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 8edb4e9..6c0d237 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -134,6 +134,7 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(>pdev->dev, "dump tm\n");
dev_info(>pdev->dev, "dump checksum\n");
dev_info(>pdev->dev, "dump qos pause cfg\n");
+ dev_info(>pdev->dev, "dump qos pri map\n");
}
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
index a71e9d0..b8921a8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
@@ -364,6 +364,34 @@ static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev
*hdev)
pause_param->pause_trans_time);
}
+static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev)
+{
+ struct hclge_qos_pri_map_cmd *pri_map;
+ struct hclge_desc desc;
+ int ret;
+
+ hclge_cmd_setup_basic_desc(, HCLGE_OPC_PRI_TO_TC_MAPPING, true);
+
+ ret = hclge_cmd_send(>hw, , 1);
+ if (ret) {
+ dev_err(>pdev->dev,
+ "dump qos pri map fail, status is %d.\n", ret);
+ return;
+ }
+
+ pri_map = (struct hclge_qos_pri_map_cmd *)desc.data;
+ dev_info(>pdev->dev, "dump qos pri map\n");
+ dev_info(>pdev->dev, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri);
+ dev_info(>pdev->dev, "pri_0_to_tc: 0x%x\n", pri_map->pri0_tc);
+ dev_info(>pdev->dev, "pri_1_to_tc: 0x%x\n", pri_map->pri1_tc);
+ dev_info(>pdev->dev, "pri_2_to_tc: 0x%x\n", pri_map->pri2_tc);
+ dev_info(>pdev->dev, "pri_3_to_tc: 0x%x\n", pri_map->pri3_tc);
+ dev_info(>pdev->dev, "pri_4_to_tc: 0x%x\n", pri_map->pri4_tc);
+ dev_info(>pdev->dev, "pri_5_to_tc: 0x%x\n", pri_map->pri5_tc);
+ dev_info(>pdev->dev, "pri_6_to_tc: 0x%x\n", pri_map->pri6_tc);
+ dev_info(>pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
+}
+
static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage,
bool sel_x, u32 loc)
{
@@ -435,6 +463,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char
*cmd_buf)
hclge_dbg_dump_checksum(hdev);
} else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) {
hclge_dbg_dump_qos_pause_cfg(hdev);
+ } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) {
+ hclge_dbg_dump_qos_pri_map(hdev);
} else {
dev_info(>pdev->dev, "unknown command\n");
return -EINVAL;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
index 4ec9ced..6c839ee 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h
@@ -8,4 +8,17 @@ struct hclge_checksum_cmd {
u8 outer;
u8 inner;
};
+
+struct hclge_qos_pri_map_cmd {
+ u8 pri0_tc : 4,
+ pri1_tc : 4;
+ u8 pri2_tc : 4,
+ pri3_tc : 4;
+ u8 pri4_tc : 4,
+ pri5_tc : 4;
+ u8 pri6_tc : 4,
+ pri7_tc : 4;
+ u8 vlan_pri : 4,
+ rev : 4;
+};
#endif
--
2.7.4
[RFC PATCH 02/10] net: hns3: Add "queue info" query function
From: liuzhongzhu
Query the queue information of the current NIC
such as BD size, queue header and tail pointer.
This patch adds support for debugfs command:
echo queue info 1 > cmd
it can print queue config information...
root@(none)# echo queue info 1 > cmd
hns3 :7d:00.0: queue info
hns3 :7d:00.0: RX(1) BASE ADD: 0xffb58000
hns3 :7d:00.0: RX(1) RING BD NUM: 127
hns3 :7d:00.0: RX(1) RING BD LEN: 2
hns3 :7d:00.0: RX(1) RING TAIL: 120
hns3 :7d:00.0: RX(1) RING HEAD: 0
hns3 :7d:00.0: RX(1) RING FBDNUM: 0
hns3 :7d:00.0: RX(1) RING PKTNUM: 0
hns3 :7d:00.0: TX(1) BASE ADD: 0xfffd8000
hns3 :7d:00.0: TX(1) RING BD NUM: 127
hns3 :7d:00.0: TX(1) RING TC: 0
hns3 :7d:00.0: TX(1) RING TAIL: 2
hns3 :7d:00.0: TX(1) RING HEAD: 2
hns3 :7d:00.0: TX(1) RING FBDNUM: 0
hns3 :7d:00.0: TX(1) RING OFFSET: 0
hns3 :7d:00.0: TX(1) RING PKTNUM: 0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 122 +
1 file changed, 122 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 954e204..ac6a072 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -11,6 +11,119 @@
static struct dentry *hns3_dbgfs_root;
+static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_enet_ring *ring;
+ u32 base_add_l, base_add_h;
+ u32 queue_num, queue_max;
+ u32 value, i = 0;
+ int cnt;
+
+ if (!priv->ring_data) {
+ dev_err(>pdev->dev, "ring_data is NULL\n");
+ return -EFAULT;
+ }
+
+ queue_max = h->kinfo.num_tqps;
+ cnt = kstrtouint(_buf[11], 0, _num);
+ if (cnt)
+ queue_num = 0;
+ else
+ queue_max = queue_num + 1;
+
+ dev_info(>pdev->dev, "queue info\n");
+
+ if (queue_num >= h->kinfo.num_tqps) {
+ dev_err(>pdev->dev,
+ "Queue number(%u) is out of range(%u)\n", queue_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ for (i = queue_num; i < queue_max; i++) {
+ /* Each cycle needs to determine whether the instance is reset,
+* to prevent reference to invalid memory. And need to ensure
+* that the following code is executed within 100ms.
+*/
+ if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ test_bit(HNS3_NIC_STATE_RESETTING, >state))
+ return -EPERM;
+
+ ring = ring_data[i].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_H_REG);
+ base_add_l = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_L_REG);
+ dev_info(>pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
+base_add_h, base_add_l);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_NUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_LEN_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_TAIL_REG);
+ dev_info(>pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_HEAD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_FBDNUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
+
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_TX_RING_BASEADDR_H_REG);
+ base_add_l = readl_rel
[RFC PATCH 02/10] net: hns3: Add "queue info" query function
From: liuzhongzhu
Query the queue information of the current NIC
such as BD size, queue header and tail pointer.
This patch adds support for debugfs command:
echo queue info 1 > cmd
it can print queue config information...
root@(none)# echo queue info 1 > cmd
hns3 :7d:00.0: queue info
hns3 :7d:00.0: RX(1) BASE ADD: 0xffb58000
hns3 :7d:00.0: RX(1) RING BD NUM: 127
hns3 :7d:00.0: RX(1) RING BD LEN: 2
hns3 :7d:00.0: RX(1) RING TAIL: 120
hns3 :7d:00.0: RX(1) RING HEAD: 0
hns3 :7d:00.0: RX(1) RING FBDNUM: 0
hns3 :7d:00.0: RX(1) RING PKTNUM: 0
hns3 :7d:00.0: TX(1) BASE ADD: 0xfffd8000
hns3 :7d:00.0: TX(1) RING BD NUM: 127
hns3 :7d:00.0: TX(1) RING TC: 0
hns3 :7d:00.0: TX(1) RING TAIL: 2
hns3 :7d:00.0: TX(1) RING HEAD: 2
hns3 :7d:00.0: TX(1) RING FBDNUM: 0
hns3 :7d:00.0: TX(1) RING OFFSET: 0
hns3 :7d:00.0: TX(1) RING PKTNUM: 0
root@(none)#
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 122 +
1 file changed, 122 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index 954e204..ac6a072 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -11,6 +11,119 @@
static struct dentry *hns3_dbgfs_root;
+static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf)
+{
+ struct hns3_nic_priv *priv = h->priv;
+ struct hns3_nic_ring_data *ring_data;
+ struct hns3_enet_ring *ring;
+ u32 base_add_l, base_add_h;
+ u32 queue_num, queue_max;
+ u32 value, i = 0;
+ int cnt;
+
+ if (!priv->ring_data) {
+ dev_err(>pdev->dev, "ring_data is NULL\n");
+ return -EFAULT;
+ }
+
+ queue_max = h->kinfo.num_tqps;
+ cnt = kstrtouint(_buf[11], 0, _num);
+ if (cnt)
+ queue_num = 0;
+ else
+ queue_max = queue_num + 1;
+
+ dev_info(>pdev->dev, "queue info\n");
+
+ if (queue_num >= h->kinfo.num_tqps) {
+ dev_err(>pdev->dev,
+ "Queue number(%u) is out of range(%u)\n", queue_num,
+ h->kinfo.num_tqps - 1);
+ return -EINVAL;
+ }
+
+ ring_data = priv->ring_data;
+ for (i = queue_num; i < queue_max; i++) {
+ /* Each cycle needs to determine whether the instance is reset,
+* to prevent reference to invalid memory. And need to ensure
+* that the following code is executed within 100ms.
+*/
+ if (test_bit(HNS3_NIC_STATE_INITED, >state) ||
+ test_bit(HNS3_NIC_STATE_RESETTING, >state))
+ return -EPERM;
+
+ ring = ring_data[i].ring;
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_H_REG);
+ base_add_l = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BASEADDR_L_REG);
+ dev_info(>pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i,
+base_add_h, base_add_l);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_NUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_BD_LEN_REG);
+ dev_info(>pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_TAIL_REG);
+ dev_info(>pdev->dev, "RX(%d) RING TAIL: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_HEAD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING HEAD: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_FBDNUM_REG);
+ dev_info(>pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value);
+
+ value = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
+ dev_info(>pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value);
+
+ base_add_h = readl_relaxed(ring->tqp->io_base +
+ HNS3_RING_TX_RING_BASEADDR_H_REG);
+ base_add_l = readl_rel
[RFC PATCH 01/10] net: hns3: Add debugfs framework registration
From: liuzhongzhu
Add the debugfs framework to the driver and create a debugfs
command interface for each device.
example command:
"echo queue info > cmd" Query the packet forwarding queue information.
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/Makefile | 2 +-
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 133 +
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c| 17 ++-
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h| 4 +
5 files changed, 154 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
diff --git a/drivers/net/ethernet/hisilicon/hns3/Makefile
b/drivers/net/ethernet/hisilicon/hns3/Makefile
index 002534f..d01bf53 100644
--- a/drivers/net/ethernet/hisilicon/hns3/Makefile
+++ b/drivers/net/ethernet/hisilicon/hns3/Makefile
@@ -9,6 +9,6 @@ obj-$(CONFIG_HNS3) += hns3vf/
obj-$(CONFIG_HNS3) += hnae3.o
obj-$(CONFIG_HNS3_ENET) += hns3.o
-hns3-objs = hns3_enet.o hns3_ethtool.o
+hns3-objs = hns3_enet.o hns3_ethtool.o hns3_debugfs.o
hns3-$(CONFIG_HNS3_DCB) += hns3_dcbnl.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 5b3b104..994aee1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -544,6 +544,7 @@ struct hnae3_handle {
u32 numa_node_mask; /* for multi-chip support */
u8 netdev_flags;
+ struct dentry *hnae3_dbgfs;
};
#define hnae3_set_field(origin, mask, shift, val) \
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
new file mode 100644
index 000..954e204
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018-2019 Hisilicon Limited.
+
+#include
+#include
+
+#include "hnae3.h"
+#include "hns3_enet.h"
+
+#define HNS3_DBG_READ_LEN 256
+
+static struct dentry *hns3_dbgfs_root;
+
+static void hns3_dbg_help(struct hnae3_handle *h)
+{
+ dev_info(>pdev->dev, "available commands\n");
+ dev_info(>pdev->dev, "queue info [number]\n");
+ dev_info(>pdev->dev, "dump fd tcam\n");
+}
+
+static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
+size_t count, loff_t *ppos)
+{
+ int uncopy_bytes;
+ char *buf;
+ int len;
+
+ if (*ppos != 0)
+ return 0;
+
+ if (count < HNS3_DBG_READ_LEN)
+ return -ENOSPC;
+
+ buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
+ "Please echo help to cmd to get help information");
+ uncopy_bytes = copy_to_user(buffer, buf, len);
+
+ kfree(buf);
+
+ if (uncopy_bytes)
+ return -EFAULT;
+
+ return (*ppos = len);
+}
+
+static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
+ size_t count, loff_t *ppos)
+{
+ struct hnae3_handle *handle = filp->private_data;
+ char *cmd_buf, *cmd_buf_tmp;
+ int uncopied_bytes;
+ int ret = 0;
+
+ if (*ppos != 0)
+ return 0;
+
+ cmd_buf = kzalloc(count + 1, GFP_KERNEL);
+ if (!cmd_buf)
+ return count;
+
+ uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
+ if (uncopied_bytes) {
+ kfree(cmd_buf);
+ return -EFAULT;
+ }
+
+ cmd_buf[count] = '\0';
+
+ cmd_buf_tmp = strchr(cmd_buf, '\n');
+ if (cmd_buf_tmp) {
+ *cmd_buf_tmp = '\0';
+ count = cmd_buf_tmp - cmd_buf + 1;
+ }
+
+ if (ret)
+ hns3_dbg_help(handle);
+
+ kfree(cmd_buf);
+ cmd_buf = NULL;
+
+ return count;
+}
+
+static const struct file_operations hns3_dbg_cmd_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .read = hns3_dbg_cmd_read,
+ .write = hns3_dbg_cmd_write,
+};
+
+void hns3_dbg_init(struct hnae3_handle *handle)
+{
+ const char *name = pci_name(handle->pdev);
+ struct dentry *pfile;
+
+ handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
+ if (!handle->hnae3_dbgfs)
+ return;
+
+ pfile = debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
+ _dbg_cmd_fops);
+ if (!pfile) {
+ debugfs_remove_recursive(handle->hnae3_dbgfs);
+ handle->hnae3_dbgfs = NULL;
+ dev_warn(>pdev->dev, "create file for %s fai
[RFC PATCH 01/10] net: hns3: Add debugfs framework registration
From: liuzhongzhu
Add the debugfs framework to the driver and create a debugfs
command interface for each device.
example command:
"echo queue info > cmd" Query the packet forwarding queue information.
Signed-off-by: liuzhongzhu
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/Makefile | 2 +-
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 1 +
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 133 +
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c| 17 ++-
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h| 4 +
5 files changed, 154 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
diff --git a/drivers/net/ethernet/hisilicon/hns3/Makefile
b/drivers/net/ethernet/hisilicon/hns3/Makefile
index 002534f..d01bf53 100644
--- a/drivers/net/ethernet/hisilicon/hns3/Makefile
+++ b/drivers/net/ethernet/hisilicon/hns3/Makefile
@@ -9,6 +9,6 @@ obj-$(CONFIG_HNS3) += hns3vf/
obj-$(CONFIG_HNS3) += hnae3.o
obj-$(CONFIG_HNS3_ENET) += hns3.o
-hns3-objs = hns3_enet.o hns3_ethtool.o
+hns3-objs = hns3_enet.o hns3_ethtool.o hns3_debugfs.o
hns3-$(CONFIG_HNS3_DCB) += hns3_dcbnl.o
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 5b3b104..994aee1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -544,6 +544,7 @@ struct hnae3_handle {
u32 numa_node_mask; /* for multi-chip support */
u8 netdev_flags;
+ struct dentry *hnae3_dbgfs;
};
#define hnae3_set_field(origin, mask, shift, val) \
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
new file mode 100644
index 000..954e204
--- /dev/null
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018-2019 Hisilicon Limited.
+
+#include
+#include
+
+#include "hnae3.h"
+#include "hns3_enet.h"
+
+#define HNS3_DBG_READ_LEN 256
+
+static struct dentry *hns3_dbgfs_root;
+
+static void hns3_dbg_help(struct hnae3_handle *h)
+{
+ dev_info(>pdev->dev, "available commands\n");
+ dev_info(>pdev->dev, "queue info [number]\n");
+ dev_info(>pdev->dev, "dump fd tcam\n");
+}
+
+static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
+size_t count, loff_t *ppos)
+{
+ int uncopy_bytes;
+ char *buf;
+ int len;
+
+ if (*ppos != 0)
+ return 0;
+
+ if (count < HNS3_DBG_READ_LEN)
+ return -ENOSPC;
+
+ buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
+ "Please echo help to cmd to get help information");
+ uncopy_bytes = copy_to_user(buffer, buf, len);
+
+ kfree(buf);
+
+ if (uncopy_bytes)
+ return -EFAULT;
+
+ return (*ppos = len);
+}
+
+static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
+ size_t count, loff_t *ppos)
+{
+ struct hnae3_handle *handle = filp->private_data;
+ char *cmd_buf, *cmd_buf_tmp;
+ int uncopied_bytes;
+ int ret = 0;
+
+ if (*ppos != 0)
+ return 0;
+
+ cmd_buf = kzalloc(count + 1, GFP_KERNEL);
+ if (!cmd_buf)
+ return count;
+
+ uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
+ if (uncopied_bytes) {
+ kfree(cmd_buf);
+ return -EFAULT;
+ }
+
+ cmd_buf[count] = '\0';
+
+ cmd_buf_tmp = strchr(cmd_buf, '\n');
+ if (cmd_buf_tmp) {
+ *cmd_buf_tmp = '\0';
+ count = cmd_buf_tmp - cmd_buf + 1;
+ }
+
+ if (ret)
+ hns3_dbg_help(handle);
+
+ kfree(cmd_buf);
+ cmd_buf = NULL;
+
+ return count;
+}
+
+static const struct file_operations hns3_dbg_cmd_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .read = hns3_dbg_cmd_read,
+ .write = hns3_dbg_cmd_write,
+};
+
+void hns3_dbg_init(struct hnae3_handle *handle)
+{
+ const char *name = pci_name(handle->pdev);
+ struct dentry *pfile;
+
+ handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
+ if (!handle->hnae3_dbgfs)
+ return;
+
+ pfile = debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
+ _dbg_cmd_fops);
+ if (!pfile) {
+ debugfs_remove_recursive(handle->hnae3_dbgfs);
+ handle->hnae3_dbgfs = NULL;
+ dev_warn(>pdev->dev, "create file for %s fai
[PATCH net-next 3/7] net: hns3: Add support to enable and disable hw errors
From: Shiju Jose
This patch adds functions to enable and disable hw errors.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 22 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 2 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 8
3 files changed, 32 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 83aca6f..d2640d1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -7,6 +7,28 @@ static const struct hclge_hw_blk hw_blk[] = {
{ /* sentinel */ }
};
+int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state)
+{
+ struct device *dev = >pdev->dev;
+ int ret = 0;
+ int i = 0;
+
+ while (hw_blk[i].name) {
+ if (!hw_blk[i].enable_error) {
+ i++;
+ continue;
+ }
+ ret = hw_blk[i].enable_error(hdev, state);
+ if (ret) {
+ dev_err(dev, "fail(%d) to en/disable err int\n", ret);
+ return ret;
+ }
+ i++;
+ }
+
+ return ret;
+}
+
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev)
{
struct hclge_dev *hdev = ae_dev->priv;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index ea1637c..373e9bf 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -21,9 +21,11 @@ enum hclge_err_int_type {
struct hclge_hw_blk {
u32 msk;
const char *name;
+ int (*enable_error)(struct hclge_dev *hdev, bool en);
void (*process_error)(struct hclge_dev *hdev,
enum hclge_err_int_type type);
};
+int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 5075365..082ea97 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -6759,6 +6759,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
goto err_mdiobus_unreg;
}
+ ret = hclge_hw_error_set_state(hdev, true);
+ if (ret) {
+ dev_err(>dev,
+ "hw error interrupts enable failed, ret =%d\n", ret);
+ goto err_mdiobus_unreg;
+ }
+
hclge_dcb_ops_set(hdev);
timer_setup(>service_timer, hclge_service_timer, 0);
@@ -6896,6 +6903,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev
*ae_dev)
hclge_enable_vector(>misc_vector, false);
synchronize_irq(hdev->misc_vector.vector_irq);
+ hclge_hw_error_set_state(hdev, false);
hclge_destroy_cmd_queue(>hw);
hclge_misc_irq_uninit(hdev);
hclge_pci_uninit(hdev);
--
2.7.4
[PATCH net-next 3/7] net: hns3: Add support to enable and disable hw errors
From: Shiju Jose
This patch adds functions to enable and disable hw errors.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 22 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h | 2 ++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 8
3 files changed, 32 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
index 83aca6f..d2640d1 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
@@ -7,6 +7,28 @@ static const struct hclge_hw_blk hw_blk[] = {
{ /* sentinel */ }
};
+int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state)
+{
+ struct device *dev = >pdev->dev;
+ int ret = 0;
+ int i = 0;
+
+ while (hw_blk[i].name) {
+ if (!hw_blk[i].enable_error) {
+ i++;
+ continue;
+ }
+ ret = hw_blk[i].enable_error(hdev, state);
+ if (ret) {
+ dev_err(dev, "fail(%d) to en/disable err int\n", ret);
+ return ret;
+ }
+ i++;
+ }
+
+ return ret;
+}
+
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev)
{
struct hclge_dev *hdev = ae_dev->priv;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
index ea1637c..373e9bf 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
@@ -21,9 +21,11 @@ enum hclge_err_int_type {
struct hclge_hw_blk {
u32 msk;
const char *name;
+ int (*enable_error)(struct hclge_dev *hdev, bool en);
void (*process_error)(struct hclge_dev *hdev,
enum hclge_err_int_type type);
};
+int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);
pci_ers_result_t hclge_process_ras_hw_error(struct hnae3_ae_dev *ae_dev);
#endif
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 5075365..082ea97 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -6759,6 +6759,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
goto err_mdiobus_unreg;
}
+ ret = hclge_hw_error_set_state(hdev, true);
+ if (ret) {
+ dev_err(>dev,
+ "hw error interrupts enable failed, ret =%d\n", ret);
+ goto err_mdiobus_unreg;
+ }
+
hclge_dcb_ops_set(hdev);
timer_setup(>service_timer, hclge_service_timer, 0);
@@ -6896,6 +6903,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev
*ae_dev)
hclge_enable_vector(>misc_vector, false);
synchronize_irq(hdev->misc_vector.vector_irq);
+ hclge_hw_error_set_state(hdev, false);
hclge_destroy_cmd_queue(>hw);
hclge_misc_irq_uninit(hdev);
hclge_pci_uninit(hdev);
--
2.7.4
[PATCH net-next 4/7] net: hns3: Add support for rule query of flow director
From: Jian Shen
This patch adds support for querying rule number and rule details
by ethtool commands.
Signed-off-by: Jian Shen
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 6 +
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 25 ++-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 239 +
3 files changed, 264 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 262bb736..fac84d8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -420,6 +420,12 @@ struct hnae3_ae_ops {
struct ethtool_rxnfc *cmd);
int (*del_fd_entry)(struct hnae3_handle *handle,
struct ethtool_rxnfc *cmd);
+ int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd);
+ int (*get_fd_rule_info)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd);
+ int (*get_fd_all_rules)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd, u32 *rule_locs);
};
struct hnae3_dcb_ops {
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
index 59cbf78..7d79a07 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
@@ -699,20 +699,33 @@ static int hns3_get_rxnfc(struct net_device *netdev,
{
struct hnae3_handle *h = hns3_get_handle(netdev);
- if (!h->ae_algo || !h->ae_algo->ops || !h->ae_algo->ops->get_rss_tuple)
+ if (!h->ae_algo || !h->ae_algo->ops)
return -EOPNOTSUPP;
switch (cmd->cmd) {
case ETHTOOL_GRXRINGS:
- cmd->data = h->kinfo.rss_size;
- break;
+ cmd->data = h->kinfo.num_tqps;
+ return 0;
case ETHTOOL_GRXFH:
- return h->ae_algo->ops->get_rss_tuple(h, cmd);
+ if (h->ae_algo->ops->get_rss_tuple)
+ return h->ae_algo->ops->get_rss_tuple(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRLCNT:
+ if (h->ae_algo->ops->get_fd_rule_cnt)
+ return h->ae_algo->ops->get_fd_rule_cnt(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRULE:
+ if (h->ae_algo->ops->get_fd_rule_info)
+ return h->ae_algo->ops->get_fd_rule_info(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRLALL:
+ if (h->ae_algo->ops->get_fd_all_rules)
+ return h->ae_algo->ops->get_fd_all_rules(h, cmd,
+rule_locs);
+ return -EOPNOTSUPP;
default:
return -EOPNOTSUPP;
}
-
- return 0;
}
static int hns3_change_all_ring_bd_num(struct hns3_nic_priv *priv,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 43f5caa..876c7ca 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -4299,6 +4299,242 @@ static int hclge_del_fd_entry(struct hnae3_handle
*handle,
false);
}
+static int hclge_get_fd_rule_cnt(struct hnae3_handle *handle,
+struct ethtool_rxnfc *cmd)
+{
+ struct hclge_vport *vport = hclge_get_vport(handle);
+ struct hclge_dev *hdev = vport->back;
+
+ if (!hnae3_dev_fd_supported(hdev))
+ return -EOPNOTSUPP;
+
+ cmd->rule_cnt = hdev->hclge_fd_rule_num;
+ cmd->data = hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1];
+
+ return 0;
+}
+
+static int hclge_get_fd_rule_info(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd)
+{
+ struct hclge_vport *vport = hclge_get_vport(handle);
+ struct hclge_fd_rule *rule = NULL;
+ struct hclge_dev *hdev = vport->back;
+ struct ethtool_rx_flow_spec *fs;
+ struct hlist_node *node2;
+
+ if (!hnae3_dev_fd_supported(hdev))
+ return -EOPNOTSUPP;
+
+ fs = (struct ethtool_rx_flow_spec *)>fs;
+
+ hlist_for_each_entry_safe(rule, node2, >fd_rule_list, rule_node) {
+ if (rule->location >= fs->location)
+ break;
+ }
+
+ if (!rule || fs->location != rule->location)
+ return -ENOENT;
+
+ fs->flow_type = rule->flow_type;
+ switch (
[PATCH net-next 4/7] net: hns3: Add support for rule query of flow director
From: Jian Shen
This patch adds support for querying rule number and rule details
by ethtool commands.
Signed-off-by: Jian Shen
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hnae3.h| 6 +
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 25 ++-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 239 +
3 files changed, 264 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 262bb736..fac84d8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -420,6 +420,12 @@ struct hnae3_ae_ops {
struct ethtool_rxnfc *cmd);
int (*del_fd_entry)(struct hnae3_handle *handle,
struct ethtool_rxnfc *cmd);
+ int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd);
+ int (*get_fd_rule_info)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd);
+ int (*get_fd_all_rules)(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd, u32 *rule_locs);
};
struct hnae3_dcb_ops {
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
index 59cbf78..7d79a07 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c
@@ -699,20 +699,33 @@ static int hns3_get_rxnfc(struct net_device *netdev,
{
struct hnae3_handle *h = hns3_get_handle(netdev);
- if (!h->ae_algo || !h->ae_algo->ops || !h->ae_algo->ops->get_rss_tuple)
+ if (!h->ae_algo || !h->ae_algo->ops)
return -EOPNOTSUPP;
switch (cmd->cmd) {
case ETHTOOL_GRXRINGS:
- cmd->data = h->kinfo.rss_size;
- break;
+ cmd->data = h->kinfo.num_tqps;
+ return 0;
case ETHTOOL_GRXFH:
- return h->ae_algo->ops->get_rss_tuple(h, cmd);
+ if (h->ae_algo->ops->get_rss_tuple)
+ return h->ae_algo->ops->get_rss_tuple(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRLCNT:
+ if (h->ae_algo->ops->get_fd_rule_cnt)
+ return h->ae_algo->ops->get_fd_rule_cnt(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRULE:
+ if (h->ae_algo->ops->get_fd_rule_info)
+ return h->ae_algo->ops->get_fd_rule_info(h, cmd);
+ return -EOPNOTSUPP;
+ case ETHTOOL_GRXCLSRLALL:
+ if (h->ae_algo->ops->get_fd_all_rules)
+ return h->ae_algo->ops->get_fd_all_rules(h, cmd,
+rule_locs);
+ return -EOPNOTSUPP;
default:
return -EOPNOTSUPP;
}
-
- return 0;
}
static int hns3_change_all_ring_bd_num(struct hns3_nic_priv *priv,
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 43f5caa..876c7ca 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -4299,6 +4299,242 @@ static int hclge_del_fd_entry(struct hnae3_handle
*handle,
false);
}
+static int hclge_get_fd_rule_cnt(struct hnae3_handle *handle,
+struct ethtool_rxnfc *cmd)
+{
+ struct hclge_vport *vport = hclge_get_vport(handle);
+ struct hclge_dev *hdev = vport->back;
+
+ if (!hnae3_dev_fd_supported(hdev))
+ return -EOPNOTSUPP;
+
+ cmd->rule_cnt = hdev->hclge_fd_rule_num;
+ cmd->data = hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1];
+
+ return 0;
+}
+
+static int hclge_get_fd_rule_info(struct hnae3_handle *handle,
+ struct ethtool_rxnfc *cmd)
+{
+ struct hclge_vport *vport = hclge_get_vport(handle);
+ struct hclge_fd_rule *rule = NULL;
+ struct hclge_dev *hdev = vport->back;
+ struct ethtool_rx_flow_spec *fs;
+ struct hlist_node *node2;
+
+ if (!hnae3_dev_fd_supported(hdev))
+ return -EOPNOTSUPP;
+
+ fs = (struct ethtool_rx_flow_spec *)>fs;
+
+ hlist_for_each_entry_safe(rule, node2, >fd_rule_list, rule_node) {
+ if (rule->location >= fs->location)
+ break;
+ }
+
+ if (!rule || fs->location != rule->location)
+ return -ENOENT;
+
+ fs->flow_type = rule->flow_type;
+ switch (
[PATCH net-next 10/12] net: hns3: Clear client pointer when initialize client failed or unintialize finished
From: Jian Shen
If initialize client failed or finish uninitializing client, we should
clear the client pointer. It may cause unexpected result when use
uninitialized client. Meanwhile, we also should check whether client
exist when uninitialize it.
Fixes: 46a3df9f9718 ("net: hns3: Add HNS3 Acceleration Engine & Compatibility
Layer Support")
Signed-off-by: Jian Shen
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 25 ++--
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 33 --
2 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 8a50688..141da18 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -5162,13 +5162,13 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
vport->nic.client = client;
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
ret = hclge_init_instance_hw(hdev);
if (ret) {
client->ops->uninit_instance(>nic,
0);
- return ret;
+ goto clear_nic;
}
if (hdev->roce_client &&
@@ -5177,11 +5177,11 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
ret = hclge_init_roce_base_info(vport);
if (ret)
- return ret;
+ goto clear_roce;
ret = rc->ops->init_instance(>roce);
if (ret)
- return ret;
+ goto clear_roce;
}
break;
@@ -5191,7 +5191,7 @@ static int hclge_init_client_instance(struct hnae3_client
*client,
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
break;
case HNAE3_CLIENT_ROCE:
@@ -5203,16 +5203,25 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
if (hdev->roce_client && hdev->nic_client) {
ret = hclge_init_roce_base_info(vport);
if (ret)
- return ret;
+ goto clear_roce;
ret = client->ops->init_instance(>roce);
if (ret)
- return ret;
+ goto clear_roce;
}
}
}
return 0;
+
+clear_nic:
+ hdev->nic_client = NULL;
+ vport->nic.client = NULL;
+ return ret;
+clear_roce:
+ hdev->roce_client = NULL;
+ vport->roce.client = NULL;
+ return ret;
}
static void hclge_uninit_client_instance(struct hnae3_client *client,
@@ -5232,7 +5241,7 @@ static void hclge_uninit_client_instance(struct
hnae3_client *client,
}
if (client->type == HNAE3_CLIENT_ROCE)
return;
- if (client->ops->uninit_instance) {
+ if (hdev->nic_client && client->ops->uninit_instance) {
hclge_uninit_instance_hw(hdev);
client->ops->uninit_instance(>nic, 0);
hdev->nic_client = NULL;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 320043e..88cff5f 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -1624,17 +1624,17 @@ static int hclgevf_init_client_instance(struct
hnae3_client *client,
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
if (hdev->roce_client && hnae3_dev_roce_supported(hdev)) {
struct hnae3_client *rc = hdev->roce_client;
ret = hclgevf_init_roce_base_info(hdev);
[PATCH net-next 10/12] net: hns3: Clear client pointer when initialize client failed or unintialize finished
From: Jian Shen
If initialize client failed or finish uninitializing client, we should
clear the client pointer. It may cause unexpected result when use
uninitialized client. Meanwhile, we also should check whether client
exist when uninitialize it.
Fixes: 46a3df9f9718 ("net: hns3: Add HNS3 Acceleration Engine & Compatibility
Layer Support")
Signed-off-by: Jian Shen
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 25 ++--
.../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 33 --
2 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 8a50688..141da18 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -5162,13 +5162,13 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
vport->nic.client = client;
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
ret = hclge_init_instance_hw(hdev);
if (ret) {
client->ops->uninit_instance(>nic,
0);
- return ret;
+ goto clear_nic;
}
if (hdev->roce_client &&
@@ -5177,11 +5177,11 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
ret = hclge_init_roce_base_info(vport);
if (ret)
- return ret;
+ goto clear_roce;
ret = rc->ops->init_instance(>roce);
if (ret)
- return ret;
+ goto clear_roce;
}
break;
@@ -5191,7 +5191,7 @@ static int hclge_init_client_instance(struct hnae3_client
*client,
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
break;
case HNAE3_CLIENT_ROCE:
@@ -5203,16 +5203,25 @@ static int hclge_init_client_instance(struct
hnae3_client *client,
if (hdev->roce_client && hdev->nic_client) {
ret = hclge_init_roce_base_info(vport);
if (ret)
- return ret;
+ goto clear_roce;
ret = client->ops->init_instance(>roce);
if (ret)
- return ret;
+ goto clear_roce;
}
}
}
return 0;
+
+clear_nic:
+ hdev->nic_client = NULL;
+ vport->nic.client = NULL;
+ return ret;
+clear_roce:
+ hdev->roce_client = NULL;
+ vport->roce.client = NULL;
+ return ret;
}
static void hclge_uninit_client_instance(struct hnae3_client *client,
@@ -5232,7 +5241,7 @@ static void hclge_uninit_client_instance(struct
hnae3_client *client,
}
if (client->type == HNAE3_CLIENT_ROCE)
return;
- if (client->ops->uninit_instance) {
+ if (hdev->nic_client && client->ops->uninit_instance) {
hclge_uninit_instance_hw(hdev);
client->ops->uninit_instance(>nic, 0);
hdev->nic_client = NULL;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 320043e..88cff5f 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -1624,17 +1624,17 @@ static int hclgevf_init_client_instance(struct
hnae3_client *client,
ret = client->ops->init_instance(>nic);
if (ret)
- return ret;
+ goto clear_nic;
if (hdev->roce_client && hnae3_dev_roce_supported(hdev)) {
struct hnae3_client *rc = hdev->roce_client;
ret = hclgevf_init_roce_base_info(hdev);
RE: [PATCH net-next 5/9] net: hns3: Fix for vf vlan delete failed problem
Hi Dave,
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Monday, August 13, 2018 4:57 PM
> To: Salil Mehta
> Cc: Zhuangyuzeng (Yisen) ; lipeng (Y)
> ; mehta.salil@gmail.com;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm
> ; linyunsheng
> Subject: Re: [PATCH net-next 5/9] net: hns3: Fix for vf vlan delete
> failed problem
>
> From: Salil Mehta
> Date: Sun, 12 Aug 2018 10:47:34 +0100
>
> > Fixes: 9dba194574e3 ("{topost} net: hns3: fix for vlan table
> problem")
>
> This commit ID doesn't exist.
Thanks for catching this. This commit ID was from our internal branch
and ideally should have been from net-next - I should have caught this
earlier, sorry for this!
I have for now dropped this patch from the series as there is another
related patch(being referred in the Fixes string) that would need to
be merged with this patch before sending to net-next. Therefore, will
refloat this patch along with other related patch later in next cycle.
>
> Also, I really don't think the string "{topost}" would be in the commit
> header line.
Yes, this is stray and will be removed when this patch is sent next.
Thank you
Salil
RE: [PATCH net-next 5/9] net: hns3: Fix for vf vlan delete failed problem
Hi Dave,
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Sent: Monday, August 13, 2018 4:57 PM
> To: Salil Mehta
> Cc: Zhuangyuzeng (Yisen) ; lipeng (Y)
> ; mehta.salil@gmail.com;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org; Linuxarm
> ; linyunsheng
> Subject: Re: [PATCH net-next 5/9] net: hns3: Fix for vf vlan delete
> failed problem
>
> From: Salil Mehta
> Date: Sun, 12 Aug 2018 10:47:34 +0100
>
> > Fixes: 9dba194574e3 ("{topost} net: hns3: fix for vlan table
> problem")
>
> This commit ID doesn't exist.
Thanks for catching this. This commit ID was from our internal branch
and ideally should have been from net-next - I should have caught this
earlier, sorry for this!
I have for now dropped this patch from the series as there is another
related patch(being referred in the Fixes string) that would need to
be merged with this patch before sending to net-next. Therefore, will
refloat this patch along with other related patch later in next cycle.
>
> Also, I really don't think the string "{topost}" would be in the commit
> header line.
Yes, this is stray and will be removed when this patch is sent next.
Thank you
Salil
[PATCH net-next 8/9] net: hns3: Fix for using wrong mask and shift in hclge_get_ring_chain_from_mbx
From: Fuyun Liang
HCLGE_INT_GL_IDX_M and HCLGE_INT_GL_IDX_S are used to set fireware
cmd. When getting int_gl value from mailbox message, we should use
HNAE3_RING_GL_IDX_M and HNAE3_RING_GL_IDX_S.
Fixes: 79eee4108541 ("net: hns3: add int_gl_idx setup for VF")
Signed-off-by: Fuyun Liang
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index 50ae2f8..9d36bcc 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -131,8 +131,8 @@ static int hclge_get_ring_chain_from_mbx(
hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, req->msg[3]);
ring_chain->tqp_index =
hclge_get_queue_id(vport->nic.kinfo.tqp[req->msg[4]]);
- hnae3_set_field(ring_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
- HCLGE_INT_GL_IDX_S,
+ hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
+ HNAE3_RING_GL_IDX_S,
req->msg[5]);
cur_chain = ring_chain;
@@ -151,8 +151,8 @@ static int hclge_get_ring_chain_from_mbx(
[req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i +
HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 1]]);
- hnae3_set_field(new_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
- HCLGE_INT_GL_IDX_S,
+ hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
+ HNAE3_RING_GL_IDX_S,
req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i +
HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 2]);
--
2.7.4
[PATCH net-next 8/9] net: hns3: Fix for using wrong mask and shift in hclge_get_ring_chain_from_mbx
From: Fuyun Liang
HCLGE_INT_GL_IDX_M and HCLGE_INT_GL_IDX_S are used to set fireware
cmd. When getting int_gl value from mailbox message, we should use
HNAE3_RING_GL_IDX_M and HNAE3_RING_GL_IDX_S.
Fixes: 79eee4108541 ("net: hns3: add int_gl_idx setup for VF")
Signed-off-by: Fuyun Liang
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index 50ae2f8..9d36bcc 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -131,8 +131,8 @@ static int hclge_get_ring_chain_from_mbx(
hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, req->msg[3]);
ring_chain->tqp_index =
hclge_get_queue_id(vport->nic.kinfo.tqp[req->msg[4]]);
- hnae3_set_field(ring_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
- HCLGE_INT_GL_IDX_S,
+ hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
+ HNAE3_RING_GL_IDX_S,
req->msg[5]);
cur_chain = ring_chain;
@@ -151,8 +151,8 @@ static int hclge_get_ring_chain_from_mbx(
[req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i +
HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 1]]);
- hnae3_set_field(new_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
- HCLGE_INT_GL_IDX_S,
+ hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
+ HNAE3_RING_GL_IDX_S,
req->msg[HCLGE_MBX_RING_NODE_VARIABLE_NUM * i +
HCLGE_MBX_RING_MAP_BASIC_MSG_NUM + 2]);
--
2.7.4
[PATCH net-next 02/12] net: hns3: Add support for tx_accept_tag2 and tx_accept_untag2 config
From: Peng Li <lipeng...@huawei.com>
HNS3 Hardware can support up to two VLAN tags in transmit leg, the PPP
module can handle the packets based on the tag1 and tag2 config. This
patch adds support for tag2 config for vlan handling
Signed-off-by: Peng Li <lipeng...@huawei.com>
Signed-off-by: Salil Mehta <salil.me...@huawei.com>
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 7 --
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 26 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 6 +++--
3 files changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index ee3cbac..3fa08f7 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -704,11 +704,14 @@ struct hclge_vlan_filter_vf_cfg_cmd {
u8 vf_bitmap[16];
};
-#define HCLGE_ACCEPT_TAG_B 0
-#define HCLGE_ACCEPT_UNTAG_B 1
+#define HCLGE_ACCEPT_TAG1_B0
+#define HCLGE_ACCEPT_UNTAG1_B 1
#define HCLGE_PORT_INS_TAG1_EN_B 2
#define HCLGE_PORT_INS_TAG2_EN_B 3
#define HCLGE_CFG_NIC_ROCE_SEL_B 4
+#define HCLGE_ACCEPT_TAG2_B5
+#define HCLGE_ACCEPT_UNTAG2_B 6
+
struct hclge_vport_vtag_tx_cfg_cmd {
u8 vport_vlan_cfg;
u8 vf_offset;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 2f0bbb6..c0b8d5a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -4687,10 +4687,14 @@ static int hclge_set_vlan_tx_offload_cfg(struct
hclge_vport *vport)
req = (struct hclge_vport_vtag_tx_cfg_cmd *)desc.data;
req->def_vlan_tag1 = cpu_to_le16(vcfg->default_tag1);
req->def_vlan_tag2 = cpu_to_le16(vcfg->default_tag2);
- hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG_B,
-vcfg->accept_tag ? 1 : 0);
- hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG_B,
-vcfg->accept_untag ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG1_B,
+ vcfg->accept_tag1 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG1_B,
+ vcfg->accept_untag1 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG2_B,
+ vcfg->accept_tag2 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG2_B,
+ vcfg->accept_untag2 ? 1 : 0);
hnae_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG1_EN_B,
vcfg->insert_tag1_en ? 1 : 0);
hnae_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG2_EN_B,
@@ -4814,8 +4818,18 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev)
for (i = 0; i < hdev->num_alloc_vport; i++) {
vport = >vport[i];
- vport->txvlan_cfg.accept_tag = true;
- vport->txvlan_cfg.accept_untag = true;
+ vport->txvlan_cfg.accept_tag1 = true;
+ vport->txvlan_cfg.accept_untag1 = true;
+
+ /* accept_tag2 and accept_untag2 are not supported on
+* pdev revision(0x20), new revision support them. The
+* value of this two fields will not return error when driver
+* send command to fireware in revision(0x20).
+* This two fields can not configured by user.
+*/
+ vport->txvlan_cfg.accept_tag2 = true;
+ vport->txvlan_cfg.accept_untag2 = true;
+
vport->txvlan_cfg.insert_tag1_en = false;
vport->txvlan_cfg.insert_tag2_en = false;
vport->txvlan_cfg.default_tag1 = 0;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
index 93177d9..677f1e4 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -570,8 +570,10 @@ struct hclge_dev {
/* VPort level vlan tag configuration for TX direction */
struct hclge_tx_vtag_cfg {
- bool accept_tag;/* Whether accept tagged packet from host */
- bool accept_untag; /* Whether accept untagged packet from host */
+ bool accept_tag1; /* Whether accept tag1 packet from host */
+ bool accept_untag1; /* Whether accept untag1 packet from host */
+ bool accept_tag2;
+ bool accept_untag2;
bool insert_tag1_en;/* Whether insert inner vlan tag */
bool insert_tag2_en;/* Whether insert outer vlan tag */
u16 default_tag1; /* The default inner vlan tag to insert */
--
2.7.4
[PATCH net-next 02/12] net: hns3: Add support for tx_accept_tag2 and tx_accept_untag2 config
From: Peng Li
HNS3 Hardware can support up to two VLAN tags in transmit leg, the PPP
module can handle the packets based on the tag1 and tag2 config. This
patch adds support for tag2 config for vlan handling
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 7 --
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 26 +-
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 6 +++--
3 files changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index ee3cbac..3fa08f7 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -704,11 +704,14 @@ struct hclge_vlan_filter_vf_cfg_cmd {
u8 vf_bitmap[16];
};
-#define HCLGE_ACCEPT_TAG_B 0
-#define HCLGE_ACCEPT_UNTAG_B 1
+#define HCLGE_ACCEPT_TAG1_B0
+#define HCLGE_ACCEPT_UNTAG1_B 1
#define HCLGE_PORT_INS_TAG1_EN_B 2
#define HCLGE_PORT_INS_TAG2_EN_B 3
#define HCLGE_CFG_NIC_ROCE_SEL_B 4
+#define HCLGE_ACCEPT_TAG2_B5
+#define HCLGE_ACCEPT_UNTAG2_B 6
+
struct hclge_vport_vtag_tx_cfg_cmd {
u8 vport_vlan_cfg;
u8 vf_offset;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 2f0bbb6..c0b8d5a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -4687,10 +4687,14 @@ static int hclge_set_vlan_tx_offload_cfg(struct
hclge_vport *vport)
req = (struct hclge_vport_vtag_tx_cfg_cmd *)desc.data;
req->def_vlan_tag1 = cpu_to_le16(vcfg->default_tag1);
req->def_vlan_tag2 = cpu_to_le16(vcfg->default_tag2);
- hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG_B,
-vcfg->accept_tag ? 1 : 0);
- hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG_B,
-vcfg->accept_untag ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG1_B,
+ vcfg->accept_tag1 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG1_B,
+ vcfg->accept_untag1 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_TAG2_B,
+ vcfg->accept_tag2 ? 1 : 0);
+ hnae_set_bit(req->vport_vlan_cfg, HCLGE_ACCEPT_UNTAG2_B,
+ vcfg->accept_untag2 ? 1 : 0);
hnae_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG1_EN_B,
vcfg->insert_tag1_en ? 1 : 0);
hnae_set_bit(req->vport_vlan_cfg, HCLGE_PORT_INS_TAG2_EN_B,
@@ -4814,8 +4818,18 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev)
for (i = 0; i < hdev->num_alloc_vport; i++) {
vport = >vport[i];
- vport->txvlan_cfg.accept_tag = true;
- vport->txvlan_cfg.accept_untag = true;
+ vport->txvlan_cfg.accept_tag1 = true;
+ vport->txvlan_cfg.accept_untag1 = true;
+
+ /* accept_tag2 and accept_untag2 are not supported on
+* pdev revision(0x20), new revision support them. The
+* value of this two fields will not return error when driver
+* send command to fireware in revision(0x20).
+* This two fields can not configured by user.
+*/
+ vport->txvlan_cfg.accept_tag2 = true;
+ vport->txvlan_cfg.accept_untag2 = true;
+
vport->txvlan_cfg.insert_tag1_en = false;
vport->txvlan_cfg.insert_tag2_en = false;
vport->txvlan_cfg.default_tag1 = 0;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
index 93177d9..677f1e4 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -570,8 +570,10 @@ struct hclge_dev {
/* VPort level vlan tag configuration for TX direction */
struct hclge_tx_vtag_cfg {
- bool accept_tag;/* Whether accept tagged packet from host */
- bool accept_untag; /* Whether accept untagged packet from host */
+ bool accept_tag1; /* Whether accept tag1 packet from host */
+ bool accept_untag1; /* Whether accept untag1 packet from host */
+ bool accept_tag2;
+ bool accept_untag2;
bool insert_tag1_en;/* Whether insert inner vlan tag */
bool insert_tag2_en;/* Whether insert outer vlan tag */
u16 default_tag1; /* The default inner vlan tag to insert */
--
2.7.4
[PATCH net-next 04/12] net: hns3: Add support to enable TX/RX promisc mode for H/W rev(0x21)
From: Peng Li <lipeng...@huawei.com>
HCLGE_PROMISC_TX_EN_B and HCLGE_PROMISC_RX_EN_B are not supported
on pdev revision(0x20), new revision(0x21) supports them.
Signed-off-by: Peng Li <lipeng...@huawei.com>
Signed-off-by: Salil Mehta <salil.me...@huawei.com>
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 2 ++
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 9 -
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 3fa08f7..e9be6aa 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -484,6 +484,8 @@ struct hclge_promisc_param {
u8 enable;
};
+#define HCLGE_PROMISC_TX_EN_B BIT(4)
+#define HCLGE_PROMISC_RX_EN_B BIT(5)
#define HCLGE_PROMISC_EN_B 1
#define HCLGE_PROMISC_EN_ALL 0x7
#define HCLGE_PROMISC_EN_UC0x1
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index c0b8d5a..8ad8f62 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3586,7 +3586,14 @@ int hclge_cmd_set_promisc_mode(struct hclge_dev *hdev,
req = (struct hclge_promisc_cfg_cmd *)desc.data;
req->vf_id = param->vf_id;
- req->flag = (param->enable << HCLGE_PROMISC_EN_B);
+
+ /* HCLGE_PROMISC_TX_EN_B and HCLGE_PROMISC_RX_EN_B are not supported on
+* pdev revision(0x20), new revision support them. The
+* value of this two fields will not return error when driver
+* send command to fireware in revision(0x20).
+*/
+ req->flag = (param->enable << HCLGE_PROMISC_EN_B) |
+ HCLGE_PROMISC_TX_EN_B | HCLGE_PROMISC_RX_EN_B;
ret = hclge_cmd_send(>hw, , 1);
if (ret) {
--
2.7.4
[PATCH net-next 04/12] net: hns3: Add support to enable TX/RX promisc mode for H/W rev(0x21)
From: Peng Li
HCLGE_PROMISC_TX_EN_B and HCLGE_PROMISC_RX_EN_B are not supported
on pdev revision(0x20), new revision(0x21) supports them.
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 2 ++
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 9 -
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index 3fa08f7..e9be6aa 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -484,6 +484,8 @@ struct hclge_promisc_param {
u8 enable;
};
+#define HCLGE_PROMISC_TX_EN_B BIT(4)
+#define HCLGE_PROMISC_RX_EN_B BIT(5)
#define HCLGE_PROMISC_EN_B 1
#define HCLGE_PROMISC_EN_ALL 0x7
#define HCLGE_PROMISC_EN_UC0x1
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index c0b8d5a..8ad8f62 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3586,7 +3586,14 @@ int hclge_cmd_set_promisc_mode(struct hclge_dev *hdev,
req = (struct hclge_promisc_cfg_cmd *)desc.data;
req->vf_id = param->vf_id;
- req->flag = (param->enable << HCLGE_PROMISC_EN_B);
+
+ /* HCLGE_PROMISC_TX_EN_B and HCLGE_PROMISC_RX_EN_B are not supported on
+* pdev revision(0x20), new revision support them. The
+* value of this two fields will not return error when driver
+* send command to fireware in revision(0x20).
+*/
+ req->flag = (param->enable << HCLGE_PROMISC_EN_B) |
+ HCLGE_PROMISC_TX_EN_B | HCLGE_PROMISC_RX_EN_B;
ret = hclge_cmd_send(>hw, , 1);
if (ret) {
--
2.7.4
[PATCH net-next 05/12] net: hns3: Fix for PF mailbox receving unknown message
From: Xi Wang <wangx...@huawei.com>
Before the firmware updates the crq's tail pointer, if the PF driver
reads the data in the crq, the data may be incomplete at this time,
which will lead to the driver read an unknown message.
This patch fixes it by checking if crq is not empty before reading the
message.
Fixes: c1a81619d73a ("net: hns3: Add mailbox interrupt handling to PF driver")
Signed-off-by: Xi Wang <wangx...@huawei.com>
Signed-off-by: Peng Li <lipeng...@huawei.com>
Signed-off-by: Salil Mehta <salil.me...@huawei.com>
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 23 +++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index b6ae26b..31f3d9a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -382,6 +382,13 @@ static void hclge_reset_vf(struct hclge_vport *vport,
hclge_func_reset_cmd(hdev, mbx_req->mbx_src_vfid);
}
+static bool hclge_cmd_crq_empty(struct hclge_hw *hw)
+{
+ u32 tail = hclge_read_dev(hw, HCLGE_NIC_CRQ_TAIL_REG);
+
+ return tail == hw->cmq.crq.next_to_use;
+}
+
void hclge_mbx_handler(struct hclge_dev *hdev)
{
struct hclge_cmq_ring *crq = >hw.cmq.crq;
@@ -390,12 +397,23 @@ void hclge_mbx_handler(struct hclge_dev *hdev)
struct hclge_desc *desc;
int ret, flag;
- flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
/* handle all the mailbox requests in the queue */
- while (hnae_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B)) {
+ while (!hclge_cmd_crq_empty(>hw)) {
desc = >desc[crq->next_to_use];
req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data;
+ flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
+ if (unlikely(!hnae_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) {
+ dev_warn(>pdev->dev,
+"dropped invalid mailbox message, code = %d\n",
+req->msg[0]);
+
+ /* dropping/not processing this invalid message */
+ crq->desc[crq->next_to_use].flag = 0;
+ hclge_mbx_ring_ptr_move_crq(crq);
+ continue;
+ }
+
vport = >vport[req->mbx_src_vfid];
switch (req->msg[0]) {
@@ -470,7 +488,6 @@ void hclge_mbx_handler(struct hclge_dev *hdev)
}
crq->desc[crq->next_to_use].flag = 0;
hclge_mbx_ring_ptr_move_crq(crq);
- flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
}
/* Write back CMDQ_RQ header pointer, M7 need this pointer */
--
2.7.4
[PATCH net-next 05/12] net: hns3: Fix for PF mailbox receving unknown message
From: Xi Wang
Before the firmware updates the crq's tail pointer, if the PF driver
reads the data in the crq, the data may be incomplete at this time,
which will lead to the driver read an unknown message.
This patch fixes it by checking if crq is not empty before reading the
message.
Fixes: c1a81619d73a ("net: hns3: Add mailbox interrupt handling to PF driver")
Signed-off-by: Xi Wang
Signed-off-by: Peng Li
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 23 +++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index b6ae26b..31f3d9a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -382,6 +382,13 @@ static void hclge_reset_vf(struct hclge_vport *vport,
hclge_func_reset_cmd(hdev, mbx_req->mbx_src_vfid);
}
+static bool hclge_cmd_crq_empty(struct hclge_hw *hw)
+{
+ u32 tail = hclge_read_dev(hw, HCLGE_NIC_CRQ_TAIL_REG);
+
+ return tail == hw->cmq.crq.next_to_use;
+}
+
void hclge_mbx_handler(struct hclge_dev *hdev)
{
struct hclge_cmq_ring *crq = >hw.cmq.crq;
@@ -390,12 +397,23 @@ void hclge_mbx_handler(struct hclge_dev *hdev)
struct hclge_desc *desc;
int ret, flag;
- flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
/* handle all the mailbox requests in the queue */
- while (hnae_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B)) {
+ while (!hclge_cmd_crq_empty(>hw)) {
desc = >desc[crq->next_to_use];
req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data;
+ flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
+ if (unlikely(!hnae_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) {
+ dev_warn(>pdev->dev,
+"dropped invalid mailbox message, code = %d\n",
+req->msg[0]);
+
+ /* dropping/not processing this invalid message */
+ crq->desc[crq->next_to_use].flag = 0;
+ hclge_mbx_ring_ptr_move_crq(crq);
+ continue;
+ }
+
vport = >vport[req->mbx_src_vfid];
switch (req->msg[0]) {
@@ -470,7 +488,6 @@ void hclge_mbx_handler(struct hclge_dev *hdev)
}
crq->desc[crq->next_to_use].flag = 0;
hclge_mbx_ring_ptr_move_crq(crq);
- flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
}
/* Write back CMDQ_RQ header pointer, M7 need this pointer */
--
2.7.4
[PATCH net-next 00/12] Misc. bug fixes & some minor additions to HNS3 driver
This patch-set provides some bug fixes figured out during testing and review. It also provides some additions due to running of the existing code on the new revision of the HNS3 hardware. Fuyun Liang (3): net: hns3: Fixes the init of the VALID BD info in the descriptor net: hns3: Removes unnecessary check when clearing TX/RX rings net: hns3: Clear TX/RX rings when stopping port & un-initializing client Jian Shen (2): net: hns3: Remove unused led control code net: hns3: Adds support for led locate command for copper port Lijun Ou (1): net: hns3: Fixes initalization of RoCE handle and makes it conditional Peng Li (5): net: hns3: Updates RX packet info fetch in case of multi BD net: hns3: Add support for tx_accept_tag2 and tx_accept_untag2 config net: hns3: Add STRP_TAGP field support for hardware revision 0x21 net: hns3: Add support to enable TX/RX promisc mode for H/W rev(0x21) net: hns3: Fixes the state to indicate client-type initialization Xi Wang (1): net: hns3: Fix for PF mailbox receving unknown message drivers/net/ethernet/hisilicon/hns3/hnae3.c| 49 +- drivers/net/ethernet/hisilicon/hns3/hnae3.h| 4 +- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c| 189 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.h| 4 + drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 4 + .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 22 +-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 179 --- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 8 +- .../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 23 ++- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 8 +- 10 files changed, 283 insertions(+), 207 deletions(-) -- 2.7.4
[PATCH net-next 00/12] Misc. bug fixes & some minor additions to HNS3 driver
This patch-set provides some bug fixes figured out during testing and review. It also provides some additions due to running of the existing code on the new revision of the HNS3 hardware. Fuyun Liang (3): net: hns3: Fixes the init of the VALID BD info in the descriptor net: hns3: Removes unnecessary check when clearing TX/RX rings net: hns3: Clear TX/RX rings when stopping port & un-initializing client Jian Shen (2): net: hns3: Remove unused led control code net: hns3: Adds support for led locate command for copper port Lijun Ou (1): net: hns3: Fixes initalization of RoCE handle and makes it conditional Peng Li (5): net: hns3: Updates RX packet info fetch in case of multi BD net: hns3: Add support for tx_accept_tag2 and tx_accept_untag2 config net: hns3: Add STRP_TAGP field support for hardware revision 0x21 net: hns3: Add support to enable TX/RX promisc mode for H/W rev(0x21) net: hns3: Fixes the state to indicate client-type initialization Xi Wang (1): net: hns3: Fix for PF mailbox receving unknown message drivers/net/ethernet/hisilicon/hns3/hnae3.c| 49 +- drivers/net/ethernet/hisilicon/hns3/hnae3.h| 4 +- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c| 189 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.h| 4 + drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 4 + .../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 22 +-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c| 179 --- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h| 8 +- .../net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 23 ++- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 8 +- 10 files changed, 283 insertions(+), 207 deletions(-) -- 2.7.4
[PATCH net-next 07/12] net: hns3: Fixes the init of the VALID BD info in the descriptor
From: Fuyun Liang <liangfuy...@huawei.com>
RX Buffer Descriptor contains a VALID bit which indicates if the BD
is valid and has some data. This field is set by HNS3 hardware to
intimate the driver of some valid data present in the BD. nd should
be reset by the driver when BD is being used again. In the existing
code this bit was not being (re-)initialized properly and hence was
causing problems.
Fixes: 76ad4f0ee747 ("net: hns3: Add support of HNS3 Ethernet Driver for hip08
SoC")
Signed-off-by: Fuyun Liang <liangfuy...@huawei.com>
Signed-off-by: Peng Li <lipeng...@huawei.com>
Signed-off-by: Salil Mehta <salil.me...@huawei.com>
---
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index 1bcb676..d1ef104 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -1819,6 +1819,7 @@ static void hns3_replace_buffer(struct hns3_enet_ring
*ring, int i,
hns3_unmap_buffer(ring, >desc_cb[i]);
ring->desc_cb[i] = *res_cb;
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
+ ring->desc[i].rx.bd_base_info = 0;
}
static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
@@ -1826,6 +1827,7 @@ static void hns3_reuse_buffer(struct hns3_enet_ring
*ring, int i)
ring->desc_cb[i].reuse_flag = 0;
ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
+ ring->desc_cb[i].page_offset);
+ ring->desc[i].rx.bd_base_info = 0;
}
static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
--
2.7.4
