when booting a CPU to
deal with stale information. This was previously done on the
allocation of the first VMID of a new generation.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
Test Results:
v4:
The measurement was made on a HiSilicon D06 platform with maxcpus set
From: Julien Grall
Some users of the ASID allocator (e.g VMID) may need to free any
resources if the initialization fail. So introduce a function that
allows freeing of any memory allocated by the ASID allocator.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64
From: Julien Grall
At the moment, the function kvm_get_vmid_bits() is looking up for the
sanitized value of ID_AA64MMFR1_EL1 and extract the information
regarding the number of VMID bits supported.
This is fine as the function is mainly used during VMID roll-over. New
use in a follow-up patch
is still valid.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/include/asm/lib_asid.h | 85
arch/arm64/lib/Makefile | 2 +
arch/arm64/lib/asid.c | 258 +
arch/arm64/mm/context.c | 310
Setting the reserved asid bits will vary depending on the actual
user of the ASID allocator. Introduce a new callback.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm
From: Julien Grall
Flushing the local context will vary depending on the actual user
of the ASID allocator. Introduce a new callback to flush the local
context and move the call to flush local TLB in it.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c
) have not been merged in a single function because we want to
avoid to add a branch in when the ASID is still valid. This will matter
when the code will be moved in separate file later on as 1) will reside
in the header as a static inline function.
Signed-off-by: Julien Grall
Signed-off-by: Shameer
From: Julien Grall
Move out the common initialization of the ASID allocator in a separate
function.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3-->v4
-dropped asid_per_ctxt and added pinned asid map init.
---
arch/arm64/mm/context.c |
Keep only the mm specific part in arm64_mm_context_get/put
and move the rest to generic functions.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 53 +++--
1 file changed, 35 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/mm/context.c
From: Julien Grall
At the moment ASID_FIRST_VERSION is used to know the number of ASIDs
supported. As we are going to move the ASID allocator to a separate file,
it would be better to use a different name for external users.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3
The Pinned ASID variables hold information for a given ASID
allocator. So move them to the structure asid_info.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/mm
please note that 'pinned' may
be NULL if the user doesn't require the pinned asid support.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3-->v4:
Changes related to Pinned ASID refcount.
---
arch/arm64/mm/context.c | 11 ++-
1 file changed, 6 insertions(+), 5 deleti
From: Julien Grall
The variables lock and tlb_flush_pending holds information for a given
ASID allocator. So move them to the asid_info structure.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 23 ---
1 file changed, 12
-by: Shameer Kolothum
---
v3-->v4
keep the this_cpu_ptr in fastpath. See c4885bbb3afe("arm64/mm: save
memory access in check_and_switch_context() fast switch path")
---
arch/arm64/mm/context.c | 32
1 file changed, 20 insertions(+), 12 deletions(-
-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 70 +
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 42e011094571..1fd40a42955c 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64
variables.
Note to avoid more renaming aftwards, a local variable 'info' has been
created and is a pointer to the ASID allocator structure.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3-->v4:
Move cur_idx into asid_info.
---
arch/arm64/mm/context.c |
MID allocation with the arm64 ASID one
Shameer Kolothum (3):
arm64/mm: Move Pinned ASID related variables to asid_info
arm64/mm: Split the arm64_mm_context_get/put
arm64/mm: Introduce a callback to set reserved bits
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/kvm_as
;)
Signed-off-by: Shameer Kolothum
---
v2 --> v3
-Removed iommu_ops from struct dev_iommu.
v1 --> v2:
-Added iommu_ops to struct dev_iommu based on the discussion with Robin.
-Rebased against iommu-tree core branch.
---
drivers/iommu/iommu.c | 24 +++-
1 file changed,
successfully associated with an iommu.
Fixes: a3a195929d40 ("iommu: Add APIs for multiple domains per device")
Signed-off-by: Shameer Kolothum
---
v1 --> v2:
-Added iommu_ops to struct dev_iommu based on the discussion with Robin.
-Rebased against iommu-tree core branch.
---
The device iommu probe/attach might have failed leaving dev->iommu
to NULL and device drivers may still invoke these functions resulting
a crash in iommu vendor driver code. Hence make sure we check that.
Signed-off-by: Shameer Kolothum
---
drivers/iommu/iommu.c | 8
1 file changed
all the irqs for both MSI and MSI-x cases.
Signed-off-by: Shameer Kolothum
---
It is unclear to me whether not performing the early activation of all
MSI irqs was deliberate and has consequences on any other platforms.
Please let me know.
Thanks,
Shameer
---
kernel/ir
the ICC_SRE_EL1.SRE bit to decide whether hardware supports GICv2
mode in addition to the above firmware based check.
Signed-off-by: Shameer Kolothum
---
On Hisilicon D06, UEFI sets the GIC MADT GICC gicv_base_address but the
GIC implementation on these boards doesn't have the GICv2 legacy support
.
To work around this, the current value of the counter
is read and used for delta calculations. OEM information
from ACPI header is used to identify the affected hardware
platforms.
Signed-off-by: Shameer Kolothum
Reviewed-by: Hanjun Guo
Reviewed-by: Robin Murphy
---
drivers/acpi/arm64/iort.c
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf
-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 776 ++
3 files changed, 786 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff -
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
Acked-by: Lorenzo
/IORT: Add support for PMCG
perf/smmuv3: Add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
perf/smmuv3: Add MSI irq support
perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk
drivers/acpi/arm64/iort.c | 131 +--
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile
u dev and named PMUs
to make the association visible to user.
- Added MSI support for overflow irq
[1]https://www.spinics.net/lists/arm-kernel/msg598591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
perf/smmuv3: Add
-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 781 ++
3 files changed, 791 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff --git a/drivers/perf/Kconf
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
---
drivers/acpi
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf
.
To work around this, the current value of the counter
is read and used for delta calculations. OEM information
from ACPI header is used to identify the affected hardware
platforms.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 16 ++-
drivers/perf
inter node accesses.
Apache Web server benchmarking using ab tool on a HiSilicon D06
board with multiple numa mem nodes shows Time per request and
Transfer rate improvements of ~3.6% with this patch.
Signed-off-by: Shanker Donthineni
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
inter node accesses.
Apache Web server benchmarking using ab tool on a HiSilicon D06
board with multiple numa mem nodes shows Time per request and
Transfer rate improvements of ~3.6% with this patch.
Signed-off-by: Shanker Donthineni
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 778 ++
3 files changed, 788 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff --git a/drivers/perf/Kconf
-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 778 ++
3 files changed, 788 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff --git a/drivers/perf/Kconf
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 97
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 97
to retrieve the associated smmu dev and named PMUs
to make the association visible to user.
- Added MSI support for overflow irq
[1]https://www.spinics.net/lists/arm-kernel/msg598591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum
to retrieve the associated smmu dev and named PMUs
to make the association visible to user.
- Added MSI support for overflow irq
[1]https://www.spinics.net/lists/arm-kernel/msg598591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
.
To work around this, the current value of the counter
is read and used for delta calculations. OEM information
from ACPI header is used to identify the affected hardware
platforms.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 30 +++---
drivers
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
.
To work around this, the current value of the counter
is read and used for delta calculations. OEM information
from ACPI header is used to identify the affected hardware
platforms.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 30 +++---
drivers
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 97
tml
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
perf/smmuv3: Add MSI irq support
perf/smmuv3_pmu: Enable HiSilicon Erratum 162001800 quirk
drivers/acpi/arm64/iort.c | 97 -
drivers/perf/Kconfig | 9 +
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 97
tml
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
perf/smmuv3: Add MSI irq support
perf/smmuv3_pmu: Enable HiSilicon Erratum 162001800 quirk
drivers/acpi/arm64/iort.c | 97 -
drivers/perf/Kconfig | 9 +
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
hardware platform.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 137 +++---
1 file changed, 130 insertions(+), 7 deletions(-)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index d927ef8..519545e 100644
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
hardware platform.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 137 +++---
1 file changed, 130 insertions(+), 7 deletions(-)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index d927ef8..519545e 100644
-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 778 ++
3 files changed, 788 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff --git a/drivers/perf/Kconf
-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 778 ++
3 files changed, 788 insertions(+)
create mode 100644 drivers/perf/arm_smmuv3_pmu.c
diff --git a/drivers/perf/Kconf
helper to retrieve the associated smmu dev and named PMUs
to make the association visible to user.
- Added MSI support for overflow irq
[1]https://www.spinics.net/lists/arm-kernel/msg598591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
S
helper to retrieve the associated smmu dev and named PMUs
to make the association visible to user.
- Added MSI support for overflow irq
[1]https://www.spinics.net/lists/arm-kernel/msg598591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
S
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
This adds support for MSI-based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c
index
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 78
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMUv3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 78
events.
SMMU events are not attributable to a CPU, so task mode and sampling
are not supported.
Signed-off-by: Neil Leeder
Signed-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 736
events.
SMMU events are not attributable to a CPU, so task mode and sampling
are not supported.
Signed-off-by: Neil Leeder
Signed-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 736
are not attributable to a CPU, so task mode and sampling
are not supported.
Signed-off-by: Neil Leeder
Signed-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 838 ++
3 files
This adds support for MSI based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 105 +-
1 file changed, 84 insertions(+), 21 deletions(-)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf
are not attributable to a CPU, so task mode and sampling
are not supported.
Signed-off-by: Neil Leeder
Signed-off-by: Shameer Kolothum
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 838 ++
3 files
This adds support for MSI based counter overflow interrupt.
Signed-off-by: Shameer Kolothum
---
drivers/perf/arm_smmuv3_pmu.c | 105 +-
1 file changed, 84 insertions(+), 21 deletions(-)
diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMU v3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 95
From: Neil Leeder
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMU v3 PMU driver.
Signed-off-by: Neil Leeder
Signed-off-by: Hanjun Guo
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 95
This adds an helper to retrieve the smmuv3 dev(if any) associated
with the PMCG node. This will be used in subsequent SMMUv3 PMU
driver patch to name the pmu device.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 84 ---
include/linux
This adds an helper to retrieve the smmuv3 dev(if any) associated
with the PMCG node. This will be used in subsequent SMMUv3 PMU
driver patch to name the pmu device.
Signed-off-by: Shameer Kolothum
---
drivers/acpi/arm64/iort.c | 84 ---
include/linux
591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
acpi: arm64: iort helper to find the associated smmu of pmcg node
perf/smmuv3: Add MSI irq support
drivers/acpi/arm64/iort.c | 179 +++--
drivers/perf/Kcon
591.html
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
Shameer Kolothum (2):
acpi: arm64: iort helper to find the associated smmu of pmcg node
perf/smmuv3: Add MSI irq support
drivers/acpi/arm64/iort.c | 179 +++--
drivers/perf/Kcon
eport only iommu specific reserved regions
to the user space.
Cc: Joerg Roedel <j...@8bytes.org>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
Reviewed-by: Robin Murphy <robin.mur...@arm.com>
---
drivers/iommu/dma-iommu.c | 54 ++-
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
eport only iommu specific reserved regions
to the user space.
Cc: Joerg Roedel
Signed-off-by: Shameer Kolothum
Reviewed-by: Robin Murphy
---
drivers/iommu/dma-iommu.c | 54 ++-
1 file changed, 25 insertions(+), 29 deletions(-)
diff --git a/drivers
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 183
ents to make iova list management logic more clear.
- Use of iova list copy so that original is not altered in
case of failure.
RFCv1 --> RFCv2
Addressed comments from Alex:
-Introduced IOVA list management and added checks for conflicts with
existing dma map entries during attach/detach.
Sha
ents to make iova list management logic more clear.
- Use of iova list copy so that original is not altered in
case of failure.
RFCv1 --> RFCv2
Addressed comments from Alex:
-Introduced IOVA list management and added checks for conflicts with
existing dma map entries during attach/detach.
Sha
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 91 +
1 file changed, 91
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/d
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 6fd6841
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/d
As we now already have the reserved regions list, just pass that into
vfio_iommu_has_sw_msi() fn.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 90 +
1
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 96
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
This retrieves the reserved regions associated with dev group and
checks for conflicts with any existing dma mappings. Also update
the iova list excluding the reserved regions.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 90 +
1
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/d
This checks and rejects any dma map request outside valid iova
range.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 25e6920
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
This introduces an iova list that is valid for dma mappings. Make
sure the new iommu aperture window doesn't conflict with the current
one or with any existing dma mappings during attach.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 183
eport only iommu specific reserved regions
to the user space.
Cc: Robin Murphy <robin.mur...@arm.com>
Cc: Joerg Roedel <j...@8bytes.org>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/iommu/dma-iommu.c | 54 ++-
eport only iommu specific reserved regions
to the user space.
Cc: Robin Murphy
Cc: Joerg Roedel
Signed-off-by: Shameer Kolothum
---
drivers/iommu/dma-iommu.c | 54 ++-
1 file changed, 25 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/dma
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_type1.
Get a copy of iova list on _group_detach and try to update the list.
On success replace the current one with the copy. Leave the list as
it is if update fails.
Signed-off-by: Shameer Kolothum
---
drivers/vfio/vfio_iommu_type1.c | 91 +
1 file changed, 91
ttach/detach.
Shameer Kolothum (2):
vfio/type1: Add IOVA range capability support
iommu/dma: Move PCI window region reservation back into dma specific
path.
Shameerali Kolothum Thodi (5):
vfio/type1: Introduce iova list and add iommu aperture validity check
vfio/type1: Check re
This allows the user-space to retrieve the supported IOVA
range(s), excluding any reserved regions. The implementation
is based on capability chains, added to VFIO_IOMMU_GET_INFO ioctl.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
drivers/vfio/vfio_iommu_t
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