[PATCH] PCI: Add AMD RV2 based APUs, such as 3015Ce, to D3hot to D3 quirk table.

2021-03-10 Thread Shirish S
From: Julian Schroeder This allows for an extra 10ms for the state transition. Currently only AMD PCO based APUs are covered by this table. WIP. Working on commit to kernel.org. Signed-off-by: Julian Schroeder --- drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git

[tip:ras/core] x86/MCE/AMD: Carve out the MC4_MISC thresholding quirk

2019-01-16 Thread tip-bot for Shirish S
Commit-ID: 30aa3d26edb0f3d7992757287eec0ca588a5c259 Gitweb: https://git.kernel.org/tip/30aa3d26edb0f3d7992757287eec0ca588a5c259 Author: Shirish S AuthorDate: Wed, 16 Jan 2019 15:10:40 + Committer: Borislav Petkov CommitDate: Wed, 16 Jan 2019 19:42:00 +0100 x86/MCE/AMD: Carve out

[tip:ras/core] x86/MCE/AMD: Turn off MC4_MISC thresholding on all family 0x15 models

2019-01-16 Thread tip-bot for Shirish S
Commit-ID: c95b323dcd3598dd7ef5005d6723c1ba3b801093 Gitweb: https://git.kernel.org/tip/c95b323dcd3598dd7ef5005d6723c1ba3b801093 Author: Shirish S AuthorDate: Thu, 10 Jan 2019 07:54:40 + Committer: Borislav Petkov CommitDate: Tue, 15 Jan 2019 18:11:38 +0100 x86/MCE/AMD: Turn off

[PATCH] tpm: Fix NULL pointer dereference in tpm_transmit()

2018-07-04 Thread Shirish S
7/0x17 ? _raw_spin_unlock+0xe/0x20 ? iput+0x87/0x1bd do_syscall_64+0x64/0x72 entry_SYSCALL_64_after_hwframe+0x3d/0xa2 Signed-off-by: Shirish S --- drivers/char/tpm/tpm-interface.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index e

[PATCH] tpm: Fix NULL pointer dereference in tpm_transmit()

2018-07-04 Thread Shirish S
7/0x17 ? _raw_spin_unlock+0xe/0x20 ? iput+0x87/0x1bd do_syscall_64+0x64/0x72 entry_SYSCALL_64_after_hwframe+0x3d/0xa2 Signed-off-by: Shirish S --- drivers/char/tpm/tpm-interface.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index e