-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
Reviewed-by: Sylwester Nawrocki
-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
On 14.04.2021 22:33, Krzysztof Kozlowski wrote:
Use of_device_get_match_data() to make the code slightly smaller and to
remove the of_device_id table forward declaration.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
On 15.04.2021 11:38, Krzysztof Kozlowski wrote:
Use of_device_get_match_data() to make the code slightly smaller.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
and safer.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
On 15.04.2021 10:44, Krzysztof Kozlowski wrote:
Use of_device_get_match_data() to make the code slightly smaller and to
remove the of_device_id table forward declaration.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
On 14.04.2021 17:25, Krzysztof Kozlowski wrote:
On 14/04/2021 17:12, Krzysztof Kozlowski wrote:
The driver can be matched by legacy platform way or OF-device matching.
In the first case, of_match_node() can return NULL, which immediately
would be dereferenced to get the match data.
immediately after bitwise operation it will be
>cast to 32-bit value when calling writel(),
> 2. is actually error-prone because it might promote other operands to
>64-bit.
>
> Addresses-Coverity: Unintentional integer overflow
> Signed-off-by: Krzysztof Kozlowski
R
On 08.04.2021 18:21, Krzysztof Kozlowski wrote:
> On 08/04/2021 15:48, Chen Hui wrote:
>> There is error message within devm_ioremap_resource
>> already, so remove the dev_err calls to avoid redundant
>> error messages.
>>
>> Signed-off-by: Chen Hui
>> ---
>>
On 24.10.2020 17:43, Paweł Chmiel wrote:
This clock must be always enabled to allow access to any registers in
fsys1 CMU. Until proper solution based on runtime PM is applied
(similar to what was done for Exynos5433), mark that clock as critical
so it won't be disabled.
It was observed on
On 09.02.2021 08:48, Stephen Boyd wrote:
> Quoting (2021-01-31 09:04:28)
>> This clock must be always enabled to allow access to any registers in
>> fsys1 CMU. Until proper solution based on runtime PM is applied
>> (similar to what was done for Exynos5433), fix this by calling
>>
---
Changes from v2:
- Avoid __clk_lookup() call when enabling clock
Changes from v1:
- Instead of marking clock as critical, enable it manually in driver.
Acked-by: Sylwester Nawrocki
xt
Acked-by: Sylwester Nawrocki
)
|^
Mark them as __maybe_unused to shut up the otherwise harmless warning.
Fixes: 9484f2cb8332 ("clk: samsung: exynos-clkout: convert to module
driver")
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Arnd Bergmann
---
v2: add proper changelog text
Acked-by: Sylwester Nawrocki
On 11/22/20 16:16, Krzysztof Kozlowski wrote:
On Fri, Nov 20, 2020 at 04:57:31PM +0100, Sylwester Nawrocki wrote:
The PLL status polling loops in the set_rate callbacks of some PLLs
have no timeout detection and may become endless loops when something
goes wrong with the PLL.
For some PLLs
On 11/22/20 12:34, Krzysztof Kozlowski wrote:
> On Fri, Nov 20, 2020 at 05:36:35PM +0100, Sylwester Nawrocki wrote:
>> On 11/19/20 17:45, Krzysztof Kozlowski wrote:
>>> So far all Exynos, S3C64xx and S5Pv210 clock units were selected by
>>> respective SOC/ARCH Kconfig
On 11/20/20 17:16, Krzysztof Kozlowski wrote:
of_match_device() already handles properly !CONFIG_OF case, so passing
the argument via of_match_ptr() is not needed.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
on x86_64):
sound/soc/samsung/smdk_wm8994.c:139:34: warning: ‘samsung_wm8994_of_match’
defined but not used [-Wunused-const-variable=]
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
: ‘i2sv7_dai_type’ defined but not
used [-Wunused-const-variable=]
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
pile testing was not possible in such case as Makefile object
> depent on SOC/ARCH option.
"objects depend" or "object depends" ?
> Add separate Kconfig options for each of them to be able to compile
> test.
>
> Signed-off-by: Krzysztof Kozlowski
The patch look good to me,
* LOCK_FACTOR / VCO_freq
For the ktime API use cases a common timeout value of 20 ms is applied
for all the PLLs with an assumption that maximum possible value of Pdiv
is 64, maximum possible LOCK_FACTOR value is 3000 and minimum VCO
frequency is 24 MHz.
Signed-off-by: Sylwester Nawrocki
---
I'm not sure
Hi Georgi, Chanwoo,
On 13.11.2020 10:07, Chanwoo Choi wrote:
> On 11/13/20 5:48 PM, Georgi Djakov wrote:
>> On 11/12/20 16:09, Sylwester Nawrocki wrote:
[...]
>>
>> Good work Sylwester! Thank you and all the reviewers! What would be the merge
>> path fo
sztof Kozlowski
This needs to go through your tree due to dependencies on your previous
patches, so
Acked-by: Sylwester Nawrocki
> ---
> drivers/clk/samsung/Kconfig | 10 ++
> drivers/clk/samsung/Makefile| 2 +-
> drivers/clk/samsung/clk-exynos-
.
Acked-by: Krzysztof Kozlowski
Acked-by: Chanwoo Choi
Signed-off-by: Sylwester Nawrocki
---
Changes for v9:
- whitespace (indentation) corrections.
Changes for v8...v6:
- none.
Changes for v5:
- new patch.
---
drivers/devfreq/exynos-bus.c | 17 +
1 file changed, 17
-by: Chanwoo Choi
Tested-by: Chanwoo Choi
Co-developed-by: Artur Świgoń
Signed-off-by: Artur Świgoń
Co-developed-by: Marek Szyprowski
Signed-off-by: Marek Szyprowski
Signed-off-by: Sylwester Nawrocki
---
Changes for v9:
- whitespace cleanup,
- Co-developed-by/Signed-off-by tags corrections
before its children.
Reviewed-by: Chanwoo Choi
Tested-by: Chanwoo Choi
Acked-by: Krzysztof Kozlowski
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v9:
- Makefile and Kconfig fixes/improvements.
Changes for v8:
- renamed drivers/interconnect/exynos to drivers/in
.
Acked-by: Krzysztof Kozlowski
Acked-by: Chanwoo Choi
Tested-by: Chanwoo Choi
Acked-by: Rob Herring
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v9:
- added Ack tags
Changes for v8:
- updated description of the interconnects property,
- fixed typo in samsung
Add maintainers entry for the Samsung SoC interconnect drivers, this
currently includes the Exynos generic interconnect driver.
Reviewed-by: Chanwoo Choi
Signed-off-by: Sylwester Nawrocki
---
Changes for v9:
- add linux-samsung-soc ML,
- fixed Artur's last name spelling,
- whole entry moved
https://patchwork.kernel.org/cover/11152595/ (v2 of this RFC)
Sylwester Nawrocki (5):
dt-bindings: devfreq: Add documentation for the interconnect
properties
interconnect: Add generic interconnect driver for Exynos SoCs
MAINTAINERS: Add entry for Samsung interconnect drivers
PM / de
* LOCK_FACTOR / VCO_freq
For the ktime API use cases a common timeout value of 20 ms is applied
for all the PLLs with an assumption that maximum possible value of Pdiv
is 64, maximum possible LOCK_FACTOR value is 3000 and minimum VCO
frequency is 24 MHz.
Signed-off-by: Sylwester Nawrocki
---
I'm not sure
On 11/9/20 13:32, Sylwester Nawrocki wrote:
-8<
diff --git a/drivers/clk/samsung/clk-exynos7.c
b/drivers/clk/samsung/clk-exynos7.c
index 87ee1ba..9ecf498 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -570,7 +570
Hi Paweł,
On 11/7/20 13:14, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock
On 04.11.2020 13:27, Krzysztof Kozlowski wrote:
> On Wed, Nov 04, 2020 at 11:36:53AM +0100, Sylwester Nawrocki wrote:
>> Add maintainers entry for the Samsung interconnect drivers, this currently
>> includes Exynos SoC generic interconnect driver.
>>
>> Signed-off-by: S
On 04.11.2020 13:37, Krzysztof Kozlowski wrote:
> On Wed, Nov 04, 2020 at 11:36:52AM +0100, Sylwester Nawrocki wrote:
>> diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile
>> index d203520..c2f9e9d 100644
>> --- a/drivers/interconnect/Makefile
>>
Add maintainers entry for the Samsung interconnect drivers, this currently
includes Exynos SoC generic interconnect driver.
Signed-off-by: Sylwester Nawrocki
---
Changes since v7:
- new patch.
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
-by: Artur Świgoń
Signed-off-by: Marek Szyprowski
Signed-off-by: Sylwester Nawrocki
---
Changes for v8:
- updated comment in mixer_probe()
Changes for v7:
- fixed incorrect setting of the ICC bandwidth when the mixer is
disabled, now the bandwidth is set explicitly to 0 in such case.
Changes
to specify minimum data clock
frequency corresponding to requested bandwidth for each bus.
Note that #interconnect-cells is always zero and node IDs are not
hardcoded anywhere.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v8:
- none.
Changes for v7
.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v8:
- updated description of the interconnects property,
- fixed typo in samsung,data-clk-ratio property description.
Changes for v7:
- bus-width property replaced with samsung,data-clock-ratio,
- the interconnect
() with a NULL name simply
returns the right path.
Reviewed-by: Chanwoo Choi
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v8...v5:
- none.
---
arch/arm/boot/dts/exynos4412.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/exynos4412.dtsi
b/arch
1054417/ (v1 of this RFC)
[6] https://patchwork.kernel.org/cover/11152595/ (v2 of this RFC)
Artur Świgoń (1):
ARM: dts: exynos: Add interconnects to Exynos4412 mixer
Sylwester Nawrocki (6):
dt-bindings: devfreq: Add documentation for the interconnect
properties
interconnect: Add generic
before its children.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v8:
- renamed drivers/interconnect/exynos to drivers/interconnect/samsung,
- added missing driver sync_state callback assignment.
Changes for v7:
- adjusted to the DT property changes: "interco
.
Acked-by: Krzysztof Kozlowski
Acked-by: Chanwoo Choi
Signed-off-by: Sylwester Nawrocki
---
Changes for v8, v7, v6:
- none.
Changes for v5:
- new patch.
---
drivers/devfreq/exynos-bus.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/devfreq/exynos-bus.c b
On 03.11.2020 15:12, Chanwoo Choi wrote:
>>> I have a question about exynos_icc_get_parent().
>>> As I checked, this function returns the only one icc_node
>>> as parent node. But, bus_display dt node in the exynos4412.dtsi
>>> specifies the two interconnect node as following with bus_leftbus,
Hi Chanwoo,
On 03.11.2020 11:45, Chanwoo Choi wrote:
> On 10/30/20 9:51 PM, Sylwester Nawrocki wrote:
>> This patch adds registration of a child platform device for the exynos
>> interconnect driver. It is assumed that the interconnect provider will
>> only be needed whe
On 03.11.2020 10:37, Chanwoo Choi wrote:
> On 10/30/20 9:51 PM, Sylwester Nawrocki wrote:
>> This patch adds a generic interconnect driver for Exynos SoCs in order
>> to provide interconnect functionality for each "samsung,exynos-bus"
>> compatible device.
&g
Hi Chanwoo, Georgi
On 03.11.2020 09:53, Chanwoo Choi wrote:
> On 11/3/20 5:29 PM, Georgi Djakov wrote:
>> On 11/3/20 09:54, Chanwoo Choi wrote:
>>> When I tested this patchset on Odroid-U3,
>>> After setting 0 bps by interconnect[1][2],
>>> the frequency of devfreq devs sustain the high
On 31.10.2020 13:47, Krzysztof Kozlowski wrote:
>> @@ -1223,19 +1330,33 @@ static int mixer_probe(struct platform_device *pdev)
>> struct device *dev = >dev;
>> const struct mixer_drv_data *drv;
>> struct mixer_context *ctx;
>> +struct icc_path *path;
>> int ret;
>>
>> +
On 31.10.2020 13:17, Krzysztof Kozlowski wrote:
> On Fri, Oct 30, 2020 at 01:51:45PM +0100, Sylwester Nawrocki wrote:
>> This patch adds a generic interconnect driver for Exynos SoCs in order
>> to provide interconnect functionality for each "samsung,exynos-bus"
>>
From: Artur Świgoń
This patch adds an 'interconnects' property to Exynos4412 DTS in order to
declare the interconnect path used by the mixer. Please note that the
'interconnect-names' property is not needed when there is only one path in
'interconnects', in which case calling of_icc_get() with a
to specify minimum data clock
frequency corresponding to requested bandwidth for each bus.
Note that #interconnect-cells is always zero and node IDs are not
hardcoded anywhere.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v7:
- adjusted to the DT property
-by: Marek Szyprowski
Signed-off-by: Sylwester Nawrocki
---
Changes for v7:
- fixed incorrect setting of the ICC bandwidth when the mixer is
disabled, now the bandwidth is set explicitly to 0 in such case.
Changes for v6:
- the icc_set_bw() call is now only done when calculated value
.
Signed-off-by: Sylwester Nawrocki
---
Changes for v7, v6:
- none.
Changes for v5:
- new patch.
---
drivers/devfreq/exynos-bus.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 1e684a4..ee300ee 100644
C)
[6] https://patchwork.kernel.org/cover/11152595/ (v2 of this RFC)
Artur Świgoń (1):
ARM: dts: exynos: Add interconnects to Exynos4412 mixer
Sylwester Nawrocki (5):
dt-bindings: devfreq: Add documentation for the interconnect
properties
interconnect: Add generic interconnect driver for
.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylwester Nawrocki
---
Changes for v7:
- bus-width property replaced with samsung,data-clock-ratio,
- the interconnect consumer bindings used instead of vendor specific
properties
Changes for v6:
- added dts example of bus hierarchy definition
lease note
that it is not an error when CONFIG_INTERCONNECT is 'n', in which
case all interconnect API functions are no-op.
The bus-width DT property is to determine the interconnect data
width and traslate requested bandwidth to clock frequency for each
bus.
Signed-off-by: Artur Świgoń
Signed-off-by: Sylweste
Hi Georgi,
On 15.09.2020 23:40, Georgi Djakov wrote:
> On 9/9/20 17:47, Sylwester Nawrocki wrote:
>> On 09.09.2020 11:07, Georgi Djakov wrote:
>>> On 8/28/20 17:49, Sylwester Nawrocki wrote:
>>>> On 30.07.2020 14:28, Sylwester Nawrocki wrote:
>>>&g
lar module.
This removes specific probe ordering and adds support for probe
deferral.
The patch looks good to me, I have tested it on Trats2, where CLKOUT
provides master clock for the audio codec.
Tested-by: Sylwester Nawrocki
With the debug print removed feel free to apply it through your tree
the audio codec.
Reviewed-by: Sylwester Nawrocki
Tested-by: Sylwester Nawrocki
> @@ -128,6 +134,11 @@ static int exynos_pmu_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, pmu_context);
>
> + ret = devm_mfd_add_devices
On 15.09.2020 13:34, Sylwester Nawrocki wrote:
> On 14.08.2020 02:46, Chanwoo Choi wrote:
>> On 8/13/20 6:55 PM, Sylwester Nawrocki wrote:
>>> In the .set_rate callback for some PLLs there is a loop polling state
>>> of the PLL lock bit and it may become an endless l
On 11.08.2020 17:12, Sylwester Nawrocki wrote:
> This patch adds a clk ID to the mout_sw_aclk_g3d clk definition so related
> clk pointer gets cached in the driver's private data and can be used
> later instead of a __clk_lookup() call.
>
> With that we have
On 26.08.2020 19:15, Sylwester Nawrocki wrote:
> Add clock ID definitions for the CPU parent clocks for SoCs
> which don't have such definitions yet. This will allow us to
> reference the parent clocks directly by cached struct clk_hw
> pointers in the clock provider, rather than doin
On 26.08.2020 19:15, Sylwester Nawrocki wrote:
> Use non-zero clock IDs in definitions of the CPU parent clocks
> for exynos5420, exynos5250 SoCs. This will allow us to reference
> the parent clocks directly in the driver by cached struct clk_hw
> pointers, rather than doing clk lo
On 26.08.2020 19:15, Sylwester Nawrocki wrote:
> For the CPU clock registration two parent clocks are required, these
> are now being passed as struct clk_hw pointers, rather than by the
> global scope names. That allows us to avoid __clk_lookup() calls
> and simplifies a bit t
On 11.08.2020 17:12, Sylwester Nawrocki wrote:
> This patch adds ID for the mout_sw_aclk_g3d (SW_CLKMUX_ACLK_G3D) clock,
> mostly for internal use in the CMU driver. It will allow to avoid the
> __clk_lookup() call when setting up the clock during the clock provider
> initialization.
On 14.08.2020 02:46, Chanwoo Choi wrote:
> On 8/13/20 6:55 PM, Sylwester Nawrocki wrote:
>> In the .set_rate callback for some PLLs there is a loop polling state
>> of the PLL lock bit and it may become an endless loop when something
>> goes wrong with the PLL. For some PLLs
Hi Georgi,
On 09.09.2020 11:07, Georgi Djakov wrote:
> On 8/28/20 17:49, Sylwester Nawrocki wrote:
>> On 30.07.2020 14:28, Sylwester Nawrocki wrote:
>>> On 09.07.2020 23:04, Rob Herring wrote:
>>>> On Thu, Jul 02, 2020 at 06:37:19PM +0200, Sylwester Nawrocki wrote:
&
On 9/8/20 08:53, Krzysztof Kozlowski wrote:
On Mon, Sep 07, 2020 at 04:55:26PM -0700, Jonathan Bakker wrote:
Sadly, this is causing issues for me. The machine driver is no longer probing
correctly
on the Galaxy S.
The failing call in sound/soc/samsung/aries_wm8994.c is
/* Set CPU
On 06.09.2020 14:44, Krzysztof Kozlowski wrote:
>>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
>>> b/arch/arm/boot/dts/exynos3250.dtsi
>>> index a1e93fb7f694..89b160280469 100644
>>> --- a/arch/arm/boot/dts/exynos3250.dtsi
>>> +++ b/arch/arm/boot/dts/exynos3250.dtsi
>>> @@ -214,6 +214,7 @@
have 'clocks' property. Instead we could move the assigned-clock*
properties to the I2S node, as in below patch. I have tested that already
on xu3.
--8<---
>From f98d2f5ac86d1ae13a77ef481fcbf073a1740f26 Mon Sep 17 00:00:00 2001
From:
On 9/3/20 10:45, Lukasz Stelmach wrote:
> It was <2020-09-02 śro 10:14>, when Sylwester Nawrocki wrote:
>> On 9/1/20 17:21, Lukasz Stelmach wrote:
>>> It was <2020-08-25 wto 21:06>, when Sylwester Nawrocki wrote:
>>>> On 8/21/20 18:13, Łukasz
On 02.09.2020 18:14, Krzysztof Kozlowski wrote:
> The Samsung Exynos System Registers (Sysreg) bindings are quite simple -
> just additional compatible to the syscon. They do not have any value so
> merge them into generic MFD syscon bindings.
>
> Suggested-by: Sylwester Nawrock
On 9/1/20 17:21, Lukasz Stelmach wrote:
It was <2020-08-25 wto 21:06>, when Sylwester Nawrocki wrote:
On 8/21/20 18:13, Łukasz Stelmach wrote:
Check return values in prepare_dma() and s3c64xx_spi_config() and
propagate errors upwards.
Signed-off-by: Łukasz Stelmach
---
drivers/s
i:0:1:
> missing phandle tag in 0
> arch/arm/boot/dts/exynos4412-trats2.dt.yaml: sound: cpu:sound-dai:0: [158,
> 0] is too long
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
arents', 'assigned-clock-rates', 'assigned-clocks' do
> not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
On 31.08.2020 12:42, Krzysztof Kozlowski wrote:
> On Mon, 31 Aug 2020 at 12:35, Sylwester Nawrocki wrote:
>> On 8/31/20 10:38, Krzysztof Kozlowski wrote:
>>> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski
>>> wrote:
>>>> On 30.08.2020 15:51, Krzysztof Kozl
valid under any of the given schemas
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
ot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'scl-gpios'
> is a required property
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
are not allowed ('power-domains', '#address-cells',
> 'interrupts', '#size-cells' were unexpected)
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
- samsung,exynos5-sysreg
> + - samsung,exynos5433-sysreg
Reviewed-by: Sylwester Nawrocki
Do you also have a patch updating Documentation/devicetree/
bindings/arm/samsung/sysreg.yaml with new compatibles?
--
Regards,
Sylwester
o not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
'opp_table' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
'assigned-clock-parents', 'assigned-clocks' do not match any of the
> regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Sylwester Nawrocki
Hi,
On 8/31/20 10:38, Krzysztof Kozlowski wrote:
> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski
> wrote:
>> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
>>> The camera's pinctrl configuration is simply empty and not effective.
>>> Remove it to fix dtbs_check warning:
>>>
>>>
On 30.07.2020 14:28, Sylwester Nawrocki wrote:
> On 09.07.2020 23:04, Rob Herring wrote:
>> On Thu, Jul 02, 2020 at 06:37:19PM +0200, Sylwester Nawrocki wrote:
>>> Add documentation for new optional properties in the exynos bus nodes:
>>> samsung,interconnect-parent, #in
On 28.08.2020 08:48, Krzysztof Kozlowski wrote:
>> diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
>> index b3ba053..fc9ea19 100644
>> --- a/sound/soc/codecs/wm8994.c
>> +++ b/sound/soc/codecs/wm8994.c
>> @@ -3514,6 +3514,8 @@ int wm8994_mic_detect(struct snd_soc_component
>>
are updated as expected.
This suppresses an error during boot
"wm8994-codec: ASoC: error at snd_soc_component_update_bits on wm8994-codec"
caused by the regmap access error due to the cache_only flag being set.
Signed-off-by: Sylwester Nawrocki
---
sound/soc/codecs/wm8994.c | 8
1 fi
The WM8994_MICBIAS register is not available in the WM1811 CODEC so skip
initialization of that register for that device.
This suppresses an error during boot:
"wm8994-codec: ASoC: error at snd_soc_component_update_bits on wm8994-codec"
Signed-off-by: Sylwester Nawrocki
---
sound/
keyword in the function declaration.
Signed-off-by: Sylwester Nawrocki
---
drivers/clk/samsung/clk-cpu.c| 37 +++-
drivers/clk/samsung/clk-cpu.h| 6 +++---
drivers/clk/samsung/clk-exynos3250.c | 6 --
drivers/clk/samsung/clk-exynos4.c| 7
Use non-zero clock IDs in definitions of the CPU parent clocks
for exynos5420, exynos5250 SoCs. This will allow us to reference
the parent clocks directly in the driver by cached struct clk_hw
pointers, rather than doing clk lookup by name.
Signed-off-by: Sylwester Nawrocki
---
drivers/clk
Add clock ID definitions for the CPU parent clocks for SoCs
which don't have such definitions yet. This will allow us to
reference the parent clocks directly by cached struct clk_hw
pointers in the clock provider, rather than doing clk lookup
by name.
Signed-off-by: Sylwester Nawrocki
On 8/21/20 18:13, Łukasz Stelmach wrote:
Check return values in prepare_dma() and s3c64xx_spi_config() and
propagate errors upwards.
Signed-off-by: Łukasz Stelmach
---
drivers/spi/spi-s3c64xx.c | 47 ---
1 file changed, 39 insertions(+), 8 deletions(-)
value of Pdiv is 64, maximum possible LOCK_FACTOR
value is 3000 and minimum VCO frequency is 24 MHz.
Signed-off-by: Sylwester Nawrocki
---
Changes for v3:
- use busy-loop with udelay() instead of ktime API
Changes for v2:
- use common readl_relaxed_poll_timeout_atomic() macro
---
drivers/clk
On 11.08.2020 18:53, Tomasz Figa wrote:
> Yeah... I should've thought about this. Interestingly enough, some of
> the existing implementations in drivers/clk/samsung/clk-pll.c use the
> ktime API. I guess they are lucky enough not to be called too early,
> i.e. are not needed for the
Hi Tomasz,
On 11.08.2020 14:59, Tomasz Figa wrote:
> 2020年8月11日(火) 13:25 Sylwester Nawrocki :
>>
>> In the .set_rate callback for some PLLs there is a loop polling state
>> of the PLL lock bit and it may become an endless loop when something
>> goes wrong
This patch adds ID for the mout_sw_aclk_g3d (SW_CLKMUX_ACLK_G3D) clock,
mostly for internal use in the CMU driver. It will allow to avoid the
__clk_lookup() call when setting up the clock during the clock provider
initialization.
Signed-off-by: Sylwester Nawrocki
---
include/dt-bindings/clock
in clk_data.hws[] and we can reference
the clk pointers directly rather than using __clk_lookup() with global names.
Signed-off-by: Sylwester Nawrocki
---
Changes for v2:
- added missing part of the patch lost during rebase of the previous version
---
drivers/clk/samsung/clk-exynos5420.c | 10
in clk_data.hws[] and we can reference
the clk pointers directly rather than using __clk_lookup() with global names.
Signed-off-by: Sylwester Nawrocki
---
Depends on patch:
[PATCH v2] clk: samsung: Keep top BPLL mux on Exynos542x enabled
drivers/clk/samsung/clk-exynos5420.c | 9 +
1 file
This patch adds ID for the mout_sw_aclk_g3d (SW_CLKMUX_ACLK_G3D) clock,
mostly for internal use in the CMU driver. It will allow to avoid the
__clk_lookup() call when setting up the clock during the clock provider
initialization.
Signed-off-by: Sylwester Nawrocki
---
include/dt-bindings/clock
in the code and to avoid the object
code size increase due to inlining.
Signed-off-by: Sylwester Nawrocki
---
Changes for v2:
- use common readl_relaxed_poll_timeout_atomic() macro
---
drivers/clk/samsung/clk-pll.c | 92 +++
1 file changed, 32 insertions(+), 60
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