[PATCH v1 0/2] coresight: Add support for device names

2021-04-16 Thread Tao Zhang
This series add support for coresight device name. In this way,
nodes with specific names can be generated under sysfs, not just
names with prefixes and index numbers. The coresight device can
be quickly identified by the coresight names of sysfs nodes. This
also allows using same names for CoreSight devices across different
targets. This makes it easy to develop common scripts, which can
be run across targets. Meanwhile, the script can use the same
device name to control the same coresight device.

This series patches base on coresight-next repo
http://git.linaro.org/kernel/coresight.git/log/?h=next

Tao Zhang (2):
  coresight: Add support for device names
  dt-bindings: arm: add property for coresight component name

 Documentation/devicetree/bindings/arm/coresight.txt | 2 ++
 drivers/hwtracing/coresight/coresight-core.c| 6 ++
 2 files changed, 8 insertions(+)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH v1 2/2] dt-bindings: arm: add property for coresight component name

2021-04-16 Thread Tao Zhang
Add property "coresight-name" for coresight component name. This
allows coresight driver to read device name from device entries.

Signed-off-by: Tao Zhang 
---
 Documentation/devicetree/bindings/arm/coresight.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt 
b/Documentation/devicetree/bindings/arm/coresight.txt
index d711676..0e980ce 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -103,6 +103,8 @@ its hardware characteristcs.
  powers down the coresight component also powers down and loses its
  context. This property is currently only used for the ETM 4.x driver.
 
+   * coresight-name: the name of the coresight devices.
+
 * Optional properties for ETM/PTMs:
 
* arm,cp14: must be present if the system accesses ETM/PTM management
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH v1 1/2] coresight: Add support for device names

2021-04-16 Thread Tao Zhang
Add support to read device names from device tree entries. Before
the previous process of allocating coresight device name, try to
read the coresight device name from device tree entries. If it is
read, the device name will be returned directly. If it is not read,
the original allocation name process will be followed.

Signed-off-by: Tingwei Zhang 
Signed-off-by: Tao Zhang 
---
 drivers/hwtracing/coresight/coresight-core.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-core.c 
b/drivers/hwtracing/coresight/coresight-core.c
index 4ba801d..b79c726 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -1640,6 +1640,12 @@ char *coresight_alloc_device_name(struct 
coresight_dev_list *dict,
int idx;
char *name = NULL;
struct fwnode_handle **list;
+   struct device_node *node = dev->of_node;
+
+   if (!node) {
+   if (!of_property_read_string(node, "coresight-name", ))
+   return name;
+   }
 
mutex_lock(_mutex);
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH v1 1/2] coresight: Add support for device names

2021-04-16 Thread Tao Zhang
Add support to read device names from device tree entries. Before
the previous process of allocating coresight device name, try to
read the coresight device name from device tree entries. If it is
read, the device name will be returned directly. If it is not read,
the original allocation name process will be followed.

Signed-off-by: Tingwei Zhang 
Signed-off-by: Tao Zhang 
---
 drivers/hwtracing/coresight/coresight-core.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-core.c 
b/drivers/hwtracing/coresight/coresight-core.c
index 4ba801d..b79c726 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -1640,6 +1640,12 @@ char *coresight_alloc_device_name(struct 
coresight_dev_list *dict,
int idx;
char *name = NULL;
struct fwnode_handle **list;
+   struct device_node *node = dev->of_node;
+
+   if (!node) {
+   if (!of_property_read_string(node, "coresight-name", ))
+   return name;
+   }
 
mutex_lock(_mutex);
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH v1 2/2] dt-bindings: arm: add property for coresight component name

2021-04-16 Thread Tao Zhang
Add property "coresight-name" for coresight component name. This
allows coresight driver to read device name from device entries.

Signed-off-by: Tao Zhang 
---
 Documentation/devicetree/bindings/arm/coresight.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt 
b/Documentation/devicetree/bindings/arm/coresight.txt
index d711676..0e980ce 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -103,6 +103,8 @@ its hardware characteristcs.
  powers down the coresight component also powers down and loses its
  context. This property is currently only used for the ETM 4.x driver.
 
+   * coresight-name: the name of the coresight devices.
+
 * Optional properties for ETM/PTMs:
 
* arm,cp14: must be present if the system accesses ETM/PTM management
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH 0/2] *** SUBJECT HERE ***

2021-04-16 Thread Tao Zhang
*** BLURB HERE ***

Tao Zhang (2):
  coresight: Add support for device names
  dt-bindings: arm: add property for coresight component name

 Documentation/devicetree/bindings/arm/coresight.txt | 2 ++
 drivers/hwtracing/coresight/coresight-core.c| 6 ++
 2 files changed, 8 insertions(+)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project



[PATCH] coresight: add support to enable more coresight paths

2021-04-15 Thread Tao Zhang
Current coresight implementation only supports enabling source
ETMs or STM. This patch adds support to enable more kinds of
coresight source to sink paths. We build a path from source to
sink when any source is enabled and store it in a list. When the
source is disabled, we fetch the corresponding path from the list
and decrement the refcount on each device in the path. The device
is disabled if the refcount reaches zero. Don't store path to
coresight data structure of source to avoid unnecessary change to
ABI.
Since some targets may have coresight sources other than STM and
ETMs, we need to add this change to support these coresight
devices.

Signed-off-by: Satyajit Desai 
Signed-off-by: Rama Aparna Mallavarapu 
Signed-off-by: Mulu He 
Signed-off-by: Tingwei Zhang 
Signed-off-by: Tao Zhang 
---
 drivers/hwtracing/coresight/coresight-core.c | 101 +++
 1 file changed, 56 insertions(+), 45 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c 
b/drivers/hwtracing/coresight/coresight-core.c
index 4ba801d..7dfadb6 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -35,18 +35,16 @@ struct coresight_node {
 };
 
 /*
- * When operating Coresight drivers from the sysFS interface, only a single
- * path can exist from a tracer (associated to a CPU) to a sink.
+ * struct coresight_path - path from source to sink
+ * @path:  Address of path list.
+ * @link:  hook to the list.
  */
-static DEFINE_PER_CPU(struct list_head *, tracer_path);
+struct coresight_path {
+   struct list_head *path;
+   struct list_head link;
+};
 
-/*
- * As of this writing only a single STM can be found in CS topologies.  Since
- * there is no way to know if we'll ever see more and what kind of
- * configuration they will enact, for the time being only define a single path
- * for STM.
- */
-static struct list_head *stm_path;
+static LIST_HEAD(cs_active_paths);
 
 /*
  * When losing synchronisation a new barrier packet needs to be inserted at the
@@ -326,7 +324,7 @@ static void coresight_disable_sink(struct coresight_device 
*csdev)
if (ret)
return;
coresight_control_assoc_ectdev(csdev, false);
-   csdev->enable = false;
+   csdev->activated = false;
 }
 
 static int coresight_enable_link(struct coresight_device *csdev,
@@ -562,6 +560,20 @@ int coresight_enable_path(struct list_head *path, u32 
mode, void *sink_data)
goto out;
 }
 
+static struct coresight_device *coresight_get_source(struct list_head *path)
+{
+   struct coresight_device *csdev;
+
+   if (!path)
+   return NULL;
+
+   csdev = list_first_entry(path, struct coresight_node, link)->csdev;
+   if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
+   return NULL;
+
+   return csdev;
+}
+
 struct coresight_device *coresight_get_sink(struct list_head *path)
 {
struct coresight_device *csdev;
@@ -1047,9 +1059,23 @@ static int coresight_validate_source(struct 
coresight_device *csdev,
return 0;
 }
 
+static int coresight_store_path(struct list_head *path)
+{
+   struct coresight_path *node;
+
+   node = kzalloc(sizeof(struct coresight_path), GFP_KERNEL);
+   if (!node)
+   return -ENOMEM;
+
+   node->path = path;
+   list_add(>link, _active_paths);
+
+   return 0;
+}
+
 int coresight_enable(struct coresight_device *csdev)
 {
-   int cpu, ret = 0;
+   int ret = 0;
struct coresight_device *sink;
struct list_head *path;
enum coresight_dev_subtype_source subtype;
@@ -1094,25 +1120,9 @@ int coresight_enable(struct coresight_device *csdev)
if (ret)
goto err_source;
 
-   switch (subtype) {
-   case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
-   /*
-* When working from sysFS it is important to keep track
-* of the paths that were created so that they can be
-* undone in 'coresight_disable()'.  Since there can only
-* be a single session per tracer (when working from sysFS)
-* a per-cpu variable will do just fine.
-*/
-   cpu = source_ops(csdev)->cpu_id(csdev);
-   per_cpu(tracer_path, cpu) = path;
-   break;
-   case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
-   stm_path = path;
-   break;
-   default:
-   /* We can't be here */
-   break;
-   }
+   ret = coresight_store_path(path);
+   if (ret)
+   goto err_source;
 
 out:
mutex_unlock(_mutex);
@@ -1129,8 +1139,11 @@ EXPORT_SYMBOL_GPL(coresight_enable);
 
 void coresight_disable(struct coresight_device *csdev)
 {
-   int cpu, ret;
+   int  ret;
struct list_head *path = NULL;
+   struct coresight_path *cspath = NULL;
+   struct coresight_path *cspath_next =

[PATCH] coresight: add support to enable more coresight paths

2021-04-14 Thread Tao Zhang
Current coresight implementation only supports enabling source
ETMs or STM. This patch adds support to enable more kinds of
coresight source to sink paths. We build a path from source to
sink when any source is enabled and store it in a list. When the
source is disabled, we fetch the corresponding path from the list
and decrement the refcount on each device in the path. The device
is disabled if the refcount reaches zero. Don't store path to
coresight data structure of source to avoid unnecessary change to
ABI.
Since some targets may have coresight sources other than STM and
ETMs, we need to add this change to support these coresight
devices.

Signed-off-by: Satyajit Desai 
Signed-off-by: Rama Aparna Mallavarapu 
Signed-off-by: Mulu He 
Signed-off-by: Tingwei Zhang 
Signed-off-by: Tao Zhang 
---
 drivers/hwtracing/coresight/coresight-core.c | 101 +++
 1 file changed, 56 insertions(+), 45 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c 
b/drivers/hwtracing/coresight/coresight-core.c
index 4ba801d..7dfadb6 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -35,18 +35,16 @@ struct coresight_node {
 };
 
 /*
- * When operating Coresight drivers from the sysFS interface, only a single
- * path can exist from a tracer (associated to a CPU) to a sink.
+ * struct coresight_path - path from source to sink
+ * @path:  Address of path list.
+ * @link:  hook to the list.
  */
-static DEFINE_PER_CPU(struct list_head *, tracer_path);
+struct coresight_path {
+   struct list_head *path;
+   struct list_head link;
+};
 
-/*
- * As of this writing only a single STM can be found in CS topologies.  Since
- * there is no way to know if we'll ever see more and what kind of
- * configuration they will enact, for the time being only define a single path
- * for STM.
- */
-static struct list_head *stm_path;
+static LIST_HEAD(cs_active_paths);
 
 /*
  * When losing synchronisation a new barrier packet needs to be inserted at the
@@ -326,7 +324,7 @@ static void coresight_disable_sink(struct coresight_device 
*csdev)
if (ret)
return;
coresight_control_assoc_ectdev(csdev, false);
-   csdev->enable = false;
+   csdev->activated = false;
 }
 
 static int coresight_enable_link(struct coresight_device *csdev,
@@ -562,6 +560,20 @@ int coresight_enable_path(struct list_head *path, u32 
mode, void *sink_data)
goto out;
 }
 
+static struct coresight_device *coresight_get_source(struct list_head *path)
+{
+   struct coresight_device *csdev;
+
+   if (!path)
+   return NULL;
+
+   csdev = list_first_entry(path, struct coresight_node, link)->csdev;
+   if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
+   return NULL;
+
+   return csdev;
+}
+
 struct coresight_device *coresight_get_sink(struct list_head *path)
 {
struct coresight_device *csdev;
@@ -1047,9 +1059,23 @@ static int coresight_validate_source(struct 
coresight_device *csdev,
return 0;
 }
 
+static int coresight_store_path(struct list_head *path)
+{
+   struct coresight_path *node;
+
+   node = kzalloc(sizeof(struct coresight_path), GFP_KERNEL);
+   if (!node)
+   return -ENOMEM;
+
+   node->path = path;
+   list_add(>link, _active_paths);
+
+   return 0;
+}
+
 int coresight_enable(struct coresight_device *csdev)
 {
-   int cpu, ret = 0;
+   int ret = 0;
struct coresight_device *sink;
struct list_head *path;
enum coresight_dev_subtype_source subtype;
@@ -1094,25 +1120,9 @@ int coresight_enable(struct coresight_device *csdev)
if (ret)
goto err_source;
 
-   switch (subtype) {
-   case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
-   /*
-* When working from sysFS it is important to keep track
-* of the paths that were created so that they can be
-* undone in 'coresight_disable()'.  Since there can only
-* be a single session per tracer (when working from sysFS)
-* a per-cpu variable will do just fine.
-*/
-   cpu = source_ops(csdev)->cpu_id(csdev);
-   per_cpu(tracer_path, cpu) = path;
-   break;
-   case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
-   stm_path = path;
-   break;
-   default:
-   /* We can't be here */
-   break;
-   }
+   ret = coresight_store_path(path);
+   if (ret)
+   goto err_source;
 
 out:
mutex_unlock(_mutex);
@@ -1129,8 +1139,11 @@ EXPORT_SYMBOL_GPL(coresight_enable);
 
 void coresight_disable(struct coresight_device *csdev)
 {
-   int cpu, ret;
+   int  ret;
struct list_head *path = NULL;
+   struct coresight_path *cspath = NULL;
+   struct coresight_path *cspath_next =