Re: [PATCH 1/1] coresight: etm4x: Configure EL2 exception level when kernel is running in HYP

2018-09-06 Thread Tomasz Nowicki
Hi Mathieu, On 05.09.2018 22:34, Mathieu Poirier wrote: Hi Tomasz, On Tue, Sep 04, 2018 at 04:20:34PM +0200, Tomasz Nowicki wrote: For non-VHE systems host kernel runs at EL1 and jumps to EL2 whenever hypervisor code should be executed. In this case ETM4x driver must restrict configuration

[PATCH 1/1] coresight: etm4x: Configure EL2 exception level when kernel is running in HYP

2018-09-04 Thread Tomasz Nowicki
at EL2. This patch fixes configuration of TRCACATRn register for VHE systems so that ETM_EXLEVEL_NS_HYP bit is used instead of ETM_EXLEVEL_NS_OS to on/off kernel tracing. At the same time, it moves common code to new helper. Signed-off-by: Tomasz Nowicki --- drivers/hwtracing/coresight/coresight

Re: [PATCH v8 00/13] Support PPTT for ARM64

2018-05-09 Thread Tomasz Nowicki
update the scheduler MC domain so that it generally reflects the LLC unless the LLC is too large for the NUMA domain (or package). Tested-by: Tomasz Nowicki <tomasz.nowi...@cavium.com> Tested on ThunderX2: Machine (511GB total) NUMANode L#0 (P#0 256GB) Package L#0 + L3 L#0 (32MB)

Re: [PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-22 Thread Tomasz Nowicki
Hi Robin, On 19.12.2017 17:34, Robin Murphy wrote: Hi Tomasz, On 19/12/17 15:13, Tomasz Nowicki wrote: Here is my lspci output of ThunderX2 for which I am observing kernel panic coming from SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live): # lspci -vt -[:00]-+-00

Re: [PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-20 Thread Tomasz Nowicki
On 19.12.2017 17:37, Alex Williamson wrote: On Tue, 19 Dec 2017 16:20:21 +0100 Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> wrote: While iterating over DMA aliases for a PCI device, for some rare cases (i.e. PCIe-to-PCI/X bridges) we may get exactly the same ID as initial child

Re: [PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-20 Thread Tomasz Nowicki
Hi Robin, On 19.12.2017 17:34, Robin Murphy wrote: Hi Tomasz, On 19/12/17 15:13, Tomasz Nowicki wrote: Here is my lspci output of ThunderX2 for which I am observing kernel panic coming from SMMUv3 driver -> arm_smmu_write_strtab_ent() -> BUG_ON(ste_live): # lspci -vt -[:00]-+-00

[PATCH V1 1/1] iommu: Make sure device's ID array elements are unique

2017-12-19 Thread Tomasz Nowicki
multiple times too which for some IOMMU drivers is illegal and causes kernel panic. Rule out ID duplication prior to device ID array registration. CC: sta...@vger.kernel.org # v4.14+ Signed-off-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> --- drivers/iommu/iommu.

[PATCH V1 0/1] Fix kernel panic caused by device ID duplication presented to the IOMMU

2017-12-19 Thread Tomasz Nowicki
ossible to have two identical SIDs. The question is what we should do about such case. Presented patch prevents from registering the same ID so that SMMUv3 is not complaining later on. Tomasz Nowicki (1): iommu: Make sure device's ID array elements are unique drivers/iom

Re: [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing

2017-10-26 Thread Tomasz Nowicki
Hi John, On 19.10.2017 12:25, John Garry wrote: On 19/10/2017 06:18, Tomasz Nowicki wrote: Summary: I'm not at all happy with this specification's attempt to leave out pieces of information which make parsing things more deterministic. In this case I'm happy to demote the message level

Re: [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing

2017-10-18 Thread Tomasz Nowicki
On 18.10.2017 19:30, Jeremy Linton wrote: On 10/18/2017 05:24 AM, Tomasz Nowicki wrote: On 18.10.2017 07:39, Tomasz Nowicki wrote: Hi, On 17.10.2017 17:22, Jeremy Linton wrote: Hi, On 10/17/2017 08:25 AM, Tomasz Nowicki wrote: Hi Jeremy, I did second round of review and have some more

Re: [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing

2017-10-18 Thread Tomasz Nowicki
On 18.10.2017 07:39, Tomasz Nowicki wrote: Hi, On 17.10.2017 17:22, Jeremy Linton wrote: Hi, On 10/17/2017 08:25 AM, Tomasz Nowicki wrote: Hi Jeremy, I did second round of review and have some more comments, please see below: On 12.10.2017 21:48, Jeremy Linton wrote: ACPI 6.2 adds a new

Re: [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing

2017-10-17 Thread Tomasz Nowicki
Hi, On 17.10.2017 17:22, Jeremy Linton wrote: Hi, On 10/17/2017 08:25 AM, Tomasz Nowicki wrote: Hi Jeremy, I did second round of review and have some more comments, please see below: On 12.10.2017 21:48, Jeremy Linton wrote: ACPI 6.2 adds a new table, which describes how processing units

Re: [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing

2017-10-17 Thread Tomasz Nowicki
Hi Jeremy, I did second round of review and have some more comments, please see below: On 12.10.2017 21:48, Jeremy Linton wrote: ACPI 6.2 adds a new table, which describes how processing units are related to each other in tree like fashion. Caches are also sprinkled throughout the tree and

Re: [PATCH V2 0/1] Optimise IOVA allocations for PCI devices

2017-10-12 Thread Tomasz Nowicki
Hi Joerg, On 12.10.2017 12:04, Joerg Roedel wrote: Hi Tomasz, On Thu, Oct 12, 2017 at 11:40:27AM +0200, Tomasz Nowicki wrote: Can you please have a look and see if you are fine with this patch? How do these changes relate to Robin's IOVA optimizations already in the iommu-tree

Re: [PATCH V2 0/1] Optimise IOVA allocations for PCI devices

2017-10-12 Thread Tomasz Nowicki
Hi Joerg, Can you please have a look and see if you are fine with this patch? Thanks in advance, Tomasz On 20.09.2017 10:52, Tomasz Nowicki wrote: Here is my test setup where I have stareted performance measurements. PCIe - TX - PCIe

Re: [PATCH V2 0/1] Optimise IOVA allocations for PCI devices

2017-10-12 Thread Tomasz Nowicki
Hi Joerg, Can you please have a look and see if you are fine with this patch? Thanks in advance, Tomasz On 20.09.2017 10:52, Tomasz Nowicki wrote: Here is my test setup where I have stareted performance measurements. PCIe - TX - PCIe

Re: [PATCH v5 3/6] iommu/iova: Extend rbtree node caching

2017-09-22 Thread Tomasz Nowicki
Hi Robin, On 21.09.2017 17:52, Robin Murphy wrote: The cached node mechanism provides a significant performance benefit for allocations using a 32-bit DMA mask, but in the case of non-PCI devices or where the 32-bit space is full, the loss of this benefit can be significant - on large systems

Re: [PATCH v4 5/6] iommu/iova: Extend rbtree node caching

2017-09-20 Thread Tomasz Nowicki
Hi Robin, On 19.09.2017 18:31, Robin Murphy wrote: The cached node mechanism provides a significant performance benefit for allocations using a 32-bit DMA mask, but in the case of non-PCI devices or where the 32-bit space is full, the loss of this benefit can be significant - on large systems

[PATCH V2 1/1] iommu/iova: Make rcache flush optional on IOVA allocation failure

2017-09-20 Thread Tomasz Nowicki
pick the slowest option to proceed. This patch reworks flushed_rcache local flag to be additional function argument instead and control rcache flush step. Also, it updates all users to do the flush as the last chance. Signed-off-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com&

[PATCH V2 0/1] Optimise IOVA allocations for PCI devices

2017-09-20 Thread Tomasz Nowicki
solution is that machines with relatively small numbers of CPUs may get DAC addresses more frequently for PCI devices. Please let me know your thoughts. Changelog: v1 --> v2 - add missing documentation - fix typo Tomasz Nowicki (1): iommu/iova: Make rcache flush optional on IOVA allocatio

Re: [PATCH 1/1] iommu/iova: Make rcache flush optional on IOVA allocation failure

2017-09-19 Thread Tomasz Nowicki
Hi Nate, On 19.09.2017 04:57, Nate Watterson wrote: Hi Tomasz, On 9/18/2017 12:02 PM, Robin Murphy wrote: Hi Tomasz, On 18/09/17 11:56, Tomasz Nowicki wrote: Since IOVA allocation failure is not unusual case we need to flush CPUs' rcache in hope we will succeed in next round. However

Re: [PATCH 1/1] iommu/iova: Make rcache flush optional on IOVA allocation failure

2017-09-19 Thread Tomasz Nowicki
Hi Robin, On 18.09.2017 18:02, Robin Murphy wrote: Hi Tomasz, On 18/09/17 11:56, Tomasz Nowicki wrote: Since IOVA allocation failure is not unusual case we need to flush CPUs' rcache in hope we will succeed in next round. However, it is useful to decide whether we need rcache flush step

[PATCH 1/1] iommu/iova: Make rcache flush optional on IOVA allocation failure

2017-09-18 Thread Tomasz Nowicki
pick the slowest option to proceed. This patch reworks flushed_rcache local flag to be additional function argument instead and control rcache flush step. Also, it updates all users to do the flush as the last chance. Signed-off-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> -

[PATCH 0/1] Optimise IOVA allocations for PCI devices

2017-09-18 Thread Tomasz Nowicki
solution is that machines with relatively small numbers of CPUs may get DAC addresses more frequently for PCI devices. Please let me know your thoughts. Tomasz Nowicki (1): iommu/iova: Make rcache flush optional on IOVA allocation failure drivers/iommu/amd_iommu.c | 5 +++-- drivers/iomm

Re: [PATCH] PCI: generic: stop hiding pci_host_common_probe declaration

2017-03-29 Thread Tomasz Nowicki
ers that support ECAM */ int pci_host_common_probe(struct platform_device *pdev, struct pci_ecam_ops *ops); #endif -#endif Thanks for fixing this. Reviewed-by: Tomasz Nowicki <t...@semihalf.com> Tested-by: Tomasz Nowicki <t...@semihalf.com> Tomasz

Re: [PATCH] PCI: ACPI: Fix ThunderX PEM initialization

2017-03-21 Thread Tomasz Nowicki
Hi Bjorn, On 21.03.2017 14:47, Bjorn Helgaas wrote: On Tue, Mar 21, 2017 at 07:38:07AM -0400, Jon Masters wrote: On 03/16/2017 12:25 PM, David Daney wrote: On 03/16/2017 07:32 AM, Jon Masters wrote: Yes, it is now contains "CAVxxx" as _HID for device config object. Which is different

Re: [PATCH v3] IOMMU: SMMUv2: Support for Extended Stream ID (16 bit)

2017-01-19 Thread Tomasz Nowicki
On 19.01.2017 11:57, Aleksey Makarov wrote: Hi Tomasz, On 01/19/2017 11:55 AM, Tomasz Nowicki wrote: Hi Aleksey, On 17.01.2017 16:14, Aleksey Makarov wrote: Enable the Extended Stream ID feature when available. This patch on top of series "KVM PCIe/MSI passthrough on ARM/ARM64 and

Re: [PATCH v3] IOMMU: SMMUv2: Support for Extended Stream ID (16 bit)

2017-01-19 Thread Tomasz Nowicki
1:1 map). Eventually SMMU drops such device because the stream ID is out of range. This is the case for all devices connected as external endpoints on ThunderX. To fix above issue enable the Extended Stream ID optional feature when available. Please add my: Reviewed-by: To

Re: [PATCH v8 18/18] iommu/arm-smmu: Do not advertise IOMMU_CAP_INTR_REMAP anymore

2017-01-18 Thread Tomasz Nowicki
, let's correct this. Signed-off-by: Eric Auger <eric.au...@redhat.com> Acked-by: Will Deacon <will.dea...@arm.com> For patches [15-18]: Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz --- v7 -> v8: - added Will's A-b --- drivers/io

Re: [PATCH v8 14/18] irqdomain: irq_domain_check_msi_remap

2017-01-18 Thread Tomasz Nowicki
On 17.01.2017 15:06, Tomasz Nowicki wrote: On 17.01.2017 14:53, Auger Eric wrote: Hi Tomasz, On 17/01/2017 14:40, Tomasz Nowicki wrote: On 11.01.2017 10:41, Eric Auger wrote: This new function checks whether all MSI irq domains implement IRQ remapping. This is useful to understand whether

Re: [PATCH v8 12/18] irqdomain: Add irq domain MSI and MSI_REMAP flags

2017-01-18 Thread Tomasz Nowicki
yngier <marc.zyng...@arm.com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz --- v7 -> v8: - remove h variable in irq_domain_hierarchical_is_msi_remap - add Marc's R-b v6: - add IRQ_DOMAIN_FLAG_MSI as suggested by Marc - add irq_domain_is_msi, ir

Re: [PATCH v8 13/18] genirq/msi: Set IRQ_DOMAIN_FLAG_MSI on MSI domain creation

2017-01-18 Thread Tomasz Nowicki
On 11.01.2017 10:41, Eric Auger wrote: Now we have a flag value indicating an IRQ domain implements MSI, let's set it on msi_create_irq_domain(). Signed-off-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Tomasz Nowicki

Re: [PATCH v8 11/18] iommu/arm-smmu-v3: Implement reserved region get/put callbacks

2017-01-17 Thread Tomasz Nowicki
sysfs. Signed-off-by: Eric Auger <eric.au...@redhat.com> Acked-by: Will Deacon <will.dea...@arm.com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz --- v7 -> v8: - added Will's A-b v4: creation --- drivers/iommu/arm-smmu-v3.c | 28 ++

Re: [PATCH v8 14/18] irqdomain: irq_domain_check_msi_remap

2017-01-17 Thread Tomasz Nowicki
On 17.01.2017 14:53, Auger Eric wrote: Hi Tomasz, On 17/01/2017 14:40, Tomasz Nowicki wrote: On 11.01.2017 10:41, Eric Auger wrote: This new function checks whether all MSI irq domains implement IRQ remapping. This is useful to understand whether VFIO passthrough is safe with respect

Re: [PATCH v8 14/18] irqdomain: irq_domain_check_msi_remap

2017-01-17 Thread Tomasz Nowicki
On 11.01.2017 10:41, Eric Auger wrote: This new function checks whether all MSI irq domains implement IRQ remapping. This is useful to understand whether VFIO passthrough is safe with respect to interrupts. On ARM typically an MSI controller can sit downstream to the IOMMU without preventing

Re: [PATCH v8 10/18] iommu/arm-smmu: Implement reserved region get/put callbacks

2017-01-17 Thread Tomasz Nowicki
com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz --- v3 -> v4: - do not handle PCI host bridge windows anymore - encode prot RFC v2 -> v3: - use existing get/put_resv_regions RFC v1 -> v2: - use defines for MSI IOVA base and length --- drivers/

Re: [PATCH v8 05/18] iommu: Only map direct mapped regions

2017-01-17 Thread Tomasz Nowicki
On 11.01.2017 10:41, Eric Auger wrote: As we introduced new reserved region types which do not require mapping, let's make sure we only map direct mapped regions. Signed-off-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Th

Re: [PATCH v8 06/18] iommu: iommu_get_group_resv_regions

2017-01-17 Thread Tomasz Nowicki
-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz --- v6 -> v7: - avoid merge of regions of different type v3 -> v4: - take the iommu_group lock in iommu_get_group_resv_regions - the list now is sorted and ov

Re: [PATCH v8 04/18] iommu: iommu_alloc_resv_region

2017-01-17 Thread Tomasz Nowicki
On 11.01.2017 10:41, Eric Auger wrote: Introduce a new helper serving the purpose to allocate a reserved region. This will be used in iommu driver implementing reserved region callbacks. Signed-off-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Tomasz Nowicki <to

Re: [PATCH v8 02/18] iommu: Rename iommu_dm_regions into iommu_resv_regions

2017-01-17 Thread Tomasz Nowicki
address space or because they are not translated by the IOMMU and need special handling) So let's rename the struct and also the callbacks. Signed-off-by: Eric Auger <eric.au...@redhat.com> Acked-by: Robin Murphy <robin.mur...@arm.com> Reviewed-by: Tomasz Nowicki <tomasz.nowi...@cav

Re: [PATCH v8 01/18] iommu/dma: Allow MSI-only cookies

2017-01-17 Thread Tomasz Nowicki
cating a region of their IOVA space to a managed cookie, and extend the mapping routine to implement a trivial linear allocator in such cases, to avoid the needless overhead of a full-blown IOVA domain. Signed-off-by: Robin Murphy <robin.mur...@arm.com> Reviewed-by: Tomasz Nowicki

Re: [PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704

2017-01-15 Thread Tomasz Nowicki
My apologise for not adding 2nd version info of this patch to mail subject. Thanks, Tomasz On 16.01.2017 08:16, Tomasz Nowicki wrote: The goal of erratum #27704 workaround was to make sure that ASIDs and VMIDs are unique across all SMMU instances on affected Cavium systems. Currently

[PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704

2017-01-15 Thread Tomasz Nowicki
ASIDs consistently for all SMMU instances. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Reviewed-by: Robin Murphy <robin.mur...@arm.com> Reviewed-by: Tirumalesh Chalamarla <tirumalesh.chalama...@cavium.com> --- drivers/iommu/arm-smmu.c | 3 +++ 1 file changed, 3 i

Re: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions

2017-01-13 Thread Tomasz Nowicki
with internal 10G VNIC and Intel IXGBE NIC. Please feel free to add my: Tested-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> Thanks, Tomasz

Re: [PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704

2017-01-13 Thread Tomasz Nowicki
On 12.01.2017 07:41, Tomasz Nowicki wrote: On 11.01.2017 13:19, Robin Murphy wrote: On 11/01/17 11:51, Tomasz Nowicki wrote: The goal of erratum #27704 workaround was to make sure that ASIDs and VMIDs are unique across all SMMU instances on affected Cavium systems. Currently, the workaround

Re: [PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704

2017-01-11 Thread Tomasz Nowicki
On 11.01.2017 13:19, Robin Murphy wrote: On 11/01/17 11:51, Tomasz Nowicki wrote: The goal of erratum #27704 workaround was to make sure that ASIDs and VMIDs are unique across all SMMU instances on affected Cavium systems. Currently, the workaround code partitions ASIDs and VMIDs by increasing

[PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704

2017-01-11 Thread Tomasz Nowicki
upport for stage-1 AArch64 contexts for Cavium SMMUv2 model so that we use ASIDs consistently. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/iommu/arm-smmu.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index a60cded..ae

Re: [PATCH v6 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI

2017-01-03 Thread Tomasz Nowicki
On 04.01.2017 08:02, Hanjun Guo wrote: Hi Tomasz, On 2017/1/3 15:41, Tomasz Nowicki wrote: Hi, Can we merge patch 4 & 6 into one patch so that we keep refactoring part as one piece ? I do not see a reason to keep them separate or have patch 5 in between. You can refactor what n

Re: [PATCH v6 05/14] ACPI: platform-msi: retrieve dev id from IORT

2017-01-03 Thread Tomasz Nowicki
On 03.01.2017 10:37, Tomasz Nowicki wrote: On 03.01.2017 09:43, Tomasz Nowicki wrote: On 02.01.2017 14:31, Hanjun Guo wrote: For devices connecting to ITS, it needs dev id to identify itself, and this dev id is represented in the IORT table in named componant node [1] for platform devices, so

Re: [PATCH v6 05/14] ACPI: platform-msi: retrieve dev id from IORT

2017-01-03 Thread Tomasz Nowicki
On 03.01.2017 09:43, Tomasz Nowicki wrote: On 02.01.2017 14:31, Hanjun Guo wrote: For devices connecting to ITS, it needs dev id to identify itself, and this dev id is represented in the IORT table in named componant node [1] for platform devices, so in this patch we will scan the IORT

Re: [PATCH v6 05/14] ACPI: platform-msi: retrieve dev id from IORT

2017-01-03 Thread Tomasz Nowicki
ed-by: Xinwei Kong <kong.kongxin...@hisilicon.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> Cc: Tomasz Nowicki <t...@semihalf.com> Cc: Thomas Gleixner <t...@linutronix.de> --- drivers/acpi/arm64/iort.c | 26 +++

Re: [PATCH v6 06/14] irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare for ACPI

2017-01-02 Thread Tomasz Nowicki
by: Majun <majun...@huawei.com> Tested-by: Xinwei Kong <kong.kongxin...@hisilicon.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Tomasz Nowicki <t...@semihalf.com> Cc: Thomas Gleixner <t...@linutronix.de> --- drivers/irqchip/irq-gic-v3-its-platform-msi.c | 45

Re: [RFC PATCH] ACPI/PCI: Fix bus range comparation in pci_mcfg_lookup

2017-01-02 Thread Tomasz Nowicki
seg && e->bus_start == bus_res->start && + if (e->segment == seg && e->bus_start <= bus_res->start && e->bus_end >= bus_res->end) return e->addr; } Looks good to me. Reviewed-by: Tomasz Nowicki <t...@semihalf.com> Thanks, Tomasz

Re: [Linaro-acpi] [PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-12-02 Thread Tomasz Nowicki
On 02.12.2016 07:42, Duc Dang wrote: On Thu, Dec 1, 2016 at 9:50 PM, Jon Masters wrote: On 11/30/2016 07:28 PM, Bjorn Helgaas wrote: I'm hoping to end up with something like this:

Re: [PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-12-01 Thread Tomasz Nowicki
Hi Bjorn, On 01.12.2016 01:28, Bjorn Helgaas wrote: Hi Tomasz, On Tue, Nov 15, 2016 at 10:14:57AM +0100, Tomasz Nowicki wrote: ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully compliant with ECAM standard. It uses non-standard configuration space accessors (see

Re: [PATCH V9 11/11] ARM64/PCI: Support for ACPI based PCI host controller

2016-11-24 Thread Tomasz Nowicki
On 23.11.2016 19:22, Bjorn Helgaas wrote: On Wed, Nov 23, 2016 at 12:21:03PM +0100, Tomasz Nowicki wrote: Hi Bjorn, On 23.11.2016 00:13, Bjorn Helgaas wrote: Hi Tomasz, On Fri, Jun 10, 2016 at 09:55:19PM +0200, Tomasz Nowicki wrote: Implement pci_acpi_scan_root and other arch-specific call

[PATCH V6 1/1] ARM64/PCI: Manage controller-specific information on the host controller basis

2016-11-24 Thread Tomasz Nowicki
acpi_pci_root_ops and fill in with data for each bridge. Now it is safe to have different controller-specific info. As a consequence free acpi_pci_root_ops when host bridge is released. No functional changes in this patch. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- arch/arm64/kernel/pci.

Re: [PATCH V9 11/11] ARM64/PCI: Support for ACPI based PCI host controller

2016-11-23 Thread Tomasz Nowicki
Hi Bjorn, On 23.11.2016 00:13, Bjorn Helgaas wrote: Hi Tomasz, On Fri, Jun 10, 2016 at 09:55:19PM +0200, Tomasz Nowicki wrote: Implement pci_acpi_scan_root and other arch-specific call so that ARM64 can start using ACPI to setup and enumerate PCI buses. Prior to buses enumeration

Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

2016-11-22 Thread Tomasz Nowicki
On 22.11.2016 13:08, Dongdong Liu wrote: PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant. It is non ECAM only for the RC bus config space;for any other bus underneath the root bus we support ECAM access. Add specific quirks for PCI config space accessors.This involves: 1. New

Re: [PATCH V6 1/2] PCI/ACPI: Provide acpi_get_rc_resources() for ARM64 platform

2016-11-22 Thread Tomasz Nowicki
to match segment to tell which root bus the PNP0C02 resource belong to. Signed-off-by: Dongdong Liu <liudongdo...@huawei.com> Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/pci/pci-acpi.c | 69 ++ drivers/pci/pci.h | 4

Re: [PATCH V4 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

2016-11-17 Thread Tomasz Nowicki
Hi Dongdong, I rewrite your code so that it could be used for ThunderX as well. This assumes _UID is the right way of looking up corelated RC. Of course acpi_get_rc_resources() and its acpi_* helpers should go to pci-acpi.c. Tomasz static int acpi_get_rc_addr(struct acpi_device *adev, struct

Re: [PATCH v7 00/16] ACPI IORT ARM SMMU support

2016-11-16 Thread Tomasz Nowicki
/lpieralisi/linux.git acpi/iort-smmu-v7 Tested on Juno and FVP models for ARM SMMU v1 and v3 probing path. For all series: Reviewed-by: Tomasz Nowicki <t...@semihalf.com> Thanks, Tomasz

[PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-11-15 Thread Tomasz Nowicki
entries for each PEM segment. Each contains platform IDs, mentioned pci_thunder_pem_ops and CFG resources. Quirk is considered for ThunderX silicon pass2.x only which is identified via MCFG revision 1. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/acpi/pci_mcfg.c

[PATCH V1 2/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x silicon version

2016-11-15 Thread Tomasz Nowicki
is using the same way for accessing off-chip devices (so-called PEM) as silicon pass-2.x so we need to add PEM quirk entries too. Quirk is considered for ThunderX silicon pass1.x only which is identified via MCFG revision 2. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- driver

[PATCH V1 0/2] Add support for ThunderX SoCs ACPI Host Controllers

2016-11-15 Thread Tomasz Nowicki
1] https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git (pci/ecam-v6) Tomasz Nowicki (2): PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x silicon version drivers/acpi/pci_mcfg.c

Re: [PATCH v6 13/16] drivers: iommu: arm-smmu: add IORT configuration

2016-11-09 Thread Tomasz Nowicki
l_interrupt_offset); With this fix, I run VM with several PCI devices (NIC, SATA) in passthrough mode successfully on ACPI host using ThunderX 1-socket board. Also, for my tests I used Eric's patches: https://github.com/eauger/linux/commits/v4.9-rc3-reserved-rfc-v2 Including bug fix above: Te

Re: [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case

2016-09-23 Thread Tomasz Nowicki
Hi Bjorn, On 21.09.2016 21:18, Bjorn Helgaas wrote: On Wed, Sep 21, 2016 at 11:58:22AM -0700, Duc Dang wrote: On Wed, Sep 21, 2016 at 11:04 AM, Bjorn Helgaas wrote: On Wed, Sep 21, 2016 at 03:05:49PM +0100, Lorenzo Pieralisi wrote: The existing x86 practice is to use

Re: [PATCH V6 4/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-09-21 Thread Tomasz Nowicki
On 20.09.2016 15:08, Bjorn Helgaas wrote: On Tue, Sep 20, 2016 at 09:06:23AM +0200, Tomasz Nowicki wrote: On 19.09.2016 17:45, Bjorn Helgaas wrote: On Fri, Sep 09, 2016 at 09:24:06PM +0200, Tomasz Nowicki wrote: ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully

Re: [PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case

2016-09-20 Thread Tomasz Nowicki
On 19.09.2016 20:09, Bjorn Helgaas wrote: On Fri, Sep 09, 2016 at 09:24:05PM +0200, Tomasz Nowicki wrote: thunder-pem driver stands for being ACPI based PCI host controller. However, there is no standard way to describe its PEM-specific register ranges in ACPI tables. Thus we add

Re: [PATCH V6 4/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-09-20 Thread Tomasz Nowicki
On 19.09.2016 17:45, Bjorn Helgaas wrote: On Fri, Sep 09, 2016 at 09:24:06PM +0200, Tomasz Nowicki wrote: ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully compliant with ECAM standard. It uses non-standard configuration space accessors (see pci_thunder_pem_ops

Re: [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks

2016-09-13 Thread Tomasz Nowicki
On 13.09.2016 00:24, Duc Dang wrote: On Fri, Sep 9, 2016 at 12:24 PM, Tomasz Nowicki <t...@semihalf.com> wrote: Some platforms may not be fully compliant with generic set of PCI config accessors. For these cases we implement the way to overwrite CFG accessors set and configuration space

Re: [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks

2016-09-13 Thread Tomasz Nowicki
Hi Liu, On 13.09.2016 04:36, Dongdong Liu wrote: Hi Tomasz 在 2016/9/10 3:24, Tomasz Nowicki 写道: Some platforms may not be fully compliant with generic set of PCI config accessors. For these cases we implement the way to overwrite CFG accessors set and configuration space range. In first

Re: [PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks

2016-09-12 Thread Tomasz Nowicki
On 13.09.2016 00:47, Duc Dang wrote: On Mon, Sep 12, 2016 at 3:24 PM, Duc Dang <dhd...@apm.com> wrote: On Fri, Sep 9, 2016 at 12:24 PM, Tomasz Nowicki <t...@semihalf.com> wrote: Some platforms may not be fully compliant with generic set of PCI config accessors. For these cases

Re: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-12 Thread Tomasz Nowicki
On 12.09.2016 20:54, Tomasz Nowicki wrote: IORT shows representation of IO topology for ARM based systems. It describes how various components are connected together on parent-child basis e.g. PCI RC -> SMMU -> ITS. Also see IORT spec. http://infocenter.arm.com/help/topic/com.arm.doc.de

[UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-12 Thread Tomasz Nowicki
upport in this place e.g. GTDT table. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Rafael J. Wysocki <r...@rjwysocki.net> Reviewed-by: Hanjun Guo <hanjun@linaro.org> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> --- drivers/acpi/Kconfi

[PATCH V11 5/8] irqchip/gicv3-its: Refactor ITS DT init code to prepare for ACPI

2016-09-12 Thread Tomasz Nowicki
from its_probe_one. Users can refer to it in more convenient way then. Signed-off-by: Hanjun Guo <hanjun@linaro.org> Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/irqchip/irq-gic-v3-its.c | 65 ++ drivers/irqchip/irq-gic-v3.

[PATCH V11 6/8] irqchip/gicv3-its: Probe ITS in the ACPI way

2016-09-12 Thread Tomasz Nowicki
. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Hanjun Guo <hanjun@linaro.org> --- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-gic-v3-its.c | 61 +++- 2 files chan

[PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-12 Thread Tomasz Nowicki
upport in this place e.g. GTDT table. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Rafael J. Wysocki <r...@rjwysocki.net> Reviewed-by: Hanjun Guo <hanjun@linaro.org> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> --- drivers/acpi/Kconfi

[PATCH V11 8/8] irqchip/gicv3-its: Use MADT ITS subtable to do PCI/MSI domain initialization

2016-09-12 Thread Tomasz Nowicki
-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Hanjun Guo <hanjun@linaro.org> --- drivers/irqchip/irq-gic-v3-its-pci-msi.c | 44 1 file changed, 44 insertions(+) diff --git a/drivers/irqchip/irq-gi

[PATCH V11 7/8] irqchip/gicv3-its: Factor out PCI-MSI part that might be reused for ACPI

2016-09-12 Thread Tomasz Nowicki
Firmware agnostic code lands in common functions which do necessary domain initialization based on unique domain handler. DT specific code goes to DT specific init call. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> --- drivers/irqchi

[PATCH V11 2/8] ACPI: Add new IORT functions to support MSI domain handling

2016-09-12 Thread Tomasz Nowicki
corresponding IRQ domain. Since IORT is prepared to describe MSI domain on a per-device basis, use existing IORT helpers and implement two calls: 1. iort_msi_map_rid() to map MSI RID for a device 2. iort_get_device_domain() to find domain token for a device Signed-off-by: Tomasz Nowicki <t...@semihalf.

[PATCH V11 4/8] irqchip/gicv3-its: Cleanup for ITS domain initialization

2016-09-12 Thread Tomasz Nowicki
initialization to separate function. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Hanjun Guo <hanjun@linaro.org> --- drivers/irqchip/irq-gic-v3-its.c | 57 1 file changed, 34 insertion

[PATCH V11 0/8] Introduce ACPI world to ITS irqchip

2016-09-12 Thread Tomasz Nowicki
v2 -> v3 - rebased on top of 4.4 - fixes and improvements for redistributor init via GICC structures - fixes as per kbuild reports v1 -> v2 - rebased on top of 4.4-rc4 - use pci_msi_domain_get_msi_rid for requester ID to device ID translation Tomasz Nowicki (8): ACPI: I/O Remapping Tabl

[PATCH V11 3/8] PCI/MSI: Setup MSI domain on a per-device basis using IORT ACPI table

2016-09-12 Thread Tomasz Nowicki
for finding PCI device domain and its RID translation (pci_msi_domain_get_msi_rid and pci_msi_domain_get_msi_rid calls). Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Reviewed-by: Hanjun Guo <hanjun@linaro.org> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Acked-by: Bj

Re: [UPDATE PATCH V10 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-12 Thread Tomasz Nowicki
Hi Rafael, On 09.09.2016 11:20, Lorenzo Pieralisi wrote: Hi Rafael, On Wed, Sep 07, 2016 at 01:56:52PM +0200, Tomasz Nowicki wrote: IORT shows representation of IO topology for ARM based systems. It describes how various components are connected together on parent-child basis e.g. PCI RC

Re: [PATCH V6 0/5] ECAM quirks handling for ARM64 platforms

2016-09-09 Thread Tomasz Nowicki
On 09.09.2016 21:24, Tomasz Nowicki wrote: Quirk handling relies on an idea of simple static array which contains quirk enties. Each entry consists of identification information (IDs from standard header of MCFG table) along with custom pci_ecam_ops structure and configuration space resource

[PATCH V6 5/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass1.x silicon version

2016-09-09 Thread Tomasz Nowicki
is using the same way for accessing off-chip devices (so-called PEM) as silicon pass-2.x so we need to add PEM quirk entries too. Quirk is considered for ThunderX silicon pass1.x only which is identified via MCFG revision 2. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- driver

[PATCH V6 3/5] PCI: thunder-pem: Allow to probe PEM-specific register range for ACPI case

2016-09-09 Thread Tomasz Nowicki
, it prevents from creating standard mechanism to handle similar cases in future. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/pci/host/pci-thunder-pem.c | 61 ++ 1 file changed, 48 insertions(+), 13 deletions(-) diff --git a/drivers/pci/ho

[PATCH V6 2/5] PCI/ACPI: Check platform specific ECAM quirks

2016-09-09 Thread Tomasz Nowicki
ving it in MCFG. { "OEM_ID", "OEM_TABLE_ID", , , , _ops, DEFINE_RES_MEM(START, SIZE) }, pci_generic_ecam_ops and MCFG entries will be used for platforms free from quirks. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Signed-off-by: Dongdong Liu <liudongdo...@huawei.com>

[PATCH V6 4/5] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version

2016-09-09 Thread Tomasz Nowicki
. Quirk is considered for ThunderX silicon pass2.x only which is identified via MCFG revision 1. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- drivers/acpi/pci_mcfg.c| 27 +++ drivers/pci/host/pci-thunder-pem.c | 2 +- include/linux/pci-

[PATCH V6 1/5] PCI/ACPI: Extend pci_mcfg_lookup() responsibilities

2016-09-09 Thread Tomasz Nowicki
. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> --- arch/arm64/kernel/pci.c | 17 + drivers/acpi/pci_mcfg.c | 28 +--- include/linux/pci-acpi.h | 4 +++- 3 files changed, 33 insertions(+), 16 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch

[PATCH V6 0/5] ECAM quirks handling for ARM64 platforms

2016-09-09 Thread Tomasz Nowicki
OEM ID, TABLE ID, rev match - use memcmp instead of strncmp - no substring match - fix typos and dmesg message Tomasz Nowicki (5): PCI/ACPI: Extend pci_mcfg_lookup() responsibilities PCI/ACPI: Check platform specific ECAM quirks PCI: thunder-pem: Allow to probe PEM-specific register range fo

Re: [Linaro-acpi] [PATCH V8 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-07 Thread Tomasz Nowicki
On 02.09.2016 13:52, Fu Wei wrote: > Hi Tomasz, > > On 11 August 2016 at 18:06, Tomasz Nowicki <t...@semihalf.com> wrote: >> IORT shows representation of IO topology for ARM based systems. >> It describes how various components are connected together on >> paren

Re: [UPDATE PATCH V10 2/8] ACPI: Add new IORT functions to support MSI domain handling

2016-09-07 Thread Tomasz Nowicki
On 07.09.2016 13:58, Tomasz Nowicki wrote: For ITS, MSI functionality consists on building domain stack and during that process we need to reference to domain stack components e.g. before we create new DOMAIN_BUS_PCI_MSI domain we need to specify its DOMAIN_BUS_NEXUS parent domain. In order

[UPDATE PATCH V10 2/8] ACPI: Add new IORT functions to support MSI domain handling

2016-09-07 Thread Tomasz Nowicki
corresponding IRQ domain. Since IORT is prepared to describe MSI domain on a per-device basis, use existing IORT helpers and implement two calls: 1. iort_msi_map_rid() to map MSI RID for a device 2. iort_get_device_domain() to find domain token for a device Signed-off-by: Tomasz Nowicki <t...@semihalf.

[UPDATE PATCH V10 1/8] ACPI: I/O Remapping Table (IORT) initial support

2016-09-07 Thread Tomasz Nowicki
tables support in this place e.g. GTDT table. Signed-off-by: Tomasz Nowicki <t...@semihalf.com> Reviewed-by: Hanjun Guo <hanjun@linaro.org> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> --- drivers/acpi/Kconfig| 4 + drivers/acpi/Makefile | 2 + dr

Re: [PATCH V10 2/8] ACPI: Add new IORT functions to support MSI domain handling

2016-09-07 Thread Tomasz Nowicki
, Tomasz Nowicki wrote: On 06.09.2016 12:20, Thomas Gleixner wrote: On Tue, 6 Sep 2016, Tomasz Nowicki wrote: +/** + * iort_get_device_domain() - Find MSI domain related to a device + * @dev: The device. + * @req_id: Requester ID for the device. + * + * Returns: the MSI domain for this device, NULL

Re: [PATCH V10 7/8] irqchip/gicv3-its: Factor out PCI-MSI part that might be reused for ACPI

2016-09-07 Thread Tomasz Nowicki
On 06.09.2016 13:29, Rafael J. Wysocki wrote: On Tue, Sep 6, 2016 at 12:22 PM, Tomasz Nowicki <t...@semihalf.com> wrote: Hi Thomas, On 06.09.2016 11:50, Thomas Gleixner wrote: On Tue, 6 Sep 2016, Tomasz Nowicki wrote: -static int __init its_pci_msi_init(void) +static int

Re: [RFC PATCH V5 2/5] PCI/ACPI: Move ACPI ECAM mapping to generic MCFG driver

2016-09-06 Thread Tomasz Nowicki
On 05.09.2016 04:22, Bjorn Helgaas wrote: On Mon, Aug 08, 2016 at 03:05:38PM +0200, Tomasz Nowicki wrote: pci_acpi_setup_ecam_mapping() is not really ARM64 specific so move it out of arch/arm64/ directory. In preparation for adding MCFG quirk handling extend pci_acpi_setup_ecam_mapping

Re: [RFC PATCH V5 5/5] PCI: thunder-pem: Support quirky configuration space access for ACPI based PCI host controller

2016-09-06 Thread Tomasz Nowicki
On 05.09.2016 04:34, Bjorn Helgaas wrote: On Mon, Aug 08, 2016 at 03:05:41PM +0200, Tomasz Nowicki wrote: Add infrastructure to support ThunderX PEM specific PCI configuration space access for ACPI based PCI host controller. This involves: 1. New initialization call thunder_pem_cfg_init

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