Re: STIBP by default.. Revert?

2018-11-18 Thread Tony Luck
On Sun, Nov 18, 2018 at 2:19 PM Jiri Kosina wrote: > Which gets us back to Tim's fixup patch. Do you still prefer the revert, > given the existence of that? I think that if Tim's fixup makes it through > (it's currently missing SECCOMP handling, but that is trivial to add on > top), it might be

Re: [PATCH] x86/mce: Fix set_mce_nospec() to avoid #GP fault

2018-08-30 Thread Tony Luck
On Thu, Aug 30, 2018 at 6:30 PM Linus Torvalds wrote: > > On Thu, Aug 30, 2018 at 2:45 PM Tony Luck wrote: > > > > Fix is to move one step at a time. First mark the page not present > > (using the decoy address). Then it is safe to use the actual address > > of

[PATCH] x86/mce: Fix set_mce_nospec() to avoid #GP fault

2018-08-30 Thread Tony Luck
mapping to mark it "uc", and finally as present. Fixes: 284ce4011ba6 ("x86/memory_failure: Introduce {set, clear}_mce_nospec()") Signed-off-by: Tony Luck --- Maybe this is horrible. Other suggestions gratefully received. arch/x86/include/asm/set_memory.h | 23

[PATCH] ia64: Fix kernel BUG at lib/ioremap.c:72!

2018-08-20 Thread Tony Luck
ONFIG_IA64 in the functon, but Arnd suggested keeping the fix inside the arch/ia64 tree. Fixes: 0bbf47eab469 ("ia64: use asm-generic/io.h") Suggested-by: Arnd Bergman Signed-off-by: Tony Luck --- arch/ia64/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/ia64/include/

Re: Build failures with gcc 4.5 and older

2018-08-15 Thread Tony Luck
On Tue, Aug 14, 2018 at 1:19 PM Tony Luck wrote: > My ia64 test box only has 4.3.4. I seem to remember some pain points > with newer versions of gcc on ia64. I need to poke around and find one > new enough to get past this problem, but that still works for kernel building. I had proble

Re: Build failures with gcc 4.5 and older

2018-08-14 Thread Tony Luck
On Tue, Aug 14, 2018 at 11:02 AM Guenter Roeck wrote: > > On Tue, Aug 14, 2018 at 10:20:32AM -0700, Linus Torvalds wrote: > > On Tue, Aug 14, 2018 at 10:09 AM Guenter Roeck wrote: > > > > > > Does that mean that gcc 4.5 and older are now officially no longer > > > supported for compiling the

Re: [PATCH] EDAC, sb_edac: Fix out of bound in PCI multi segment env

2018-07-24 Thread Tony Luck
ay reference, the real problem is that the sb_edac.c driver didn't know about systems with segmented PCI busses. So the Subject: for the e-mail (and thus the commit message) should be: [PATCH] EDAC, sb_edac: Add support for systems with segmented PCI busses Otherwise this looks fine. Reviewed-by: Tony Luck -Tony

Re: [PATCH v3] mm/memblock: add missing include

2018-07-20 Thread Tony Luck
; > to simply: > > #if defined(CONFIG_NO_BOOTMEM) Is this sitting in a queue somewhere ready to go to Linus? I don't see it upstream yet. > > Suggested-by: Tony Luck > Suggested-by: Michal Hocko > Acked-by: Michal Hocko > Signed-off-by: Mathieu Malaterre > --- > v3: Add

[tip:ras/core] x86/mce: Fix incorrect "Machine check from unknown source" message

2018-06-22 Thread tip-bot for Tony Luck
Commit-ID: 40c36e2741d7fe1e66d6ec55477ba5fd19c9c5d2 Gitweb: https://git.kernel.org/tip/40c36e2741d7fe1e66d6ec55477ba5fd19c9c5d2 Author: Tony Luck AuthorDate: Fri, 22 Jun 2018 11:54:23 +0200 Committer: Thomas Gleixner CommitDate: Fri, 22 Jun 2018 14:35:50 +0200 x86/mce: Fix incorrect

Re: [PATCH] MAINTAINERS: Add me as an x86 entry code maintainer

2018-06-18 Thread Tony Luck
linux-kernel@vger.kernel.org > +T:git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/asm > +S:Maintained > +F:arch/x86/entry/ > + > X86 MCE INFRASTRUCTURE > M:Tony Luck > M:Borislav Petkov > @@ -15597,7 +15604,7 @@ F:drivers/platform/x86/

Re: [PATCH] mm/memblock: add missing include

2018-06-15 Thread Tony Luck
On Fri, Jun 15, 2018 at 12:17 PM, Andrew Morton wrote: > Huh. How did that ever work. I guess it's either this: > > --- a/mm/Makefile~a > +++ a/mm/Makefile > @@ -45,6 +45,7 @@ obj-y += init-mm.o > > ifdef CONFIG_NO_BOOTMEM > obj-y += nobootmem.o > +

Re: [PATCH] mm/memblock: add missing include

2018-06-15 Thread Tony Luck
On Wed, Jun 6, 2018 at 12:41 PM, Mathieu Malaterre wrote: > Commit 26f09e9b3a06 ("mm/memblock: add memblock memory allocation apis") > introduced two new function definitions: > ‘memblock_virt_alloc_try_nid_nopanic’ > and > ‘memblock_virt_alloc_try_nid’. > Commit ea1f5f3712af ("mm: define

[tip:x86/urgent] x86/intel_rdt: Enable CMT and MBM on new Skylake stepping

2018-06-09 Thread tip-bot for Tony Luck
Commit-ID: 1d9f3e20a56d33e55748552aeec597f58542f92d Gitweb: https://git.kernel.org/tip/1d9f3e20a56d33e55748552aeec597f58542f92d Author: Tony Luck AuthorDate: Fri, 8 Jun 2018 09:07:32 -0700 Committer: Thomas Gleixner CommitDate: Sat, 9 Jun 2018 16:04:34 +0200 x86/intel_rdt: Enable CMT

[PATCH] x86/intel_rdt: Enable CMT and MBM on new Skylake stepping

2018-06-08 Thread Tony Luck
New stepping of Skylake has fixes for cache occupancy and memory bandwidth monitoring. Update the code to enable these by default on newer steppings. Cc: sta...@vger.kernel.org # v4.14 Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/intel_rdt.c | 2 ++ 1 file changed, 2 insertions(+) diff

[tip:ras/urgent] x86/mce: Check for alternate indication of machine check recovery on Skylake

2018-06-07 Thread tip-bot for Tony Luck
Commit-ID: 4c5717da1d021cf368eabb3cb1adcaead56c0d1e Gitweb: https://git.kernel.org/tip/4c5717da1d021cf368eabb3cb1adcaead56c0d1e Author: Tony Luck AuthorDate: Fri, 25 May 2018 14:42:09 -0700 Committer: Thomas Gleixner CommitDate: Thu, 7 Jun 2018 22:22:12 +0200 x86/mce: Check

[tip:ras/urgent] x86/mce: Improve error message when kernel cannot recover

2018-06-07 Thread tip-bot for Tony Luck
Commit-ID: c7d606f560e4c698884697fef503e4abacdd8c25 Gitweb: https://git.kernel.org/tip/c7d606f560e4c698884697fef503e4abacdd8c25 Author: Tony Luck AuthorDate: Fri, 25 May 2018 14:41:39 -0700 Committer: Thomas Gleixner CommitDate: Thu, 7 Jun 2018 22:22:12 +0200 x86/mce: Improve error

[PATCH 3/3] x86/mce: Check for alternate indication of machine check recovery on Skylake

2018-05-25 Thread Tony Luck
he "CAPID5" register (each reports some NVDIMM mode available, if any of them are set, then the system supports memory machine check recovery). Cc: sta...@vger.kernel.org # 4.9 Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/quirks.c | 11 +-- 1 file c

[PATCH 2/3] x86/mce: Fix incorrect "Machine check from unknown source" message

2018-05-25 Thread Tony Luck
. If this happens we print a slightly different message (so I can see if it actually every happens). Cc: sta...@vger.kernel.org # 4.2 Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mcheck/mce.c | 26 ++ 1 file changed, 18 insertions(+), 8 delet

[PATCH 1/3] x86/mce: Improve error message when kernel cannot recover.

2018-05-25 Thread Tony Luck
lues. Add an extra rule to the MCE severity table to catch this case and report it as: mce: [Hardware Error]: Machine check: Data load in unrecoverable area of kernel Cc: sta...@vger.kernel.org # 4.6+ Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mcheck/mc

[PATCH 0/3] x86/mce fixes

2018-05-25 Thread Tony Luck
The first two just get better error messages when we refuse to recover from an error that the h/w says is recoverable because the error occurred in a non-recoverable part of the kernel. The third improves identification of Skylake SKUs that support recovery. Tony Luck (3): x86/mce: Improve

Re: [PATCH] docs/memory-barriers.txt: Fix broken DMA vs MMIO ordering example

2018-03-28 Thread Tony Luck
On Wed, Mar 28, 2018 at 6:02 AM, Sinan Kaya wrote: > +linux-ia64 > Does IA64 follow this requirement? If not, is implementation planned? > > "no wmb() before writel()" > > Linus asked us to get rid of wmb() in front of writel() for UC memory. > Just checking that we are not

[tip:ras/urgent] x86/MCE: Save microcode revision in machine check records

2018-03-08 Thread tip-bot for Tony Luck
Commit-ID: fa94d0c6e0f3431523f5701084d799c77c7d4a4f Gitweb: https://git.kernel.org/tip/fa94d0c6e0f3431523f5701084d799c77c7d4a4f Author: Tony Luck <tony.l...@intel.com> AuthorDate: Tue, 6 Mar 2018 15:21:41 +0100 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Thu

Re: [PATCH v2 01/11] kbuild: define PYTHON2 and PYTHON3 variables instead of PYTHON

2018-03-06 Thread Tony Luck
On Thu, Mar 1, 2018 at 8:31 PM, Masahiro Yamada wrote: > arch/ia64/scripts/unwcheck.py is apparently written in Python 2, so > it should be invoked by 'python2'. I pushed the patch from Corentin Labbe to update this script to run with either python2 or python3.

[PATCH] x86/mce: Save microcode revision in machine check records

2018-03-01 Thread Tony Luck
Updating microcode used to be relatively rare. Now that it has become more common we should save the microcode version in a machine check record to make sure that those people looking at the error have this important information bundled with the rest of the logged information. Signed-off-by: Tony

Re: [PATCH v2 00/19] prevent bounds-check bypass via speculative execution

2018-01-16 Thread Tony Luck
On Sat, Jan 13, 2018 at 10:51 AM, Linus Torvalds <torva...@linux-foundation.org> wrote: > On Fri, Jan 12, 2018 at 4:15 PM, Tony Luck <tony.l...@gmail.com> wrote: > So your argument depends on "the uarch will actually run the code in > order if there are no even

Re: [PATCH v2 00/19] prevent bounds-check bypass via speculative execution

2018-01-12 Thread Tony Luck
On Thu, Jan 11, 2018 at 5:19 PM, Linus Torvalds wrote: > Should the array access in entry_SYSCALL_64_fastpath be made to use > the masking approach? That one has a bounds check for an inline constant. cmpq$__NR_syscall_max, %rax so should be safe. The

Re: proposal for meltdown-workaround with low overhead

2018-01-04 Thread Tony Luck
On Thu, Jan 4, 2018 at 11:45 AM, Alexander Kleinsorge wrote: > As Meltdown-Issue depends on allowing to cause many exceptions (usually : > accessing an invalid address), we could restrict this misusage easy. The accesses to the invalid address are performed

[PATCH] x86/intel_rdt: Fix a silent failure when writing zero value schemata

2017-11-10 Thread Tony Luck
] Fixes: c4026b7b95a4 ("x86/intel_rdt: Implement "update" mode when writing schemata file") Signed-off-by: Xiaochen Shen <xiaochen.s...@intel.com> Signed-off-by: Tony Luck <tony.l...@intel.com> --- [apply to TIP x86/cache] arch/x86/kernel/cpu/

[tip:x86/cache] x86/intel_rdt: Turn off most RDT features on Skylake

2017-08-25 Thread tip-bot for Tony Luck
Commit-ID: d56593eb5eda8f593db92927059697bbf89bc4b3 Gitweb: http://git.kernel.org/tip/d56593eb5eda8f593db92927059697bbf89bc4b3 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 24 Aug 2017 09:26:52 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri,

[tip:x86/cache] x86/intel_rdt: Add command line options for resource director technology

2017-08-25 Thread tip-bot for Tony Luck
Commit-ID: 1d9807fc64c131a83a96917f2b2da1c9b00cf127 Gitweb: http://git.kernel.org/tip/1d9807fc64c131a83a96917f2b2da1c9b00cf127 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 24 Aug 2017 09:26:51 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri,

[tip:x86/cache] x86/intel_rdt: Move special case code for Haswell to a quirk function

2017-08-25 Thread tip-bot for Tony Luck
Commit-ID: 0576113a387e0c8a5d9e24b4cd62605d1c9c0db8 Gitweb: http://git.kernel.org/tip/0576113a387e0c8a5d9e24b4cd62605d1c9c0db8 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 24 Aug 2017 09:26:50 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri,

[tip:x86/mm] x86/mm, mm/hwpoison: Clear PRESENT bit for kernel 1:1 mappings of poison pages

2017-08-17 Thread tip-bot for Tony Luck
Commit-ID: ce0fa3e56ad20f04d8252353dcd24e924abdafca Gitweb: http://git.kernel.org/tip/ce0fa3e56ad20f04d8252353dcd24e924abdafca Author: Tony Luck <tony.l...@intel.com> AuthorDate: Wed, 16 Aug 2017 10:18:03 -0700 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Thu, 17 Au

[tip:x86/cache] x86/intel_rdt/mbm: Basic counting of MBM events (total and local)

2017-08-01 Thread tip-bot for Tony Luck
Commit-ID: 9f52425ba303d91c8370719e91d7e578bfdf309f Gitweb: http://git.kernel.org/tip/9f52425ba303d91c8370719e91d7e578bfdf309f Author: Tony Luck <tony.l...@intel.com> AuthorDate: Tue, 25 Jul 2017 14:14:45 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Tue

[tip:x86/cache] x86/intel_rdt: Simplify info and base file lists

2017-08-01 Thread tip-bot for Tony luck
Commit-ID: 5dc1d5c6bac2cfe3420cf353dfb0ef2e543f7c10 Gitweb: http://git.kernel.org/tip/5dc1d5c6bac2cfe3420cf353dfb0ef2e543f7c10 Author: Tony luck <tony.l...@intel.com> AuthorDate: Tue, 25 Jul 2017 14:14:29 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Tue

Re: [PATCH 08/21] x86/intel_rdt/cqm: Add RMID(Resource monitoring ID) management

2017-07-05 Thread Tony Luck
> In case that a RMID was never used on a particular package, the state check > forces an IPI on all packages unconditionally. That's suboptimal at least. > > We know on which package a given RMID was used, so we could restrict the > checks to exactly these packages, but I'm not sure it's worth

Re: [PATCH v2 25/27] ia64: Use generic pci_mmap_resource_range()

2017-04-12 Thread Tony Luck
ned-off-by: David Woodhouse <d...@amazon.co.uk> Well it builds and boots on my last remaining ia64 machine. No warnings or weird stuff in the console log. So you can mark the three ia64 patches Tested-by: Tony Luck <tony.l...@intel.com> and bundle them with the others rather than through the ia64 tree. -Tony

Re: ia64 exceptions (Re: [RFC][CFT][PATCHSET v1] uaccess unification)

2017-04-05 Thread Tony Luck
On Wed, Apr 5, 2017 at 1:08 AM, Al Viro wrote: > ... and sure enough, on generic kernel (CONFIG_ITANIUM) that yields a nice > shiny oops at precisely that insn. The right fix here might be to delete all the CONFIG_ITANIUM paths. I doubt that anyone is still running

[tip:x86/cpu] x86/intel_rdt: Implement "update" mode when writing schemata file

2017-04-05 Thread tip-bot for Tony Luck
Commit-ID: c4026b7b95a4b852e404afa2cd7720866159d118 Gitweb: http://git.kernel.org/tip/c4026b7b95a4b852e404afa2cd7720866159d118 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Mon, 3 Apr 2017 14:44:16 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Wed, 5

[tip:ras/core] x86/mce: Factor out and deprecate the /dev/mcelog driver

2017-03-28 Thread tip-bot for Tony Luck
Commit-ID: 5de97c9f6d85fd83af76e09e338b18e7adb1ae60 Gitweb: http://git.kernel.org/tip/5de97c9f6d85fd83af76e09e338b18e7adb1ae60 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Mon, 27 Mar 2017 11:33:03 +0200 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 28 Ma

[tip:x86/urgent] x86/mce: Fix copy/paste error in exception table entries

2017-03-22 Thread tip-bot for Tony Luck
Commit-ID: 26a37ab319a26d330bab298770d692bb9c852aff Gitweb: http://git.kernel.org/tip/26a37ab319a26d330bab298770d692bb9c852aff Author: Tony Luck <tony.l...@intel.com> AuthorDate: Mon, 20 Mar 2017 14:40:30 -0700 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Wed, 22 Ma

Re: [PATCH v2 2/2] mm, page_alloc: avoid page_to_pfn() when merging buddies

2017-03-07 Thread Tony Luck
On Tue, Mar 7, 2017 at 10:40 AM, Tony Luck <tony.l...@gmail.com> wrote: > The commit messages talks about the "only caller" of page_is_buddy(). > But grep shows two call sites: > > mm/page_alloc.c:816:if (!page_is_buddy(page, buddy, o

Re: [PATCH v2 2/2] mm, page_alloc: avoid page_to_pfn() when merging buddies

2017-03-07 Thread Tony Luck
On Fri, Dec 16, 2016 at 4:00 AM, Vlastimil Babka wrote: > On architectures that allow memory holes, page_is_buddy() has to perform > page_to_pfn() to check for the memory hole. After the previous patch, we have > the pfn already available in __free_one_page(), which is the only

Re: [PATCH v4 2/5] ia64: reuse append_elf_note() and final_note() functions

2017-01-31 Thread Tony Luck
On Wed, Jan 25, 2017 at 11:15 AM, Hari Bathini wrote: > I haven't gotten a success/failure build report from zero-day. Not sure what > to make of it. zero-day is generally silent unless it sees a problem. So no news is good news. > But I did try cross-compiling and

Re: [PATCH v4 2/5] ia64: reuse append_elf_note() and final_note() functions

2017-01-24 Thread Tony Luck
boot. Have you cross-compiled it (or gotten a success build report from zero-day)? If you have ... then add an Acked-by: Tony Luck <tony.l...@intel.com> -Tony

Re: [GIT pull] x86/cache: Updates for 4.10

2016-12-16 Thread Tony Luck
On Tue, Dec 13, 2016 at 1:01 AM, Thomas Gleixner wrote: > On Mon, 12 Dec 2016, Linus Torvalds wrote: > >> On Mon, Dec 12, 2016 at 1:53 AM, Thomas Gleixner wrote: >> Ugh, this is some funky stuff. And it's entirely x86-specific, with a >> rather odd special

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

2016-11-23 Thread Tony Luck
IMHO people who really care should find the BIOS option and disable it there. Having Linux take responsibility seems a little weird. If we do go that route it should be early in setup_arch() before any callbacks to other subsystems to avoid and endless games of whack-a-mole. I also wonder

Re: [PATCH v2] x86/mce: Include the PPIN in machine check records when it is available

2016-11-23 Thread Tony Luck
If the BIOS writes 10b, then PPIN is disabled and will remain so until the processor is reset. Bit 1 is a one way trip, it can be set by s/w, but not cleared again. All this is because of the huge stink last time Intel tried to add a serial number to CPUs a decade and a half ago. The lockout

[tip:ras/core] x86/mce: Include the PPIN in MCE records when available

2016-11-23 Thread tip-bot for Tony Luck
Commit-ID: 3f5a7896a5096fd50030a04d4c3f28a7441e30a5 Gitweb: http://git.kernel.org/tip/3f5a7896a5096fd50030a04d4c3f28a7441e30a5 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 18 Nov 2016 09:48:36 -0800 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Wed,

[tip:x86/cache] x86/intel_rdt: Add schemata file

2016-10-30 Thread tip-bot for Tony Luck
Commit-ID: 60ec2440c63dea88a5ef13e2b2549730a0d75a37 Gitweb: http://git.kernel.org/tip/60ec2440c63dea88a5ef13e2b2549730a0d75a37 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 28 Oct 2016 15:04:47 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Sun,

[tip:x86/cache] x86/intel_rdt: Add cpus file

2016-10-30 Thread tip-bot for Tony Luck
Commit-ID: 12e0110c11a460b890ed7e1071198ced732152c9 Gitweb: http://git.kernel.org/tip/12e0110c11a460b890ed7e1071198ced732152c9 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 28 Oct 2016 15:04:45 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Sun,

[tip:x86/cache] x86/intel_rdt: Build structures for each resource based on cache topology

2016-10-30 Thread tip-bot for Tony Luck
Commit-ID: 2264d9c74dda1b6835ab7858204073547457dfd0 Gitweb: http://git.kernel.org/tip/2264d9c74dda1b6835ab7858204073547457dfd0 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 28 Oct 2016 15:04:41 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Sun,

[tip:x86/cache] Documentation, ABI: Document the new sysfs files for cpu cache ids

2016-10-26 Thread tip-bot for Tony Luck
Commit-ID: 1d78dc59f5ab6f467e49882518453adc7e4caa44 Gitweb: http://git.kernel.org/tip/1d78dc59f5ab6f467e49882518453adc7e4caa44 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Sat, 22 Oct 2016 06:19:48 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Wed,

Re: [GIT PULL] trivial for 4.9

2016-10-07 Thread Tony Luck
On Fri, Oct 7, 2016 at 4:01 PM, Tony Luck <tony.l...@gmail.com> wrote: > What if there isn't a "next printk" call for hours, or days? > > That poor little message without a "\n" will sit in the kernel buffers, > and the user who might want to see the messa

Re: [GIT PULL] trivial for 4.9

2016-10-07 Thread Tony Luck
What if there isn't a "next printk" call for hours, or days? That poor little message without a "\n" will sit in the kernel buffers, and the user who might want to see the message can't, until some unrelated thing happens to print something. -Tony

[tip:ras/core] x86/mce: Improve memcpy_mcsafe()

2016-09-05 Thread tip-bot for Tony Luck
Commit-ID: 9a6fb28a355d2609ace4dab4e6425442c647894d Gitweb: http://git.kernel.org/tip/9a6fb28a355d2609ace4dab4e6425442c647894d Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 1 Sep 2016 11:39:33 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Mon, 5

[tip:ras/core] x86/mce: Drop X86_FEATURE_MCE_RECOVERY and the related model string test

2016-09-05 Thread tip-bot for Tony Luck
Commit-ID: ffb173e657fa8123bffa2a169e124b4bca0b5bc4 Gitweb: http://git.kernel.org/tip/ffb173e657fa8123bffa2a169e124b4bca0b5bc4 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 1 Sep 2016 11:39:33 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Mon, 5

[tip:ras/core] x86/mce: Add PCI quirks to identify Xeons with machine check recovery

2016-09-05 Thread tip-bot for Tony Luck
Commit-ID: 3637efb00864f465baebd49464e58319fd295b65 Gitweb: http://git.kernel.org/tip/3637efb00864f465baebd49464e58319fd295b65 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 1 Sep 2016 11:39:33 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Mon, 5

[tip:ras/core] locking/static_keys: Provide DECLARE and well as DEFINE macros

2016-09-05 Thread tip-bot for Tony Luck
Commit-ID: b8fb03785d4de097507d0cf45873525e0ac4d2b2 Gitweb: http://git.kernel.org/tip/b8fb03785d4de097507d0cf45873525e0ac4d2b2 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 1 Sep 2016 11:39:33 -0700 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Mon, 5

[PATCH] Update Linux version name

2016-08-17 Thread Tony Luck
This will only make sense to people who follow Linus on Google+ Signed-off-by: Tony Luck <tony.l...@intel.com> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 5c18baad7218..adf611170b4e 100644 --- a/Makefile +++ b/Makefile @@ -2,

Re: [BUG -next] "random: make /dev/urandom scalable for silly userspace programs" causes crash

2016-07-28 Thread Tony Luck
uld be merged. >> Could you please make sure the bug fix gets included as soon as possible? > > Yes, I'll send the pull request to ASAP. Also broke ia64. Same fix works for me. Tested-by: Tony Luck <tony.l...@intel.com>

Re: [lkp] [ACPI / APEI] a3e2acc5e3: kmsg.BERT:Can't_request_iomem_region<#-#>

2016-07-10 Thread Tony Luck
I'm very surprised that there was a BERT table on an Atom machine. More details about the machine please. Also BIOS version. Sent from my iPhone > On Jul 10, 2016, at 18:43, kernel test robot wrote: > > > FYI, we noticed the following commit: > >

[tip:ras/core] x86/mce: Do not use bank 1 for APEI generated error logs

2016-06-14 Thread tip-bot for Tony Luck
Commit-ID: b2de43605410d1970dc9e0f349e399f1d561be13 Gitweb: http://git.kernel.org/tip/b2de43605410d1970dc9e0f349e399f1d561be13 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 27 May 2016 14:11:06 -0700 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 14 Ju

[PATCH] x86/mce: Do not use bank 1 for APEI generated error logs.

2016-05-27 Thread Tony Luck
be clearer that this error did not originate in a machine check bank. Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mcheck/mce-apei.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/

[tip:ras/core] x86/mce: Look in genpool instead of mcelog for pending error records

2016-05-03 Thread tip-bot for Tony Luck
Commit-ID: 5541c93cdf0cc0bb7f6065b43509171838665ea1 Gitweb: http://git.kernel.org/tip/5541c93cdf0cc0bb7f6065b43509171838665ea1 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Sat, 30 Apr 2016 14:33:56 +0200 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 3 Ma

[tip:ras/core] x86/mce: Avoid using object after free in genpool

2016-04-13 Thread tip-bot for Tony Luck
Commit-ID: a3125494cff084b098c80bb36fbe2061ffed9d52 Gitweb: http://git.kernel.org/tip/a3125494cff084b098c80bb36fbe2061ffed9d52 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Wed, 6 Apr 2016 10:05:16 +0200 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Wed, 13 Ap

[PATCH] x86/mce: Look in genpool instead of mcelog.entry[] for pending error records

2016-03-25 Thread Tony Luck
are shared. Switch to using the genpool to look for the pending records. Squeeze out duplicated records. Signed-off-by: Tony Luck <tony.l...@intel.com> --- New solution for an old problem. See https://lkml.kernel.org/r/1443073720-3940-1-git-send-email-ashok@intel.com for the previous take

[PATCH] x86/mce: Avoid using object after free in genpool.

2016-03-23 Thread Tony Luck
afe() instead. Cc: sta...@vger.kernel.org Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mcheck/mce-genpool.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce-genpool.c b/arch/x86/kernel/cpu/mcheck/mce-genpoo

[tip:perf/urgent] perf/x86/mbm: Add memory bandwidth monitoring event management

2016-03-21 Thread tip-bot for Tony Luck
Commit-ID: 87f01cc2a2914b61ade5ec834377fa7819484173 Gitweb: http://git.kernel.org/tip/87f01cc2a2914b61ade5ec834377fa7819484173 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Fri, 11 Mar 2016 11:26:11 -0800 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Mon, 21 Ma

[tip:x86/urgent] x86/mm, x86/mce: Fix return type/value for memcpy_mcsafe()

2016-03-16 Thread tip-bot for Tony Luck
Commit-ID: cbf8b5a2b649a501758291cb4d4ba1e5711771ba Gitweb: http://git.kernel.org/tip/cbf8b5a2b649a501758291cb4d4ba1e5711771ba Author: Tony Luck <tony.l...@intel.com> AuthorDate: Mon, 14 Mar 2016 15:33:39 -0700 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Wed, 16 Ma

[PATCH] x86/mm, x86/mce: Fix return type/value for memcpy_mcsafe()

2016-03-14 Thread Tony Luck
4ca ("x86/mm, x86/mce: Add memcpy_mcsafe()") Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/include/asm/string_64.h | 4 ++-- arch/x86/lib/memcpy_64.S | 7 --- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/string_64.

Re: [PATCH v14] x86, mce: Add memcpy_mcsafe()

2016-03-11 Thread Tony Luck
On Thu, Mar 10, 2016 at 11:37 AM, Luck, Tony wrote: >> But you return 0 == false for success and 1 == true for failure. > > Aaargh! -ETOOMUCHSHELLSCRIPTPROGRAMMING > > -Tony Options to fix this: 1) Just change the comments in the code. This seems like it would confuse

Re: [PATCH 6/6] x86/mbm: Add support for MBM counter overflow handling

2016-03-11 Thread Tony Luck
erflow in 1s but this time can be definitely improved by calibrating on the system. The overflow is really a function of the max memory b/w that the socket can support, max counter value and scaling factor. Reviewed-by: Tony Luck <tony.l...@intel.com> Signed-off-by: Vikas Shivappa

Re: [PATCH 4/6] x86/mbm: Memory bandwidth monitoring event management

2016-03-11 Thread Tony Luck
the IA32_PQR_ASSOC_MSR to associate the RMID with the task. The tasks have a common RMID for cqm(cache quality of service monitoring) and MBM. Hence most of the scheduling code is reused from cqm. Reviewed-by: Tony Luck <tony.l...@intel.com> Signed-off-by: Tony Luck <tony.l...@intel.com>

[tip:ras/core] x86/mm, x86/mce: Add memcpy_mcsafe()

2016-03-08 Thread tip-bot for Tony Luck
Commit-ID: 92b0729c34cab1f46d89aace3e66015f0bb4a682 Gitweb: http://git.kernel.org/tip/92b0729c34cab1f46d89aace3e66015f0bb4a682 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Thu, 18 Feb 2016 11:47:26 -0800 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 8 Ma

[PATCH v14] x86, mce: Add memcpy_mcsafe()

2016-02-25 Thread Tony Luck
current hardware implementations treat a machine check in "rep mov" as fatal. When that is fixed we can simplify. Signed-off-by: Tony Luck <tony.l...@intel.com> --- Is this what we want now? Return type is a "bool". True means that we copied OK, false means that it didn't

Re: [PATCH v13] x86, mce: Add memcpy_trap()

2016-02-24 Thread Tony Luck
On Wed, Feb 24, 2016 at 10:35 AM, Linus Torvalds <torva...@linux-foundation.org> wrote: > On Feb 24, 2016 09:38, "Tony Luck" <tony.l...@gmail.com> wrote: >> >> 2) But if we want to use this for copy_from_user() as part of the >> write(2) call s

Re: [PATCH v13] x86, mce: Add memcpy_trap()

2016-02-24 Thread Tony Luck
bably the first of several copy functions. > We can make new ones for non-temporal cache handling etc. > > Reviewed-by: Borislav Petkov <b...@suse.de> > Signed-off-by: Tony Luck <tony.l...@intel.com> > --- > V12-V13 > Ingo: Separate instruction arguments with a &quo

[tip:ras/core] x86/mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries

2016-02-18 Thread tip-bot for Tony Luck
Commit-ID: b2f9d678e28ca71ce650eac82f26dd287b47e89a Gitweb: http://git.kernel.org/tip/b2f9d678e28ca71ce650eac82f26dd287b47e89a Author: Tony Luck <tony.l...@intel.com> AuthorDate: Wed, 17 Feb 2016 10:20:13 -0800 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Thu, 18 Fe

[tip:x86/asm] x86/cpufeature: Create a new synthetic cpu capability for machine check recovery

2016-02-18 Thread tip-bot for Tony Luck
Commit-ID: 0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be Gitweb: http://git.kernel.org/tip/0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be Author: Tony Luck <tony.l...@intel.com> AuthorDate: Wed, 17 Feb 2016 10:20:13 -0800 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Thu, 18 Fe

[tip:ras/core] x86/mm: Expand the exception table logic to allow new handling options

2016-02-18 Thread tip-bot for Tony Luck
Commit-ID: 548acf19234dbda5a52d5a8e7e205af46e9da840 Gitweb: http://git.kernel.org/tip/548acf19234dbda5a52d5a8e7e205af46e9da840 Author: Tony Luck <tony.l...@intel.com> AuthorDate: Wed, 17 Feb 2016 10:20:12 -0800 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Thu, 18 Fe

[PATCH v11 2/4] x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries

2016-02-17 Thread Tony Luck
to the tail code in do_machine_check() to make all this readable/maintainable. One functional change is that tolerant=3 no longer stops recovery actions. Revert to only skipping sending SIGBUS to the current process. Reviewed-by: Borislav Petkov <b...@suse.de> Signed-off-by: Tony Luck <tony.l...@

[PATCH v11 1/4] x86: Expand exception table to allow new handling options

2016-02-17 Thread Tony Luck
- just jumps the to fixup IP 2: Fault - provide the trap number in %ax to the fixup code 3: Cleaned up legacy for the uaccess error hack Reviewed-by: Borislav Petkov <b...@suse.de> Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/exception-tables.txt | 35 ++

[PATCH v11 4/4] x86: Create a new synthetic cpu capability for machine check recovery

2016-02-17 Thread Tony Luck
recoverable machine checks. Check the model name and set a synthetic capability bit. Provide a command line option to set this bit anyway in case the kernel doesn't recognise the model name. Reviewed-by: Borislav Petkov <b...@suse.de> Signed-off-by: Tony Luck <tony.l...@intel.com> --- D

[PATCH v11 0/4] Machine check recovery when kernel accesses poison

2016-02-17 Thread Tony Luck
[Resend of v11 with Boris' "Reviewed-by" tags added. For Ingo's workflow] -Tony Tony Luck (4): x86: Expand exception table to allow new handling options x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries x86, mce: Add __mcsafe_copy() x86: Cr

[PATCH v11 3/4] x86, mce: Add __mcsafe_copy()

2016-02-17 Thread Tony Luck
, then 'trapnr' will say which type of trap (X86_TRAP_PF or X86_TRAP_MC) and 'remain' says how many bytes were not copied. Note that this is probably the first of several copy functions. We can make new ones for non-temporal cache handling etc. Reviewed-by: Borislav Petkov <b...@suse.de> Signed-off-by

[PATCH v11 2/4] x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries

2016-02-11 Thread Tony Luck
to the tail code in do_machine_check() to make all this readable/maintainable. One functional change is that tolerant=3 no longer stops recovery actions. Revert to only skipping sending SIGBUS to the current process. Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mche

[PATCH v11 3/4] x86, mce: Add __mcsafe_copy()

2016-02-11 Thread Tony Luck
, then 'trapnr' will say which type of trap (X86_TRAP_PF or X86_TRAP_MC) and 'remain' says how many bytes were not copied. Note that this is probably the first of several copy functions. We can make new ones for non-temporal cache handling etc. Signed-off-by: Tony Luck <tony.l...@intel.com> --- ar

[PATCH v11 1/4] x86: Expand exception table to allow new handling options

2016-02-11 Thread Tony Luck
- just jumps the to fixup IP 2: Fault - provide the trap number in %ax to the fixup code 3: Cleaned up legacy for the uaccess error hack Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/exception-tables.txt | 35 arch/x86/include/asm/asm.h

[PATCH v11 0/4] Machine check recovery when kernel accesses poison

2016-02-11 Thread Tony Luck
y: Untangle mess of code in tail of do_machine_check() to make it clear what is going on (e.g. that we only enter the ist_begin_non_atomic() if we were called from user code, not from kernel!). Done. Tony Luck (4): x86: Expand exception table to allow new handling options x86, mce: Che

[PATCH v11 4/4] x86: Create a new synthetic cpu capability for machine check recovery

2016-02-11 Thread Tony Luck
recoverable machine checks. Check the model name and set a synthetic capability bit. Provide a command line option to set this bit anyway in case the kernel doesn't recognise the model name. Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/x86_64/boot-options.txt | 2 ++

[PATCH v10 0/4] Machine check recovery when kernel accesses poison

2016-02-04 Thread Tony Luck
ing on (e.g. that we only enter the ist_begin_non_atomic() if we were called from user code, not from kernel!). Done. Tony Luck (4): x86: Expand exception table to allow new handling options x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries x86,

[PATCH v10 3/4] x86, mce: Add __mcsafe_copy()

2016-02-04 Thread Tony Luck
, then 'trapnr' will say which type of trap (X86_TRAP_PF or X86_TRAP_MC) and 'remain' says how many bytes were not copied. Note that this is probably the first of several copy functions. We can make new ones for non-temporal cache handling etc. Signed-off-by: Tony Luck <tony.l...@intel.com> --- ar

[PATCH v10 4/4] x86: Create a new synthetic cpu capability for machine check recovery

2016-02-04 Thread Tony Luck
recoverable machine checks. Check the model name and set a synthetic capability bit. Provide a command line option to set this bit anyway in case the kernel doesn't recognise the model name. Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/x86_64/boot-options.txt | 4

[PATCH v10 2/4] x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries

2016-02-04 Thread Tony Luck
to the tail code in do_machine_check() to make all this readable/maintainable. One functional change is that tolerant=3 no longer stops recovery actions. Revert to only skipping sending SIGBUS to the current process. Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mche

[PATCH v10 1/4] x86: Expand exception table to allow new handling options

2016-02-04 Thread Tony Luck
- just jumps the to fixup IP 2: Fault - provide the trap number in %ax to the fixup code 3: Cleaned up legacy for the uaccess error hack Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/exception-tables.txt | 35 arch/x86/include/asm/asm.h

[PATCH v9 1/4] x86: Expand exception table to allow new handling options

2016-02-02 Thread Tony Luck
- just jumps the to fixup IP 2: Fault - provide the trap number in %ax to the fixup code 3: Cleaned up legacy for the uaccess error hack Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/exception-tables.txt | 33 +++ arch/x86/include/asm/asm.h

[PATCH v9 0/4] Machine check recovery when kernel accesses poison

2016-02-02 Thread Tony Luck
ng kernel exception tables. Done. Andy: Explain use of BIT(63) on return value from mcsafe_memcpy(). Done (added decode macros). Andy: Untangle mess of code in tail of do_machine_check() to make it clear what is going on (e.g. that we only enter the ist_begin_non_atomic() if we wer

[PATCH v9 2/4] x86, mce: Check for faults tagged in EXTABLE_CLASS_FAULT exception table entries

2016-02-02 Thread Tony Luck
functional change is that tolerant=3 no longer stops recovery actions. Revert to only skipping sending SIGBUS to the current process. Signed-off-by: Tony Luck <tony.l...@intel.com> --- arch/x86/kernel/cpu/mcheck/mce-severity.c | 23 +- arch/x86/kernel/cpu/mcheck/mce.c

[PATCH v9 3/4] x86, mce: Add __mcsafe_copy()

2016-02-02 Thread Tony Luck
, then 'trapnr' will say which type of trap (X86_TRAP_PF or X86_TRAP_MC) and 'remain' says how many bytes were not copied. Note that this is probably the first of several copy functions. We can make new ones for non-temporal cache handling etc. Signed-off-by: Tony Luck <tony.l...@intel.com> --- ar

[PATCH v9 4/4] x86: Create a new synthetic cpu capability for machine check recovery

2016-02-02 Thread Tony Luck
recoverable machine checks. Check the model name and set a synthetic capability bit. Provide a command line option to set this bit anyway in case the kernel doesn't recognise the model name. Signed-off-by: Tony Luck <tony.l...@intel.com> --- Documentation/x86/x86_64/boot-options.txt | 4

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