RE: [PATCH 1/3] dt-bindings: Update QorIQ TMU thermal bindings
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, January 04, 2017 6:38 PM > To: Troy Jia ; rui.zh...@intel.com; edubez...@gmail.com; > Y.T. Tang ; robh...@kernel.org > Cc: linux...@vger.kernel.org; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org > Subject: Re: [PATCH 1/3] dt-bindings: Update QorIQ TMU thermal bindings > > On Wed, 2017-01-04 at 16:57 +0800, Jia Hongtao wrote: > > For different types of SoC the sensor id and endianness may vary. > > "#thermal-sensor-cells" is used to provide sensor id information. > > "little-endian" property is to tell the endianness of TMU. > > > > Signed-off-by: Jia Hongtao > > Acked-by: Rob Herring > > --- > > Documentation/devicetree/bindings/thermal/qoriq-thermal.txt | 7 > > +++ > > 1 file changed, 7 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt > > b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt > > index 66223d5..20ca4ef 100644 > > --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt > > +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt > > @@ -17,6 +17,12 @@ Required properties: > > calibration data, as specified by the SoC reference manual. > > The first cell of each pair is the value to be written to TTCFGR, > > and the second is the value to be written to TSCFGR. > > +- #thermal-sensor-cells : Must be 1. The sensor specifier is the monitoring > > + site ID, and represents the "n" in TRITSRn and TRATSRn. > > I assume the driver will continue to work with existing device trees where > this > information is absent? If so, ACK for the whole series. Yes. The driver works for all existing device trees. Thanks for the ACK. > > -Scott
RE: [PATCH V2] arm64:dts:ls1046a: Add TMU device tree support
> Subject: Re: [PATCH V2] arm64:dts:ls1046a: Add TMU device tree support
>
> On Tue, Jan 03, 2017 at 02:42:19PM +0800, Jia Hongtao wrote:
> > Also add nodes and properties for thermal management support.
> >
> > Signed-off-by: Jia Hongtao
>
> The subject prefix is still not so right. There should be a space after each
> colon.
Sorry. I will fix it.
>
> > ---
> > Changes for V2:
> > * Update the subject title according to Shawn Guo's comment.
> > * Add comments for calibration data groups.
> > * Update "thermal-zones" property in a unified style with platform dts.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 83
> > ++
> > 1 file changed, 83 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > index 38806ca..df53a4a 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > @@ -45,6 +45,7 @@
> > */
> >
> > #include
> > +#include
> >
> > / {
> > compatible = "fsl,ls1046a";
> > @@ -67,6 +68,7 @@
> > clocks = <&clockgen 1 0>;
> > next-level-cache = <&l2>;
> > cpu-idle-states = <&CPU_PH20>;
> > + #cooling-cells = <2>;
> > };
> >
> > cpu1: cpu@1 {
> > @@ -279,6 +281,87 @@
> > clocks = <&sysclk>;
> > };
> >
> > + tmu: tmu@1f0 {
> > + compatible = "fsl,qoriq-tmu";
> > + reg = <0x0 0x1f0 0x0 0x1>;
> > + interrupts = <0 33 0x4>;
> > + fsl,tmu-range = <0xb 0x9002a 0x6004c 0x30062>;
> > + fsl,tmu-calibration =
> > + /* Calibration data group 1*/
> > + <0x 0x0026
> > + 0x0001 0x002d
> > + 0x0002 0x0032
> > + 0x0003 0x0039
> > + 0x0004 0x003f
> > + 0x0005 0x0046
> > + 0x0006 0x004d
> > + 0x0007 0x0054
> > + 0x0008 0x005a
> > + 0x0009 0x0061
> > + 0x000a 0x006a
> > + 0x000b 0x0071
> > +
> > + /* Calibration data group 2*/
>
> The single line comment format is /* blabla */. There are space at both
> beginning
> and end of the text.
Will fix.
>
> Also I am asking that we use the single line comment to replace the blank
> line,
> which is still there.
I think keeping the newline makes it more clear in structure. But I also
understand
your point - no newline inside one property, right? If so I will delete the
newline.
-Hongtao.
>
> > + 0x0001 0x0025
> > + 0x00010001 0x002c
> > + 0x00010002 0x0035
> > + 0x00010003 0x003d
> > + 0x00010004 0x0045
> > + 0x00010005 0x004e
> > + 0x00010006 0x0057
> > + 0x00010007 0x0061
> > + 0x00010008 0x006b
> > + 0x00010009 0x0076
> > +
> > + /* Calibration data group 3*/
> > + 0x0002 0x0029
> > + 0x00020001 0x0033
> > + 0x00020002 0x003d
> > + 0x00020003 0x0049
> > + 0x00020004 0x0056
> > + 0x00020005 0x0061
> > + 0x00020006 0x006d
> > +
> > + /* Calibration data group 4*/
> > + 0x0003 0x0021
> > + 0x00030001 0x002a
> > + 0x00030002 0x003c
> > + 0x00030003 0x004e>;
>
> Here is the format on my mind:
>
> fsl,tmu-calibration = <
> /* Calibration data group 1 */
> 0x 0x0026
> 0x0001 0x002d
> 0x0002 0x0032
> 0x0003 0x0039
> 0x0004 0x003f
> 0x0005 0x0046
> 0x0006 0x004d
> 0x0007 0x0054
> 0x0008 0x005a
> 0x0009 0x0061
> 0x000a 0x006a
>
RE: [PATCH 1/2] arm64:dt:ls1046a: Add TMU device tree support for LS1046A
>
> On Tue, Jan 03, 2017 at 03:49:33AM +, Troy Jia wrote:
> > > > @@ -279,6 +282,82 @@
> > > > clocks = <&sysclk>;
> > > > };
> > > >
> > > > + tmu: tmu@1f0 {
> > > > + compatible = "fsl,qoriq-tmu";
> > > > + reg = <0x0 0x1f0 0x0 0x1>;
> > > > + interrupts = <0 33 0x4>;
> > > > + fsl,tmu-range = <0xb 0x9002a 0x6004c
> > > > 0x30062>;
> > > > + fsl,tmu-calibration = <0x 0x0026
> > > > + 0x0001 0x002d
> > > > + 0x0002 0x0032
> > > > + 0x0003 0x0039
> > > > + 0x0004 0x003f
> > > > + 0x0005 0x0046
> > > > + 0x0006 0x004d
> > > > + 0x0007 0x0054
> > > > + 0x0008 0x005a
> > > > + 0x0009 0x0061
> > > > + 0x000a 0x006a
> > > > + 0x000b 0x0071
> > > > +
> > >
> > > Instead of a newline, can we have a single line comment here to tell
> > > how these calibration data is grouped?
> >
> > Each group represent one temperature range. It's a good idea to add comment
> here.
> > Could I just add one comment like below to clarify all four groups?
> > /* Each calibration data group represent one temperature range. There
> > are four ranges in total */
>
> Probably the following form?
>
> /* Calibration data group 1 */
> ...
> /* Calibration data group 2 */
> ...
> /* Calibration data group 3 */
> ...
> /* Calibration data group 4 */
> ...
>
It's good for me.
>
> >
> > >
> > > > + 0x0001 0x0025
> > > > + 0x00010001 0x002c
> > > > + 0x00010002 0x0035
> > > > + 0x00010003 0x003d
> > > > + 0x00010004 0x0045
> > > > + 0x00010005 0x004e
> > > > + 0x00010006 0x0057
> > > > + 0x00010007 0x0061
> > > > + 0x00010008 0x006b
> > > > + 0x00010009 0x0076
> > > > +
> > > > + 0x0002 0x0029
> > > > + 0x00020001 0x0033
> > > > + 0x00020002 0x003d
> > > > + 0x00020003 0x0049
> > > > + 0x00020004 0x0056
> > > > + 0x00020005 0x0061
> > > > + 0x00020006 0x006d
> > > > +
> > > > + 0x0003 0x0021
> > > > + 0x00030001 0x002a
> > > > + 0x00030002 0x003c
> > > > + 0x00030003 0x004e>;
> > > > + big-endian;
> > > > + #thermal-sensor-cells = <1>;
> > > > + };
> > > > +
> > > > + thermal-zones {
> > > > + cpu_thermal: cpu-thermal {
> > > > + polling-delay-passive = <1000>;
> > > > + polling-delay = <5000>;
> > > > +
> > >
> > > We usually do not have newline between properties but nodes, or
> > > between property list and child node.
> >
> > I just follow the style of thermal binding of
> > Documentation/devicetree/bindings/thermal/thermal.txt.
>
> Different subsystem or binding examples use different style, but when we put
> things together in the platform dts, we would like to have them in a unified
> style.
Good point here.
I will fix it and send the new version.
Thanks.
-Hongtao.
RE: [PATCH 2/2] arm64:dt:ls1012a: Add TMU device tree support for LS1012A
> -Original Message- > From: Shawn Guo [mailto:shawn...@kernel.org] > Sent: Monday, January 02, 2017 2:26 PM > To: Troy Jia > Cc: rui.zh...@intel.com; edubez...@gmail.com; robh...@kernel.org; Scott Wood > ; devicet...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org > Subject: Re: [PATCH 2/2] arm64:dt:ls1012a: Add TMU device tree support for > LS1012A > > On Thu, Dec 08, 2016 at 11:28:26AM +0800, Jia Hongtao wrote: > > Also add nodes and properties for thermal management support. > > > > Signed-off-by: Jia Hongtao > > --- > > Depend on patch "[v3] arm64: Add DTS support for FSL's LS1012A SoC". > > https://patchwork.kernel.org/patch/9462399/ > > Please send me the patch only after the dependent one is already accepted. > I will hold the patch until the platform support is accepted. Thanks. -Hongtao.
RE: [PATCH 1/2] arm64:dt:ls1046a: Add TMU device tree support for LS1046A
Add Yuantian who is the owner of this patch set since next week.
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Monday, January 02, 2017 2:25 PM
> To: Troy Jia
> Cc: rui.zh...@intel.com; edubez...@gmail.com; robh...@kernel.org; Scott Wood
> ; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 1/2] arm64:dt:ls1046a: Add TMU device tree support for
> LS1046A
>
> On Thu, Dec 08, 2016 at 11:28:25AM +0800, Jia Hongtao wrote:
> > Also add nodes and properties for thermal management support.
> >
> > Signed-off-by: Jia Hongtao
>
> "arm64: dts: ls1046a: ..." for subject prefix please. Also, since we have
> ls1046a in
> prefix, the 'for LS1046A' is not needed.
Thanks. I will fix it.
>
> > ---
> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 79
> > ++
> > 1 file changed, 79 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > index 38806ca..40604e9 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > @@ -45,6 +45,8 @@
> > */
> >
> > #include
> > +#include
> > +
>
> Unneeded newline.
Got it.
>
> >
> > / {
> > compatible = "fsl,ls1046a";
> > @@ -67,6 +69,7 @@
> > clocks = <&clockgen 1 0>;
> > next-level-cache = <&l2>;
> > cpu-idle-states = <&CPU_PH20>;
> > + #cooling-cells = <2>;
> > };
> >
> > cpu1: cpu@1 {
> > @@ -279,6 +282,82 @@
> > clocks = <&sysclk>;
> > };
> >
> > + tmu: tmu@1f0 {
> > + compatible = "fsl,qoriq-tmu";
> > + reg = <0x0 0x1f0 0x0 0x1>;
> > + interrupts = <0 33 0x4>;
> > + fsl,tmu-range = <0xb 0x9002a 0x6004c 0x30062>;
> > + fsl,tmu-calibration = <0x 0x0026
> > + 0x0001 0x002d
> > + 0x0002 0x0032
> > + 0x0003 0x0039
> > + 0x0004 0x003f
> > + 0x0005 0x0046
> > + 0x0006 0x004d
> > + 0x0007 0x0054
> > + 0x0008 0x005a
> > + 0x0009 0x0061
> > + 0x000a 0x006a
> > + 0x000b 0x0071
> > +
>
> Instead of a newline, can we have a single line comment here to tell how these
> calibration data is grouped?
Each group represent one temperature range. It's a good idea to add comment
here.
Could I just add one comment like below to clarify all four groups?
/* Each calibration data group represent one temperature range. There are four
ranges in total */
>
> > + 0x0001 0x0025
> > + 0x00010001 0x002c
> > + 0x00010002 0x0035
> > + 0x00010003 0x003d
> > + 0x00010004 0x0045
> > + 0x00010005 0x004e
> > + 0x00010006 0x0057
> > + 0x00010007 0x0061
> > + 0x00010008 0x006b
> > + 0x00010009 0x0076
> > +
> > + 0x0002 0x0029
> > + 0x00020001 0x0033
> > + 0x00020002 0x003d
> > + 0x00020003 0x0049
> > + 0x00020004 0x0056
> > + 0x00020005 0x0061
> > + 0x00020006 0x006d
> > +
&
RE: [PATCH V3 1/2] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, November 23, 2016 3:07 PM > To: Troy Jia ; rui.zh...@intel.com; edubez...@gmail.com; > robh...@kernel.org; Scott Wood ; shawn...@kernel.org > Cc: devicet...@vger.kernel.org; linuxppc-...@lists.ozlabs.org; linux- > ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org > Subject: Re: [PATCH V3 1/2] powerpc/mpc85xx: Update TMU device tree node for > T1040/T1042 > > On Tue, 2016-10-25 at 10:15 +0800, Jia Hongtao wrote: > > From: Hongtao Jia > > > > Update #thermal-sensor-cells from 0 to 1 according to the new binding. > > The sensor specifier added is the monitoring site ID, and represents > > the "n" in TRITSRn and TRATSRn. > > > > Signed-off-by: Jia Hongtao > > Where can I find this new binding? As of the current linux-next I don't see > anything > in qoriq-thermal.txt about this. Hi Rui Zhang, As we discussed before. The time was inappropriate as merge window was about to close. So do you have any plan for applying the binding file recently? -Hongtao.
RE: [PATCH V2 1/5] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Monday, October 24, 2016 4:37 PM
> To: Troy Jia
> Cc: rui.zh...@intel.com; edubez...@gmail.com; robh...@kernel.org; Scott Wood
> ; devicet...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Subject: Re: [PATCH V2 1/5] powerpc/mpc85xx: Update TMU device tree node for
> T1040/T1042
>
> On Sun, Oct 09, 2016 at 02:47:02PM +0800, Jia Hongtao wrote:
> > From: Hongtao Jia
> >
> > SoC compatible string and endianness property are added according to
> > the new bindings.
>
> The commit log doesn't seem to match the actual changes. Same for patch 2/5.
Right. I just revise the log and sent a new version. Please help to review.
Thanks.
-Hongtao.
>
> >
> > Signed-off-by: Jia Hongtao
> > ---
> > Changes for V2:
> > * Rebase on latest linux-next tree (next-20161006).
> >
> > arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> > b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> > index 44e399b..145c7f4 100644
> > --- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> > @@ -526,7 +526,7 @@
> >
> >0x0003 0x0012
> >0x00030001 0x001d>;
> > - #thermal-sensor-cells = <0>;
> > + #thermal-sensor-cells = <1>;
> > };
> >
> > thermal-zones {
> > @@ -534,7 +534,7 @@
> > polling-delay-passive = <1000>;
> > polling-delay = <5000>;
> >
> > - thermal-sensors = <&tmu>;
> > + thermal-sensors = <&tmu 2>;
> >
> > trips {
> > cpu_alert: cpu-alert {
> > --
> > 2.1.0.27.g96db324
> >
> >
> > ___
> > linux-arm-kernel mailing list
> > linux-arm-ker...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
RE: [PATCH V2 1/7] dt-bindings: Update QorIQ TMU thermal bindings
> -Original Message- > From: Zhang Rui [mailto:rui.zh...@intel.com] > Sent: Monday, September 19, 2016 10:44 AM > To: Leo Li ; Rob Herring > Cc: Troy Jia ; devicet...@vger.kernel.org; linux- > p...@vger.kernel.org; linuxppc-dev ; lkml > ker...@vger.kernel.org>; Scott Wood ; Eduardo Valentin > ; Kumar Gala ; Shawn Guo > ; linux-arm-ker...@lists.infradead.org > Subject: Re: [PATCH V2 1/7] dt-bindings: Update QorIQ TMU thermal bindings > > On 三, 2016-09-14 at 11:40 -0500, Leo Li wrote: > > On Wed, Jun 8, 2016 at 2:52 PM, Rob Herring wrote: > > > > > > On Tue, Jun 07, 2016 at 11:27:34AM +0800, Jia Hongtao wrote: > > > > > > > > For different types of SoC the sensor id and endianness may vary. > > > > "#thermal-sensor-cells" is used to provide sensor id information. > > > > "little-endian" property is to tell the endianness of TMU. > > > > > > > > Signed-off-by: Jia Hongtao > > > > --- > > > > Changes for V2: > > > > * Remove formatting chnages. > > > > > > > > Documentation/devicetree/bindings/thermal/qoriq-thermal.txt | 7 > > > > +++ > > > > 1 file changed, 7 insertions(+) > > > Acked-by: Rob Herring > > Hi Zhang Rui, > > > > Since you have applied the driver patch, can you also apply the > > binding patch? The binding is supposed to go with the driver. > > > > Do you mean I should take both patch 1/7 and 7/7? I can not see the other > patches > in this patch set. Yes, please take 7/7 as well. I also reworked the device tree patches and you can find them here: https://patchwork.kernel.org/patch/9368377/ https://patchwork.kernel.org/patch/9368381/ https://patchwork.kernel.org/patch/9368383/ https://patchwork.kernel.org/patch/9368379/ https://patchwork.kernel.org/patch/9368385/ -Hongtao. > > thanks, > rui
RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support
> -Original Message-
> From: Zhang Rui [mailto:rui.zh...@intel.com]
> Sent: Friday, August 19, 2016 8:40 PM
> To: Hongtao Jia ; edubez...@gmail.com;
> robh...@kernel.org; ga...@codeaurora.org; Scott Wood
> ; shawn...@kernel.org
> Cc: linux...@vger.kernel.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linuxppc-...@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org
> Subject: Re: [PATCH V2 7/7] thermal: qoriq: Add thermal management support
>
> On 四, 2016-06-30 at 11:08 +0800, Jia Hongtao wrote:
> > This driver add thermal management support by enabling TMU (Thermal
> > Monitoring Unit) on QorIQ platform.
> >
> > It's based on thermal of framework:
> > - Trip points defined in device tree.
> > - Cpufreq as cooling device registered in qoriq cpufreq driver.
> >
> > Signed-off-by: Jia Hongtao
>
> The patch looks good to me.
> I only need to take this patch, right?
>
> thanks,
> rui
Yes. You just need to take this patch.
Sorry for the late response. I was on my long vacation back then.
Thanks,
Hongtao.
> > ---
> > Changes of V2:
> > * Add HAS_IOMEM dependency to fix build error on UM
> >
> > drivers/thermal/Kconfig | 10 ++
> > drivers/thermal/Makefile| 1 +
> > drivers/thermal/qoriq_thermal.c | 328
> >
> > 3 files changed, 339 insertions(+)
> > create mode 100644 drivers/thermal/qoriq_thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index 2d702ca..56ef30d 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -195,6 +195,16 @@ config IMX_THERMAL
> > cpufreq is used as the cooling device to throttle CPUs
> > when the
> > passive trip is crossed.
> >
> > +config QORIQ_THERMAL
> > + tristate "QorIQ Thermal Monitoring Unit"
> > + depends on THERMAL_OF
> > + depends on HAS_IOMEM
> > + help
> > + Support for Thermal Monitoring Unit (TMU) found on QorIQ
> > platforms.
> > + It supports one critical trip point and one passive trip
> > point. The
> > + cpufreq is used as the cooling device to throttle CPUs
> > when the
> > + passive trip is crossed.
> > +
> > config SPEAR_THERMAL
> > tristate "SPEAr thermal sensor driver"
> > depends on PLAT_SPEAR || COMPILE_TEST
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 10b07c1..6662232 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL) +=
> > db8500_thermal.o
> > obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
> > obj-$(CONFIG_TANGO_THERMAL)+= tango_thermal.o
> > obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
> > +obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
> > obj-$(CONFIG_DB8500_CPUFREQ_COOLING) +=
> > db8500_cpufreq_cooling.o
> > obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
> > obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
> > diff --git a/drivers/thermal/qoriq_thermal.c
> > b/drivers/thermal/qoriq_thermal.c
> > new file mode 100644
> > index 000..644ba52
> > --- /dev/null
> > +++ b/drivers/thermal/qoriq_thermal.c
> > @@ -0,0 +1,328 @@
> > +/*
> > + * Copyright 2016 Freescale Semiconductor, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but
> > WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or
> > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
> > License for
> > + * more details.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "thermal_core.h"
> > +
> > +#define SITES_MAX 16
> > +
> > +/*
> > + * QorIQ TMU Registers
> > + */
> > +struct qoriq_tmu_site_regs {
> > + u32 tritsr; /* Immediate Temperature Site
> > Register */
> > + u32 tratsr; /* Average Temperature Site
> > Register */
> > + u8 res0[0x8];
> > +};
> > +
> > +struct qoriq_tmu_regs {
> > + u32 tmr;/* Mode Register */
> > +#define TMR_DISABLE0x0
> > +#define TMR_ME 0x8000
> > +#define TMR_ALPF 0x0c00
> > + u32 tsr;/* Status Register */
> > + u32 tmtmir; /* Temperature measurement
> > interval Register */
> > +#define TMTMIR_DEFAULT 0x000f
> > + u8 res0[0x14];
> > + u32 tier; /* Interrupt Enable Register */
> > +#define TIER_DISABLE 0x0
> > + u32 tidr; /* Interrupt Detect Register */
> > + u32 tiscr; /* Interrupt Site Capture Register
> > */
> > + u32 ticscr; /* Interrupt Critical Site
> > Capture Register */
> > + u8 res1[0x10];
