Re: [PATCH V6 00/13] Support for generic ACPI based PCI host controller
Based on the patchset and add the patch(Add ACPI support for HiSilicon PCIe Host Controllers). Tested on the HiSilicon ARM64 D02 board. it can work ok with Intel 82599 networking card. This is the bootup log which contains PCIe host and Intel 82599 networking card part. Tested-by: Dongdong LiuLoading driver at 0x0006D771000 EntryPoint=0x0006E17E100 Loading driver at 0x0006D771000 EntryPoint=0x0006E17E100 EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... GMAC ExitBootServicesEvent SMMU ExitBootServicesEvent [0.00] Booting Linux on physical CPU 0x2 [0.00] Linux version 4.6.0-rc1+ (l00290354@linux-ioko) (gcc version 4.9.3 20150211 (prerelease) (20150316) ) #27 SMP PREEMPT Tue Apr 26 16:24:06 CST 2016 [0.00] Boot CPU: AArch64 Processor [411fd071] [0.00] earlycon: uart8250 at MMIO32 0x8030 (options '') [0.00] bootconsole [uart8250] enabled [0.00] efi: Getting EFI parameters from FDT: [0.00] EFI v2.50 by EDK II [0.00] efi: SMBIOS=0x7a65 SMBIOS 3.0=0x7a63 ACPI=0x7aba ACPI 2.0=0x7aba0014 [0.00] cma: Reserved 16 MiB at 0x7e80 [0.00] ACPI: Early table checksum verification disabled [0.00] ACPI: RSDP 0x7ABA0014 24 (v02 HISI ) [0.00] ACPI: XSDT 0x7A7000E8 5C (v01 HISI HISI-D02 20140727 0113) [0.00] ACPI: FACP 0x7A5F 00010C (v05 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: DSDT 0x7A5A 001694 (v01 HISI HISI-D02 20140727 INTL 20150619) [0.00] ACPI: DBG2 0x7A61 5A (v00 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: GTDT 0x7A5E 60 (v02 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: APIC 0x7A5D 000564 (v01 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: MCFG 0x7A5C 4C (v01 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: SPCR 0x7A5B 50 (v02 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: IORT 0x7A59 0001FC (v00 INTEL TEMPLATE INTL 20150619) [0.00] ACPI: SPCR: console: uart,mmio,0x8030,115200 [0.00] psci: probing for conduit method from ACPI. NOTICE: [psci_smc_handler]:[347L] PSCI_VERSION CALL NOTICE: [psci_version]:[99L] PSCI_MAJOR_VER: 1: PSCI_MINOR_VER: 0 0808?844 [0.00] psci: PSCIv1.0 detected in firmware. [0.00] psci: Using standard PSCI v0.2 function IDs 0808?844 [0.00] psci: MIGRATE_INFO_TYPE not supported. 0808?844 0808?844 [0.00] percpu: Embedded 20 pages/cpu @ffd1ffe7e000 s43008 r8192 d30720 u81920 [0.00] Detected PIPT I-cache on CPU0 [0.00] CPU features: enabling workaround for ARM erratum 832075 [0.00] CPU features: enabling workaround for ARM erratum 834220 [0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2063376 [0.00] Kernel command line: console=ttyS0,115200 earlycon=uart8250,mmio32,0x8030 initrd=filesystem.cpio.gz acpi=force pcie_aspm=off [0.00] PCIe ASPM is disabled [0.00] log_buf_len individual max cpu contribution: 4096 bytes [0.00] log_buf_len total cpu_extra contributions: 61440 bytes [0.00] log_buf_len min size: 16384 bytes [0.00] log_buf_len: 131072 bytes [0.00] early log buf free: 13088(79%) [0.00] PID hash table entries: 4096 (order: 3, 32768 bytes) [0.00] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes) [0.00] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes) [0.00] software IO TLB [mem 0x764f-0x7a4f] (64MB) mapped at [ffc0764f-ffc07a4e] [0.00] Memory: 8110360K/8384512K available (7240K kernel code, 632K rwdata, 3028K rodata, 840K init, 247K bss, 257768K reserved, 16384K cma-reserved) [0.00] Virtual kernel memory layout: [0.00] modules : 0xff80 - 0xff800800 ( 128 MB) [0.00] vmalloc : 0xff800800 - 0xffbdbfff ( 246 GB) [0.00] .text : 0xff800808 - 0xff800879 ( 7232 KB) [0.00] .rodata : 0xff800879 - 0xff8008a89000 ( 3044 KB) [0.00] .init : 0xff8008a89000 - 0xff8008b5b000 ( 840 KB) [0.00] .data : 0xff8008b5b000 - 0xff8008bf9200 ( 633 KB) [0.00] vmemmap : 0xffbdc000 - 0xffbfc000 ( 8 GB maximum) [0.00] 0xffbdc000 - 0xffbe0800 ( 1152 MB actual) [0.00] fixed : 0xffbffe7fd000 - 0xffbffec0 ( 4108 KB) [0.00] PCI I/O : 0xffbffee0 - 0xffbfffe0 (16 MB) [
Re: [PATCH V6 00/13] Support for generic ACPI based PCI host controller
Based on the patchset and add the patch(Add ACPI support for HiSilicon PCIe Host Controllers). Tested on the HiSilicon ARM64 D02 board. it can work ok with Intel 82599 networking card. This is the bootup log which contains PCIe host and Intel 82599 networking card part. Tested-by: Dongdong Liu Loading driver at 0x0006D771000 EntryPoint=0x0006E17E100 Loading driver at 0x0006D771000 EntryPoint=0x0006E17E100 EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... GMAC ExitBootServicesEvent SMMU ExitBootServicesEvent [0.00] Booting Linux on physical CPU 0x2 [0.00] Linux version 4.6.0-rc1+ (l00290354@linux-ioko) (gcc version 4.9.3 20150211 (prerelease) (20150316) ) #27 SMP PREEMPT Tue Apr 26 16:24:06 CST 2016 [0.00] Boot CPU: AArch64 Processor [411fd071] [0.00] earlycon: uart8250 at MMIO32 0x8030 (options '') [0.00] bootconsole [uart8250] enabled [0.00] efi: Getting EFI parameters from FDT: [0.00] EFI v2.50 by EDK II [0.00] efi: SMBIOS=0x7a65 SMBIOS 3.0=0x7a63 ACPI=0x7aba ACPI 2.0=0x7aba0014 [0.00] cma: Reserved 16 MiB at 0x7e80 [0.00] ACPI: Early table checksum verification disabled [0.00] ACPI: RSDP 0x7ABA0014 24 (v02 HISI ) [0.00] ACPI: XSDT 0x7A7000E8 5C (v01 HISI HISI-D02 20140727 0113) [0.00] ACPI: FACP 0x7A5F 00010C (v05 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: DSDT 0x7A5A 001694 (v01 HISI HISI-D02 20140727 INTL 20150619) [0.00] ACPI: DBG2 0x7A61 5A (v00 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: GTDT 0x7A5E 60 (v02 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: APIC 0x7A5D 000564 (v01 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: MCFG 0x7A5C 4C (v01 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: SPCR 0x7A5B 50 (v02 HISI HISI-D02 20140727 HISI 0099) [0.00] ACPI: IORT 0x7A59 0001FC (v00 INTEL TEMPLATE INTL 20150619) [0.00] ACPI: SPCR: console: uart,mmio,0x8030,115200 [0.00] psci: probing for conduit method from ACPI. NOTICE: [psci_smc_handler]:[347L] PSCI_VERSION CALL NOTICE: [psci_version]:[99L] PSCI_MAJOR_VER: 1: PSCI_MINOR_VER: 0 0808?844 [0.00] psci: PSCIv1.0 detected in firmware. [0.00] psci: Using standard PSCI v0.2 function IDs 0808?844 [0.00] psci: MIGRATE_INFO_TYPE not supported. 0808?844 0808?844 [0.00] percpu: Embedded 20 pages/cpu @ffd1ffe7e000 s43008 r8192 d30720 u81920 [0.00] Detected PIPT I-cache on CPU0 [0.00] CPU features: enabling workaround for ARM erratum 832075 [0.00] CPU features: enabling workaround for ARM erratum 834220 [0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2063376 [0.00] Kernel command line: console=ttyS0,115200 earlycon=uart8250,mmio32,0x8030 initrd=filesystem.cpio.gz acpi=force pcie_aspm=off [0.00] PCIe ASPM is disabled [0.00] log_buf_len individual max cpu contribution: 4096 bytes [0.00] log_buf_len total cpu_extra contributions: 61440 bytes [0.00] log_buf_len min size: 16384 bytes [0.00] log_buf_len: 131072 bytes [0.00] early log buf free: 13088(79%) [0.00] PID hash table entries: 4096 (order: 3, 32768 bytes) [0.00] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes) [0.00] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes) [0.00] software IO TLB [mem 0x764f-0x7a4f] (64MB) mapped at [ffc0764f-ffc07a4e] [0.00] Memory: 8110360K/8384512K available (7240K kernel code, 632K rwdata, 3028K rodata, 840K init, 247K bss, 257768K reserved, 16384K cma-reserved) [0.00] Virtual kernel memory layout: [0.00] modules : 0xff80 - 0xff800800 ( 128 MB) [0.00] vmalloc : 0xff800800 - 0xffbdbfff ( 246 GB) [0.00] .text : 0xff800808 - 0xff800879 ( 7232 KB) [0.00] .rodata : 0xff800879 - 0xff8008a89000 ( 3044 KB) [0.00] .init : 0xff8008a89000 - 0xff8008b5b000 ( 840 KB) [0.00] .data : 0xff8008b5b000 - 0xff8008bf9200 ( 633 KB) [0.00] vmemmap : 0xffbdc000 - 0xffbfc000 ( 8 GB maximum) [0.00] 0xffbdc000 - 0xffbe0800 ( 1152 MB actual) [0.00] fixed : 0xffbffe7fd000 - 0xffbffec0 ( 4108 KB) [0.00] PCI I/O : 0xffbffee0 - 0xffbfffe0 (16 MB) [0.00] memory :
Re: [PATCH V6 11/13] pci, acpi: Match PCI config space accessors against platfrom specific quirks.
Hi Tomasz I merged my patchset to branch topci-acpi-v6. The patchset is used for Hisilicon DO2 PCIe ACPI support. I found some compile errors. The log as below. drivers/pci/host/pcie-hisi-acpi.c: In function 'hisi_pcie_init': drivers/pci/host/pcie-hisi-acpi.c:130:6: error: 'struct acpi_pci_root' has no member named 'sysdata' root->sysdata = reg_base; In your PATCH V5, add "sysdata" for strcut acpi_pci_root, but PATCH V6 has not add it. In my patch, I used root->sysdata which will be available along read/write accessor. I want to know the reason this v6 patchset does not add "sysdata". I need this. diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 14362a8..0fc6f13 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -556,6 +556,7 @@ struct acpi_pci_root { struct pci_bus *bus; u16 segment; struct resource secondary; /* downstream bus range */ + void *sysdata; u32 osc_support_set;/* _OSC state of support bits */ u32 osc_control_set;/* _OSC state of control bits */ Thanks Dongdong 在 2016/4/16 1:06, Tomasz Nowicki 写道: Some platforms may not be fully compliant with generic set of PCI config accessors. For these cases we implement the way to overwrite accessors set prior to PCI buses enumeration. Algorithm traverses available quirk list, matches against tuple and an extra match call and returns corresponding PCI config ops. All quirks can be defined using: DECLARE_ACPI_MCFG_FIXUP() macro and kept self contained. Example: /* Additional DMI platform identification (optional) */ static const struct dmi_system_id foo_dmi[] = { { .ident = "", .matches = { DMI_MATCH(DMI_SYS_VENDOR, ""), DMI_MATCH(DMI_PRODUCT_NAME, ""), DMI_MATCH(DMI_PRODUCT_VERSION, "product version"), }, }, { } }; /* Custom PCI config ops */ static struct pci_generic_ecam_ops foo_pci_ops = { .bus_shift = 24, .pci_ops = { .map_bus = pci_mcfg_dev_base, .read = foo_ecam_config_read, .write = foo_ecam_config_write, } }; static int foo_match(struct pci_mcfg_fixup *fixup, struct acpi_pci_root *root) { if (additional platform identification) return true; return false; } DECLARE_ACPI_MCFG_FIXUP(foo_dmi, foo_init, _root_ops, , ); Signed-off-by: Tomasz Nowicki--- drivers/acpi/pci_gen_host.c | 30 +- include/asm-generic/vmlinux.lds.h | 7 +++ include/linux/pci-acpi.h | 18 ++ 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/pci_gen_host.c b/drivers/acpi/pci_gen_host.c index fd360b5..e55dfca 100644 --- a/drivers/acpi/pci_gen_host.c +++ b/drivers/acpi/pci_gen_host.c @@ -11,6 +11,8 @@ * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. */ + +#include #include #include #include @@ -54,6 +56,32 @@ static struct mcfg_entry *pci_mcfg_lookup(u16 seg, u8 bus_start) return NULL; } +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[]; +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[]; + +static struct pci_generic_ecam_ops *pci_acpi_get_ops(struct acpi_pci_root *root) +{ + int bus_num = root->secondary.start; + int domain = root->segment; + struct pci_cfg_fixup *f; + + /* +* Match against platform specific quirks and return corresponding +* CAM ops. +* +* First match against PCI topology then use DMI or +* custom match handler. +*/ + for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) { + if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) && + (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) && + (f->system ? dmi_check_system(f->system) : 1) && + (f->match ? f->match(f, root) : 1)) + return f->ops; + } + /* No quirks, use ECAM */ + return _generic_ecam_default_ops; +} /* * Lookup the bus range for the domain in MCFG, and set up config space @@ -95,7 +123,7 @@ static int pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root, } cfg = pci_generic_ecam_create(>device->dev, addr, bus_start, - bus_end, _generic_ecam_default_ops); + bus_end, pci_acpi_get_ops(root)); if (IS_ERR(cfg)) { err = PTR_ERR(cfg); pr_err("%04x:%02x-%02x error %d mapping CAM\n", seg, diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 339125b..c53b6b7 100644 --- a/include/asm-generic/vmlinux.lds.h +++
Re: [PATCH V6 11/13] pci, acpi: Match PCI config space accessors against platfrom specific quirks.
Hi Tomasz I merged my patchset to branch topci-acpi-v6. The patchset is used for Hisilicon DO2 PCIe ACPI support. I found some compile errors. The log as below. drivers/pci/host/pcie-hisi-acpi.c: In function 'hisi_pcie_init': drivers/pci/host/pcie-hisi-acpi.c:130:6: error: 'struct acpi_pci_root' has no member named 'sysdata' root->sysdata = reg_base; In your PATCH V5, add "sysdata" for strcut acpi_pci_root, but PATCH V6 has not add it. In my patch, I used root->sysdata which will be available along read/write accessor. I want to know the reason this v6 patchset does not add "sysdata". I need this. diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 14362a8..0fc6f13 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -556,6 +556,7 @@ struct acpi_pci_root { struct pci_bus *bus; u16 segment; struct resource secondary; /* downstream bus range */ + void *sysdata; u32 osc_support_set;/* _OSC state of support bits */ u32 osc_control_set;/* _OSC state of control bits */ Thanks Dongdong 在 2016/4/16 1:06, Tomasz Nowicki 写道: Some platforms may not be fully compliant with generic set of PCI config accessors. For these cases we implement the way to overwrite accessors set prior to PCI buses enumeration. Algorithm traverses available quirk list, matches against tuple and an extra match call and returns corresponding PCI config ops. All quirks can be defined using: DECLARE_ACPI_MCFG_FIXUP() macro and kept self contained. Example: /* Additional DMI platform identification (optional) */ static const struct dmi_system_id foo_dmi[] = { { .ident = "", .matches = { DMI_MATCH(DMI_SYS_VENDOR, ""), DMI_MATCH(DMI_PRODUCT_NAME, ""), DMI_MATCH(DMI_PRODUCT_VERSION, "product version"), }, }, { } }; /* Custom PCI config ops */ static struct pci_generic_ecam_ops foo_pci_ops = { .bus_shift = 24, .pci_ops = { .map_bus = pci_mcfg_dev_base, .read = foo_ecam_config_read, .write = foo_ecam_config_write, } }; static int foo_match(struct pci_mcfg_fixup *fixup, struct acpi_pci_root *root) { if (additional platform identification) return true; return false; } DECLARE_ACPI_MCFG_FIXUP(foo_dmi, foo_init, _root_ops, , ); Signed-off-by: Tomasz Nowicki --- drivers/acpi/pci_gen_host.c | 30 +- include/asm-generic/vmlinux.lds.h | 7 +++ include/linux/pci-acpi.h | 18 ++ 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/pci_gen_host.c b/drivers/acpi/pci_gen_host.c index fd360b5..e55dfca 100644 --- a/drivers/acpi/pci_gen_host.c +++ b/drivers/acpi/pci_gen_host.c @@ -11,6 +11,8 @@ * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. */ + +#include #include #include #include @@ -54,6 +56,32 @@ static struct mcfg_entry *pci_mcfg_lookup(u16 seg, u8 bus_start) return NULL; } +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[]; +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[]; + +static struct pci_generic_ecam_ops *pci_acpi_get_ops(struct acpi_pci_root *root) +{ + int bus_num = root->secondary.start; + int domain = root->segment; + struct pci_cfg_fixup *f; + + /* +* Match against platform specific quirks and return corresponding +* CAM ops. +* +* First match against PCI topology then use DMI or +* custom match handler. +*/ + for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) { + if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) && + (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) && + (f->system ? dmi_check_system(f->system) : 1) && + (f->match ? f->match(f, root) : 1)) + return f->ops; + } + /* No quirks, use ECAM */ + return _generic_ecam_default_ops; +} /* * Lookup the bus range for the domain in MCFG, and set up config space @@ -95,7 +123,7 @@ static int pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root, } cfg = pci_generic_ecam_create(>device->dev, addr, bus_start, - bus_end, _generic_ecam_default_ops); + bus_end, pci_acpi_get_ops(root)); if (IS_ERR(cfg)) { err = PTR_ERR(cfg); pr_err("%04x:%02x-%02x error %d mapping CAM\n", seg, diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 339125b..c53b6b7 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -298,6
Re: [Linaro-acpi] [PATCH V5 01/15] ACPI: MCFG: Move mmcfg_list management to drivers/acpi
Hi Tomasz 在 2016/2/16 21:53, Tomasz Nowicki 写道: From: Jayachandran CMove pci_mmcfg_list handling to a drivers/acpi/pci_mcfg.c. This is to share the API and code with ARM64 later. The corresponding declarations are moved from asm/pci_x86.h to linux/pci-acpi.h As a part of this we introduce three functions that can be implemented by the arch code: pci_mmconfig_map_resource() to map a mcfg entry, pci_mmconfig_unmap_resource to do the corresponding unmap and pci_mmconfig_enabled to see if the arch setup of mcfg entries was successful. We also provide weak implementations of these, which will be used from ARM64. On x86, we retain the old logic by providing platform specific implementation. This patch is purely rearranging code, it should not have any impact on the logic of MCFG parsing or list handling. Signed-off-by: Jayachandran C [Xen parts:] Acked-by: David Vrabel --- arch/x86/include/asm/pci_x86.h | 24 +--- arch/x86/pci/mmconfig-shared.c | 269 +-- arch/x86/pci/mmconfig_32.c | 1 + arch/x86/pci/mmconfig_64.c | 1 + arch/x86/pci/numachip.c| 1 + drivers/acpi/Makefile | 1 + drivers/acpi/pci_mcfg.c| 312 + drivers/xen/pci.c | 5 +- include/linux/pci-acpi.h | 33 + 9 files changed, 386 insertions(+), 261 deletions(-) create mode 100644 drivers/acpi/pci_mcfg.c diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 46873fb..7824626 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -122,33 +122,11 @@ extern int pci_legacy_init(void); extern void pcibios_fixup_irqs(void); /* pci-mmconfig.c */ - -/* "PCI MMCONFIG %04x [bus %02x-%02x]" */ -#define PCI_MMCFG_RESOURCE_NAME_LEN (22 + 4 + 2 + 2) - -struct pci_mmcfg_region { - struct list_head list; - struct resource res; - u64 address; - char __iomem *virt; - u16 segment; - u8 start_bus; - u8 end_bus; - char name[PCI_MMCFG_RESOURCE_NAME_LEN]; -}; - +struct pci_mmcfg_region; extern int __init pci_mmcfg_arch_init(void); extern void __init pci_mmcfg_arch_free(void); extern int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg); extern void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg); -extern int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end, - phys_addr_t addr); -extern int pci_mmconfig_delete(u16 seg, u8 start, u8 end); -extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus); - -extern struct list_head pci_mmcfg_list; - -#define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20) /* * On AMD Fam10h CPUs, all PCI MMIO configuration space accesses must use diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index dd30b7e..626710b 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c @@ -12,13 +12,12 @@ #include #include -#include #include -#include #include #include #include #include +#include #include #include @@ -27,9 +26,6 @@ /* Indicate if the mmcfg resources have been placed into the resource table. */ static bool pci_mmcfg_running_state; static bool pci_mmcfg_arch_init_failed; -static DEFINE_MUTEX(pci_mmcfg_lock); - -LIST_HEAD(pci_mmcfg_list); static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) { @@ -48,83 +44,6 @@ static void __init free_all_mmcfg(void) pci_mmconfig_remove(cfg); } -static void list_add_sorted(struct pci_mmcfg_region *new) -{ - struct pci_mmcfg_region *cfg; - - /* keep list sorted by segment and starting bus number */ - list_for_each_entry_rcu(cfg, _mmcfg_list, list) { - if (cfg->segment > new->segment || - (cfg->segment == new->segment && -cfg->start_bus >= new->start_bus)) { - list_add_tail_rcu(>list, >list); - return; - } - } - list_add_tail_rcu(>list, _mmcfg_list); -} - -static struct pci_mmcfg_region *pci_mmconfig_alloc(int segment, int start, - int end, u64 addr) -{ - struct pci_mmcfg_region *new; - struct resource *res; - - if (addr == 0) - return NULL; - - new = kzalloc(sizeof(*new), GFP_KERNEL); - if (!new) - return NULL; - - new->address = addr; - new->segment = segment; - new->start_bus = start; - new->end_bus = end; - - res = >res; - res->start = addr + PCI_MMCFG_BUS_OFFSET(start); - res->end = addr + PCI_MMCFG_BUS_OFFSET(end + 1) - 1; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; - snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN, -"PCI MMCONFIG %04x [bus %02x-%02x]",
Re: [Linaro-acpi] [PATCH V5 01/15] ACPI: MCFG: Move mmcfg_list management to drivers/acpi
Hi Tomasz 在 2016/2/16 21:53, Tomasz Nowicki 写道: From: Jayachandran C Move pci_mmcfg_list handling to a drivers/acpi/pci_mcfg.c. This is to share the API and code with ARM64 later. The corresponding declarations are moved from asm/pci_x86.h to linux/pci-acpi.h As a part of this we introduce three functions that can be implemented by the arch code: pci_mmconfig_map_resource() to map a mcfg entry, pci_mmconfig_unmap_resource to do the corresponding unmap and pci_mmconfig_enabled to see if the arch setup of mcfg entries was successful. We also provide weak implementations of these, which will be used from ARM64. On x86, we retain the old logic by providing platform specific implementation. This patch is purely rearranging code, it should not have any impact on the logic of MCFG parsing or list handling. Signed-off-by: Jayachandran C [Xen parts:] Acked-by: David Vrabel --- arch/x86/include/asm/pci_x86.h | 24 +--- arch/x86/pci/mmconfig-shared.c | 269 +-- arch/x86/pci/mmconfig_32.c | 1 + arch/x86/pci/mmconfig_64.c | 1 + arch/x86/pci/numachip.c| 1 + drivers/acpi/Makefile | 1 + drivers/acpi/pci_mcfg.c| 312 + drivers/xen/pci.c | 5 +- include/linux/pci-acpi.h | 33 + 9 files changed, 386 insertions(+), 261 deletions(-) create mode 100644 drivers/acpi/pci_mcfg.c diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 46873fb..7824626 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -122,33 +122,11 @@ extern int pci_legacy_init(void); extern void pcibios_fixup_irqs(void); /* pci-mmconfig.c */ - -/* "PCI MMCONFIG %04x [bus %02x-%02x]" */ -#define PCI_MMCFG_RESOURCE_NAME_LEN (22 + 4 + 2 + 2) - -struct pci_mmcfg_region { - struct list_head list; - struct resource res; - u64 address; - char __iomem *virt; - u16 segment; - u8 start_bus; - u8 end_bus; - char name[PCI_MMCFG_RESOURCE_NAME_LEN]; -}; - +struct pci_mmcfg_region; extern int __init pci_mmcfg_arch_init(void); extern void __init pci_mmcfg_arch_free(void); extern int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg); extern void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg); -extern int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end, - phys_addr_t addr); -extern int pci_mmconfig_delete(u16 seg, u8 start, u8 end); -extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus); - -extern struct list_head pci_mmcfg_list; - -#define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20) /* * On AMD Fam10h CPUs, all PCI MMIO configuration space accesses must use diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index dd30b7e..626710b 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c @@ -12,13 +12,12 @@ #include #include -#include #include -#include #include #include #include #include +#include #include #include @@ -27,9 +26,6 @@ /* Indicate if the mmcfg resources have been placed into the resource table. */ static bool pci_mmcfg_running_state; static bool pci_mmcfg_arch_init_failed; -static DEFINE_MUTEX(pci_mmcfg_lock); - -LIST_HEAD(pci_mmcfg_list); static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg) { @@ -48,83 +44,6 @@ static void __init free_all_mmcfg(void) pci_mmconfig_remove(cfg); } -static void list_add_sorted(struct pci_mmcfg_region *new) -{ - struct pci_mmcfg_region *cfg; - - /* keep list sorted by segment and starting bus number */ - list_for_each_entry_rcu(cfg, _mmcfg_list, list) { - if (cfg->segment > new->segment || - (cfg->segment == new->segment && -cfg->start_bus >= new->start_bus)) { - list_add_tail_rcu(>list, >list); - return; - } - } - list_add_tail_rcu(>list, _mmcfg_list); -} - -static struct pci_mmcfg_region *pci_mmconfig_alloc(int segment, int start, - int end, u64 addr) -{ - struct pci_mmcfg_region *new; - struct resource *res; - - if (addr == 0) - return NULL; - - new = kzalloc(sizeof(*new), GFP_KERNEL); - if (!new) - return NULL; - - new->address = addr; - new->segment = segment; - new->start_bus = start; - new->end_bus = end; - - res = >res; - res->start = addr + PCI_MMCFG_BUS_OFFSET(start); - res->end = addr + PCI_MMCFG_BUS_OFFSET(end + 1) - 1; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; - snprintf(new->name, PCI_MMCFG_RESOURCE_NAME_LEN, -"PCI MMCONFIG %04x [bus %02x-%02x]", segment, start, end); - res->name = new->name; - - return
Re: [PATCH V3 00/21] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI
在 2016/1/13 21:20, Tomasz Nowicki 写道: From the functionality point of view this series might be split into the following logic parts: 1. Make MMCONFIG code arch-agnostic which allows all architectures to collect PCI config regions and used when necessary. 2. Move non-arch specific bits to the core code. 3. Use MMCONFIG code and implement generic ACPI based PCI host controller driver. 4. Enable above driver on ARM64 Patches has been built on top of 4.4 and can be found here: g...@github.com:semihalf-nowicki-tomasz/linux.git (pci-acpi-v3) NOTE, this patch set depends on Matthew's patches: http://www.spinics.net/lists/linux-pci/msg45950.html https://github.com/Vality/linux/tree/pci-fixes This has been tested on Cavium ThunderX server and QEMU. Any help in reviewing and testing is very appreciated. v2 -> v3 - fix legacy IRQ assigning and IO ports registration - remove reference to arch specific companion device for ia64 - move ACPI PCI host controller driver to pci_root.c - drop generic domain assignment for x86 and ia64 as I am not able to run all necessary test variants - drop patch which cleaned legacy IRQ assignment since it belongs to Mathew's series: https://patchwork.ozlabs.org/patch/557504/ - extend MCFG quirk code - rebased to 4.4 Based on the patchset and add the Hip05 ACPI specific quirks. Tested on the HiSilicon ARM64 D02 board. I made a test based on Intel 82599 networking card,it can work ok. this is the bootup log which contains PCIe host and Intel 82599 networking card part. Tested-by: Dongdong Liu EFI stub: Booting Linux Kernel... EFI stub: Using DTB from command line EFI stub: Exiting boot services and installing virtual address map... GMAC ExitBootServicesEvent SMMU ExitBootServicesEvent Booting Linux on physical CPU 0x2 Initializing cgroup subsys cpu Linux version 4.4.0-rc2+ (l00290354@linux-ioko) (gcc version 4.9.3 20150211 (prerelease) (20150316) ) #194 SMP PREEMPT Thu Jan 28 09:51:15 CST 2016 Boot CPU: AArch64 Processor [411fd071] earlycon: Early serial console at MMIO32 0x8030 (options '') bootconsole [uart0] enabled efi: Getting EFI parameters from FDT: EFI v2.50 by ARM Versatile Express EFI Jan 13 2016 20:43:10 efi: SMBIOS=0x7aae SMBIOS 3.0=0x7aac ACPI=0x7ab2 ACPI 2.0=0x7ab20014 cma: Reserved 16 MiB at 0x7e80 ACPI: Early table checksum verification disabled ACPI: RSDP 0x7AB20014 24 (v02 HISI ) ACPI: XSDT 0x7AB100E8 6C (v01 HISI HISI-D02 20140727 0113) ACPI: FACP 0x7AA8 00010C (v05 HISI HISI-D02 20140727 HISI 0099) ACPI: Override [DSDT-HISI-D02], this is unsafe: tainting kernel Disabling lock debugging due to kernel taint ACPI: DSDT 0x7AA1 Logical table override, new table: 0xFFC0009CB8B8 ACPI: DSDT 0xFFC0009CB8B8 0015B5 (v01 HISI HISI-D02 20140727 INTL 20150619) ACPI: DBG2 0x7AAA 5A (v00 HISI HISI-D02 20140727 HISI 0099) ACPI: GTDT 0x7AA7 60 (v02 HISI HISI-D02 20140727 HISI 0099) ACPI: APIC 0x7AA6 000564 (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: MCFG 0x7AA5 4C (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: SLIT 0x7AA4 0001BC (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: SPCR 0x7AA3 50 (v02 HISI HISI-D02 20140727 HISI 0099) ACPI: SRAT 0x7AA2 0001B0 (v03 HISI HISI-D02 20140727 HISI 0099) ACPI: IORT 0x7AA0 0001FC (v00 INTEL TEMPLATE INTL 20150619) psci: probing for conduit method from ACPI. NOTICE: [psci_smc_handler]:[349L] PSCI_VERSION CALL NOTICE: [psci_version]:[101L] PSCI_MAJOR_VER: 1: PSCI_MINOR_VER: 0 0008;<54 psci: PSCIv1.0 detected in firmware. psci: Using standard PSCI v0.2 function IDs 0008;<54 psci: MIGRATE_INFO_TYPE not supported. 0008;<54 0008;<54 PERCPU: Embedded 15 pages/cpu @ffd1ffedb000 s24576 r8192 d28672 u61440 Detected PIPT I-cache on CPU0 CPU features: enabling workaround for ARM erratum 832075 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2063376 Kernel command line: dtb=hip05-d02.dtb console=ttyS0,115200 earlycon=uart8250,mmio32,0x8030 initrd=filesystem.cpio.gz acpi=force log_buf_len individual max cpu contribution: 4096 bytes log_buf_len total cpu_extra contributions: 61440 bytes log_buf_len min size: 16384 bytes log_buf_len: 131072 bytes early log buf free: 12732(77%) PID hash table entries: 4096 (order: 3, 32768 bytes) Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes) Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes) software IO TLB [mem 0x76a0-0x7aa0] (64MB) mapped at [ffc076a0-ffc07a9f] Memory: 8052312K/8384512K available (6074K kernel code, 519K rwdata, 2556K rodata, 572K init, 212K bss, 315816K reserved, 16384K cma-reserved) Virtual kernel memory layout: vmalloc : 0xff80 - 0xffbdbfff ( 246 GB) vmemmap :
Re: [PATCH V3 00/21] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI
在 2016/1/13 21:20, Tomasz Nowicki 写道: From the functionality point of view this series might be split into the following logic parts: 1. Make MMCONFIG code arch-agnostic which allows all architectures to collect PCI config regions and used when necessary. 2. Move non-arch specific bits to the core code. 3. Use MMCONFIG code and implement generic ACPI based PCI host controller driver. 4. Enable above driver on ARM64 Patches has been built on top of 4.4 and can be found here: g...@github.com:semihalf-nowicki-tomasz/linux.git (pci-acpi-v3) NOTE, this patch set depends on Matthew's patches: http://www.spinics.net/lists/linux-pci/msg45950.html https://github.com/Vality/linux/tree/pci-fixes This has been tested on Cavium ThunderX server and QEMU. Any help in reviewing and testing is very appreciated. v2 -> v3 - fix legacy IRQ assigning and IO ports registration - remove reference to arch specific companion device for ia64 - move ACPI PCI host controller driver to pci_root.c - drop generic domain assignment for x86 and ia64 as I am not able to run all necessary test variants - drop patch which cleaned legacy IRQ assignment since it belongs to Mathew's series: https://patchwork.ozlabs.org/patch/557504/ - extend MCFG quirk code - rebased to 4.4 Based on the patchset and add the Hip05 ACPI specific quirks. Tested on the HiSilicon ARM64 D02 board. I made a test based on Intel 82599 networking card,it can work ok. this is the bootup log which contains PCIe host and Intel 82599 networking card part. Tested-by: Dongdong LiuEFI stub: Booting Linux Kernel... EFI stub: Using DTB from command line EFI stub: Exiting boot services and installing virtual address map... GMAC ExitBootServicesEvent SMMU ExitBootServicesEvent Booting Linux on physical CPU 0x2 Initializing cgroup subsys cpu Linux version 4.4.0-rc2+ (l00290354@linux-ioko) (gcc version 4.9.3 20150211 (prerelease) (20150316) ) #194 SMP PREEMPT Thu Jan 28 09:51:15 CST 2016 Boot CPU: AArch64 Processor [411fd071] earlycon: Early serial console at MMIO32 0x8030 (options '') bootconsole [uart0] enabled efi: Getting EFI parameters from FDT: EFI v2.50 by ARM Versatile Express EFI Jan 13 2016 20:43:10 efi: SMBIOS=0x7aae SMBIOS 3.0=0x7aac ACPI=0x7ab2 ACPI 2.0=0x7ab20014 cma: Reserved 16 MiB at 0x7e80 ACPI: Early table checksum verification disabled ACPI: RSDP 0x7AB20014 24 (v02 HISI ) ACPI: XSDT 0x7AB100E8 6C (v01 HISI HISI-D02 20140727 0113) ACPI: FACP 0x7AA8 00010C (v05 HISI HISI-D02 20140727 HISI 0099) ACPI: Override [DSDT-HISI-D02], this is unsafe: tainting kernel Disabling lock debugging due to kernel taint ACPI: DSDT 0x7AA1 Logical table override, new table: 0xFFC0009CB8B8 ACPI: DSDT 0xFFC0009CB8B8 0015B5 (v01 HISI HISI-D02 20140727 INTL 20150619) ACPI: DBG2 0x7AAA 5A (v00 HISI HISI-D02 20140727 HISI 0099) ACPI: GTDT 0x7AA7 60 (v02 HISI HISI-D02 20140727 HISI 0099) ACPI: APIC 0x7AA6 000564 (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: MCFG 0x7AA5 4C (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: SLIT 0x7AA4 0001BC (v01 HISI HISI-D02 20140727 HISI 0099) ACPI: SPCR 0x7AA3 50 (v02 HISI HISI-D02 20140727 HISI 0099) ACPI: SRAT 0x7AA2 0001B0 (v03 HISI HISI-D02 20140727 HISI 0099) ACPI: IORT 0x7AA0 0001FC (v00 INTEL TEMPLATE INTL 20150619) psci: probing for conduit method from ACPI. NOTICE: [psci_smc_handler]:[349L] PSCI_VERSION CALL NOTICE: [psci_version]:[101L] PSCI_MAJOR_VER: 1: PSCI_MINOR_VER: 0 0008;<54 psci: PSCIv1.0 detected in firmware. psci: Using standard PSCI v0.2 function IDs 0008;<54 psci: MIGRATE_INFO_TYPE not supported. 0008;<54 0008;<54 PERCPU: Embedded 15 pages/cpu @ffd1ffedb000 s24576 r8192 d28672 u61440 Detected PIPT I-cache on CPU0 CPU features: enabling workaround for ARM erratum 832075 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 2063376 Kernel command line: dtb=hip05-d02.dtb console=ttyS0,115200 earlycon=uart8250,mmio32,0x8030 initrd=filesystem.cpio.gz acpi=force log_buf_len individual max cpu contribution: 4096 bytes log_buf_len total cpu_extra contributions: 61440 bytes log_buf_len min size: 16384 bytes log_buf_len: 131072 bytes early log buf free: 12732(77%) PID hash table entries: 4096 (order: 3, 32768 bytes) Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes) Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes) software IO TLB [mem 0x76a0-0x7aa0] (64MB) mapped at [ffc076a0-ffc07a9f] Memory: 8052312K/8384512K available (6074K kernel code, 519K rwdata, 2556K rodata, 572K init, 212K bss, 315816K reserved, 16384K cma-reserved) Virtual kernel memory layout: vmalloc : 0xff80 - 0xffbdbfff ( 246