From: Shun-Chih Yu
This patch fixes wrong register usage in the mtk_cqdma_start. The
destination register should be MTK_CQDMA_DST2 instead.
Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA
controller for MT6765 SoC")
Signed-off-by: Shun-Chih Yu
---
Add document the devicetree bindings for MediaTek Command-Queue DMA controller.
Changes since v1:
1. fix wrong description and tags in the earlier patch
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
Acked-by: Sean Wang
---
.../devicetree/bindings/dma/mtk-cqdma.txt |
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Change-Id: I9736c8cac9be160358feeab935fabaffc5730519
Signed-off-by: Shun-Chih Yu
---
.../devicetree/bindings/dma/mtk-cqdma.txt
Add document the devicetree bindings for MediaTek Command-Queue DMA controller.
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
This patchset introduces support for MediaTek Command-Queue DMA controller in
dt-bindings, and simplifies the controller by removing redundant structures.
Main changes to the initial version:
- remove redundant queue structure in mtk_cqdma_pchan
- remove redundant completion management
- remove
From: Shun-Chih Yu
This patch introduces active_vdec to indicate the virtual descriptor
under processing by the CQDMA dmaengine, and simplify the control logic
by removing redundant queue structure, tasklets, and completion
management.
Also, wrong residue assignment in mtk_cqdma_tx_status and
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to
memory-to-memory transfer through queue-based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
Changes since v3:
- simplify the ISR and management on descriptors by removing tasklet and
ASYNC_TX_ENABLE_CHANNEL_SWITCH
- remove useless field in mtk_cqdma_vdesc structure
- change dev_info to dev_dbg
- fix typos
Changes since v2:
- fix build warning for kernel with DMA address in 32-bit
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Change-Id: I9736c8cac9be160358feeab935fabaffc5730519
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
Changes since v2:
- fix build warning for kernel with DMA address in 32-bit
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
Shun-Chih Yu (2):
dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
Changes since v2:
- fix build warning for kernel with DMA address in 32-bit
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
Shun-Chih Yu (2):
dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to
memory-to-memory
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to
memory-to-memory
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
1 file changed, 31
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to
memory-to-memory transfer through queue-based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Signed-off-by: Shun-Chih Yu
---
.../devicetree/bindings/dma/mtk-cqdma.txt | 31
1 file changed, 31
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to
memory-to-memory transfer through queue-based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
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