[tip:ras/core] x86/mce/AMD: Increase size of the bank_map type

Commit-ID: 955d1427a91b18f53e082bd7c19c40ce13b0a0f4 Gitweb: http://git.kernel.org/tip/955d1427a91b18f53e082bd7c19c40ce13b0a0f4 Author: Aravind Gopalakrishnan AuthorDate: Fri, 8 Jul 2016 11:09:38 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Increase size of the bank_map type

Commit-ID: 955d1427a91b18f53e082bd7c19c40ce13b0a0f4 Gitweb: http://git.kernel.org/tip/955d1427a91b18f53e082bd7c19c40ce13b0a0f4 Author: Aravind Gopalakrishnan AuthorDate: Fri, 8 Jul 2016 11:09:38 +0200 Committer: Ingo Molnar CommitDate: Fri, 8 Jul 2016 11:29:25 +0200 x86/mce/AMD:

[tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled systems

Commit-ID: 6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419 Gitweb: http://git.kernel.org/tip/6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419 Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:52 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL

Commit-ID: bb91f8c0176b072aeb6b84cfd7e04084025121e0 Gitweb: http://git.kernel.org/tip/bb91f8c0176b072aeb6b84cfd7e04084025121e0 Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:53 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h and later

Commit-ID: 10001d91aa0efc793952051f9070a569cc388ebc Gitweb: http://git.kernel.org/tip/10001d91aa0efc793952051f9070a569cc388ebc Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:51 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce: Grade uncorrected errors for SMCA-enabled systems

Commit-ID: 6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419 Gitweb: http://git.kernel.org/tip/6bda529ec42e1cd4dde1c3d0a1a18000ffd3d419 Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:52 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:15 +0200 x86/mce: Grade

[tip:ras/core] x86/mce: Carve out writes to MCx_STATUS and MCx_CTL

Commit-ID: bb91f8c0176b072aeb6b84cfd7e04084025121e0 Gitweb: http://git.kernel.org/tip/bb91f8c0176b072aeb6b84cfd7e04084025121e0 Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:53 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:16 +0200 x86/mce: Carve

[tip:ras/core] x86/mce: Log MCEs after a warm rest on AMD, Fam17h and later

Commit-ID: 10001d91aa0efc793952051f9070a569cc388ebc Gitweb: http://git.kernel.org/tip/10001d91aa0efc793952051f9070a569cc388ebc Author: Aravind Gopalakrishnan AuthorDate: Sat, 30 Apr 2016 14:33:51 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:15 +0200 x86/mce: Log MCEs

[tip:ras/core] x86/mce/AMD: Document some functionality

Commit-ID: ea2ca36b658cfc6081ee454e97593c81f646806e Gitweb: http://git.kernel.org/tip/ea2ca36b658cfc6081ee454e97593c81f646806e Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:21 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Fix logic to obtain block address

Commit-ID: 8dd1e17a55b0bb1206c71c7a4344c5e3037cdf65 Gitweb: http://git.kernel.org/tip/8dd1e17a55b0bb1206c71c7a4344c5e3037cdf65 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:19 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce: Clarify comments regarding deferred error

Commit-ID: 2cd3b5f9033f0b051842a279dac5a54271cbd3c8 Gitweb: http://git.kernel.org/tip/2cd3b5f9033f0b051842a279dac5a54271cbd3c8 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:20 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Document some functionality

Commit-ID: ea2ca36b658cfc6081ee454e97593c81f646806e Gitweb: http://git.kernel.org/tip/ea2ca36b658cfc6081ee454e97593c81f646806e Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:21 +0100 Committer: Ingo Molnar CommitDate: Tue, 8 Mar 2016 11:48:15 +0100 x86/mce/AMD:

[tip:ras/core] x86/mce/AMD: Fix logic to obtain block address

Commit-ID: 8dd1e17a55b0bb1206c71c7a4344c5e3037cdf65 Gitweb: http://git.kernel.org/tip/8dd1e17a55b0bb1206c71c7a4344c5e3037cdf65 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:19 +0100 Committer: Ingo Molnar CommitDate: Tue, 8 Mar 2016 11:48:14 +0100 x86/mce/AMD: Fix

[tip:ras/core] x86/mce: Clarify comments regarding deferred error

Commit-ID: 2cd3b5f9033f0b051842a279dac5a54271cbd3c8 Gitweb: http://git.kernel.org/tip/2cd3b5f9033f0b051842a279dac5a54271cbd3c8 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:20 +0100 Committer: Ingo Molnar CommitDate: Tue, 8 Mar 2016 11:48:15 +0100 x86/mce: Clarify

[tip:ras/core] x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors

Commit-ID: be0aec23bf4624fd55650629fe8df20483487049 Gitweb: http://git.kernel.org/tip/be0aec23bf4624fd55650629fe8df20483487049 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:18 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors

Commit-ID: be0aec23bf4624fd55650629fe8df20483487049 Gitweb: http://git.kernel.org/tip/be0aec23bf4624fd55650629fe8df20483487049 Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:18 +0100 Committer: Ingo Molnar CommitDate: Tue, 8 Mar 2016 11:48:14 +0100 x86/mce/AMD, EDAC:

[tip:ras/core] x86/mce: Move MCx_CONFIG MSR definitions

Commit-ID: adc53f2e0ae2fcff10a4b981df14729ffb1482fc Gitweb: http://git.kernel.org/tip/adc53f2e0ae2fcff10a4b981df14729ffb1482fc Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:17 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce: Move MCx_CONFIG MSR definitions

Commit-ID: adc53f2e0ae2fcff10a4b981df14729ffb1482fc Gitweb: http://git.kernel.org/tip/adc53f2e0ae2fcff10a4b981df14729ffb1482fc Author: Aravind Gopalakrishnan AuthorDate: Mon, 7 Mar 2016 14:02:17 +0100 Committer: Ingo Molnar CommitDate: Tue, 8 Mar 2016 11:48:14 +0100 x86/mce: Move

[tip:ras/core] x86/mce/AMD: Set MCAX Enable bit

Commit-ID: e6c8f1873be8a14c7e44202df1f7e6ea61bf3352 Gitweb: http://git.kernel.org/tip/e6c8f1873be8a14c7e44202df1f7e6ea61bf3352 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:53 +0100 Committer: Ingo Molnar CommitDate: Mon, 1 Feb 2016 10:53:59 +0100 x86/mce/AMD: Set

[tip:ras/core] x86/mce/AMD: Fix LVT offset configuration for thresholding

Commit-ID: f57a1f3c14b9182f1fea667f5a38a1094699db7c Gitweb: http://git.kernel.org/tip/f57a1f3c14b9182f1fea667f5a38a1094699db7c Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:51 +0100 Committer: Ingo Molnar CommitDate: Mon, 1 Feb 2016 10:53:57 +0100 x86/mce/AMD: Fix

[tip:ras/core] x86/mce/AMD: Reduce number of blocks scanned per bank

Commit-ID: 60f116fca162d9488f783f5014779463243ab7a2 Gitweb: http://git.kernel.org/tip/60f116fca162d9488f783f5014779463243ab7a2 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:50 +0100 Committer: Ingo Molnar CommitDate: Mon, 1 Feb 2016 10:53:57 +0100 x86/mce/AMD:

[tip:ras/core] x86/mce/AMD: Do not perform shared bank check for future processors

Commit-ID: 284b965c146f482b4a411133f62288d52b7e3a72 Gitweb: http://git.kernel.org/tip/284b965c146f482b4a411133f62288d52b7e3a72 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:49 +0100 Committer: Ingo Molnar CommitDate: Mon, 1 Feb 2016 10:53:56 +0100 x86/mce/AMD: Do

[tip:ras/core] x86/mce: Fix order of AMD MCE init function call

Commit-ID: bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3 Gitweb: http://git.kernel.org/tip/bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:48 +0100 Committer: Ingo Molnar CommitDate: Mon, 1 Feb 2016 10:53:55 +0100 x86/mce: Fix

[tip:ras/core] x86/mce: Fix order of AMD MCE init function call

Commit-ID: bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3 Gitweb: http://git.kernel.org/tip/bfbe0eeb769e2aff2cb1fc6845c4e4b7eac40bb3 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:48 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Reduce number of blocks scanned per bank

Commit-ID: 60f116fca162d9488f783f5014779463243ab7a2 Gitweb: http://git.kernel.org/tip/60f116fca162d9488f783f5014779463243ab7a2 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:50 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Do not perform shared bank check for future processors

Commit-ID: 284b965c146f482b4a411133f62288d52b7e3a72 Gitweb: http://git.kernel.org/tip/284b965c146f482b4a411133f62288d52b7e3a72 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:49 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Fix LVT offset configuration for thresholding

Commit-ID: f57a1f3c14b9182f1fea667f5a38a1094699db7c Gitweb: http://git.kernel.org/tip/f57a1f3c14b9182f1fea667f5a38a1094699db7c Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:51 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/mce/AMD: Set MCAX Enable bit

Commit-ID: e6c8f1873be8a14c7e44202df1f7e6ea61bf3352 Gitweb: http://git.kernel.org/tip/e6c8f1873be8a14c7e44202df1f7e6ea61bf3352 Author: Aravind Gopalakrishnan AuthorDate: Mon, 25 Jan 2016 20:41:53 +0100 Committer: Ingo Molnar CommitDate:

[tip:x86/urgent] x86/AMD: Fix last level cache topology for AMD Fam17h systems

Commit-ID: 3849e91f571dcb48cf2c8143480c59137d44d6bc Gitweb: http://git.kernel.org/tip/3849e91f571dcb48cf2c8143480c59137d44d6bc Author: Aravind Gopalakrishnan AuthorDate: Wed, 4 Nov 2015 12:49:42 +0100 Committer: Thomas Gleixner CommitDate: Sat, 7 Nov 2015 10:37:51 +0100 x86/AMD: Fix

[tip:x86/urgent] x86/AMD: Fix last level cache topology for AMD Fam17h systems

Commit-ID: 3849e91f571dcb48cf2c8143480c59137d44d6bc Gitweb: http://git.kernel.org/tip/3849e91f571dcb48cf2c8143480c59137d44d6bc Author: Aravind Gopalakrishnan AuthorDate: Wed, 4 Nov 2015 12:49:42 +0100 Committer: Thomas Gleixner

[tip:x86/urgent] x86/AMD: Fix last level cache topology for AMD Fam17h systems

Commit-ID: e5e84a26ef2909964d964224b805236293fb4c63 Gitweb: http://git.kernel.org/tip/e5e84a26ef2909964d964224b805236293fb4c63 Author: Aravind Gopalakrishnan AuthorDate: Wed, 4 Nov 2015 12:49:42 +0100 Committer: Thomas Gleixner CommitDate: Wed, 4 Nov 2015 12:52:06 +0100 x86/AMD: Fix

[tip:x86/urgent] x86/AMD: Fix last level cache topology for AMD Fam17h systems

Commit-ID: e5e84a26ef2909964d964224b805236293fb4c63 Gitweb: http://git.kernel.org/tip/e5e84a26ef2909964d964224b805236293fb4c63 Author: Aravind Gopalakrishnan AuthorDate: Wed, 4 Nov 2015 12:49:42 +0100 Committer: Thomas Gleixner

[tip:ras/core] x86/mce: Add a Scalable MCA vendor flags bit

Commit-ID: c7f54d21fb02e90042e6233b46716dcb244e70e6 Gitweb: http://git.kernel.org/tip/c7f54d21fb02e90042e6233b46716dcb244e70e6 Author: Aravind Gopalakrishnan AuthorDate: Fri, 30 Oct 2015 13:11:37 +0100 Committer: Ingo Molnar CommitDate: Sun, 1 Nov 2015 11:26:13 +0100 x86/mce: Add a

[tip:ras/core] x86/mce: Add a Scalable MCA vendor flags bit

Commit-ID: c7f54d21fb02e90042e6233b46716dcb244e70e6 Gitweb: http://git.kernel.org/tip/c7f54d21fb02e90042e6233b46716dcb244e70e6 Author: Aravind Gopalakrishnan AuthorDate: Fri, 30 Oct 2015 13:11:37 +0100 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/amd_nb, EDAC: Rename amd_get_node_id()

Commit-ID: 1a6775c1a2c2ed863699403cda517916c22aeb72 Gitweb: http://git.kernel.org/tip/1a6775c1a2c2ed863699403cda517916c22aeb72 Author: Aravind Gopalakrishnan AuthorDate: Mon, 19 Oct 2015 11:17:42 +0200 Committer: Ingo Molnar CommitDate: Wed, 21 Oct 2015 11:10:55 +0200 x86/amd_nb,

[tip:ras/core] x86/amd_nb, EDAC: Rename amd_get_node_id()

Commit-ID: 1a6775c1a2c2ed863699403cda517916c22aeb72 Gitweb: http://git.kernel.org/tip/1a6775c1a2c2ed863699403cda517916c22aeb72 Author: Aravind Gopalakrishnan AuthorDate: Mon, 19 Oct 2015 11:17:42 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/ras/mce_amd_inj: Return early on invalid input

Commit-ID: 85c9306d44f757d2fb3b0e3e399080a025315c7f Gitweb: http://git.kernel.org/tip/85c9306d44f757d2fb3b0e3e399080a025315c7f Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:38 +0200 Committer: Ingo Molnar CommitDate: Mon, 12 Oct 2015 16:15:47 +0200

[tip:ras/core] x86/ras/mce_amd_inj: Trigger deferred and thresholding errors interrupts

Commit-ID: a1300e50529795cd605da6a015d4944a18921db0 Gitweb: http://git.kernel.org/tip/a1300e50529795cd605da6a015d4944a18921db0 Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:39 +0200 Committer: Ingo Molnar CommitDate: Mon, 12 Oct 2015 16:15:47 +0200

[tip:ras/core] x86/ras/mce_amd_inj: Inject bank 4 errors on the NBC

Commit-ID: fa20a2ed6fff717839ec03b6574ea0affcb58841 Gitweb: http://git.kernel.org/tip/fa20a2ed6fff717839ec03b6574ea0affcb58841 Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:40 +0200 Committer: Ingo Molnar CommitDate: Mon, 12 Oct 2015 16:15:48 +0200

[tip:ras/core] x86/ras/mce_amd_inj: Inject bank 4 errors on the NBC

Commit-ID: fa20a2ed6fff717839ec03b6574ea0affcb58841 Gitweb: http://git.kernel.org/tip/fa20a2ed6fff717839ec03b6574ea0affcb58841 Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:40 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/ras/mce_amd_inj: Trigger deferred and thresholding errors interrupts

Commit-ID: a1300e50529795cd605da6a015d4944a18921db0 Gitweb: http://git.kernel.org/tip/a1300e50529795cd605da6a015d4944a18921db0 Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:39 +0200 Committer: Ingo Molnar CommitDate:

[tip:ras/core] x86/ras/mce_amd_inj: Return early on invalid input

Commit-ID: 85c9306d44f757d2fb3b0e3e399080a025315c7f Gitweb: http://git.kernel.org/tip/85c9306d44f757d2fb3b0e3e399080a025315c7f Author: Aravind Gopalakrishnan AuthorDate: Mon, 12 Oct 2015 11:22:38 +0200 Committer: Ingo Molnar CommitDate:

[tip:sched/core] sched/numa: Fix NUMA_DIRECT topology identification

Commit-ID: e237882b8f83dd1a0eece1608bcb689d4f4b221b Gitweb: http://git.kernel.org/tip/e237882b8f83dd1a0eece1608bcb689d4f4b221b Author: Aravind Gopalakrishnan AuthorDate: Mon, 10 Aug 2015 20:20:48 -0500 Committer: Ingo Molnar CommitDate: Wed, 12 Aug 2015 12:06:08 +0200 sched/numa: Fix

[tip:sched/core] sched/numa: Fix NUMA_DIRECT topology identification

Commit-ID: e237882b8f83dd1a0eece1608bcb689d4f4b221b Gitweb: http://git.kernel.org/tip/e237882b8f83dd1a0eece1608bcb689d4f4b221b Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Mon, 10 Aug 2015 20:20:48 -0500 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:x86/cpu] x86/cpu/amd: Give access to the number of nodes in a physical package

Commit-ID: cc2749e4095cbbcb35518fb2db5e926b85c3f25f Gitweb: http://git.kernel.org/tip/cc2749e4095cbbcb35518fb2db5e926b85c3f25f Author: Aravind Gopalakrishnan AuthorDate: Mon, 15 Jun 2015 10:28:15 +0200 Committer: Ingo Molnar CommitDate: Thu, 18 Jun 2015 11:16:06 +0200 x86/cpu/amd:

[tip:x86/cpu] x86/cpu/amd: Give access to the number of nodes in a physical package

Commit-ID: cc2749e4095cbbcb35518fb2db5e926b85c3f25f Gitweb: http://git.kernel.org/tip/cc2749e4095cbbcb35518fb2db5e926b85c3f25f Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Mon, 15 Jun 2015 10:28:15 +0200 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:x86/core] x86/irq: Cleanup ordering of vector numbers

Commit-ID: 5c0d728e1a8ccbaf68ec37181e466627ba0a6efc Gitweb: http://git.kernel.org/tip/5c0d728e1a8ccbaf68ec37181e466627ba0a6efc Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:57 -0500 Committer: Borislav Petkov CommitDate: Thu, 7 May 2015 10:28:43 +0200 x86/irq:

[tip:x86/core] x86/mce/amd: Factor out logging mechanism

Commit-ID: afdf344e08fbec28ab2204a626fa1f260dcb68be Gitweb: http://git.kernel.org/tip/afdf344e08fbec28ab2204a626fa1f260dcb68be Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:53 -0500 Committer: Borislav Petkov CommitDate: Wed, 6 May 2015 19:49:20 +0200 x86/mce/amd:

[tip:x86/core] x86/mce: Add support for deferred errors on AMD

Commit-ID: 7559e13fb4abe7880dfaf985d6a1630ca90a67ce Gitweb: http://git.kernel.org/tip/7559e13fb4abe7880dfaf985d6a1630ca90a67ce Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:55 -0500 Committer: Borislav Petkov CommitDate: Wed, 6 May 2015 20:34:31 +0200 x86/mce: Add

[tip:x86/core] x86/mce/amd: Introduce deferred error interrupt handler

Commit-ID: 24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e Gitweb: http://git.kernel.org/tip/24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:56 -0500 Committer: Borislav Petkov CommitDate: Thu, 7 May 2015 10:23:32 +0200 x86/mce/amd:

[tip:x86/core] x86/mce/amd: Collect valid address before logging an error

Commit-ID: 6e6e746e33e9555a7fce159d25314c9df3bcda93 Gitweb: http://git.kernel.org/tip/6e6e746e33e9555a7fce159d25314c9df3bcda93 Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:54 -0500 Committer: Borislav Petkov CommitDate: Wed, 6 May 2015 19:49:31 +0200 x86/mce/amd:

[tip:x86/core] x86/mce/amd: Rename setup_APIC_mce

Commit-ID: 868c00bb5980653c44d931384baa2c7f1bde81ef Gitweb: http://git.kernel.org/tip/868c00bb5980653c44d931384baa2c7f1bde81ef Author: Aravind Gopalakrishnan AuthorDate: Wed, 6 May 2015 06:58:58 -0500 Committer: Borislav Petkov CommitDate: Thu, 7 May 2015 10:33:40 +0200 x86/mce/amd:

[tip:x86/core] x86/irq: Cleanup ordering of vector numbers

Commit-ID: 5c0d728e1a8ccbaf68ec37181e466627ba0a6efc Gitweb: http://git.kernel.org/tip/5c0d728e1a8ccbaf68ec37181e466627ba0a6efc Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:57 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Thu,

[tip:x86/core] x86/mce/amd: Introduce deferred error interrupt handler

Commit-ID: 24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e Gitweb: http://git.kernel.org/tip/24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:56 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Thu,

[tip:x86/core] x86/mce/amd: Collect valid address before logging an error

Commit-ID: 6e6e746e33e9555a7fce159d25314c9df3bcda93 Gitweb: http://git.kernel.org/tip/6e6e746e33e9555a7fce159d25314c9df3bcda93 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:54 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Wed,

[tip:x86/core] x86/mce/amd: Rename setup_APIC_mce

Commit-ID: 868c00bb5980653c44d931384baa2c7f1bde81ef Gitweb: http://git.kernel.org/tip/868c00bb5980653c44d931384baa2c7f1bde81ef Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:58 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Thu,

[tip:x86/core] x86/mce: Add support for deferred errors on AMD

Commit-ID: 7559e13fb4abe7880dfaf985d6a1630ca90a67ce Gitweb: http://git.kernel.org/tip/7559e13fb4abe7880dfaf985d6a1630ca90a67ce Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:55 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Wed,

[tip:x86/core] x86/mce/amd: Factor out logging mechanism

Commit-ID: afdf344e08fbec28ab2204a626fa1f260dcb68be Gitweb: http://git.kernel.org/tip/afdf344e08fbec28ab2204a626fa1f260dcb68be Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Wed, 6 May 2015 06:58:53 -0500 Committer: Borislav Petkov b...@suse.de CommitDate: Wed,

[tip:x86/urgent] x86/Documentation: Update the contact email for L3 cache index disable functionality

Commit-ID: ea8e080b604e2c8221af778221d83a59b6529c5b Gitweb: http://git.kernel.org/tip/ea8e080b604e2c8221af778221d83a59b6529c5b Author: Aravind Gopalakrishnan AuthorDate: Mon, 18 May 2015 10:07:16 +0200 Committer: Ingo Molnar CommitDate: Mon, 18 May 2015 10:34:24 +0200

[tip:x86/urgent] x86/Documentation: Update the contact email for L3 cache index disable functionality

Commit-ID: ea8e080b604e2c8221af778221d83a59b6529c5b Gitweb: http://git.kernel.org/tip/ea8e080b604e2c8221af778221d83a59b6529c5b Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Mon, 18 May 2015 10:07:16 +0200 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:x86/cpu] x86/cpu/amd: Set X86_FEATURE_EXTD_APICID for future processors

Commit-ID: b9d16a2a21aa9c264a29dd84d6f7b03581517a03 Gitweb: http://git.kernel.org/tip/b9d16a2a21aa9c264a29dd84d6f7b03581517a03 Author: Aravind Gopalakrishnan AuthorDate: Mon, 27 Apr 2015 10:25:51 -0500 Committer: Ingo Molnar CommitDate: Wed, 6 May 2015 11:16:53 +0200 x86/cpu/amd: Set

[tip:x86/cpu] x86/gart: Check for GART support before accessing GART registers

Commit-ID: 1b4574292e9d2d37b3bb437c9e778fd2bba8e170 Gitweb: http://git.kernel.org/tip/1b4574292e9d2d37b3bb437c9e778fd2bba8e170 Author: Aravind Gopalakrishnan AuthorDate: Tue, 7 Apr 2015 16:46:37 -0500 Committer: Ingo Molnar CommitDate: Wed, 6 May 2015 11:15:53 +0200 x86/gart: Check

[tip:x86/cpu] x86/gart: Check for GART support before accessing GART registers

Commit-ID: 1b4574292e9d2d37b3bb437c9e778fd2bba8e170 Gitweb: http://git.kernel.org/tip/1b4574292e9d2d37b3bb437c9e778fd2bba8e170 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Tue, 7 Apr 2015 16:46:37 -0500 Committer: Ingo Molnar mi...@kernel.org CommitDate: Wed,

[tip:x86/cpu] x86/cpu/amd: Set X86_FEATURE_EXTD_APICID for future processors

Commit-ID: b9d16a2a21aa9c264a29dd84d6f7b03581517a03 Gitweb: http://git.kernel.org/tip/b9d16a2a21aa9c264a29dd84d6f7b03581517a03 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Mon, 27 Apr 2015 10:25:51 -0500 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:x86/cleanups] x86/iommu: Fix header comments regarding standard and _FINISH macros

Commit-ID: b44915927ca88084a7292e4ddd4cf91036f365e1 Gitweb: http://git.kernel.org/tip/b44915927ca88084a7292e4ddd4cf91036f365e1 Author: Aravind Gopalakrishnan AuthorDate: Thu, 9 Apr 2015 10:51:48 +0200 Committer: Ingo Molnar CommitDate: Thu, 9 Apr 2015 10:56:31 +0200 x86/iommu: Fix

[tip:x86/cleanups] x86/iommu: Fix header comments regarding standard and _FINISH macros

Commit-ID: b44915927ca88084a7292e4ddd4cf91036f365e1 Gitweb: http://git.kernel.org/tip/b44915927ca88084a7292e4ddd4cf91036f365e1 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Thu, 9 Apr 2015 10:51:48 +0200 Committer: Ingo Molnar mi...@kernel.org CommitDate: Thu,

[tip:perf/core] perf/x86/amd/ibs: Convert force_ibs_eilvt_setup() to void

Commit-ID: c796b205b88c775fd220c1a63390bac6a8cdda3f Gitweb: http://git.kernel.org/tip/c796b205b88c775fd220c1a63390bac6a8cdda3f Author: Aravind Gopalakrishnan AuthorDate: Fri, 23 Jan 2015 12:19:35 -0600 Committer: Ingo Molnar CommitDate: Wed, 18 Feb 2015 17:01:46 +0100

[tip:perf/core] perf/x86/amd/ibs: Convert force_ibs_eilvt_setup() to void

Commit-ID: c796b205b88c775fd220c1a63390bac6a8cdda3f Gitweb: http://git.kernel.org/tip/c796b205b88c775fd220c1a63390bac6a8cdda3f Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Fri, 23 Jan 2015 12:19:35 -0600 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:perf/core] perf/x86/amd/ibs: Update IBS MSRs and feature definitions

Commit-ID: 904cb3677f3adcd3d837be0a0d0b14251ba8d6f7 Gitweb: http://git.kernel.org/tip/904cb3677f3adcd3d837be0a0d0b14251ba8d6f7 Author: Aravind Gopalakrishnan AuthorDate: Mon, 10 Nov 2014 14:24:26 -0600 Committer: Ingo Molnar CommitDate: Wed, 12 Nov 2014 15:12:32 +0100

[tip:perf/core] perf/x86/amd/ibs: Update IBS MSRs and feature definitions

Commit-ID: 904cb3677f3adcd3d837be0a0d0b14251ba8d6f7 Gitweb: http://git.kernel.org/tip/904cb3677f3adcd3d837be0a0d0b14251ba8d6f7 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Mon, 10 Nov 2014 14:24:26 -0600 Committer: Ingo Molnar mi...@kernel.org CommitDate:

[tip:x86/urgent] x86/quirks: Add workaround for AMD F16h Erratum792

Commit-ID: fb53a1ab88d14848dc292842e35c3bda3a665997 Gitweb: http://git.kernel.org/tip/fb53a1ab88d14848dc292842e35c3bda3a665997 Author: Aravind Gopalakrishnan AuthorDate: Thu, 23 Jan 2014 16:13:32 -0600 Committer: Ingo Molnar CommitDate: Sat, 25 Jan 2014 08:44:19 +0100 x86/quirks: Add

[tip:x86/urgent] x86/quirks: Add workaround for AMD F16h Erratum792

Commit-ID: fb53a1ab88d14848dc292842e35c3bda3a665997 Gitweb: http://git.kernel.org/tip/fb53a1ab88d14848dc292842e35c3bda3a665997 Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com AuthorDate: Thu, 23 Jan 2014 16:13:32 -0600 Committer: Ingo Molnar mi...@kernel.org CommitDate: