[PATCH] PCI/hotplug: ppc: correct a php_slot usage after free

[wei . guo . simon]

From: Simon Guo 

In pnv_php_unregister_one(), pnv_php_put_slot() might kfree
php_slot structure. But there is pci_hp_deregister() after
that with php_slot reference.

This patch moves pnv_php_put_slot() to the end of function.

Signed-off-by: Simon Guo 
---
 drivers/pci/hotplug/pnv_php.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c
index 74f6a17..eb60692e 100644
--- a/drivers/pci/hotplug/pnv_php.c
+++ b/drivers/pci/hotplug/pnv_php.c
@@ -930,8 +930,8 @@ static void pnv_php_unregister_one(struct device_node *dn)
return;
 
php_slot->state = PNV_PHP_STATE_OFFLINE;
-   pnv_php_put_slot(php_slot);
pci_hp_deregister(_slot->slot);
+   pnv_php_put_slot(php_slot);
 }
 
 static void pnv_php_unregister(struct device_node *dn)
-- 
1.8.3.1

[PATCH] PCI/hotplug: ppc: correct a php_slot usage after free

[wei . guo . simon]

From: Simon Guo 

In pnv_php_unregister_one(), pnv_php_put_slot() might kfree
php_slot structure. But there is pci_hp_deregister() after
that with php_slot reference.

This patch moves pnv_php_put_slot() to the end of function.

Signed-off-by: Simon Guo 
---
 drivers/pci/hotplug/pnv_php.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c
index 74f6a17..eb60692e 100644
--- a/drivers/pci/hotplug/pnv_php.c
+++ b/drivers/pci/hotplug/pnv_php.c
@@ -930,8 +930,8 @@ static void pnv_php_unregister_one(struct device_node *dn)
return;
 
php_slot->state = PNV_PHP_STATE_OFFLINE;
-   pnv_php_put_slot(php_slot);
pci_hp_deregister(_slot->slot);
+   pnv_php_put_slot(php_slot);
 }
 
 static void pnv_php_unregister(struct device_node *dn)
-- 
1.8.3.1

[PATCH v16 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   5 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 158 +
 2 files changed, 161 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
 $(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [cptr1] "r" ([1])
+   : "memory", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16",
+   "r17", "r18", "r19", "r20", "r21", "r22",
+   "r23", "r24", "r25", "r26", "r27", "r28",
+   "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_2));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 

[PATCH v16 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 117 +
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 tools/testing/selftests/powerpc/utility/reg.S  | 265 +
 5 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   FAIL_IF(write_vsx(child, vsx));
+   FAIL_IF(write_vmx(child, vmx));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+   return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ 

[PATCH v16 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   5 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 158 +
 2 files changed, 161 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
 $(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [cptr1] "r" ([1])
+   : "memory", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16",
+   "r17", "r18", "r19", "r20", "r21", "r22",
+   "r23", "r24", "r25", "r26", "r27", "r28",
+   "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_2));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() 

[PATCH v16 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 117 +
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 tools/testing/selftests/powerpc/utility/reg.S  | 265 +
 5 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   FAIL_IF(write_vsx(child, vsx));
+   FAIL_IF(write_vmx(child, vmx));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+   return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is 

[PATCH v16 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|  11 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 188 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  | 100 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 526 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index cd65cb5..c46bc3a 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -26,7 +26,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..3649ddd
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,188 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1)
+   asm volatile("" : : : "memory");
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx or %lx\n",
+   regs->sier, (unsigned long)SIER_EXP_HV,
+   (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   

[PATCH v16 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v16 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 160 +
 2 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   "tsuspend.;"
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+ 

[PATCH v16 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v16 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 160 +
 2 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   "tsuspend.;"
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_tar(void)
+{
+   pid_t pid;
+   

[PATCH v16 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|  11 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 188 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  | 100 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 526 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index cd65cb5..c46bc3a 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -26,7 +26,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..3649ddd
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,188 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1)
+   asm volatile("" : : : "memory");
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx or %lx\n",
+   regs->sier, (unsigned long)SIER_EXP_HV,
+   (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   regs->mmcr2, (unsigned long)MMCR2_EXP);
+   printf("MMCR0: %lx; expected: %lx\n",
+   

[PATCH v16 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 168 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 204 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED   0xe001ac01
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   FAIL_IF(regs->tm_tfhar != tfhar);
+   FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow "tbegin.;" */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "tbegin.;"
+   "beq 2f;"
+
+   "tsuspend.;"
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)>regs));
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+   shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spr();
+
+   if (pid) {
+   pptr = (struct shared *)shmat(shm_id, NULL, 0);
+   pptr1 = (int *)shmat(shm_id1, NULL, 0);
+

[PATCH v16 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 168 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 204 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED   0xe001ac01
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   FAIL_IF(regs->tm_tfhar != tfhar);
+   FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow "tbegin.;" */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "tbegin.;"
+   "beq 2f;"
+
+   "tsuspend.;"
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)>regs));
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+   shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spr();
+
+   if (pid) {
+   pptr = (struct shared *)shmat(shm_id, NULL, 0);
+   pptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+   while (!pptr1[0])
+   asm volatile("" : : : 

[PATCH v16 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 169 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   "tsuspend.;"
+   ASM_LOAD_GPR_IMMED(gpr_4)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+   "bl wait_parent;"
+   "tresume.;"
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [flt_4] "r" ()
+   : "memory", "r5", "r6", "r7",
+   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_4));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spd_gpr();
+
+   

[PATCH v16 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 168 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx;"
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_ckpt[i] = 1 + 2 * rand();
+   fp_load_ckpt_new[i] = 1 + 3 * rand();
+   }
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if 

[PATCH v16 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 135 +++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 368 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, reg));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2])
+   asm volatile("" : : : "memory");
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_PASS;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   

[PATCH v16 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 169 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   "tsuspend.;"
+   ASM_LOAD_GPR_IMMED(gpr_4)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+   "bl wait_parent;"
+   "tresume.;"
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [flt_4] "r" ()
+   : "memory", "r5", "r6", "r7",
+   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_4));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spd_gpr();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+ 

[PATCH v16 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 168 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx;"
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_ckpt[i] = 1 + 2 * rand();
+   fp_load_ckpt_new[i] = 1 + 3 * rand();
+   }
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_vsx();
+
+   if (pid) {
+   pptr = 

[PATCH v16 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 135 +++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 368 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, reg));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2])
+   asm volatile("" : : : "memory");
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_PASS;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+  

[PATCH v16 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 174 +
 2 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   "tsuspend.;"
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, 

[PATCH v16 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 185 +
 2 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   "tsuspend.;"
+   "bl load_vsx;"
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_new[i] = 1 + 2 * rand();

[PATCH v16 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v16 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 174 +
 2 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   "tsuspend.;"
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, 

[PATCH v16 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 185 +
 2 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   "tsuspend.;"
+   "bl load_vsx;"
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_new[i] = 1 + 2 * rand();
+   fp_load_ckpt[i] = 1 + 3 * rand();
+   

[PATCH v16 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v16 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   4 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 123 
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 tools/testing/selftests/powerpc/utility/reg.S  | 132 +
 tools/testing/selftests/powerpc/utility/reg.h  |  61 ++
 6 files changed, 603 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.S

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
 clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+}
+
+int trace_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(write_gpr(child, GPR_3));
+   FAIL_IF(write_fpr(child, FPR_3_REP));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+   if (pid == 0)
+   gpr();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_gpr(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+  

[PATCH v16 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 -
 tools/testing/selftests/powerpc/reg.h   | 35 ++---
 2 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v16 02/15] selftests/powerpc: move shared utility files into new utility/ dir

[wei . guo . simon]

From: Simon Guo 

There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.

This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.

Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |  2 +-
 tools/testing/selftests/powerpc/alignment/Makefile |  2 +-
 tools/testing/selftests/powerpc/basic_asm.h| 70 
 .../testing/selftests/powerpc/benchmarks/Makefile  |  2 +-
 .../selftests/powerpc/benchmarks/context_switch.c  |  2 +-
 .../selftests/powerpc/context_switch/Makefile  |  2 +-
 .../testing/selftests/powerpc/copyloops/validate.c |  2 +-
 tools/testing/selftests/powerpc/fpu_asm.h  | 80 --
 tools/testing/selftests/powerpc/gpr_asm.h  | 96 --
 tools/testing/selftests/powerpc/instructions.h | 68 ---
 tools/testing/selftests/powerpc/math/fpu_asm.S |  4 +-
 tools/testing/selftests/powerpc/math/vmx_asm.S |  4 +-
 tools/testing/selftests/powerpc/math/vsx_asm.S |  4 +-
 tools/testing/selftests/powerpc/mm/Makefile|  2 +-
 tools/testing/selftests/powerpc/pmu/Makefile   |  4 +-
 tools/testing/selftests/powerpc/pmu/ebb/Makefile   |  2 +-
 tools/testing/selftests/powerpc/reg.h  | 89 
 tools/testing/selftests/powerpc/signal/Makefile|  2 +-
 tools/testing/selftests/powerpc/signal/signal.S|  2 +-
 .../testing/selftests/powerpc/stringloops/memcmp.c |  2 +-
 tools/testing/selftests/powerpc/tm/Makefile|  2 +-
 tools/testing/selftests/powerpc/tm/tm-signal.S | 10 +--
 tools/testing/selftests/powerpc/tm/tm.h|  2 +-
 .../testing/selftests/powerpc/utility/basic_asm.h  | 73 
 tools/testing/selftests/powerpc/utility/fpu_asm.h  | 80 ++
 tools/testing/selftests/powerpc/utility/gpr_asm.h  | 96 ++
 .../selftests/powerpc/utility/instructions.h   | 68 +++
 tools/testing/selftests/powerpc/utility/reg.h  | 89 
 tools/testing/selftests/powerpc/utility/utils.c| 87 
 tools/testing/selftests/powerpc/utility/utils.h| 77 +
 tools/testing/selftests/powerpc/utility/vmx_asm.h  | 96 ++
 tools/testing/selftests/powerpc/utility/vsx_asm.h  | 71 
 tools/testing/selftests/powerpc/utils.c| 87 
 tools/testing/selftests/powerpc/utils.h| 77 -
 tools/testing/selftests/powerpc/vmx_asm.h  | 96 --
 tools/testing/selftests/powerpc/vsx_asm.h  | 71 
 36 files changed, 763 insertions(+), 760 deletions(-)
 delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/fpu_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/gpr_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/instructions.h
 delete mode 100644 tools/testing/selftests/powerpc/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/fpu_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/gpr_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
 create mode 100644 tools/testing/selftests/powerpc/utility/vmx_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/vsx_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/utils.c
 delete mode 100644 tools/testing/selftests/powerpc/utils.h
 delete mode 100644 tools/testing/selftests/powerpc/vmx_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/vsx_asm.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index db54a33..cd65cb5 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc)
 
 GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
 
-CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) $(CFLAGS)
+CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS)
 
 export CFLAGS
 
diff --git a/tools/testing/selftests/powerpc/alignment/Makefile 
b/tools/testing/selftests/powerpc/alignment/Makefile
index ad6a4e4..b61e5e7 100644
--- a/tools/testing/selftests/powerpc/alignment/Makefile
+++ b/tools/testing/selftests/powerpc/alignment/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned 
paste_unaligned paste_last_una
 

[PATCH v16 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656
V14: https://lkml.org/lkml/2016/9/12/57
V15: https://lkml.org/lkml/2016/9/29/722

Changes in V16:
---
- Correct expected SIER value in HV mode.
- rebased to latest ppc tree.

Changes in V15:
---
- Squash patch 1 and 2 to avoid compile error after patch 1.
- Reorganize some code across patch 3 and 4 to avoid compile error
- Created a new directory utility under tools/testing/selftesting/powerpc
to organize common APIs across selftests.
- Use "tbegin." instead of TBEGIN macro. The same for other TM instructions.
- Correct while(ptr); loop without memory barrier.
- Remove an invalid checking on TEXASR in tm-spd-spr.c.
- Use FAIL_IF() as possible to indicate failure line conveniently.
- Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S
- rebased to recent ppc git tree.

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 

[PATCH v16 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   4 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 123 
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 tools/testing/selftests/powerpc/utility/reg.S  | 132 +
 tools/testing/selftests/powerpc/utility/reg.h  |  61 ++
 6 files changed, 603 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.S

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
 clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+}
+
+int trace_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(write_gpr(child, GPR_3));
+   FAIL_IF(write_fpr(child, FPR_3_REP));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+   if (pid == 0)
+   gpr();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_gpr(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) 

[PATCH v16 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 -
 tools/testing/selftests/powerpc/reg.h   | 35 ++---
 2 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v16 02/15] selftests/powerpc: move shared utility files into new utility/ dir

[wei . guo . simon]

From: Simon Guo 

There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.

This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.

Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |  2 +-
 tools/testing/selftests/powerpc/alignment/Makefile |  2 +-
 tools/testing/selftests/powerpc/basic_asm.h| 70 
 .../testing/selftests/powerpc/benchmarks/Makefile  |  2 +-
 .../selftests/powerpc/benchmarks/context_switch.c  |  2 +-
 .../selftests/powerpc/context_switch/Makefile  |  2 +-
 .../testing/selftests/powerpc/copyloops/validate.c |  2 +-
 tools/testing/selftests/powerpc/fpu_asm.h  | 80 --
 tools/testing/selftests/powerpc/gpr_asm.h  | 96 --
 tools/testing/selftests/powerpc/instructions.h | 68 ---
 tools/testing/selftests/powerpc/math/fpu_asm.S |  4 +-
 tools/testing/selftests/powerpc/math/vmx_asm.S |  4 +-
 tools/testing/selftests/powerpc/math/vsx_asm.S |  4 +-
 tools/testing/selftests/powerpc/mm/Makefile|  2 +-
 tools/testing/selftests/powerpc/pmu/Makefile   |  4 +-
 tools/testing/selftests/powerpc/pmu/ebb/Makefile   |  2 +-
 tools/testing/selftests/powerpc/reg.h  | 89 
 tools/testing/selftests/powerpc/signal/Makefile|  2 +-
 tools/testing/selftests/powerpc/signal/signal.S|  2 +-
 .../testing/selftests/powerpc/stringloops/memcmp.c |  2 +-
 tools/testing/selftests/powerpc/tm/Makefile|  2 +-
 tools/testing/selftests/powerpc/tm/tm-signal.S | 10 +--
 tools/testing/selftests/powerpc/tm/tm.h|  2 +-
 .../testing/selftests/powerpc/utility/basic_asm.h  | 73 
 tools/testing/selftests/powerpc/utility/fpu_asm.h  | 80 ++
 tools/testing/selftests/powerpc/utility/gpr_asm.h  | 96 ++
 .../selftests/powerpc/utility/instructions.h   | 68 +++
 tools/testing/selftests/powerpc/utility/reg.h  | 89 
 tools/testing/selftests/powerpc/utility/utils.c| 87 
 tools/testing/selftests/powerpc/utility/utils.h| 77 +
 tools/testing/selftests/powerpc/utility/vmx_asm.h  | 96 ++
 tools/testing/selftests/powerpc/utility/vsx_asm.h  | 71 
 tools/testing/selftests/powerpc/utils.c| 87 
 tools/testing/selftests/powerpc/utils.h| 77 -
 tools/testing/selftests/powerpc/vmx_asm.h  | 96 --
 tools/testing/selftests/powerpc/vsx_asm.h  | 71 
 36 files changed, 763 insertions(+), 760 deletions(-)
 delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/fpu_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/gpr_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/instructions.h
 delete mode 100644 tools/testing/selftests/powerpc/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/fpu_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/gpr_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
 create mode 100644 tools/testing/selftests/powerpc/utility/vmx_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/vsx_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/utils.c
 delete mode 100644 tools/testing/selftests/powerpc/utils.h
 delete mode 100644 tools/testing/selftests/powerpc/vmx_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/vsx_asm.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index db54a33..cd65cb5 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc)
 
 GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
 
-CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) $(CFLAGS)
+CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS)
 
 export CFLAGS
 
diff --git a/tools/testing/selftests/powerpc/alignment/Makefile 
b/tools/testing/selftests/powerpc/alignment/Makefile
index ad6a4e4..b61e5e7 100644
--- a/tools/testing/selftests/powerpc/alignment/Makefile
+++ b/tools/testing/selftests/powerpc/alignment/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned 
paste_unaligned paste_last_una
 
 all: $(TEST_PROGS)
 
-$(TEST_PROGS): 

[PATCH v16 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656
V14: https://lkml.org/lkml/2016/9/12/57
V15: https://lkml.org/lkml/2016/9/29/722

Changes in V16:
---
- Correct expected SIER value in HV mode.
- rebased to latest ppc tree.

Changes in V15:
---
- Squash patch 1 and 2 to avoid compile error after patch 1.
- Reorganize some code across patch 3 and 4 to avoid compile error
- Created a new directory utility under tools/testing/selftesting/powerpc
to organize common APIs across selftests.
- Use "tbegin." instead of TBEGIN macro. The same for other TM instructions.
- Correct while(ptr); loop without memory barrier.
- Remove an invalid checking on TEXASR in tm-spd-spr.c.
- Use FAIL_IF() as possible to indicate failure line conveniently.
- Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S
- rebased to recent ppc git tree.

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 
- Accommodated most of the review comments on the previous patch series 
- 

[PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 174 +
 2 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   "tsuspend.;"
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, 

[PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 174 +
 2 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   "tsuspend.;"
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, 

[PATCH v15 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
Reviewed-by: Cyril Bur 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 185 +
 2 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   "tsuspend.;"
+   "bl load_vsx;"
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_new[i] = 1 + 2 * rand();

[PATCH v15 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
Reviewed-by: Cyril Bur 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 185 +
 2 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   "tsuspend.;"
+   "bl load_vsx;"
+   "bl wait_parent;"
+   "tresume.;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_new[i] = 1 + 2 * rand();
+   fp_load_ckpt[i] = 1 + 3 * rand();
+   

[PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 168 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 204 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED   0xe001ac01
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   FAIL_IF(regs->tm_tfhar != tfhar);
+   FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow "tbegin.;" */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "tbegin.;"
+   "beq 2f;"
+
+   "tsuspend.;"
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)>regs));
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+   shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spr();
+
+   if (pid) {
+   pptr = (struct shared *)shmat(shm_id, NULL, 0);
+   pptr1 = (int *)shmat(shm_id1, NULL, 0);
+

[PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 168 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 204 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED   0xe001ac01
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   FAIL_IF(regs->tm_tfhar != tfhar);
+   FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow "tbegin.;" */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "tbegin.;"
+   "beq 2f;"
+
+   "tsuspend.;"
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)>regs));
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+   shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spr();
+
+   if (pid) {
+   pptr = (struct shared *)shmat(shm_id, NULL, 0);
+   pptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+   while (!pptr1[0])
+   asm volatile("" : : : 

[PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/math/fpu_asm.S |  42 +---
 tools/testing/selftests/powerpc/ptrace/Makefile|   4 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 123 
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 tools/testing/selftests/powerpc/utility/reg.S  | 132 +
 tools/testing/selftests/powerpc/utility/reg.h  | 101 ++
 7 files changed, 645 insertions(+), 42 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.S

diff --git a/tools/testing/selftests/powerpc/math/fpu_asm.S 
b/tools/testing/selftests/powerpc/math/fpu_asm.S
index 8d4eb96..6e423fa 100644
--- a/tools/testing/selftests/powerpc/math/fpu_asm.S
+++ b/tools/testing/selftests/powerpc/math/fpu_asm.S
@@ -8,49 +8,11 @@
  */
 
 #include "basic_asm.h"
-
-#define PUSH_FPU(pos) \
-   stfdf14,pos(sp); \
-   stfdf15,pos+8(sp); \
-   stfdf16,pos+16(sp); \
-   stfdf17,pos+24(sp); \
-   stfdf18,pos+32(sp); \
-   stfdf19,pos+40(sp); \
-   stfdf20,pos+48(sp); \
-   stfdf21,pos+56(sp); \
-   stfdf22,pos+64(sp); \
-   stfdf23,pos+72(sp); \
-   stfdf24,pos+80(sp); \
-   stfdf25,pos+88(sp); \
-   stfdf26,pos+96(sp); \
-   stfdf27,pos+104(sp); \
-   stfdf28,pos+112(sp); \
-   stfdf29,pos+120(sp); \
-   stfdf30,pos+128(sp); \
-   stfdf31,pos+136(sp);
-
-#define POP_FPU(pos) \
-   lfd f14,pos(sp); \
-   lfd f15,pos+8(sp); \
-   lfd f16,pos+16(sp); \
-   lfd f17,pos+24(sp); \
-   lfd f18,pos+32(sp); \
-   lfd f19,pos+40(sp); \
-   lfd f20,pos+48(sp); \
-   lfd f21,pos+56(sp); \
-   lfd f22,pos+64(sp); \
-   lfd f23,pos+72(sp); \
-   lfd f24,pos+80(sp); \
-   lfd f25,pos+88(sp); \
-   lfd f26,pos+96(sp); \
-   lfd f27,pos+104(sp); \
-   lfd f28,pos+112(sp); \
-   lfd f29,pos+120(sp); \
-   lfd f30,pos+128(sp); \
-   lfd f31,pos+136(sp);
+#include "reg.h"
 
 # Careful calling this, it will 'clobber' fpu (by design)
 # Don't call this from C
+# double precision
 FUNC_START(load_fpu)
lfd f14,0(r3)
lfd f15,8(r3)
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
 clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   

[PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 168 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx;"
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_ckpt[i] = 1 + 2 * rand();
+   fp_load_ckpt_new[i] = 1 + 3 * rand();
+   }
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if 

[PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 169 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   "tsuspend.;"
+   ASM_LOAD_GPR_IMMED(gpr_4)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+   "bl wait_parent;"
+   "tresume.;"
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [flt_4] "r" ()
+   : "memory", "r5", "r6", "r7",
+   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_4));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spd_gpr();
+
+   

[PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/math/fpu_asm.S |  42 +---
 tools/testing/selftests/powerpc/ptrace/Makefile|   4 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 123 
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 tools/testing/selftests/powerpc/utility/reg.S  | 132 +
 tools/testing/selftests/powerpc/utility/reg.h  | 101 ++
 7 files changed, 645 insertions(+), 42 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.S

diff --git a/tools/testing/selftests/powerpc/math/fpu_asm.S 
b/tools/testing/selftests/powerpc/math/fpu_asm.S
index 8d4eb96..6e423fa 100644
--- a/tools/testing/selftests/powerpc/math/fpu_asm.S
+++ b/tools/testing/selftests/powerpc/math/fpu_asm.S
@@ -8,49 +8,11 @@
  */
 
 #include "basic_asm.h"
-
-#define PUSH_FPU(pos) \
-   stfdf14,pos(sp); \
-   stfdf15,pos+8(sp); \
-   stfdf16,pos+16(sp); \
-   stfdf17,pos+24(sp); \
-   stfdf18,pos+32(sp); \
-   stfdf19,pos+40(sp); \
-   stfdf20,pos+48(sp); \
-   stfdf21,pos+56(sp); \
-   stfdf22,pos+64(sp); \
-   stfdf23,pos+72(sp); \
-   stfdf24,pos+80(sp); \
-   stfdf25,pos+88(sp); \
-   stfdf26,pos+96(sp); \
-   stfdf27,pos+104(sp); \
-   stfdf28,pos+112(sp); \
-   stfdf29,pos+120(sp); \
-   stfdf30,pos+128(sp); \
-   stfdf31,pos+136(sp);
-
-#define POP_FPU(pos) \
-   lfd f14,pos(sp); \
-   lfd f15,pos+8(sp); \
-   lfd f16,pos+16(sp); \
-   lfd f17,pos+24(sp); \
-   lfd f18,pos+32(sp); \
-   lfd f19,pos+40(sp); \
-   lfd f20,pos+48(sp); \
-   lfd f21,pos+56(sp); \
-   lfd f22,pos+64(sp); \
-   lfd f23,pos+72(sp); \
-   lfd f24,pos+80(sp); \
-   lfd f25,pos+88(sp); \
-   lfd f26,pos+96(sp); \
-   lfd f27,pos+104(sp); \
-   lfd f28,pos+112(sp); \
-   lfd f29,pos+120(sp); \
-   lfd f30,pos+128(sp); \
-   lfd f31,pos+136(sp);
+#include "reg.h"
 
 # Careful calling this, it will 'clobber' fpu (by design)
 # Don't call this from C
+# double precision
 FUNC_START(load_fpu)
lfd f14,0(r3)
lfd f15,8(r3)
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
 clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   shmdt((void 

[PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 168 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "bl load_vsx;"
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+   FAIL_IF(show_vsx_ckpt(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+   FAIL_IF(show_vmx_ckpt(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   FAIL_IF(write_vsx_ckpt(child, vsx));
+   FAIL_IF(write_vmx_ckpt(child, vmx));
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < 128; i++) {
+   fp_load[i] = 1 + rand();
+   fp_load_ckpt[i] = 1 + 2 * rand();
+   fp_load_ckpt_new[i] = 1 + 3 * rand();
+   }
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_vsx();
+
+   if (pid) {
+   pptr = 

[PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 169 +
 2 files changed, 170 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1])
+   asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   "tsuspend.;"
+   ASM_LOAD_GPR_IMMED(gpr_4)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+   "bl wait_parent;"
+   "tresume.;"
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [flt_4] "r" ()
+   : "memory", "r5", "r6", "r7",
+   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_4));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   pptr[1] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tm_spd_gpr();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+ 

[PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   5 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 158 +
 2 files changed, 161 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
 $(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [cptr1] "r" ([1])
+   : "memory", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16",
+   "r17", "r18", "r19", "r20", "r21", "r22",
+   "r23", "r24", "r25", "r26", "r27", "r28",
+   "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_2));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 

[PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 160 +
 2 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   "tsuspend.;"
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+ 

[PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 117 +
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 tools/testing/selftests/powerpc/utility/reg.S  | 265 +
 5 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   FAIL_IF(write_vsx(child, vsx));
+   FAIL_IF(write_vmx(child, vmx));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+   return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ 

[PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 135 +++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 368 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, reg));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2])
+   asm volatile("" : : : "memory");
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_PASS;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   

[PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 117 +
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 tools/testing/selftests/powerpc/utility/reg.S  | 265 +
 5 files changed, 629 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_vsx(child, vsx));
+   FAIL_IF(validate_vsx(vsx, fp_load));
+   FAIL_IF(show_vmx(child, vmx));
+   FAIL_IF(validate_vmx(vmx, fp_load));
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   FAIL_IF(write_vsx(child, vsx));
+   FAIL_IF(write_vmx(child, vmx));
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+   return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is 

[PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 135 +++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 368 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0])
+   asm volatile("" : : : "memory");
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, reg));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   FAIL_IF(start_trace(child));
+   FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2])
+   asm volatile("" : : : "memory");
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1])
+   asm volatile("" : : : "memory");
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_PASS;
+   }
+
+   return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+   TEST_PASS;
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+  

[PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 160 +
 2 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   "tsuspend.;"
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_tar_registers(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+   FAIL_IF(show_tm_checkpointed_state(child, regs));
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+   FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+   return TEST_PASS;
+}
+
+int ptrace_tm_tar(void)
+{
+   pid_t pid;
+   

[PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   5 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 158 +
 2 files changed, 161 insertions(+), 2 deletions(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 include ../../lib.mk
 
 all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
 $(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
 ptrace-ebb: CFLAGS += -I../pmu/ebb
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   ASM_LOAD_GPR_IMMED(gpr_1)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+   "1: ;"
+   "tbegin.;"
+   "beq 2f;"
+   ASM_LOAD_GPR_IMMED(gpr_2)
+   ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+   "tsuspend.;"
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   "tresume.;"
+   "b .;"
+
+   "tend.;"
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+   [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (),
+   [flt_2] "r" (), [cptr1] "r" ([1])
+   : "memory", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16",
+   "r17", "r18", "r19", "r20", "r21", "r22",
+   "r23", "r24", "r25", "r26", "r27", "r28",
+   "r29", "r30", "r31"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr_single_precision(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+
+   FAIL_IF(start_trace(child));
+   FAIL_IF(show_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_2));
+   FAIL_IF(show_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+   FAIL_IF(show_ckpt_fpr(child, fpr));
+   FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+   FAIL_IF(show_ckpt_gpr(child, gpr));
+   FAIL_IF(validate_gpr(gpr, GPR_1));
+   FAIL_IF(write_ckpt_gpr(child, GPR_3));
+   FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+   pptr[0] = 1;
+   FAIL_IF(stop_trace(child));
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!have_htm());
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() 

[PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir

[wei . guo . simon]

From: Simon Guo 

There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.

This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.

Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |  2 +-
 tools/testing/selftests/powerpc/alignment/Makefile |  2 +-
 tools/testing/selftests/powerpc/basic_asm.h| 70 -
 .../testing/selftests/powerpc/benchmarks/Makefile  |  2 +-
 .../selftests/powerpc/benchmarks/context_switch.c  |  2 +-
 .../selftests/powerpc/context_switch/Makefile  |  2 +-
 .../testing/selftests/powerpc/copyloops/validate.c |  2 +-
 tools/testing/selftests/powerpc/instructions.h | 68 -
 tools/testing/selftests/powerpc/math/fpu_asm.S |  2 +-
 tools/testing/selftests/powerpc/math/vmx_asm.S |  2 +-
 tools/testing/selftests/powerpc/mm/Makefile|  2 +-
 tools/testing/selftests/powerpc/pmu/Makefile   |  4 +-
 tools/testing/selftests/powerpc/pmu/ebb/Makefile   |  2 +-
 tools/testing/selftests/powerpc/reg.h  | 89 --
 .../testing/selftests/powerpc/stringloops/memcmp.c |  2 +-
 tools/testing/selftests/powerpc/tm/Makefile|  2 +-
 tools/testing/selftests/powerpc/tm/tm.h|  2 +-
 .../testing/selftests/powerpc/utility/basic_asm.h  | 73 ++
 .../selftests/powerpc/utility/instructions.h   | 68 +
 tools/testing/selftests/powerpc/utility/reg.h  | 89 ++
 tools/testing/selftests/powerpc/utility/utils.c| 87 +
 tools/testing/selftests/powerpc/utility/utils.h| 70 +
 tools/testing/selftests/powerpc/utils.c| 87 -
 tools/testing/selftests/powerpc/utils.h| 70 -
 24 files changed, 402 insertions(+), 399 deletions(-)
 delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/instructions.h
 delete mode 100644 tools/testing/selftests/powerpc/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
 delete mode 100644 tools/testing/selftests/powerpc/utils.c
 delete mode 100644 tools/testing/selftests/powerpc/utils.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index 1cc6d64..b6eb817 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc)
 
 GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
 
-CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) $(CFLAGS)
+CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS)
 
 export CFLAGS
 
diff --git a/tools/testing/selftests/powerpc/alignment/Makefile 
b/tools/testing/selftests/powerpc/alignment/Makefile
index ad6a4e4..b61e5e7 100644
--- a/tools/testing/selftests/powerpc/alignment/Makefile
+++ b/tools/testing/selftests/powerpc/alignment/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned 
paste_unaligned paste_last_una
 
 all: $(TEST_PROGS)
 
-$(TEST_PROGS): ../harness.c ../utils.c copy_paste_unaligned_common.c
+$(TEST_PROGS): ../harness.c ../utility/utils.c copy_paste_unaligned_common.c
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/basic_asm.h 
b/tools/testing/selftests/powerpc/basic_asm.h
deleted file mode 100644
index 3349a07..000
--- a/tools/testing/selftests/powerpc/basic_asm.h
+++ /dev/null
@@ -1,70 +0,0 @@
-#ifndef _SELFTESTS_POWERPC_BASIC_ASM_H
-#define _SELFTESTS_POWERPC_BASIC_ASM_H
-
-#include 
-#include 
-
-#define LOAD_REG_IMMEDIATE(reg,expr) \
-   lis reg,(expr)@highest; \
-   ori reg,reg,(expr)@higher;  \
-   rldicr  reg,reg,32,31;  \
-   orisreg,reg,(expr)@high;\
-   ori reg,reg,(expr)@l;
-
-/*
- * Note: These macros assume that variables being stored on the stack are
- * doublewords, while this is usually the case it may not always be the
- * case for each use case.
- */
-#if defined(_CALL_ELF) && _CALL_ELF == 2
-#define STACK_FRAME_MIN_SIZE 32
-#define STACK_FRAME_TOC_POS  24
-#define __STACK_FRAME_PARAM(_param)  (32 + ((_param)*8))
-#define __STACK_FRAME_LOCAL(_num_params,_var_num)  
((STACK_FRAME_PARAM(_num_params)) + ((_var_num)*8))
-#else
-#define STACK_FRAME_MIN_SIZE 112
-#define STACK_FRAME_TOC_POS  40
-#define __STACK_FRAME_PARAM(i)  (48 + ((i)*8))
-
-/*
- * Caveat: if a 

[PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir

[wei . guo . simon]

From: Simon Guo 

There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.

This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.

Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |  2 +-
 tools/testing/selftests/powerpc/alignment/Makefile |  2 +-
 tools/testing/selftests/powerpc/basic_asm.h| 70 -
 .../testing/selftests/powerpc/benchmarks/Makefile  |  2 +-
 .../selftests/powerpc/benchmarks/context_switch.c  |  2 +-
 .../selftests/powerpc/context_switch/Makefile  |  2 +-
 .../testing/selftests/powerpc/copyloops/validate.c |  2 +-
 tools/testing/selftests/powerpc/instructions.h | 68 -
 tools/testing/selftests/powerpc/math/fpu_asm.S |  2 +-
 tools/testing/selftests/powerpc/math/vmx_asm.S |  2 +-
 tools/testing/selftests/powerpc/mm/Makefile|  2 +-
 tools/testing/selftests/powerpc/pmu/Makefile   |  4 +-
 tools/testing/selftests/powerpc/pmu/ebb/Makefile   |  2 +-
 tools/testing/selftests/powerpc/reg.h  | 89 --
 .../testing/selftests/powerpc/stringloops/memcmp.c |  2 +-
 tools/testing/selftests/powerpc/tm/Makefile|  2 +-
 tools/testing/selftests/powerpc/tm/tm.h|  2 +-
 .../testing/selftests/powerpc/utility/basic_asm.h  | 73 ++
 .../selftests/powerpc/utility/instructions.h   | 68 +
 tools/testing/selftests/powerpc/utility/reg.h  | 89 ++
 tools/testing/selftests/powerpc/utility/utils.c| 87 +
 tools/testing/selftests/powerpc/utility/utils.h| 70 +
 tools/testing/selftests/powerpc/utils.c| 87 -
 tools/testing/selftests/powerpc/utils.h| 70 -
 24 files changed, 402 insertions(+), 399 deletions(-)
 delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
 delete mode 100644 tools/testing/selftests/powerpc/instructions.h
 delete mode 100644 tools/testing/selftests/powerpc/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
 create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
 create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
 create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
 delete mode 100644 tools/testing/selftests/powerpc/utils.c
 delete mode 100644 tools/testing/selftests/powerpc/utils.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index 1cc6d64..b6eb817 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc)
 
 GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
 
-CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) $(CFLAGS)
+CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' 
-I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS)
 
 export CFLAGS
 
diff --git a/tools/testing/selftests/powerpc/alignment/Makefile 
b/tools/testing/selftests/powerpc/alignment/Makefile
index ad6a4e4..b61e5e7 100644
--- a/tools/testing/selftests/powerpc/alignment/Makefile
+++ b/tools/testing/selftests/powerpc/alignment/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned 
paste_unaligned paste_last_una
 
 all: $(TEST_PROGS)
 
-$(TEST_PROGS): ../harness.c ../utils.c copy_paste_unaligned_common.c
+$(TEST_PROGS): ../harness.c ../utility/utils.c copy_paste_unaligned_common.c
 
 include ../../lib.mk
 
diff --git a/tools/testing/selftests/powerpc/basic_asm.h 
b/tools/testing/selftests/powerpc/basic_asm.h
deleted file mode 100644
index 3349a07..000
--- a/tools/testing/selftests/powerpc/basic_asm.h
+++ /dev/null
@@ -1,70 +0,0 @@
-#ifndef _SELFTESTS_POWERPC_BASIC_ASM_H
-#define _SELFTESTS_POWERPC_BASIC_ASM_H
-
-#include 
-#include 
-
-#define LOAD_REG_IMMEDIATE(reg,expr) \
-   lis reg,(expr)@highest; \
-   ori reg,reg,(expr)@higher;  \
-   rldicr  reg,reg,32,31;  \
-   orisreg,reg,(expr)@high;\
-   ori reg,reg,(expr)@l;
-
-/*
- * Note: These macros assume that variables being stored on the stack are
- * doublewords, while this is usually the case it may not always be the
- * case for each use case.
- */
-#if defined(_CALL_ELF) && _CALL_ELF == 2
-#define STACK_FRAME_MIN_SIZE 32
-#define STACK_FRAME_TOC_POS  24
-#define __STACK_FRAME_PARAM(_param)  (32 + ((_param)*8))
-#define __STACK_FRAME_LOCAL(_num_params,_var_num)  
((STACK_FRAME_PARAM(_num_params)) + ((_var_num)*8))
-#else
-#define STACK_FRAME_MIN_SIZE 112
-#define STACK_FRAME_TOC_POS  40
-#define __STACK_FRAME_PARAM(i)  (48 + ((i)*8))
-
-/*
- * Caveat: if a function passed more than 8 doublewords, the caller 

[PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|  11 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 187 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  |  99 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 524 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index b6eb817..2fe383c 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..1ec4a6b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,187 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1)
+   asm volatile("" : : : "memory");
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx\n",
+   regs->sier, (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   regs->mmcr2, (unsigned long)MMCR2_EXP);
+   printf("MMCR0: %lx; 

[PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|  11 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 187 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  |  99 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 524 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index b6eb817..2fe383c 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..1ec4a6b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,187 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1)
+   asm volatile("" : : : "memory");
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx\n",
+   regs->sier, (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   regs->mmcr2, (unsigned long)MMCR2_EXP);
+   printf("MMCR0: %lx; expected: %lx\n",
+   regs->mmcr0, (unsigned long)MMCR0_EXP);
+

[PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 -
 tools/testing/selftests/powerpc/reg.h   | 35 ++---
 2 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 -
 tools/testing/selftests/powerpc/reg.h   | 35 ++---
 2 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656
V14: https://lkml.org/lkml/2016/9/12/57

Changes in V15:
---
- Squash patch 1 and 2 to avoid compile error after patch 1.
- Reorganize some code across patch 3 and 4 to avoid compile error
- Created a new directory utility under tools/testing/selftesting/powerpc
to organize common APIs across selftests.
- Use "tbegin." instead of TBEGIN macro. The same for other TM instructions.
- Correct while(ptr); loop without memory barrier.
- Remove an invalid checking on TEXASR in tm-spd-spr.c.
- Use FAIL_IF() as possible to indicate failure line conveniently.
- Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S
- rebased to recent ppc git tree.

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 
- Accommodated most of the review comments on the previous patch series 
- Added a patch to merge functions __switch_to_tm and tm_reclaim_task 

[PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656
V14: https://lkml.org/lkml/2016/9/12/57

Changes in V15:
---
- Squash patch 1 and 2 to avoid compile error after patch 1.
- Reorganize some code across patch 3 and 4 to avoid compile error
- Created a new directory utility under tools/testing/selftesting/powerpc
to organize common APIs across selftests.
- Use "tbegin." instead of TBEGIN macro. The same for other TM instructions.
- Correct while(ptr); loop without memory barrier.
- Remove an invalid checking on TEXASR in tm-spd-spr.c.
- Use FAIL_IF() as possible to indicate failure line conveniently.
- Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S
- rebased to recent ppc git tree.

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 
- Accommodated most of the review comments on the previous patch series 
- Added a patch to merge functions __switch_to_tm and tm_reclaim_task 

Changes in V3: 
-- 
- Added two new error paths in every TM related 

[PATCH v14 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|   7 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 188 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  |  99 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 521 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index 1cc6d64..f9d311b 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..f6948f3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,7 @@
+TEST_PROGS := ptrace-ebb
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..bc6795d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,188 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "../pmu/ebb/ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1);
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx\n",
+   regs->sier, (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   regs->mmcr2, (unsigned long)MMCR2_EXP);
+   printf("MMCR0: %lx; expected: %lx\n",
+   regs->mmcr0, (unsigned long)MMCR0_EXP);
+
+   

[PATCH v14 03/15] selftests/powerpc: Add ptrace tests for EBB

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/Makefile   |   3 +-
 tools/testing/selftests/powerpc/ptrace/Makefile|   7 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.c  | 188 +
 .../testing/selftests/powerpc/ptrace/ptrace-ebb.h  |  99 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 225 +
 5 files changed, 521 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h

diff --git a/tools/testing/selftests/powerpc/Makefile 
b/tools/testing/selftests/powerpc/Makefile
index 1cc6d64..f9d311b 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment  \
   syscalls \
   tm   \
   vphn \
-  math
+  math \
+  ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 000..f6948f3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,7 @@
+TEST_PROGS := ptrace-ebb
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+clean:
+   rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 000..bc6795d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,188 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "../pmu/ebb/ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void ebb(void)
+{
+   struct event event;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   event_init_named(, 0x1001e, "cycles");
+   event.attr.config |= (1ull << 63);
+   event.attr.exclusive = 1;
+   event.attr.pinned = 1;
+   event.attr.exclude_kernel = 1;
+   event.attr.exclude_hv = 1;
+   event.attr.exclude_idle = 1;
+
+   if (event_open()) {
+   perror("event_open() failed");
+   exit(1);
+   }
+
+   setup_ebb_handler(standard_ebb_callee);
+   mtspr(SPRN_BESCR, 0x8001ull);
+
+   /*
+* make sure BESCR has been set before continue
+*/
+   mb();
+
+   if (ebb_event_enable()) {
+   perror("ebb_event_handler() failed");
+   exit(1);
+   }
+
+   mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+   core_busy_loop();
+   cptr[0] = 1;
+   while (1);
+
+   exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   struct opd *opd = (struct opd *) ebb_handler;
+   #endif
+
+   printf("EBBRR: %lx\n", regs->ebbrr);
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)opd->entry);
+   #else
+   printf("EBBHR: %lx; expected: %lx\n",
+   regs->ebbhr, (unsigned long)ebb_handler);
+   #endif
+   printf("BESCR: %lx\n", regs->bescr);
+
+   #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+   if (regs->ebbhr != opd->entry)
+   return TEST_FAIL;
+   #else
+   if (regs->ebbhr != (unsigned long) ebb_handler)
+   return TEST_FAIL;
+   #endif
+
+   return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+   printf("SIAR:  %lx\n", regs->siar);
+   printf("SDAR:  %lx\n", regs->sdar);
+   printf("SIER:  %lx; expected: %lx\n",
+   regs->sier, (unsigned long)SIER_EXP);
+   printf("MMCR2: %lx; expected: %lx\n",
+   regs->mmcr2, (unsigned long)MMCR2_EXP);
+   printf("MMCR0: %lx; expected: %lx\n",
+   regs->mmcr0, (unsigned long)MMCR0_EXP);
+
+   /* Validate SIER */
+   if (regs->sier != SIER_EXP)
+   return 

[PATCH v14 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 182 +
 2 files changed, 183 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index c794057..77d7a13 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..1fd006c
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,182 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   TSUSPEND
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_checkpointed_state(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+

[PATCH v14 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v14 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 186 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 
 3 files changed, 223 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 797840a..f34670e 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,8 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
+ptrace-tm-spd-vsx ptrace-tm-spr
 
+include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..2863070
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,186 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+volatile struct shared *cptr, *pptr;
+
+int shm_id1;
+volatile int *cptr1, *pptr1;
+
+#define TM_SCHED   0xde018c01
+#define TM_KVM_SCHED   0xe001ac01
+
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   if (regs->tm_tfhar != tfhar)
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr != TM_SCHED) && (regs->tm_texasr != TM_KVM_SCHED))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0))
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow TBEGIN */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   TBEGIN
+   "beq 2f;"
+
+   TSUSPEND
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_spr(child, (struct tm_spr_regs *)>regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_HTM));
+   shm_id = 

[PATCH v14 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 182 +
 2 files changed, 183 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index c794057..77d7a13 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..1fd006c
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,182 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   TSUSPEND
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_checkpointed_state(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4);
+   if 

[PATCH v14 15/15] selftests/powerpc: Fix a build issue

[wei . guo . simon]

From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1

[PATCH v14 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 186 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 
 3 files changed, 223 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 797840a..f34670e 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,8 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
+ptrace-tm-spd-vsx ptrace-tm-spr
 
+include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..2863070
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,186 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+volatile struct shared *cptr, *pptr;
+
+int shm_id1;
+volatile int *cptr1, *pptr1;
+
+#define TM_SCHED   0xde018c01
+#define TM_KVM_SCHED   0xe001ac01
+
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   if (regs->tm_tfhar != tfhar)
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr != TM_SCHED) && (regs->tm_texasr != TM_KVM_SCHED))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0))
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   /* TM failover handler should follow TBEGIN */
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR - 12 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   TBEGIN
+   "beq 2f;"
+
+   TSUSPEND
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   /* There are 2 32bit instructions before tbegin. */
+   tfhar += 12;
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_spr(child, (struct tm_spr_regs *)>regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   SKIP_IF(!((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_HTM));
+   shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+   shm_id1 = 

[PATCH v14 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 324 +
 2 files changed, 325 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 170683a..d0f000c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..bf1852b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,324 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 14, %[gpr_2];"
+   "li 15, %[gpr_2];"
+   "li 16, %[gpr_2];"
+   "li 17, %[gpr_2];"
+   "li 18, %[gpr_2];"
+   "li 19, %[gpr_2];"
+   "li 20, %[gpr_2];"
+   "li 21, %[gpr_2];"
+   "li 22, %[gpr_2];"
+   "li 23, %[gpr_2];"
+   "li 24, %[gpr_2];"
+   "li 25, %[gpr_2];"
+   "li 26, %[gpr_2];"
+   "li 27, %[gpr_2];"
+   "li 28, %[gpr_2];"
+   "li 29, %[gpr_2];"
+   "li 30, %[gpr_2];"
+   "li 31, %[gpr_2];"
+
+   TSUSPEND
+
+   "li 14, %[gpr_4];"
+   "li 15, %[gpr_4];"
+   "li 16, %[gpr_4];"
+   "li 17, %[gpr_4];"
+   "li 18, %[gpr_4];"
+   "li 19, %[gpr_4];"
+   "li 

[PATCH v14 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 296 +
 2 files changed, 298 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 31e8e33..170683a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,8 +1,9 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
 $(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..8417d04
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,296 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 14, %[gpr_2];"
+   "li 15, %[gpr_2];"
+   "li 16, %[gpr_2];"
+   "li 17, %[gpr_2];"
+   "li 18, %[gpr_2];"
+   "li 19, %[gpr_2];"
+   "li 20, %[gpr_2];"
+   "li 21, %[gpr_2];"
+   "li 22, %[gpr_2];"
+   "li 23, %[gpr_2];"
+   "li 24, %[gpr_2];"
+   "li 25, %[gpr_2];"
+   "li 26, %[gpr_2];"
+   "li 27, %[gpr_2];"
+   "li 28, %[gpr_2];"
+   "li 29, %[gpr_2];"
+   "li 30, %[gpr_2];"
+   "li 31, %[gpr_2];"
+
+
+   "lfs 0, 0(%[flt_2]);"
+   "lfs 1, 0(%[flt_2]);"
+   "lfs 2, 

[PATCH v14 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 324 +
 2 files changed, 325 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 170683a..d0f000c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..bf1852b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,324 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 14, %[gpr_2];"
+   "li 15, %[gpr_2];"
+   "li 16, %[gpr_2];"
+   "li 17, %[gpr_2];"
+   "li 18, %[gpr_2];"
+   "li 19, %[gpr_2];"
+   "li 20, %[gpr_2];"
+   "li 21, %[gpr_2];"
+   "li 22, %[gpr_2];"
+   "li 23, %[gpr_2];"
+   "li 24, %[gpr_2];"
+   "li 25, %[gpr_2];"
+   "li 26, %[gpr_2];"
+   "li 27, %[gpr_2];"
+   "li 28, %[gpr_2];"
+   "li 29, %[gpr_2];"
+   "li 30, %[gpr_2];"
+   "li 31, %[gpr_2];"
+
+   TSUSPEND
+
+   "li 14, %[gpr_4];"
+   "li 15, %[gpr_4];"
+   "li 16, %[gpr_4];"
+   "li 17, %[gpr_4];"
+   "li 18, %[gpr_4];"
+   "li 19, %[gpr_4];"
+   "li 20, %[gpr_4];"
+   "li 21, %[gpr_4];"
+   "li 22, %[gpr_4];"

[PATCH v14 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-gpr.c   | 296 +
 2 files changed, 298 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 31e8e33..170683a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,8 +1,9 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
 $(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
 ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S 
../pmu/ebb/busy_loop.S
+
 clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 000..8417d04
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,296 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   printf("Starting the child\n");
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 14, %[gpr_2];"
+   "li 15, %[gpr_2];"
+   "li 16, %[gpr_2];"
+   "li 17, %[gpr_2];"
+   "li 18, %[gpr_2];"
+   "li 19, %[gpr_2];"
+   "li 20, %[gpr_2];"
+   "li 21, %[gpr_2];"
+   "li 22, %[gpr_2];"
+   "li 23, %[gpr_2];"
+   "li 24, %[gpr_2];"
+   "li 25, %[gpr_2];"
+   "li 26, %[gpr_2];"
+   "li 27, %[gpr_2];"
+   "li 28, %[gpr_2];"
+   "li 29, %[gpr_2];"
+   "li 30, %[gpr_2];"
+   "li 31, %[gpr_2];"
+
+
+   "lfs 0, 0(%[flt_2]);"
+   "lfs 1, 0(%[flt_2]);"
+   "lfs 2, 0(%[flt_2]);"
+   "lfs 3, 0(%[flt_2]);"
+   "lfs 4, 

[PATCH v14 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 159 ++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 392 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index d0f000c..c794057 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..e7d5938
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,159 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr;
+volatile int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0]);
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, reg);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   ret = validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_tar_registers(child, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2]);
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1]);
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if 

[PATCH v14 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 140 +++
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 265 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 5 files changed, 652 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 2916759..e3d9ceb 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..770b846
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,140 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   ret = write_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1]);
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   if (WIFEXITED(status)) {
+   if (WEXITSTATUS(status))
+   return TEST_FAIL;
+   }
+   }
+   

[PATCH v14 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 159 ++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 392 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index d0f000c..c794057 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..e7d5938
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,159 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr;
+volatile int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0]);
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, reg);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   ret = validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_tar_registers(child, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2]);
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+   ret = trace_tar_write(pid);
+   if (ret)
+   return ret;
+
+   /* Unblock the child now */
+   pptr[0] = 1;
+
+   /* Wait on child */
+   while (!pptr[1]);
+
+   shmdt((int *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not 

[PATCH v14 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 140 +++
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 127 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 265 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 5 files changed, 652 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 2916759..e3d9ceb 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..770b846
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,140 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   ret = write_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1]);
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   shmdt((void *)pptr);
+   shmctl(shm_id, IPC_RMID, NULL);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   shmctl(shm_id, IPC_RMID, NULL);
+   if (ret != pid) {
+   printf("Child's exit status not captured\n");
+   return TEST_FAIL;
+   }
+
+   if (WIFEXITED(status)) {
+   if (WEXITSTATUS(status))
+   return TEST_FAIL;
+   }
+   }
+   return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+   return 

[PATCH v14 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v14 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 195 +
 2 files changed, 196 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 77d7a13..2916759 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..da4c477
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,195 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   TSUSPEND
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = 

[PATCH v14 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 196 +++
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 131 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 5 files changed, 614 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.S

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index f6948f3..31e8e33 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
+
 all: $(TEST_PROGS)
 CFLAGS += -m64
 $(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..c398501
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,196 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+}
+
+int trace_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+ 

[PATCH v14 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 206 +
 2 files changed, 208 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e3d9ceb..1b07649 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..42555c9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,206 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx;"
+   TSUSPEND
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   ret = write_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   pptr[0] = 1;
+   ret = 

[PATCH v14 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 206 +
 2 files changed, 208 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e3d9ceb..1b07649 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..42555c9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,206 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx;"
+   TSUSPEND
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   shmdt((void *)cptr);
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   ret = write_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   pptr[0] = 1;
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;

[PATCH v14 14/15] selftests/powerpc: Add .gitignore file for ptrace executables

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1

[PATCH v14 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 195 +
 2 files changed, 196 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 77d7a13..2916759 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..da4c477
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,195 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   TSUSPEND
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_checkpointed_state(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s 

[PATCH v14 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.c  | 196 +++
 .../testing/selftests/powerpc/ptrace/ptrace-gpr.h  |  74 
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 131 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 211 +
 5 files changed, 614 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.S

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index f6948f3..31e8e33 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
+
 all: $(TEST_PROGS)
 CFLAGS += -m64
 $(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 000..c398501
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,196 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+   unsigned long gpr_buf[18];
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+   asm __volatile__(
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   :
+   : [gpr_1]"i"(GPR_1), [flt_1] "r" ()
+   : "memory", "r6", "r7", "r8", "r9", "r10",
+   "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+   "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+   "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+   );
+
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+
+   shmdt((void *)cptr);
+   store_gpr(gpr_buf);
+   store_fpr(fpr_buf);
+
+   if (validate_gpr(gpr_buf, GPR_3))
+   exit(1);
+
+   if (validate_fpr_float(fpr_buf, c))
+   exit(1);
+
+   exit(0);
+}
+
+int trace_gpr(pid_t child)
+{
+   unsigned long gpr[18];
+   unsigned long fpr[32];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+  

[PATCH v14 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 219 +
 2 files changed, 221 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 1b07649..797840a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 all: $(TEST_PROGS)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..cdaf9ad
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,219 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   TSUSPEND
+   "bl load_vsx;"
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   ret = write_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = 

[PATCH v14 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 219 +
 2 files changed, 221 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 1b07649..797840a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 all: $(TEST_PROGS)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..cdaf9ad
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,219 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   TSUSPEND
+   "bl load_vsx;"
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+
+   load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+   ret = write_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   

[PATCH v14 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/reg.h | 42 ---
 1 file changed, 39 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..fee7be9 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -18,6 +18,19 @@
 
 #define mb()   asm volatile("sync" : : : "memory");
 
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
+
+/* TM instructions */
+#define TBEGIN ".long 0x7C00051D;"
+#define TABORT ".long 0x7C00071D;"
+#define TEND   ".long 0x7C00055D;"
+#define TSUSPEND   ".long 0x7C0005DD;"
+#define TRESUME".long 0x7C2005DD;"
+
 #define SPRN_MMCR2 769
 #define SPRN_MMCRA 770
 #define SPRN_MMCR0 779
@@ -51,10 +64,33 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v14 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'

[wei . guo . simon]

From: Anshuman Khandual 

This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/reg.h | 42 ---
 1 file changed, 39 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/reg.h 
b/tools/testing/selftests/powerpc/reg.h
index fddf368..fee7be9 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -18,6 +18,19 @@
 
 #define mb()   asm volatile("sync" : : : "memory");
 
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb)(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
+((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
+
+/* TM instructions */
+#define TBEGIN ".long 0x7C00051D;"
+#define TABORT ".long 0x7C00071D;"
+#define TEND   ".long 0x7C00055D;"
+#define TSUSPEND   ".long 0x7C0005DD;"
+#define TRESUME".long 0x7C2005DD;"
+
 #define SPRN_MMCR2 769
 #define SPRN_MMCRA 770
 #define SPRN_MMCR0 779
@@ -51,10 +64,33 @@
 #define SPRN_SDAR  781
 #define SPRN_SIER  768
 
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82/* Transaction Exception and Status Register */
 #define SPRN_TFIAR  0x81/* Transaction Failure Inst Addr*/
 #define SPRN_TFHAR  0x80/* Transaction Failure Handler Addr */
-#define TEXASR_FS   0x0800
-#define SPRN_TAR0x32f
+#define SPRN_TAR0x32f  /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11/* Privilege State DSCR */
+#define SPRN_DSCR  0x03/* Data Stream Control Register */
+#define SPRN_PPR   896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC  0xFE00
+#define TEXASR_FP  0x0100
+#define TEXASR_DA  0x0080
+#define TEXASR_NO  0x0040
+#define TEXASR_FO  0x0020
+#define TEXASR_SIC 0x0010
+#define TEXASR_NTC 0x0008
+#define TEXASR_TC  0x0004
+#define TEXASR_TIC 0x0002
+#define TEXASR_IC  0x0001
+#define TEXASR_IFC 0x8000
+#define TEXASR_ABT 0x0001
+#define TEXASR_SPD 0x8000
+#define TEXASR_HV  0x2000
+#define TEXASR_PR  0x1000
+#define TEXASR_FS  0x0800
+#define TEXASR_TE  0x0400
+#define TEXASR_ROT 0x0200
 
 #endif /* _SELFTESTS_POWERPC_REG_H */
-- 
1.8.3.1

[PATCH v14 02/15] selftests/powerpc: Use the new SPRN_DSCR_PRIV definiton

[wei . guo . simon]

From: Anshuman Khandual 

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
-- 
1.8.3.1

[PATCH v14 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 
- Accommodated most of the review comments on the previous patch series 
- Added a patch to merge functions __switch_to_tm and tm_reclaim_task 

Changes in V3: 
-- 
- Added two new error paths in every TM related get/set functions when regset 
support is not present on the system (ENODEV) or when the process does not 
have any transaction active (ENODATA) in the context 
- Installed the active hooks for all the newly added regset core note
types 

Changes in V2: 
-- 
- Removed all the power specific ptrace requests corresponding to new
NT_PPC_* 
elf core note types. Now all the register sets can be accessed from
ptrace 
through PTRACE_GETREGSET/PTRACE_SETREGSET using the individual
NT_PPC* core 
note type instead 
- Fixed couple of attribute values for REGSET_TM_CGPR register set 

[PATCH v14 00/15] selftests/powerpc: Add ptrace tests for ppc registers

[wei . guo . simon]

From: Simon Guo 

This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 

Test Result (All tests pass on both BE and LE) 
-- 
ptrace-ebb  PASS 
ptrace-gpr  PASS 
ptrace-tm-gpr   PASS 
ptrace-tm-spd-gpr   PASS 
ptrace-tar  PASS 
ptrace-tm-tar   PASS 
ptrace-tm-spd-tar   PASS 
ptrace-vsx  PASS 
ptrace-tm-vsx   PASS 
ptrace-tm-spd-vsx   PASS 
ptrace-tm-spr   PASS 

Previous versions: 
== 
RFC: https://lkml.org/lkml/2014/4/1/292
V1:  https://lkml.org/lkml/2014/4/2/43
V2:  https://lkml.org/lkml/2014/5/5/88
V3:  https://lkml.org/lkml/2014/5/23/486
V4:  https://lkml.org/lkml/2014/11/11/6
V5:  https://lkml.org/lkml/2014/11/25/134
V6:  https://lkml.org/lkml/2014/12/2/98
V7:  https://lkml.org/lkml/2015/1/14/19
V8:  https://lkml.org/lkml/2015/5/19/700
V9:  https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656

Changes in V14: 
--- 
- Remove duplicated NT_PPC_xxx register macro in 
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning

Changes in V13: 
--- 
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo

Changes in V12: 
--- 
- Revert change which is trying to incoporate following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c

Changes in V11: 
--- 
- Rework based on following patch:
  [PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live 
registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
  Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available

Changes in V10: 
--- 
- Rebased against the latest mainline 
- Fixed couple of build failures in the test cases related to aux vector 

Changes in V9: 
-- 
- Fixed static build check failure after tm_orig_msr got dropped 
- Fixed asm volatile construct for used registers set 
- Fixed EBB, VSX, VMX tests for LE 
- Fixed TAR test which was failing because of system calls 
- Added checks for PPC_FEATURE2_HTM aux feature in the tests 
- Fixed copyright statements 

Changes in V8: 
-- 
- Split the misc register set into individual ELF core notes 
- Implemented support for VSX register set (on and off TM) 
- Implemented support for EBB register set 
- Implemented review comments on previous versions 
- Some code re-arrangements, re-writes and documentation 
- Added comprehensive list of test cases into selftests 

Changes in V7: 
-- 
- Fixed a config directive in the MISC code 
- Merged the two gitignore patches into a single one 

Changes in V6: 
-- 
- Added two git ignore patches for powerpc selftests 
- Re-formatted all in-code function definitions in kernel-doc format 

Changes in V5: 
-- 
- Changed flush_tmregs_to_thread, so not to take into account self tracing 
- Dropped the 3rd patch in the series which had merged two functions 
- Fixed one build problem for the misc debug register patch 
- Accommodated almost all the review comments from Suka on the 6th patch 
- Minor changes to the self test program 
- Changed commit messages for some of the patches 

Changes in V4: 
-- 
- Added one test program into the powerpc selftest bucket in this regard 
- Split the 2nd patch in the previous series into four different patches 
- Accommodated most of the review comments on the previous patch series 
- Added a patch to merge functions __switch_to_tm and tm_reclaim_task 

Changes in V3: 
-- 
- Added two new error paths in every TM related get/set functions when regset 
support is not present on the system (ENODEV) or when the process does not 
have any transaction active (ENODATA) in the context 
- Installed the active hooks for all the newly added regset core note
types 

Changes in V2: 
-- 
- Removed all the power specific ptrace requests corresponding to new
NT_PPC_* 
elf core note types. Now all the register sets can be accessed from
ptrace 
through PTRACE_GETREGSET/PTRACE_SETREGSET using the individual
NT_PPC* core 
note type instead 
- Fixed couple of attribute values for REGSET_TM_CGPR register set 
- Renamed flush_tmreg_to_thread as flush_tmregs_to_thread 
- Fixed 32 bit 

[PATCH v14 02/15] selftests/powerpc: Use the new SPRN_DSCR_PRIV definiton

[wei . guo . simon]

From: Anshuman Khandual 

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
-- 
1.8.3.1

[PATCH 3/3] selftests: expanding more mlock selftest

[wei . guo . simon]

From: Simon Guo 

This patch will randomly perform mlock/mlock2 on a given
memory region, and verify the RLIMIT_MEMLOCK limitation
works properly.

Suggested-by: David Rientjes 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/vm/Makefile   |   4 +-
 tools/testing/selftests/vm/mlock-intersect-test.c |  76 --
 tools/testing/selftests/vm/mlock-random-test.c| 293 ++
 3 files changed, 295 insertions(+), 78 deletions(-)
 delete mode 100644 tools/testing/selftests/vm/mlock-intersect-test.c
 create mode 100644 tools/testing/selftests/vm/mlock-random-test.c

diff --git a/tools/testing/selftests/vm/Makefile 
b/tools/testing/selftests/vm/Makefile
index a0412a8..bbab7f4 100644
--- a/tools/testing/selftests/vm/Makefile
+++ b/tools/testing/selftests/vm/Makefile
@@ -10,7 +10,7 @@ BINARIES += on-fault-limit
 BINARIES += thuge-gen
 BINARIES += transhuge-stress
 BINARIES += userfaultfd
-BINARIES += mlock-intersect-test
+BINARIES += mlock-random-test
 
 all: $(BINARIES)
 %: %.c
@@ -18,7 +18,7 @@ all: $(BINARIES)
 userfaultfd: userfaultfd.c ../../../../usr/include/linux/kernel.h
$(CC) $(CFLAGS) -O2 -o $@ $< -lpthread
 
-mlock-intersect-test: mlock-intersect-test.c
+mlock-random-test: mlock-random-test.c
$(CC) $(CFLAGS) -o $@ $< -lcap
 
 ../../../../usr/include/linux/kernel.h:
diff --git a/tools/testing/selftests/vm/mlock-intersect-test.c 
b/tools/testing/selftests/vm/mlock-intersect-test.c
deleted file mode 100644
index f78e68a..000
--- a/tools/testing/selftests/vm/mlock-intersect-test.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * It tests the duplicate mlock result:
- * - the ulimit of lock page is 64k
- * - allocate address area 64k starting from p
- * - mlock   [p -- p + 30k]
- * - Then mlock address  [ p -- p + 40k ]
- *
- * It should succeed since totally we locked
- * 40k < 64k limitation.
- *
- * It should not be run with CAP_IPC_LOCK.
- */
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include "mlock2.h"
-
-int main(int argc, char **argv)
-{
-   struct rlimit new;
-   char *p = NULL;
-   cap_t cap = cap_init();
-   int i;
-
-   /* drop capabilities including CAP_IPC_LOCK */
-   if (cap_set_proc(cap))
-   return -1;
-
-   /* set mlock limits to 64k */
-   new.rlim_cur = 65536;
-   new.rlim_max = 65536;
-   setrlimit(RLIMIT_MEMLOCK, );
-
-   /* test VM_LOCK */
-   p = malloc(1024 * 64);
-   if (mlock(p, 1024 * 30)) {
-   printf("mlock() 30k return failure.\n");
-   return -1;
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock(p, 1024 * 40)) {
-   printf("mlock() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock2_(p, 1024 * 40, MLOCK_ONFAULT)) {
-   printf("mlock2_() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   free(p);
-
-   /* Test VM_LOCKONFAULT */
-   p = malloc(1024 * 64);
-   if (mlock2_(p, 1024 * 30, MLOCK_ONFAULT)) {
-   printf("mlock2_() 30k return failure.\n");
-   return -1;
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock2_(p, 1024 * 40, MLOCK_ONFAULT)) {
-   printf("mlock2_() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock(p, 1024 * 40)) {
-   printf("mlock() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   return 0;
-}
diff --git a/tools/testing/selftests/vm/mlock-random-test.c 
b/tools/testing/selftests/vm/mlock-random-test.c
new file mode 100644
index 000..83de4f5
--- /dev/null
+++ b/tools/testing/selftests/vm/mlock-random-test.c
@@ -0,0 +1,293 @@
+/*
+ * It tests the mlock/mlock2() when they are invoked
+ * on randomly memory region.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "mlock2.h"
+
+#define CHUNK_UNIT (128 * 1024)
+#define MLOCK_RLIMIT_SIZE (CHUNK_UNIT * 2)
+#define MLOCK_WITHIN_LIMIT_SIZE CHUNK_UNIT
+#define MLOCK_OUTOF_LIMIT_SIZE (CHUNK_UNIT * 3)
+
+#define TEST_LOOP 100
+#define PAGE_ALIGN(size, ps) (((size) + ((ps) - 1)) & ~((ps) - 1))
+
+int set_cap_limits(rlim_t max)
+{
+   struct rlimit new;
+   cap_t cap = cap_init();
+
+   new.rlim_cur = max;
+   new.rlim_max = max;
+   if (setrlimit(RLIMIT_MEMLOCK, )) {
+   perror("setrlimit() returns error\n");
+   return -1;
+   }
+
+   /* drop capabilities including CAP_IPC_LOCK */
+   if (cap_set_proc(cap)) {
+   perror("cap_set_proc() returns error\n");
+   return -2;
+   }
+

[PATCH 3/3] selftests: expanding more mlock selftest

[wei . guo . simon]

From: Simon Guo 

This patch will randomly perform mlock/mlock2 on a given
memory region, and verify the RLIMIT_MEMLOCK limitation
works properly.

Suggested-by: David Rientjes 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/vm/Makefile   |   4 +-
 tools/testing/selftests/vm/mlock-intersect-test.c |  76 --
 tools/testing/selftests/vm/mlock-random-test.c| 293 ++
 3 files changed, 295 insertions(+), 78 deletions(-)
 delete mode 100644 tools/testing/selftests/vm/mlock-intersect-test.c
 create mode 100644 tools/testing/selftests/vm/mlock-random-test.c

diff --git a/tools/testing/selftests/vm/Makefile 
b/tools/testing/selftests/vm/Makefile
index a0412a8..bbab7f4 100644
--- a/tools/testing/selftests/vm/Makefile
+++ b/tools/testing/selftests/vm/Makefile
@@ -10,7 +10,7 @@ BINARIES += on-fault-limit
 BINARIES += thuge-gen
 BINARIES += transhuge-stress
 BINARIES += userfaultfd
-BINARIES += mlock-intersect-test
+BINARIES += mlock-random-test
 
 all: $(BINARIES)
 %: %.c
@@ -18,7 +18,7 @@ all: $(BINARIES)
 userfaultfd: userfaultfd.c ../../../../usr/include/linux/kernel.h
$(CC) $(CFLAGS) -O2 -o $@ $< -lpthread
 
-mlock-intersect-test: mlock-intersect-test.c
+mlock-random-test: mlock-random-test.c
$(CC) $(CFLAGS) -o $@ $< -lcap
 
 ../../../../usr/include/linux/kernel.h:
diff --git a/tools/testing/selftests/vm/mlock-intersect-test.c 
b/tools/testing/selftests/vm/mlock-intersect-test.c
deleted file mode 100644
index f78e68a..000
--- a/tools/testing/selftests/vm/mlock-intersect-test.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * It tests the duplicate mlock result:
- * - the ulimit of lock page is 64k
- * - allocate address area 64k starting from p
- * - mlock   [p -- p + 30k]
- * - Then mlock address  [ p -- p + 40k ]
- *
- * It should succeed since totally we locked
- * 40k < 64k limitation.
- *
- * It should not be run with CAP_IPC_LOCK.
- */
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include "mlock2.h"
-
-int main(int argc, char **argv)
-{
-   struct rlimit new;
-   char *p = NULL;
-   cap_t cap = cap_init();
-   int i;
-
-   /* drop capabilities including CAP_IPC_LOCK */
-   if (cap_set_proc(cap))
-   return -1;
-
-   /* set mlock limits to 64k */
-   new.rlim_cur = 65536;
-   new.rlim_max = 65536;
-   setrlimit(RLIMIT_MEMLOCK, );
-
-   /* test VM_LOCK */
-   p = malloc(1024 * 64);
-   if (mlock(p, 1024 * 30)) {
-   printf("mlock() 30k return failure.\n");
-   return -1;
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock(p, 1024 * 40)) {
-   printf("mlock() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock2_(p, 1024 * 40, MLOCK_ONFAULT)) {
-   printf("mlock2_() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   free(p);
-
-   /* Test VM_LOCKONFAULT */
-   p = malloc(1024 * 64);
-   if (mlock2_(p, 1024 * 30, MLOCK_ONFAULT)) {
-   printf("mlock2_() 30k return failure.\n");
-   return -1;
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock2_(p, 1024 * 40, MLOCK_ONFAULT)) {
-   printf("mlock2_() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   for (i = 0; i < 10; i++) {
-   if (mlock(p, 1024 * 40)) {
-   printf("mlock() #%d 40k returns failure.\n", i);
-   return -1;
-   }
-   }
-   return 0;
-}
diff --git a/tools/testing/selftests/vm/mlock-random-test.c 
b/tools/testing/selftests/vm/mlock-random-test.c
new file mode 100644
index 000..83de4f5
--- /dev/null
+++ b/tools/testing/selftests/vm/mlock-random-test.c
@@ -0,0 +1,293 @@
+/*
+ * It tests the mlock/mlock2() when they are invoked
+ * on randomly memory region.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "mlock2.h"
+
+#define CHUNK_UNIT (128 * 1024)
+#define MLOCK_RLIMIT_SIZE (CHUNK_UNIT * 2)
+#define MLOCK_WITHIN_LIMIT_SIZE CHUNK_UNIT
+#define MLOCK_OUTOF_LIMIT_SIZE (CHUNK_UNIT * 3)
+
+#define TEST_LOOP 100
+#define PAGE_ALIGN(size, ps) (((size) + ((ps) - 1)) & ~((ps) - 1))
+
+int set_cap_limits(rlim_t max)
+{
+   struct rlimit new;
+   cap_t cap = cap_init();
+
+   new.rlim_cur = max;
+   new.rlim_max = max;
+   if (setrlimit(RLIMIT_MEMLOCK, )) {
+   perror("setrlimit() returns error\n");
+   return -1;
+   }
+
+   /* drop capabilities including CAP_IPC_LOCK */
+   if (cap_set_proc(cap)) {
+   perror("cap_set_proc() returns error\n");
+   return -2;
+   }
+
+   return 0;
+}
+
+int get_proc_locked_vm_size(void)
+{
+