Re: [PATCH 01/20] dt-bindings: clock: Add ASPEED constants

2017-12-10 Thread Arnd Bergmann 
On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley  wrote:

> +#define ASPEED_NUM_CLKS35

Why is this part of the ABI? What if they ever come out with a new
chip that needs
one more clock and you can't change it?

 Arnd

Re: [PATCH 01/20] dt-bindings: clock: Add ASPEED constants

2017-12-10 Thread Arnd Bergmann 
On Mon, Dec 11, 2017 at 6:06 AM, Joel Stanley  wrote:

> +#define ASPEED_NUM_CLKS35

Why is this part of the ABI? What if they ever come out with a new
chip that needs
one more clock and you can't change it?

 Arnd

[PATCH 01/20] dt-bindings: clock: Add ASPEED constants

2017-12-10 Thread Joel Stanley 
These will be merged as part of the clock driver. This commit is
included so the tree will build without the clock series being applied.

Signed-off-by: Joel Stanley 
---
 include/dt-bindings/clock/aspeed-clock.h | 54 
 1 file changed, 54 insertions(+)
 create mode 100644 include/dt-bindings/clock/aspeed-clock.h

diff --git a/include/dt-bindings/clock/aspeed-clock.h 
b/include/dt-bindings/clock/aspeed-clock.h
new file mode 100644
index ..fe46ab69da5c
--- /dev/null
+++ b/include/dt-bindings/clock/aspeed-clock.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+
+#ifndef DT_BINDINGS_ASPEED_CLOCK_H
+#define DT_BINDINGS_ASPEED_CLOCK_H
+
+#define ASPEED_CLK_GATE_ECLK   0
+#define ASPEED_CLK_GATE_GCLK   1
+#define ASPEED_CLK_GATE_MCLK   2
+#define ASPEED_CLK_GATE_VCLK   3
+#define ASPEED_CLK_GATE_BCLK   4
+#define ASPEED_CLK_GATE_DCLK   5
+#define ASPEED_CLK_GATE_REFCLK 6
+#define ASPEED_CLK_GATE_USBPORT2CLK7
+#define ASPEED_CLK_GATE_LCLK   8
+#define ASPEED_CLK_GATE_USBUHCICLK 9
+#define ASPEED_CLK_GATE_D1CLK  10
+#define ASPEED_CLK_GATE_YCLK   11
+#define ASPEED_CLK_GATE_USBPORT1CLK12
+#define ASPEED_CLK_GATE_UART1CLK   13
+#define ASPEED_CLK_GATE_UART2CLK   14
+#define ASPEED_CLK_GATE_UART5CLK   15
+#define ASPEED_CLK_GATE_ESPICLK16
+#define ASPEED_CLK_GATE_MAC1CLK17
+#define ASPEED_CLK_GATE_MAC2CLK18
+#define ASPEED_CLK_GATE_RSACLK 19
+#define ASPEED_CLK_GATE_UART3CLK   20
+#define ASPEED_CLK_GATE_UART4CLK   21
+#define ASPEED_CLK_GATE_SDCLKCLK   22
+#define ASPEED_CLK_GATE_LHCCLK 23
+#define ASPEED_CLK_HPLL24
+#define ASPEED_CLK_AHB 25
+#define ASPEED_CLK_APB 26
+#define ASPEED_CLK_UART27
+#define ASPEED_CLK_SDIO28
+#define ASPEED_CLK_ECLK29
+#define ASPEED_CLK_ECLK_MUX30
+#define ASPEED_CLK_LHCLK   31
+#define ASPEED_CLK_MAC 32
+#define ASPEED_CLK_BCLK33
+#define ASPEED_CLK_MPLL34
+
+#define ASPEED_NUM_CLKS35
+
+#define ASPEED_RESET_XDMA  0
+#define ASPEED_RESET_MCTP  1
+#define ASPEED_RESET_ADC   2
+#define ASPEED_RESET_JTAG_MASTER   3
+#define ASPEED_RESET_MIC   4
+#define ASPEED_RESET_PWM   5
+#define ASPEED_RESET_PCIVGA6
+#define ASPEED_RESET_I2C   7
+#define ASPEED_RESET_AHB   8
+
+#endif
-- 
2.14.1

[PATCH 01/20] dt-bindings: clock: Add ASPEED constants

2017-12-10 Thread Joel Stanley 
These will be merged as part of the clock driver. This commit is
included so the tree will build without the clock series being applied.

Signed-off-by: Joel Stanley 
---
 include/dt-bindings/clock/aspeed-clock.h | 54 
 1 file changed, 54 insertions(+)
 create mode 100644 include/dt-bindings/clock/aspeed-clock.h

diff --git a/include/dt-bindings/clock/aspeed-clock.h 
b/include/dt-bindings/clock/aspeed-clock.h
new file mode 100644
index ..fe46ab69da5c
--- /dev/null
+++ b/include/dt-bindings/clock/aspeed-clock.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+
+#ifndef DT_BINDINGS_ASPEED_CLOCK_H
+#define DT_BINDINGS_ASPEED_CLOCK_H
+
+#define ASPEED_CLK_GATE_ECLK   0
+#define ASPEED_CLK_GATE_GCLK   1
+#define ASPEED_CLK_GATE_MCLK   2
+#define ASPEED_CLK_GATE_VCLK   3
+#define ASPEED_CLK_GATE_BCLK   4
+#define ASPEED_CLK_GATE_DCLK   5
+#define ASPEED_CLK_GATE_REFCLK 6
+#define ASPEED_CLK_GATE_USBPORT2CLK7
+#define ASPEED_CLK_GATE_LCLK   8
+#define ASPEED_CLK_GATE_USBUHCICLK 9
+#define ASPEED_CLK_GATE_D1CLK  10
+#define ASPEED_CLK_GATE_YCLK   11
+#define ASPEED_CLK_GATE_USBPORT1CLK12
+#define ASPEED_CLK_GATE_UART1CLK   13
+#define ASPEED_CLK_GATE_UART2CLK   14
+#define ASPEED_CLK_GATE_UART5CLK   15
+#define ASPEED_CLK_GATE_ESPICLK16
+#define ASPEED_CLK_GATE_MAC1CLK17
+#define ASPEED_CLK_GATE_MAC2CLK18
+#define ASPEED_CLK_GATE_RSACLK 19
+#define ASPEED_CLK_GATE_UART3CLK   20
+#define ASPEED_CLK_GATE_UART4CLK   21
+#define ASPEED_CLK_GATE_SDCLKCLK   22
+#define ASPEED_CLK_GATE_LHCCLK 23
+#define ASPEED_CLK_HPLL24
+#define ASPEED_CLK_AHB 25
+#define ASPEED_CLK_APB 26
+#define ASPEED_CLK_UART27
+#define ASPEED_CLK_SDIO28
+#define ASPEED_CLK_ECLK29
+#define ASPEED_CLK_ECLK_MUX30
+#define ASPEED_CLK_LHCLK   31
+#define ASPEED_CLK_MAC 32
+#define ASPEED_CLK_BCLK33
+#define ASPEED_CLK_MPLL34
+
+#define ASPEED_NUM_CLKS35
+
+#define ASPEED_RESET_XDMA  0
+#define ASPEED_RESET_MCTP  1
+#define ASPEED_RESET_ADC   2
+#define ASPEED_RESET_JTAG_MASTER   3
+#define ASPEED_RESET_MIC   4
+#define ASPEED_RESET_PWM   5
+#define ASPEED_RESET_PCIVGA6
+#define ASPEED_RESET_I2C   7
+#define ASPEED_RESET_AHB   8
+
+#endif
-- 
2.14.1