Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
On Wed, Sep 07, 2005 at 10:00:01AM +0300, Tony Lindgren wrote: > * Pavel Machek <[EMAIL PROTECTED]> [050906 15:28]: > > Hi! > > > > > > > +NOTE: Currently there's a bug somewhere where the reading the > > > > > + P_LVL2 for the first time causes the system to sleep instead > > > > > of > > > > > + idling. This means that you need to hit the power button once > > > > > to > > > > > + wake the system after loading the module for the first time > > > > > after > > > > > + reboot. After that the system idles as supposed. > > > > > + (Only observed on Tony's system.) > > > > > > > > Could you fix this before merge? > > > > > > I think this is some BIOS issue or hardware bug. It happens only on > > > Tyan S2460. I tried dumping the registers few years ago on my > > > Tyan s2460, but no luck. > > > > > > Low chance for anybody fixing it... > > > > > > > So at least DMI-blacklist it... > > I rarely have access to that hardware, so don't count on me doing > this... > I'm unable to do this neither. Looks like this won't be fixed. -jo -- -rw-r--r-- 1 jo users 63 2005-09-06 20:21 /home/jo/.signature - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
* Pavel Machek <[EMAIL PROTECTED]> [050906 15:28]: > Hi! > > > > > +NOTE: Currently there's a bug somewhere where the reading the > > > > + P_LVL2 for the first time causes the system to sleep instead of > > > > + idling. This means that you need to hit the power button once to > > > > + wake the system after loading the module for the first time after > > > > + reboot. After that the system idles as supposed. > > > > + (Only observed on Tony's system.) > > > > > > Could you fix this before merge? > > > > I think this is some BIOS issue or hardware bug. It happens only on > > Tyan S2460. I tried dumping the registers few years ago on my > > Tyan s2460, but no luck. > > > > Low chance for anybody fixing it... > > > > So at least DMI-blacklist it... I rarely have access to that hardware, so don't count on me doing this... Tony - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
* Pavel Machek [EMAIL PROTECTED] [050906 15:28]: Hi! +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) Could you fix this before merge? I think this is some BIOS issue or hardware bug. It happens only on Tyan S2460. I tried dumping the registers few years ago on my Tyan s2460, but no luck. Low chance for anybody fixing it... So at least DMI-blacklist it... I rarely have access to that hardware, so don't count on me doing this... Tony - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
On Wed, Sep 07, 2005 at 10:00:01AM +0300, Tony Lindgren wrote: * Pavel Machek [EMAIL PROTECTED] [050906 15:28]: Hi! +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) Could you fix this before merge? I think this is some BIOS issue or hardware bug. It happens only on Tyan S2460. I tried dumping the registers few years ago on my Tyan s2460, but no luck. Low chance for anybody fixing it... So at least DMI-blacklist it... I rarely have access to that hardware, so don't count on me doing this... I'm unable to do this neither. Looks like this won't be fixed. -jo -- -rw-r--r-- 1 jo users 63 2005-09-06 20:21 /home/jo/.signature - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
Hi! > > > +NOTE: Currently there's a bug somewhere where the reading the > > > + P_LVL2 for the first time causes the system to sleep instead of > > > + idling. This means that you need to hit the power button once to > > > + wake the system after loading the module for the first time after > > > + reboot. After that the system idles as supposed. > > > + (Only observed on Tony's system.) > > > > Could you fix this before merge? > > I think this is some BIOS issue or hardware bug. It happens only on > Tyan S2460. I tried dumping the registers few years ago on my > Tyan s2460, but no luck. > > Low chance for anybody fixing it... > So at least DMI-blacklist it... Pavel -- 64 bytes from 195.113.31.123: icmp_seq=28 ttl=51 time=448769.1 ms - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
Hi! +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) Could you fix this before merge? I think this is some BIOS issue or hardware bug. It happens only on Tyan S2460. I tried dumping the registers few years ago on my Tyan s2460, but no luck. Low chance for anybody fixing it... So at least DMI-blacklist it... Pavel -- 64 bytes from 195.113.31.123: icmp_seq=28 ttl=51 time=448769.1 ms - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
* Pavel Machek <[EMAIL PROTECTED]> [050905 17:59]: > Hi! > > > > +NOTE: Currently there's a bug somewhere where the reading the > > + P_LVL2 for the first time causes the system to sleep instead of > > + idling. This means that you need to hit the power button once to > > + wake the system after loading the module for the first time after > > + reboot. After that the system idles as supposed. > > + (Only observed on Tony's system.) > > Could you fix this before merge? I think this is some BIOS issue or hardware bug. It happens only on Tyan S2460. I tried dumping the registers few years ago on my Tyan s2460, but no luck. Low chance for anybody fixing it... Tony - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
Hi! > +NOTE: Currently there's a bug somewhere where the reading the > + P_LVL2 for the first time causes the system to sleep instead of > + idling. This means that you need to hit the power button once to > + wake the system after loading the module for the first time after > + reboot. After that the system idles as supposed. > + (Only observed on Tony's system.) Could you fix this before merge? Also remove changelog from .c file. -- 64 bytes from 195.113.31.123: icmp_seq=28 ttl=51 time=448769.1 ms - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
Hi! +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) Could you fix this before merge? Also remove changelog from .c file. -- 64 bytes from 195.113.31.123: icmp_seq=28 ttl=51 time=448769.1 ms - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
* Pavel Machek [EMAIL PROTECTED] [050905 17:59]: Hi! +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) Could you fix this before merge? I think this is some BIOS issue or hardware bug. It happens only on Tyan S2460. I tried dumping the registers few years ago on my Tyan s2460, but no luck. Low chance for anybody fixing it... Tony - To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
This is a processor idle module for AMD SMP 760MP(X) based systems. The patch was originally written by Tony Lindgren and has been around since 2002. It enables C2 mode on AMD SMP systems and thus saves about 70 - 90 W of energy in the idle mode compared to the default idle mode. The idle function has been rewritten and is now free of locking issues and is independent from the number of CPUs. The impact from this module on the system clock and on i/o transfer rates has been reduced. This patch can also be found at http://www.sommrey.de/amd76x_pm/amd_76x_pm-2.6.13-1.patch Signed-off-by: Joerg Sommrey <[EMAIL PROTECTED]> diff -Nru linux-2.6.13/Documentation/amd76x_pm.txt linux-2.6.13-jo/Documentation/amd76x_pm.txt --- linux-2.6.13/Documentation/amd76x_pm.txt1970-01-01 01:00:00.0 +0100 +++ linux-2.6.13-jo/Documentation/amd76x_pm.txt 2005-09-01 21:50:12.0 +0200 @@ -0,0 +1,326 @@ + ACPI style power management for SMP AMD-760MP(X) based systems + == + +For use until the ACPI project catches up. :-) + +Using this module saves about 70 - 90W of energy in the idle mode compared +to the default idle mode. Waking up from the idle mode is fast to keep the +system response time good. Currently no CPU load calculation is done, the +system exits the idle mode after every C2 call. + +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) + + +Influenced by Vcool, and LVCool. Rewrote everything from scratch to +use the PCI features in Linux, and to support SMP systems. + +Currently tested amongst others on a TYAN S2460 (760MP) system (Tony), an +ASUS A7M266-D (760MPX) system (Johnathan) and a TYAN S2466 (760MPX) +system (Jo). Adding support for other Athlon SMP or single processor +systems should be easy if desired. + +The file /sys/devices/pci:00/:00:00.0/C2_cnt shows the number of +C2 calls since module load. + +There are some parameters for tuning the behaviour of amd76x_pm: +lazy_idle, spin_idle, watch_irqs, watch_int and min_C1 + +lazy_idle and spin_idle are closely related: + +- lazy_idle defines the number of idle calls into amd76x_smp_idle that are + needed to *enable* C2 mode. This parameter is the maximum loop counter + for an outer loop with interrupts enabled that guarantees low latencies. + The default for lazy_idle is 512. + +- spin_idle defines the maximum number of spin cycles in an inner idle loop + where one CPU waits for all others to get into C2-enabled mode. When all + CPUs are in C2-enable mode they (more ore less) simultaneously *enter* C2 + mode. In this inner loop interrupts are disabled. The loop is left + immediatly if there is something waiting to be scheduled. The default + for spin_idle is 2*lazy_idle. + +lazy_idle and spin_idle define a "rubber measure" for the idling +behaviour: lazy_idle defines the minimum "idling" needed to enter C2 and +spin_idle defines when to give up. + +Low values for lazy_idle and high values for spin_idle give better +cooling. Higher values for lazy_idle simply give less cooling. spin_idle +is a kind of emergency break to leave C2-enable mode if CPUs don't +synchronize. + +Interrupts are disabled in C2 mode. The CPUs are woken up by timer +interrups or by NMIs. This causes a high interrupt latency for other +interrupts that leads to a significant reduction in io or network +throughput. There has been introduced a "irq rate watcher" to reduce +this effect. If the irq rate watcher detects that an interrupt has a +rate above a given limit, C2 idling is disabled and a low latency C1 +idling mode is used instead. The parameters watch_irqs, watch_int and +min_C1 control this irq rate watcher: + +- watch_irqs defines which interrupts are to be watched and optionally + at which interrupt rate C2 mode shall be disabled. The syntax for + watch_irqs is irq1[:rate1],irq2[:rate2],... The rate is measured in + interrupts per second and defaults to 128. There is no default for + watch_irqs. To enable the irq rate watcher you must specify this + parameter. Enter the interrupts used by disk controllers or network + adapters here. + +- watch_int defines the time interval (in milliseconds) at which the + interrupt rate is checked. Too low values may result in an overhead + and too high values cause the C1 mode to "kick in" later. The default + for watch_int is 1 second. + +- min_C1 defines the mininum number of check intervals with low + interrupt rates that are needed to leave the forced C1 mode. + +All parameters lazy_idle, spin_idle, watch_irqs and watch_int may be +given as module parameters to amd76x_pm.
[PATCH 1/2] amd76x_pm: C2 powersaving for AMD K7
This is a processor idle module for AMD SMP 760MP(X) based systems. The patch was originally written by Tony Lindgren and has been around since 2002. It enables C2 mode on AMD SMP systems and thus saves about 70 - 90 W of energy in the idle mode compared to the default idle mode. The idle function has been rewritten and is now free of locking issues and is independent from the number of CPUs. The impact from this module on the system clock and on i/o transfer rates has been reduced. This patch can also be found at http://www.sommrey.de/amd76x_pm/amd_76x_pm-2.6.13-1.patch Signed-off-by: Joerg Sommrey [EMAIL PROTECTED] diff -Nru linux-2.6.13/Documentation/amd76x_pm.txt linux-2.6.13-jo/Documentation/amd76x_pm.txt --- linux-2.6.13/Documentation/amd76x_pm.txt1970-01-01 01:00:00.0 +0100 +++ linux-2.6.13-jo/Documentation/amd76x_pm.txt 2005-09-01 21:50:12.0 +0200 @@ -0,0 +1,326 @@ + ACPI style power management for SMP AMD-760MP(X) based systems + == + +For use until the ACPI project catches up. :-) + +Using this module saves about 70 - 90W of energy in the idle mode compared +to the default idle mode. Waking up from the idle mode is fast to keep the +system response time good. Currently no CPU load calculation is done, the +system exits the idle mode after every C2 call. + +NOTE: Currently there's a bug somewhere where the reading the + P_LVL2 for the first time causes the system to sleep instead of + idling. This means that you need to hit the power button once to + wake the system after loading the module for the first time after + reboot. After that the system idles as supposed. + (Only observed on Tony's system.) + + +Influenced by Vcool, and LVCool. Rewrote everything from scratch to +use the PCI features in Linux, and to support SMP systems. + +Currently tested amongst others on a TYAN S2460 (760MP) system (Tony), an +ASUS A7M266-D (760MPX) system (Johnathan) and a TYAN S2466 (760MPX) +system (Jo). Adding support for other Athlon SMP or single processor +systems should be easy if desired. + +The file /sys/devices/pci:00/:00:00.0/C2_cnt shows the number of +C2 calls since module load. + +There are some parameters for tuning the behaviour of amd76x_pm: +lazy_idle, spin_idle, watch_irqs, watch_int and min_C1 + +lazy_idle and spin_idle are closely related: + +- lazy_idle defines the number of idle calls into amd76x_smp_idle that are + needed to *enable* C2 mode. This parameter is the maximum loop counter + for an outer loop with interrupts enabled that guarantees low latencies. + The default for lazy_idle is 512. + +- spin_idle defines the maximum number of spin cycles in an inner idle loop + where one CPU waits for all others to get into C2-enabled mode. When all + CPUs are in C2-enable mode they (more ore less) simultaneously *enter* C2 + mode. In this inner loop interrupts are disabled. The loop is left + immediatly if there is something waiting to be scheduled. The default + for spin_idle is 2*lazy_idle. + +lazy_idle and spin_idle define a rubber measure for the idling +behaviour: lazy_idle defines the minimum idling needed to enter C2 and +spin_idle defines when to give up. + +Low values for lazy_idle and high values for spin_idle give better +cooling. Higher values for lazy_idle simply give less cooling. spin_idle +is a kind of emergency break to leave C2-enable mode if CPUs don't +synchronize. + +Interrupts are disabled in C2 mode. The CPUs are woken up by timer +interrups or by NMIs. This causes a high interrupt latency for other +interrupts that leads to a significant reduction in io or network +throughput. There has been introduced a irq rate watcher to reduce +this effect. If the irq rate watcher detects that an interrupt has a +rate above a given limit, C2 idling is disabled and a low latency C1 +idling mode is used instead. The parameters watch_irqs, watch_int and +min_C1 control this irq rate watcher: + +- watch_irqs defines which interrupts are to be watched and optionally + at which interrupt rate C2 mode shall be disabled. The syntax for + watch_irqs is irq1[:rate1],irq2[:rate2],... The rate is measured in + interrupts per second and defaults to 128. There is no default for + watch_irqs. To enable the irq rate watcher you must specify this + parameter. Enter the interrupts used by disk controllers or network + adapters here. + +- watch_int defines the time interval (in milliseconds) at which the + interrupt rate is checked. Too low values may result in an overhead + and too high values cause the C1 mode to kick in later. The default + for watch_int is 1 second. + +- min_C1 defines the mininum number of check intervals with low + interrupt rates that are needed to leave the forced C1 mode. + +All parameters lazy_idle, spin_idle, watch_irqs and watch_int may be +given as module parameters to amd76x_pm. Furthermore, they may
