[PATCH 16/83] hsa/radeon: Add the isr function of the KFD scehduler
This patch adds the isr function to the KFD scheduler code. This function us called from the kgd2kfd_interrupt function which is an interrupt-context function. The purpose of the isr function is to determine whether the interrupt that arrived is interesting, i.e. some action need to be taken. Signed-off-by: Oded Gabbay --- drivers/gpu/hsa/radeon/cik_int.h | 50 drivers/gpu/hsa/radeon/cik_regs.h | 2 + drivers/gpu/hsa/radeon/kfd_sched_cik_static.c | 56 +++ 3 files changed, 108 insertions(+) create mode 100644 drivers/gpu/hsa/radeon/cik_int.h diff --git a/drivers/gpu/hsa/radeon/cik_int.h b/drivers/gpu/hsa/radeon/cik_int.h new file mode 100644 index 000..e98551d --- /dev/null +++ b/drivers/gpu/hsa/radeon/cik_int.h @@ -0,0 +1,50 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef HSA_RADEON_CIK_INT_H_INCLUDED +#define HSA_RADEON_CIK_INT_H_INCLUDED + +#include + +struct cik_ih_ring_entry { + uint32_t source_id : 8; + uint32_t reserved1 : 8; + uint32_t reserved2 : 16; + + uint32_t data : 28; + uint32_t reserved3 : 4; + + /* pipeid, meid and unused3 are officially called RINGID, +* but for our purposes, they always decode into pipe and ME. */ + uint32_t pipeid : 2; + uint32_t meid : 2; + uint32_t reserved4 : 4; + uint32_t vmid : 8; + uint32_t pasid : 16; + + uint32_t reserved5; +}; + +#define CIK_INTSRC_DEQUEUE_COMPLETE0xC6 + +#endif + diff --git a/drivers/gpu/hsa/radeon/cik_regs.h b/drivers/gpu/hsa/radeon/cik_regs.h index d0cdc57..ef1d7ab 100644 --- a/drivers/gpu/hsa/radeon/cik_regs.h +++ b/drivers/gpu/hsa/radeon/cik_regs.h @@ -23,6 +23,8 @@ #ifndef CIK_REGS_H #define CIK_REGS_H +#define IH_VMID_0_LUT 0x3D40u + #define BIF_DOORBELL_CNTL 0x530Cu #defineSRBM_GFX_CNTL 0xE44 diff --git a/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c b/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c index b986ff9..f86f958 100644 --- a/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c +++ b/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c @@ -25,9 +25,12 @@ #include #include #include +#include +#include #include "kfd_priv.h" #include "kfd_scheduler.h" #include "cik_regs.h" +#include "cik_int.h" /* CIK CP hardware is arranged with 8 queues per pipe and 8 pipes per MEC (microengine for compute). * The first MEC is ME 1 with the GFX ME as ME 0. @@ -273,6 +276,8 @@ static void set_vmid_pasid_mapping(struct cik_static_private *priv, unsigned int while (!(READ_REG(priv->dev, ATC_VMID_PASID_MAPPING_UPDATE_STATUS) & (1U << vmid))) cpu_relax(); WRITE_REG(priv->dev, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid); + + WRITE_REG(priv->dev, IH_VMID_0_LUT + vmid*sizeof(uint32_t), pasid); } static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble) @@ -786,6 +791,54 @@ cik_static_destroy_queue(struct kfd_scheduler *scheduler, struct kfd_scheduler_q release_hqd(priv, hwq->queue); } +/* Figure out the KFD compute pipe ID for an interrupt ring entry. + * Returns true if it's a KFD compute pipe, false otherwise. */ +static bool int_compute_pipe(const struct cik_static_private *priv, +const struct cik_ih_ring_entry *ih_ring_entry, +uint32_t *kfd_pipe) +{ + uint32_t pipe_id; + + if (ih_ring_entry->meid == 0) /* Ignore graphics interrupts - compute only. */ + return false; + + pipe_id = (ih_ring_entry->meid - 1) * CIK_PIPES_PER_MEC + ih_ring_entry->pipeid; + if (pipe_id < priv->first_pipe) + return false; + +
[PATCH 16/83] hsa/radeon: Add the isr function of the KFD scehduler
This patch adds the isr function to the KFD scheduler code. This function us called from the kgd2kfd_interrupt function which is an interrupt-context function. The purpose of the isr function is to determine whether the interrupt that arrived is interesting, i.e. some action need to be taken. Signed-off-by: Oded Gabbay oded.gab...@amd.com --- drivers/gpu/hsa/radeon/cik_int.h | 50 drivers/gpu/hsa/radeon/cik_regs.h | 2 + drivers/gpu/hsa/radeon/kfd_sched_cik_static.c | 56 +++ 3 files changed, 108 insertions(+) create mode 100644 drivers/gpu/hsa/radeon/cik_int.h diff --git a/drivers/gpu/hsa/radeon/cik_int.h b/drivers/gpu/hsa/radeon/cik_int.h new file mode 100644 index 000..e98551d --- /dev/null +++ b/drivers/gpu/hsa/radeon/cik_int.h @@ -0,0 +1,50 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the Software), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef HSA_RADEON_CIK_INT_H_INCLUDED +#define HSA_RADEON_CIK_INT_H_INCLUDED + +#include linux/types.h + +struct cik_ih_ring_entry { + uint32_t source_id : 8; + uint32_t reserved1 : 8; + uint32_t reserved2 : 16; + + uint32_t data : 28; + uint32_t reserved3 : 4; + + /* pipeid, meid and unused3 are officially called RINGID, +* but for our purposes, they always decode into pipe and ME. */ + uint32_t pipeid : 2; + uint32_t meid : 2; + uint32_t reserved4 : 4; + uint32_t vmid : 8; + uint32_t pasid : 16; + + uint32_t reserved5; +}; + +#define CIK_INTSRC_DEQUEUE_COMPLETE0xC6 + +#endif + diff --git a/drivers/gpu/hsa/radeon/cik_regs.h b/drivers/gpu/hsa/radeon/cik_regs.h index d0cdc57..ef1d7ab 100644 --- a/drivers/gpu/hsa/radeon/cik_regs.h +++ b/drivers/gpu/hsa/radeon/cik_regs.h @@ -23,6 +23,8 @@ #ifndef CIK_REGS_H #define CIK_REGS_H +#define IH_VMID_0_LUT 0x3D40u + #define BIF_DOORBELL_CNTL 0x530Cu #defineSRBM_GFX_CNTL 0xE44 diff --git a/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c b/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c index b986ff9..f86f958 100644 --- a/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c +++ b/drivers/gpu/hsa/radeon/kfd_sched_cik_static.c @@ -25,9 +25,12 @@ #include linux/slab.h #include linux/types.h #include linux/uaccess.h +#include linux/device.h +#include linux/sched.h #include kfd_priv.h #include kfd_scheduler.h #include cik_regs.h +#include cik_int.h /* CIK CP hardware is arranged with 8 queues per pipe and 8 pipes per MEC (microengine for compute). * The first MEC is ME 1 with the GFX ME as ME 0. @@ -273,6 +276,8 @@ static void set_vmid_pasid_mapping(struct cik_static_private *priv, unsigned int while (!(READ_REG(priv-dev, ATC_VMID_PASID_MAPPING_UPDATE_STATUS) (1U vmid))) cpu_relax(); WRITE_REG(priv-dev, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U vmid); + + WRITE_REG(priv-dev, IH_VMID_0_LUT + vmid*sizeof(uint32_t), pasid); } static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble) @@ -786,6 +791,54 @@ cik_static_destroy_queue(struct kfd_scheduler *scheduler, struct kfd_scheduler_q release_hqd(priv, hwq-queue); } +/* Figure out the KFD compute pipe ID for an interrupt ring entry. + * Returns true if it's a KFD compute pipe, false otherwise. */ +static bool int_compute_pipe(const struct cik_static_private *priv, +const struct cik_ih_ring_entry *ih_ring_entry, +uint32_t *kfd_pipe) +{ + uint32_t pipe_id; + + if (ih_ring_entry-meid == 0) /* Ignore graphics interrupts - compute only. */ + return false; + + pipe_id = (ih_ring_entry-meid - 1) * CIK_PIPES_PER_MEC + ih_ring_entry-pipeid; +