Re: [PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-21 Thread Greg Kroah-Hartman 
On Wed, Mar 21, 2018 at 12:37:47PM +0200, Roger Quadros wrote:
> Hi Greg,
> 
> On 19/03/18 20:06, Greg Kroah-Hartman wrote:
> > 3.18-stable review patch.  If anyone has any objections, please let me know.
> > 
> 
> Please drop this from 3.18-stable as well. Thanks.

Now dropped, sorry for the mess.

greg k-h

Re: [PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-21 Thread Greg Kroah-Hartman 
On Wed, Mar 21, 2018 at 12:37:47PM +0200, Roger Quadros wrote:
> Hi Greg,
> 
> On 19/03/18 20:06, Greg Kroah-Hartman wrote:
> > 3.18-stable review patch.  If anyone has any objections, please let me know.
> > 
> 
> Please drop this from 3.18-stable as well. Thanks.

Now dropped, sorry for the mess.

greg k-h

Re: [PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-21 Thread Roger Quadros 
Hi Greg,

On 19/03/18 20:06, Greg Kroah-Hartman wrote:
> 3.18-stable review patch.  If anyone has any objections, please let me know.
> 

Please drop this from 3.18-stable as well. Thanks.


> --
> 
> From: Roger Quadros 
> 
> 
> [ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ]
> 
> It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
> is in use then there are random chances that the usb_otg_ss module
> will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.
> 
> Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
> fixes this issue.
> 
> We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
> issue or not so don't add this flag for those instances.
> 
> Cc: Tero Kristo 
> Signed-off-by: Roger Quadros 
> Signed-off-by: Tony Lindgren 
> Signed-off-by: Sasha Levin 
> Signed-off-by: Greg Kroah-Hartman 
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c |2 ++
>  1 file changed, 2 insertions(+)
> 
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -2106,6 +2106,7 @@ static struct omap_hwmod dra7xx_usb_otg_
>   .class  = _usb_otg_ss_hwmod_class,
>   .clkdm_name = "l3init_clkdm",
>   .main_clk   = "dpll_core_h13x2_ck",
> + .flags  = HWMOD_CLKDM_NOAUTO,
>   .prcm = {
>   .omap4 = {
>   .clkctrl_offs = 
> DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
> @@ -2127,6 +2128,7 @@ static struct omap_hwmod dra7xx_usb_otg_
>   .class  = _usb_otg_ss_hwmod_class,
>   .clkdm_name = "l3init_clkdm",
>   .main_clk   = "dpll_core_h13x2_ck",
> + .flags  = HWMOD_CLKDM_NOAUTO,
>   .prcm = {
>   .omap4 = {
>   .clkctrl_offs = 
> DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,
> 
> 

-- 
cheers,
-roger

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-21 Thread Roger Quadros 
Hi Greg,

On 19/03/18 20:06, Greg Kroah-Hartman wrote:
> 3.18-stable review patch.  If anyone has any objections, please let me know.
> 

Please drop this from 3.18-stable as well. Thanks.


> --
> 
> From: Roger Quadros 
> 
> 
> [ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ]
> 
> It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
> is in use then there are random chances that the usb_otg_ss module
> will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.
> 
> Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
> fixes this issue.
> 
> We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
> issue or not so don't add this flag for those instances.
> 
> Cc: Tero Kristo 
> Signed-off-by: Roger Quadros 
> Signed-off-by: Tony Lindgren 
> Signed-off-by: Sasha Levin 
> Signed-off-by: Greg Kroah-Hartman 
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c |2 ++
>  1 file changed, 2 insertions(+)
> 
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -2106,6 +2106,7 @@ static struct omap_hwmod dra7xx_usb_otg_
>   .class  = _usb_otg_ss_hwmod_class,
>   .clkdm_name = "l3init_clkdm",
>   .main_clk   = "dpll_core_h13x2_ck",
> + .flags  = HWMOD_CLKDM_NOAUTO,
>   .prcm = {
>   .omap4 = {
>   .clkctrl_offs = 
> DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
> @@ -2127,6 +2128,7 @@ static struct omap_hwmod dra7xx_usb_otg_
>   .class  = _usb_otg_ss_hwmod_class,
>   .clkdm_name = "l3init_clkdm",
>   .main_clk   = "dpll_core_h13x2_ck",
> + .flags  = HWMOD_CLKDM_NOAUTO,
>   .prcm = {
>   .omap4 = {
>   .clkctrl_offs = 
> DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,
> 
> 

-- 
cheers,
-roger

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-19 Thread Greg Kroah-Hartman 
3.18-stable review patch.  If anyone has any objections, please let me know.

--

From: Roger Quadros 


[ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ]

It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.

Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.

We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.

Cc: Tero Kristo 
Signed-off-by: Roger Quadros 
Signed-off-by: Tony Lindgren 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman 
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |2 ++
 1 file changed, 2 insertions(+)

--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2106,6 +2106,7 @@ static struct omap_hwmod dra7xx_usb_otg_
.class  = _usb_otg_ss_hwmod_class,
.clkdm_name = "l3init_clkdm",
.main_clk   = "dpll_core_h13x2_ck",
+   .flags  = HWMOD_CLKDM_NOAUTO,
.prcm = {
.omap4 = {
.clkctrl_offs = 
DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
@@ -2127,6 +2128,7 @@ static struct omap_hwmod dra7xx_usb_otg_
.class  = _usb_otg_ss_hwmod_class,
.clkdm_name = "l3init_clkdm",
.main_clk   = "dpll_core_h13x2_ck",
+   .flags  = HWMOD_CLKDM_NOAUTO,
.prcm = {
.omap4 = {
.clkctrl_offs = 
DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,

[PATCH 3.18 22/68] ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss

2018-03-19 Thread Greg Kroah-Hartman 
3.18-stable review patch.  If anyone has any objections, please let me know.

--

From: Roger Quadros 


[ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ]

It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.

Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.

We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.

Cc: Tero Kristo 
Signed-off-by: Roger Quadros 
Signed-off-by: Tony Lindgren 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman 
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |2 ++
 1 file changed, 2 insertions(+)

--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2106,6 +2106,7 @@ static struct omap_hwmod dra7xx_usb_otg_
.class  = _usb_otg_ss_hwmod_class,
.clkdm_name = "l3init_clkdm",
.main_clk   = "dpll_core_h13x2_ck",
+   .flags  = HWMOD_CLKDM_NOAUTO,
.prcm = {
.omap4 = {
.clkctrl_offs = 
DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
@@ -2127,6 +2128,7 @@ static struct omap_hwmod dra7xx_usb_otg_
.class  = _usb_otg_ss_hwmod_class,
.clkdm_name = "l3init_clkdm",
.main_clk   = "dpll_core_h13x2_ck",
+   .flags  = HWMOD_CLKDM_NOAUTO,
.prcm = {
.omap4 = {
.clkctrl_offs = 
DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,