Re: [PATCH V4 2/8] perf/x86/intel/uncore: correct fixed counter index check for NHM

[Thomas Gleixner]

On Thu, 2 Nov 2017, kan.li...@intel.com wrote:

> From: Kan Liang 
> 
> For Nehalem and Westmere, there is only one fixed counter for W-Box.
> There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
> It is not correct to use >= to check fixed counter.
> The code quality issue will bring problem when new counter index is
> introduced.
> 
> Signed-off-by: Kan Liang 

Reviewed-by: Thomas Gleixner 

Re: [PATCH V4 2/8] perf/x86/intel/uncore: correct fixed counter index check for NHM

[Thomas Gleixner]

On Thu, 2 Nov 2017, kan.li...@intel.com wrote:

> From: Kan Liang 
> 
> For Nehalem and Westmere, there is only one fixed counter for W-Box.
> There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
> It is not correct to use >= to check fixed counter.
> The code quality issue will bring problem when new counter index is
> introduced.
> 
> Signed-off-by: Kan Liang 

Reviewed-by: Thomas Gleixner 

[PATCH V4 2/8] perf/x86/intel/uncore: correct fixed counter index check for NHM

[kan . liang]

From: Kan Liang 

For Nehalem and Westmere, there is only one fixed counter for W-Box.
There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
It is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.

Signed-off-by: Kan Liang 
---

Changes since V3:
 - New patch for similar '>=' issue on NHM.

 arch/x86/events/intel/uncore_nhmex.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/uncore_nhmex.c 
b/arch/x86/events/intel/uncore_nhmex.c
index 6a5cbe9..6f0d0da 100644
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -245,7 +245,7 @@ static void nhmex_uncore_msr_enable_event(struct 
intel_uncore_box *box, struct p
 {
struct hw_perf_event *hwc = >hw;
 
-   if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
+   if (hwc->idx == UNCORE_PMC_IDX_FIXED)
wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);
-- 
2.7.4

[PATCH V4 2/8] perf/x86/intel/uncore: correct fixed counter index check for NHM

[kan . liang]

From: Kan Liang 

For Nehalem and Westmere, there is only one fixed counter for W-Box.
There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
It is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.

Signed-off-by: Kan Liang 
---

Changes since V3:
 - New patch for similar '>=' issue on NHM.

 arch/x86/events/intel/uncore_nhmex.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/uncore_nhmex.c 
b/arch/x86/events/intel/uncore_nhmex.c
index 6a5cbe9..6f0d0da 100644
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -245,7 +245,7 @@ static void nhmex_uncore_msr_enable_event(struct 
intel_uncore_box *box, struct p
 {
struct hw_perf_event *hwc = >hw;
 
-   if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
+   if (hwc->idx == UNCORE_PMC_IDX_FIXED)
wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);
-- 
2.7.4