Re: [PATCH net] net: dp83867: Fix WoL SecureOn password

2020-09-02 Thread David Miller 
From: Dan Murphy 
Date: Wed, 2 Sep 2020 14:27:04 -0500

> Fix the registers being written to as the values were being over written
> when writing the same registers.
> 
> Fixes: caabee5b53f5 ("net: phy: dp83867: support Wake on LAN")
> Signed-off-by: Dan Murphy 

Applied and queued up for -stable, thanks.

Re: [PATCH net] net: dp83867: Fix WoL SecureOn password

2020-09-02 Thread Florian Fainelli 




On 9/2/2020 12:27 PM, Dan Murphy wrote:

Fix the registers being written to as the values were being over written
when writing the same registers.

Fixes: caabee5b53f5 ("net: phy: dp83867: support Wake on LAN")
Signed-off-by: Dan Murphy 


Reviewed-by: Florian Fainelli 
--
Florian

Re: [PATCH net] net: dp83867: Fix WoL SecureOn password

2020-09-02 Thread Andrew Lunn 
On Wed, Sep 02, 2020 at 02:27:04PM -0500, Dan Murphy wrote:
> Fix the registers being written to as the values were being over written
> when writing the same registers.
> 
> Fixes: caabee5b53f5 ("net: phy: dp83867: support Wake on LAN")
> Signed-off-by: Dan Murphy 

Reviewed-by: Andrew Lunn 

Andrew

[PATCH net] net: dp83867: Fix WoL SecureOn password

2020-09-02 Thread Dan Murphy 
Fix the registers being written to as the values were being over written
when writing the same registers.

Fixes: caabee5b53f5 ("net: phy: dp83867: support Wake on LAN")
Signed-off-by: Dan Murphy 
---
 drivers/net/phy/dp83867.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index f3c04981b8da..cd7032628a28 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -215,9 +215,9 @@ static int dp83867_set_wol(struct phy_device *phydev,
if (wol->wolopts & WAKE_MAGICSECURE) {
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1,
  (wol->sopass[1] << 8) | wol->sopass[0]);
-   phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1,
+   phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP2,
  (wol->sopass[3] << 8) | wol->sopass[2]);
-   phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1,
+   phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP3,
  (wol->sopass[5] << 8) | wol->sopass[4]);
 
val_rxcfg |= DP83867_WOL_SEC_EN;
-- 
2.28.0