Re: [PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
On 03.07.20 00:59, Boris Ostrovsky wrote:
On 7/1/20 7:06 AM, Juergen Gross wrote:
Xen is requiring 64-bit machines today and since Xen 4.14 it can be
built without 32-bit PV guest support. There is no need to carry the
burden of 32-bit PV guest support in the kernel any longer, as new
guests can be either HVM or PVH, or they can use a 64 bit kernel.
Remove the 32-bit Xen PV support from the kernel.
Signed-off-by: Juergen Gross
---
arch/x86/entry/entry_32.S | 109 +--
arch/x86/include/asm/proto.h | 2 +-
arch/x86/include/asm/segment.h | 2 +-
arch/x86/kernel/head_32.S | 31 ---
arch/x86/xen/Kconfig | 3 +-
arch/x86/xen/Makefile | 3 +-
arch/x86/xen/apic.c| 17 --
arch/x86/xen/enlighten_pv.c| 48 +
Should we drop PageHighMem() test in set_aliased_prot()?
(And there are few other places where is is used, in mmu_pv.c)
Yes, will drop those.
@@ -555,13 +547,8 @@ static void xen_load_tls(struct thread_struct *t, unsigned
int cpu)
* exception between the new %fs descriptor being loaded and
* %fs being effectively cleared at __switch_to().
*/
- if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
-#ifdef CONFIG_X86_32
- lazy_load_gs(0);
-#else
I think this also needs an adjustment to the preceding comment.
Yes.
-#ifdef CONFIG_X86_PAE
-static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
-{
- trace_xen_mmu_set_pte_atomic(ptep, pte);
- __xen_set_pte(ptep, pte);
Probably not for this series but I wonder whether __xen_set_pte() should
continue to use hypercall now that we are 64-bit only.
As Andrew wrote already the hypercall will be cheaper.
I'll adjust the comment, though.
@@ -654,14 +621,12 @@ static int __xen_pgd_walk(struct mm_struct *mm, pgd_t
*pgd,
Comment above should be updated.
Yes.
Juergen
Re: [PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
On 7/2/20 7:24 PM, Andrew Cooper wrote:
> On 02/07/2020 23:59, Boris Ostrovsky wrote:
>> On 7/1/20 7:06 AM, Juergen Gross wrote:
>>>
>>> -#ifdef CONFIG_X86_PAE
>>> -static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
>>> -{
>>> - trace_xen_mmu_set_pte_atomic(ptep, pte);
>>> - __xen_set_pte(ptep, pte);
>> Probably not for this series but I wonder whether __xen_set_pte() should
>> continue to use hypercall now that we are 64-bit only.
> The hypercall path is a SYSCALL (and SYSRET out).
>
> The "writeable" PTE path is a #PF, followed by an x86 instruction
> emulation, which then reaches the same logic as the hypercall path (and
> an IRET out).
Then we should at least update the comment.
-boris
Re: [PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
On 02/07/2020 23:59, Boris Ostrovsky wrote:
> On 7/1/20 7:06 AM, Juergen Gross wrote:
>>
>> -#ifdef CONFIG_X86_PAE
>> -static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
>> -{
>> -trace_xen_mmu_set_pte_atomic(ptep, pte);
>> -__xen_set_pte(ptep, pte);
>
> Probably not for this series but I wonder whether __xen_set_pte() should
> continue to use hypercall now that we are 64-bit only.
The hypercall path is a SYSCALL (and SYSRET out).
The "writeable" PTE path is a #PF, followed by an x86 instruction
emulation, which then reaches the same logic as the hypercall path (and
an IRET out).
~Andrew
Re: [PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
On 7/1/20 7:06 AM, Juergen Gross wrote:
> Xen is requiring 64-bit machines today and since Xen 4.14 it can be
> built without 32-bit PV guest support. There is no need to carry the
> burden of 32-bit PV guest support in the kernel any longer, as new
> guests can be either HVM or PVH, or they can use a 64 bit kernel.
>
> Remove the 32-bit Xen PV support from the kernel.
>
> Signed-off-by: Juergen Gross
> ---
> arch/x86/entry/entry_32.S | 109 +--
> arch/x86/include/asm/proto.h | 2 +-
> arch/x86/include/asm/segment.h | 2 +-
> arch/x86/kernel/head_32.S | 31 ---
> arch/x86/xen/Kconfig | 3 +-
> arch/x86/xen/Makefile | 3 +-
> arch/x86/xen/apic.c| 17 --
> arch/x86/xen/enlighten_pv.c| 48 +
Should we drop PageHighMem() test in set_aliased_prot()?
(And there are few other places where is is used, in mmu_pv.c)
> @@ -555,13 +547,8 @@ static void xen_load_tls(struct thread_struct *t,
> unsigned int cpu)
>* exception between the new %fs descriptor being loaded and
>* %fs being effectively cleared at __switch_to().
>*/
> - if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
> -#ifdef CONFIG_X86_32
> - lazy_load_gs(0);
> -#else
I think this also needs an adjustment to the preceding comment.
>
> -#ifdef CONFIG_X86_PAE
> -static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
> -{
> - trace_xen_mmu_set_pte_atomic(ptep, pte);
> - __xen_set_pte(ptep, pte);
Probably not for this series but I wonder whether __xen_set_pte() should
continue to use hypercall now that we are 64-bit only.
> @@ -654,14 +621,12 @@ static int __xen_pgd_walk(struct mm_struct *mm, pgd_t
> *pgd,
Comment above should be updated.
-boris
Re: [PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
On Wed, Jul 1, 2020 at 7:08 AM Juergen Gross wrote: > > Xen is requiring 64-bit machines today and since Xen 4.14 it can be > built without 32-bit PV guest support. There is no need to carry the > burden of 32-bit PV guest support in the kernel any longer, as new > guests can be either HVM or PVH, or they can use a 64 bit kernel. > > Remove the 32-bit Xen PV support from the kernel. If you send a v3, it would be better to split the move of the 64-bit code into xen-asm.S into a separate patch. -- Brian Gerst
[PATCH v2 1/4] x86/xen: remove 32-bit Xen PV guest support
Xen is requiring 64-bit machines today and since Xen 4.14 it can be built without 32-bit PV guest support. There is no need to carry the burden of 32-bit PV guest support in the kernel any longer, as new guests can be either HVM or PVH, or they can use a 64 bit kernel. Remove the 32-bit Xen PV support from the kernel. Signed-off-by: Juergen Gross --- arch/x86/entry/entry_32.S | 109 +-- arch/x86/include/asm/proto.h | 2 +- arch/x86/include/asm/segment.h | 2 +- arch/x86/kernel/head_32.S | 31 --- arch/x86/xen/Kconfig | 3 +- arch/x86/xen/Makefile | 3 +- arch/x86/xen/apic.c| 17 -- arch/x86/xen/enlighten_pv.c| 48 + arch/x86/xen/mmu_pv.c | 340 - arch/x86/xen/p2m.c | 6 +- arch/x86/xen/setup.c | 35 +--- arch/x86/xen/smp_pv.c | 18 -- arch/x86/xen/xen-asm.S | 182 -- arch/x86/xen/xen-asm_32.S | 185 -- arch/x86/xen/xen-asm_64.S | 181 -- arch/x86/xen/xen-head.S| 6 - drivers/xen/Kconfig| 4 +- 17 files changed, 216 insertions(+), 956 deletions(-) delete mode 100644 arch/x86/xen/xen-asm_32.S delete mode 100644 arch/x86/xen/xen-asm_64.S diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 024d7d276cd4..70efe6d072f1 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -449,8 +449,6 @@ .macro SWITCH_TO_KERNEL_STACK - ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV - BUG_IF_WRONG_CR3 SWITCH_TO_KERNEL_CR3 scratch_reg=%eax @@ -599,8 +597,6 @@ */ .macro SWITCH_TO_ENTRY_STACK - ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV - /* Bytes to copy */ movl$PTREGS_SIZE, %ecx @@ -872,17 +868,6 @@ SYM_ENTRY(__begin_SYSENTER_singlestep_region, SYM_L_GLOBAL, SYM_A_NONE) * will ignore all of the single-step traps generated in this range. */ -#ifdef CONFIG_XEN_PV -/* - * Xen doesn't set %esp to be precisely what the normal SYSENTER - * entry point expects, so fix it up before using the normal path. - */ -SYM_CODE_START(xen_sysenter_target) - addl$5*4, %esp /* remove xen-provided frame */ - jmp .Lsysenter_past_esp -SYM_CODE_END(xen_sysenter_target) -#endif - /* * 32-bit SYSENTER entry. * @@ -966,9 +951,8 @@ SYM_FUNC_START(entry_SYSENTER_32) movl%esp, %eax calldo_fast_syscall_32 - /* XEN PV guests always use IRET path */ - ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ - "jmp .Lsyscall_32_done", X86_FEATURE_XENPV + testl %eax, %eax + jz .Lsyscall_32_done STACKLEAK_ERASE @@ -1166,95 +1150,6 @@ SYM_FUNC_END(entry_INT80_32) #endif .endm -#ifdef CONFIG_PARAVIRT -SYM_CODE_START(native_iret) - iret - _ASM_EXTABLE(native_iret, asm_iret_error) -SYM_CODE_END(native_iret) -#endif - -#ifdef CONFIG_XEN_PV -/* - * See comment in entry_64.S for further explanation - * - * Note: This is not an actual IDT entry point. It's a XEN specific entry - * point and therefore named to match the 64-bit trampoline counterpart. - */ -SYM_FUNC_START(xen_asm_exc_xen_hypervisor_callback) - /* -* Check to see if we got the event in the critical -* region in xen_iret_direct, after we've reenabled -* events and checked for pending events. This simulates -* iret instruction's behaviour where it delivers a -* pending interrupt when enabling interrupts: -*/ - cmpl$xen_iret_start_crit, (%esp) - jb 1f - cmpl$xen_iret_end_crit, (%esp) - jae 1f - callxen_iret_crit_fixup -1: - pushl $-1 /* orig_ax = -1 => not a system call */ - SAVE_ALL - ENCODE_FRAME_POINTER - - mov %esp, %eax - callxen_pv_evtchn_do_upcall - jmp handle_exception_return -SYM_FUNC_END(xen_asm_exc_xen_hypervisor_callback) - -/* - * Hypervisor uses this for application faults while it executes. - * We get here for two reasons: - * 1. Fault while reloading DS, ES, FS or GS - * 2. Fault while executing IRET - * Category 1 we fix up by reattempting the load, and zeroing the segment - * register if the load fails. - * Category 2 we fix up by jumping to do_iret_error. We cannot use the - * normal Linux return path in this case because if we use the IRET hypercall - * to pop the stack frame we end up in an infinite loop of failsafe callbacks. - * We distinguish between categories by maintaining a status value in EAX. - */ -SYM_FUNC_START(xen_failsafe_callback) - pushl %eax - movl$1, %eax -1: mov 4(%esp), %ds -2: mov 8(%esp), %es -3: mov 12(%esp), %fs -4: mov 16(%esp), %gs - /* EAX == 0 => Category 1 (Bad segment) - EAX != 0 => Category 2 (Bad IRET) */
