On 2018-05-24 8:18 PM, Heiko Stuebner wrote:
Hi Levin,
Am Donnerstag, 24. Mai 2018, 03:59:36 CEST schrieb Levin Du:
Hi all, I'd like to quote reply of Robin Murphy at
http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
I would suggest s/pin number/bit number in the
On 2018-05-24 8:18 PM, Heiko Stuebner wrote:
Hi Levin,
Am Donnerstag, 24. Mai 2018, 03:59:36 CEST schrieb Levin Du:
Hi all, I'd like to quote reply of Robin Murphy at
http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
I would suggest s/pin number/bit number in the
On Thu, May 24, 2018 at 7:07 AM, Heiko Stuebner wrote:
> Hi Rob,
>
> Am Mittwoch, 23. Mai 2018, 21:53:53 CEST schrieb Rob Herring:
>> On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
>> > Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
>> >>
On Thu, May 24, 2018 at 7:07 AM, Heiko Stuebner wrote:
> Hi Rob,
>
> Am Mittwoch, 23. Mai 2018, 21:53:53 CEST schrieb Rob Herring:
>> On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
>> > Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
>> >> On Tue, May 22, 2018 at 9:02 PM,
Hi Levin,
Am Donnerstag, 24. Mai 2018, 03:59:36 CEST schrieb Levin Du:
> Hi all, I'd like to quote reply of Robin Murphy at
> http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
>
> >
> > I would suggest s/pin number/bit number in the associated GRF register/
> > here. At
Hi Levin,
Am Donnerstag, 24. Mai 2018, 03:59:36 CEST schrieb Levin Du:
> Hi all, I'd like to quote reply of Robin Murphy at
> http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
>
> >
> > I would suggest s/pin number/bit number in the associated GRF register/
> > here. At
Hi Rob,
Am Mittwoch, 23. Mai 2018, 21:53:53 CEST schrieb Rob Herring:
> On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
> > Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
> >> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> >> > On
Hi Rob,
Am Mittwoch, 23. Mai 2018, 21:53:53 CEST schrieb Rob Herring:
> On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
> > Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
> >> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> >> > On 2018-05-23 2:02 AM, Rob Herring wrote:
On Thu, May 24, 2018 at 10:35 AM, Heiko Stübner wrote:
> Am Donnerstag, 24. Mai 2018, 10:28:44 CEST schrieb Linus Walleij:
>> On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
>> > So the gpio controller should definitly also be a subnode.
>> >
>> > The gpio
On Thu, May 24, 2018 at 10:35 AM, Heiko Stübner wrote:
> Am Donnerstag, 24. Mai 2018, 10:28:44 CEST schrieb Linus Walleij:
>> On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
>> > So the gpio controller should definitly also be a subnode.
>> >
>> > The gpio in question is called "mute", so
Hi Linus,
Am Donnerstag, 24. Mai 2018, 10:28:44 CEST schrieb Linus Walleij:
> On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
> > So the gpio controller should definitly also be a subnode.
> >
> > The gpio in question is called "mute", so I'd think the gpio-syscon driver
Hi Linus,
Am Donnerstag, 24. Mai 2018, 10:28:44 CEST schrieb Linus Walleij:
> On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
> > So the gpio controller should definitly also be a subnode.
> >
> > The gpio in question is called "mute", so I'd think the gpio-syscon driver
> > should just
On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
> So the gpio controller should definitly also be a subnode.
>
> The gpio in question is called "mute", so I'd think the gpio-syscon driver
> should just define a "rockchip,rk3328-gpio-mute" compatible and contain
> all the
On Wed, May 23, 2018 at 5:12 PM, Heiko Stübner wrote:
> So the gpio controller should definitly also be a subnode.
>
> The gpio in question is called "mute", so I'd think the gpio-syscon driver
> should just define a "rockchip,rk3328-gpio-mute" compatible and contain
> all the register voodoo in
Hi all, I'd like to quote reply of Robin Murphy at
http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
I would suggest s/pin number/bit number in the associated GRF register/
here. At least in this RK3328 case there's only one pin, which isn't
numbered, and if you naively
Hi all, I'd like to quote reply of Robin Murphy at
http://lists.infradead.org/pipermail/linux-rockchip/2018-May/020619.html
I would suggest s/pin number/bit number in the associated GRF register/
here. At least in this RK3328 case there's only one pin, which isn't
numbered, and if you naively
On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
> Hi Rob, Levin,
>
> sorry for being late to the party.
>
> Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
>> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
>> > On 2018-05-23 2:02 AM,
On Wed, May 23, 2018 at 10:12 AM, Heiko Stübner wrote:
> Hi Rob, Levin,
>
> sorry for being late to the party.
>
> Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
>> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
>> > On 2018-05-23 2:02 AM, Rob Herring wrote:
>> >> On Fri, May
Hi Rob, Levin,
sorry for being late to the party.
Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> > On 2018-05-23 2:02 AM, Rob Herring wrote:
> >> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn
Hi Rob, Levin,
sorry for being late to the party.
Am Mittwoch, 23. Mai 2018, 16:43:07 CEST schrieb Rob Herring:
> On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> > On 2018-05-23 2:02 AM, Rob Herring wrote:
> >> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
> >>> From:
On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> On 2018-05-23 2:02 AM, Rob Herring wrote:
>>
>> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
>>>
>>> From: Levin Du
>>>
>>> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip
On Tue, May 22, 2018 at 9:02 PM, Levin Du wrote:
> On 2018-05-23 2:02 AM, Rob Herring wrote:
>>
>> On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
>>>
>>> From: Levin Du
>>>
>>> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
>>> which do not belong to the
On 2018-05-23 2:02 AM, Rob Herring wrote:
On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes
On 2018-05-23 2:02 AM, Rob Herring wrote:
On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes controlling regulator or
LED
On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
> From: Levin Du
>
> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
> which do not belong to the general pinctrl.
>
> Adding gpio-syscon support makes controlling regulator or
> LED using
On Fri, May 18, 2018 at 11:52:05AM +0800, d...@t-chip.com.cn wrote:
> From: Levin Du
>
> Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
> which do not belong to the general pinctrl.
>
> Adding gpio-syscon support makes controlling regulator or
> LED using these special pins very
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes controlling regulator or
LED using these special pins very easy by reusing existing
drivers, such as gpio-regulator and
From: Levin Du
Some GPIOs sit in the GRF_SOC_CON registers of Rockchip SoCs,
which do not belong to the general pinctrl.
Adding gpio-syscon support makes controlling regulator or
LED using these special pins very easy by reusing existing
drivers, such as gpio-regulator and led-gpio.
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