subject:"\[PATCH v3 04\/10\] pinctrl\: actions\: Add Actions S900 pinctrl driver"

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-03-01 Thread Manivannan Sadhasivam

Hi Andy,

On Wed, Feb 28, 2018 at 08:36:53PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 28, 2018 at 8:14 PM, Manivannan Sadhasivam
>  wrote:
> > Add pinctrl driver for Actions Semi S900 SoC. The driver supports
> > pinctrl, pinmux and pinconf functionalities through a range of registers
> > common to both gpio driver and pinctrl driver.
> >
> > Pinmux functionality is available only for the pin groups while the
> > pinconf functionality is available for both pin groups and individual
> > pins.
> 
> > +static int owl_set_mux(struct pinctrl_dev *pctrldev,
> > +   unsigned int function,
> > +   unsigned int group)
> > +{
> 
> > +   mfpval = readl(pctrl->base + g->mfpctl_reg);
> > +   mfpval &= ~mask;
> > +   mfpval |= val;
> > +   writel(mfpval, pctrl->base + g->mfpctl_reg);
> 
> This is called owl_update_bits().
>

Okay. Will add a helper.
 
> > +static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
> > +   unsigned int pin,
> > +   unsigned long *configs,
> > +   unsigned int num_configs)
> > +{
> 
> > +   int ret = 0;
> 
> Redundant assignment?
>

Ack.
 
> > +   mask = (1 << width) - 1;
> > +   mask = mask << bit;
> > +   tmp = readl(pctrl->base + reg);
> > +   tmp &= ~mask;
> > +   tmp |= arg << bit;
> > +   writel(tmp, pctrl->base + reg);
> 
> This is called owl_update_bits().
>

Ack.

> > +}
> 
> > +static int owl_group_pinconf_val2arg(const struct owl_pingroup *g,
> > +   unsigned int param,
> > +   u32 *arg)
> > +{
> 
> > +   case PIN_CONFIG_SLEW_RATE:
> > +   if (*arg)
> > +   *arg = 1;
> > +   else
> > +   *arg = 0;
> 
> Doesn't slew rate allow a non-binary value?
>

As stated in the binding doc, valid values for the slew rate parameter are:

0 - Slow
1 - Fast
 
> > +   return 0;
> > +}
> > +
> > +static int owl_group_config_get(struct pinctrl_dev *pctrldev,
> > +   unsigned int group,
> > +   unsigned long *config)
> > +{
> > +   int ret = 0;
> 
> Redundant assignment.
> 

Ack.

> > +}
> 
> > +static int owl_group_config_set(struct pinctrl_dev *pctrldev,
> > +   unsigned int group,
> > +   unsigned long *configs,
> > +   unsigned int num_configs)
> > +{
> > +   int ret = 0;
> 
> Redundant assignment, see below.
>

Ack. Will return 0 directly.
 
> > +   mask = (1 << width) - 1;
> > +   mask = mask << bit;
> > +   tmp = readl(pctrl->base + reg);
> > +   tmp &= ~mask;
> > +   tmp |= arg << bit;
> > +   writel(tmp, pctrl->base + reg);
> 
> This is called owl_update_bits().
>

Ack.
 
> > +   return ret;
> 
> return 0; ?
> 

Okay.

> > +}
> 
> > +int owl_pinctrl_probe(struct platform_device *pdev,
> > +   struct owl_pinctrl_soc_data *soc_data)
> > +{
> 
> > +   clk_prepare_enable(pctrl->clk);
> 
> This can fail.
>

Okay. Will add a check.
 
> > +}
> 
> > +static const struct of_device_id s900_pinctrl_of_match[] = {
> > +   { .compatible = "actions,s900-pinctrl", },
> 
> > +   { },
> 
> No comma needed.
>

Okay.

Thanks for the review.

Regards,
Mani
 
> > +};
> 
> -- 
> With Best Regards,
> Andy Shevchenko

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-03-01 Thread Manivannan Sadhasivam

Hi Andy,

On Wed, Feb 28, 2018 at 08:36:53PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 28, 2018 at 8:14 PM, Manivannan Sadhasivam
>  wrote:
> > Add pinctrl driver for Actions Semi S900 SoC. The driver supports
> > pinctrl, pinmux and pinconf functionalities through a range of registers
> > common to both gpio driver and pinctrl driver.
> >
> > Pinmux functionality is available only for the pin groups while the
> > pinconf functionality is available for both pin groups and individual
> > pins.
> 
> > +static int owl_set_mux(struct pinctrl_dev *pctrldev,
> > +   unsigned int function,
> > +   unsigned int group)
> > +{
> 
> > +   mfpval = readl(pctrl->base + g->mfpctl_reg);
> > +   mfpval &= ~mask;
> > +   mfpval |= val;
> > +   writel(mfpval, pctrl->base + g->mfpctl_reg);
> 
> This is called owl_update_bits().
>

Okay. Will add a helper.
 
> > +static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
> > +   unsigned int pin,
> > +   unsigned long *configs,
> > +   unsigned int num_configs)
> > +{
> 
> > +   int ret = 0;
> 
> Redundant assignment?
>

Ack.
 
> > +   mask = (1 << width) - 1;
> > +   mask = mask << bit;
> > +   tmp = readl(pctrl->base + reg);
> > +   tmp &= ~mask;
> > +   tmp |= arg << bit;
> > +   writel(tmp, pctrl->base + reg);
> 
> This is called owl_update_bits().
>

Ack.

> > +}
> 
> > +static int owl_group_pinconf_val2arg(const struct owl_pingroup *g,
> > +   unsigned int param,
> > +   u32 *arg)
> > +{
> 
> > +   case PIN_CONFIG_SLEW_RATE:
> > +   if (*arg)
> > +   *arg = 1;
> > +   else
> > +   *arg = 0;
> 
> Doesn't slew rate allow a non-binary value?
>

As stated in the binding doc, valid values for the slew rate parameter are:

0 - Slow
1 - Fast
 
> > +   return 0;
> > +}
> > +
> > +static int owl_group_config_get(struct pinctrl_dev *pctrldev,
> > +   unsigned int group,
> > +   unsigned long *config)
> > +{
> > +   int ret = 0;
> 
> Redundant assignment.
> 

Ack.

> > +}
> 
> > +static int owl_group_config_set(struct pinctrl_dev *pctrldev,
> > +   unsigned int group,
> > +   unsigned long *configs,
> > +   unsigned int num_configs)
> > +{
> > +   int ret = 0;
> 
> Redundant assignment, see below.
>

Ack. Will return 0 directly.
 
> > +   mask = (1 << width) - 1;
> > +   mask = mask << bit;
> > +   tmp = readl(pctrl->base + reg);
> > +   tmp &= ~mask;
> > +   tmp |= arg << bit;
> > +   writel(tmp, pctrl->base + reg);
> 
> This is called owl_update_bits().
>

Ack.
 
> > +   return ret;
> 
> return 0; ?
> 

Okay.

> > +}
> 
> > +int owl_pinctrl_probe(struct platform_device *pdev,
> > +   struct owl_pinctrl_soc_data *soc_data)
> > +{
> 
> > +   clk_prepare_enable(pctrl->clk);
> 
> This can fail.
>

Okay. Will add a check.
 
> > +}
> 
> > +static const struct of_device_id s900_pinctrl_of_match[] = {
> > +   { .compatible = "actions,s900-pinctrl", },
> 
> > +   { },
> 
> No comma needed.
>

Okay.

Thanks for the review.

Regards,
Mani
 
> > +};
> 
> -- 
> With Best Regards,
> Andy Shevchenko

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-02-28 Thread Andy Shevchenko

On Wed, Feb 28, 2018 at 8:14 PM, Manivannan Sadhasivam
 wrote:
> Add pinctrl driver for Actions Semi S900 SoC. The driver supports
> pinctrl, pinmux and pinconf functionalities through a range of registers
> common to both gpio driver and pinctrl driver.
>
> Pinmux functionality is available only for the pin groups while the
> pinconf functionality is available for both pin groups and individual
> pins.

> +static int owl_set_mux(struct pinctrl_dev *pctrldev,
> +   unsigned int function,
> +   unsigned int group)
> +{

> +   mfpval = readl(pctrl->base + g->mfpctl_reg);
> +   mfpval &= ~mask;
> +   mfpval |= val;
> +   writel(mfpval, pctrl->base + g->mfpctl_reg);

This is called owl_update_bits().

> +static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
> +   unsigned int pin,
> +   unsigned long *configs,
> +   unsigned int num_configs)
> +{

> +   int ret = 0;

Redundant assignment?

> +   mask = (1 << width) - 1;
> +   mask = mask << bit;
> +   tmp = readl(pctrl->base + reg);
> +   tmp &= ~mask;
> +   tmp |= arg << bit;
> +   writel(tmp, pctrl->base + reg);

This is called owl_update_bits().

> +}

> +static int owl_group_pinconf_val2arg(const struct owl_pingroup *g,
> +   unsigned int param,
> +   u32 *arg)
> +{

> +   case PIN_CONFIG_SLEW_RATE:
> +   if (*arg)
> +   *arg = 1;
> +   else
> +   *arg = 0;

Doesn't slew rate allow a non-binary value?

> +   return 0;
> +}
> +
> +static int owl_group_config_get(struct pinctrl_dev *pctrldev,
> +   unsigned int group,
> +   unsigned long *config)
> +{
> +   int ret = 0;

Redundant assignment.

> +}

> +static int owl_group_config_set(struct pinctrl_dev *pctrldev,
> +   unsigned int group,
> +   unsigned long *configs,
> +   unsigned int num_configs)
> +{
> +   int ret = 0;

Redundant assignment, see below.

> +   mask = (1 << width) - 1;
> +   mask = mask << bit;
> +   tmp = readl(pctrl->base + reg);
> +   tmp &= ~mask;
> +   tmp |= arg << bit;
> +   writel(tmp, pctrl->base + reg);

This is called owl_update_bits().

> +   return ret;

return 0; ?

> +}

> +int owl_pinctrl_probe(struct platform_device *pdev,
> +   struct owl_pinctrl_soc_data *soc_data)
> +{

> +   clk_prepare_enable(pctrl->clk);

This can fail.

> +}

> +static const struct of_device_id s900_pinctrl_of_match[] = {
> +   { .compatible = "actions,s900-pinctrl", },

> +   { },

No comma needed.

> +};

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-02-28 Thread Andy Shevchenko

On Wed, Feb 28, 2018 at 8:14 PM, Manivannan Sadhasivam
 wrote:
> Add pinctrl driver for Actions Semi S900 SoC. The driver supports
> pinctrl, pinmux and pinconf functionalities through a range of registers
> common to both gpio driver and pinctrl driver.
>
> Pinmux functionality is available only for the pin groups while the
> pinconf functionality is available for both pin groups and individual
> pins.

> +static int owl_set_mux(struct pinctrl_dev *pctrldev,
> +   unsigned int function,
> +   unsigned int group)
> +{

> +   mfpval = readl(pctrl->base + g->mfpctl_reg);
> +   mfpval &= ~mask;
> +   mfpval |= val;
> +   writel(mfpval, pctrl->base + g->mfpctl_reg);

This is called owl_update_bits().

> +static int owl_pin_config_set(struct pinctrl_dev *pctrldev,
> +   unsigned int pin,
> +   unsigned long *configs,
> +   unsigned int num_configs)
> +{

> +   int ret = 0;

Redundant assignment?

> +   mask = (1 << width) - 1;
> +   mask = mask << bit;
> +   tmp = readl(pctrl->base + reg);
> +   tmp &= ~mask;
> +   tmp |= arg << bit;
> +   writel(tmp, pctrl->base + reg);

This is called owl_update_bits().

> +}

> +static int owl_group_pinconf_val2arg(const struct owl_pingroup *g,
> +   unsigned int param,
> +   u32 *arg)
> +{

> +   case PIN_CONFIG_SLEW_RATE:
> +   if (*arg)
> +   *arg = 1;
> +   else
> +   *arg = 0;

Doesn't slew rate allow a non-binary value?

> +   return 0;
> +}
> +
> +static int owl_group_config_get(struct pinctrl_dev *pctrldev,
> +   unsigned int group,
> +   unsigned long *config)
> +{
> +   int ret = 0;

Redundant assignment.

> +}

> +static int owl_group_config_set(struct pinctrl_dev *pctrldev,
> +   unsigned int group,
> +   unsigned long *configs,
> +   unsigned int num_configs)
> +{
> +   int ret = 0;

Redundant assignment, see below.

> +   mask = (1 << width) - 1;
> +   mask = mask << bit;
> +   tmp = readl(pctrl->base + reg);
> +   tmp &= ~mask;
> +   tmp |= arg << bit;
> +   writel(tmp, pctrl->base + reg);

This is called owl_update_bits().

> +   return ret;

return 0; ?

> +}

> +int owl_pinctrl_probe(struct platform_device *pdev,
> +   struct owl_pinctrl_soc_data *soc_data)
> +{

> +   clk_prepare_enable(pctrl->clk);

This can fail.

> +}

> +static const struct of_device_id s900_pinctrl_of_match[] = {
> +   { .compatible = "actions,s900-pinctrl", },

> +   { },

No comma needed.

> +};

-- 
With Best Regards,
Andy Shevchenko

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-02-28 Thread Manivannan Sadhasivam

Add pinctrl driver for Actions Semi S900 SoC. The driver supports
pinctrl, pinmux and pinconf functionalities through a range of registers
common to both gpio driver and pinctrl driver.

Pinmux functionality is available only for the pin groups while the
pinconf functionality is available for both pin groups and individual
pins.

Signed-off-by: Manivannan Sadhasivam 
---
 drivers/pinctrl/Kconfig|1 +
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/actions/Kconfig|   12 +
 drivers/pinctrl/actions/Makefile   |2 +
 drivers/pinctrl/actions/pinctrl-owl.c  |  571 
 drivers/pinctrl/actions/pinctrl-owl.h  |  142 ++
 drivers/pinctrl/actions/pinctrl-s900.c | 2505 
 7 files changed, 3234 insertions(+)
 create mode 100644 drivers/pinctrl/actions/Kconfig
 create mode 100644 drivers/pinctrl/actions/Makefile
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.c
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.h
 create mode 100644 drivers/pinctrl/actions/pinctrl-s900.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 0f254b35c378..838c8fff8c24 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -368,6 +368,7 @@ config PINCTRL_OCELOT
select GENERIC_PINMUX_FUNCTIONS
select REGMAP_MMIO
 
+source "drivers/pinctrl/actions/Kconfig"
 source "drivers/pinctrl/aspeed/Kconfig"
 source "drivers/pinctrl/bcm/Kconfig"
 source "drivers/pinctrl/berlin/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index d3692633e9ed..fb3497c1a4cb 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
 obj-$(CONFIG_PINCTRL_OCELOT)   += pinctrl-ocelot.o
 
+obj-y  += actions/
 obj-$(CONFIG_ARCH_ASPEED)  += aspeed/
 obj-y  += bcm/
 obj-$(CONFIG_PINCTRL_BERLIN)   += berlin/
diff --git a/drivers/pinctrl/actions/Kconfig b/drivers/pinctrl/actions/Kconfig
new file mode 100644
index ..1c7309c90f0d
--- /dev/null
+++ b/drivers/pinctrl/actions/Kconfig
@@ -0,0 +1,12 @@
+config PINCTRL_OWL
+   bool
+   depends on (ARCH_ACTIONS || COMPILE_TEST) && OF
+   select PINMUX
+   select PINCONF
+   select GENERIC_PINCONF
+
+config PINCTRL_S900
+   bool "Actions Semi S900 pinctrl driver"
+   select PINCTRL_OWL
+   help
+ Say Y here to enable Actions Semi S900 pinctrl driver
diff --git a/drivers/pinctrl/actions/Makefile b/drivers/pinctrl/actions/Makefile
new file mode 100644
index ..bd232d28400f
--- /dev/null
+++ b/drivers/pinctrl/actions/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_PINCTRL_OWL)  += pinctrl-owl.o
+obj-$(CONFIG_PINCTRL_S900) += pinctrl-s900.o
diff --git a/drivers/pinctrl/actions/pinctrl-owl.c 
b/drivers/pinctrl/actions/pinctrl-owl.c
new file mode 100644
index ..1463a78efa96
--- /dev/null
+++ b/drivers/pinctrl/actions/pinctrl-owl.c
@@ -0,0 +1,571 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OWL SoC's Pinctrl driver
+ *
+ * Copyright (c) 2014 Actions Semi Inc.
+ * Author: David Liu 
+ *
+ * Copyright (c) 2018 Linaro Ltd.
+ * Author: Manivannan Sadhasivam 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "../core.h"
+#include "../pinctrl-utils.h"
+#include "pinctrl-owl.h"
+
+/**
+ * struct owl_pinctrl - pinctrl state of the device
+ * @dev: device handle
+ * @pctrldev: pinctrl handle
+ * @lock: spinlock to protect registers
+ * @soc: reference to soc_data
+ * @base: pinctrl register base address
+ */
+struct owl_pinctrl {
+   struct device *dev;
+   struct pinctrl_dev *pctrldev;
+   raw_spinlock_t lock;
+   struct clk *clk;
+   const struct owl_pinctrl_soc_data *soc;
+   void __iomem *base;
+};
+
+static int owl_get_groups_count(struct pinctrl_dev *pctrldev)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   return pctrl->soc->ngroups;
+}
+
+static const char *owl_get_group_name(struct pinctrl_dev *pctrldev,
+   unsigned int group)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   return pctrl->soc->groups[group].name;
+}
+
+static int owl_get_group_pins(struct pinctrl_dev *pctrldev,
+   unsigned int group,
+   const unsigned int **pins,
+   unsigned int *num_pins)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   *pins = pctrl->soc->groups[group].pads;
+   *num_pins = pctrl->soc->groups[group].npads;
+
+   return 0;
+}
+
+static void owl_pin_dbg_show(struct pinctrl_dev

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

2018-02-28 Thread Manivannan Sadhasivam

Add pinctrl driver for Actions Semi S900 SoC. The driver supports
pinctrl, pinmux and pinconf functionalities through a range of registers
common to both gpio driver and pinctrl driver.

Pinmux functionality is available only for the pin groups while the
pinconf functionality is available for both pin groups and individual
pins.

Signed-off-by: Manivannan Sadhasivam 
---
 drivers/pinctrl/Kconfig|1 +
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/actions/Kconfig|   12 +
 drivers/pinctrl/actions/Makefile   |2 +
 drivers/pinctrl/actions/pinctrl-owl.c  |  571 
 drivers/pinctrl/actions/pinctrl-owl.h  |  142 ++
 drivers/pinctrl/actions/pinctrl-s900.c | 2505 
 7 files changed, 3234 insertions(+)
 create mode 100644 drivers/pinctrl/actions/Kconfig
 create mode 100644 drivers/pinctrl/actions/Makefile
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.c
 create mode 100644 drivers/pinctrl/actions/pinctrl-owl.h
 create mode 100644 drivers/pinctrl/actions/pinctrl-s900.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 0f254b35c378..838c8fff8c24 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -368,6 +368,7 @@ config PINCTRL_OCELOT
select GENERIC_PINMUX_FUNCTIONS
select REGMAP_MMIO
 
+source "drivers/pinctrl/actions/Kconfig"
 source "drivers/pinctrl/aspeed/Kconfig"
 source "drivers/pinctrl/bcm/Kconfig"
 source "drivers/pinctrl/berlin/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index d3692633e9ed..fb3497c1a4cb 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
 obj-$(CONFIG_PINCTRL_RK805)+= pinctrl-rk805.o
 obj-$(CONFIG_PINCTRL_OCELOT)   += pinctrl-ocelot.o
 
+obj-y  += actions/
 obj-$(CONFIG_ARCH_ASPEED)  += aspeed/
 obj-y  += bcm/
 obj-$(CONFIG_PINCTRL_BERLIN)   += berlin/
diff --git a/drivers/pinctrl/actions/Kconfig b/drivers/pinctrl/actions/Kconfig
new file mode 100644
index ..1c7309c90f0d
--- /dev/null
+++ b/drivers/pinctrl/actions/Kconfig
@@ -0,0 +1,12 @@
+config PINCTRL_OWL
+   bool
+   depends on (ARCH_ACTIONS || COMPILE_TEST) && OF
+   select PINMUX
+   select PINCONF
+   select GENERIC_PINCONF
+
+config PINCTRL_S900
+   bool "Actions Semi S900 pinctrl driver"
+   select PINCTRL_OWL
+   help
+ Say Y here to enable Actions Semi S900 pinctrl driver
diff --git a/drivers/pinctrl/actions/Makefile b/drivers/pinctrl/actions/Makefile
new file mode 100644
index ..bd232d28400f
--- /dev/null
+++ b/drivers/pinctrl/actions/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_PINCTRL_OWL)  += pinctrl-owl.o
+obj-$(CONFIG_PINCTRL_S900) += pinctrl-s900.o
diff --git a/drivers/pinctrl/actions/pinctrl-owl.c 
b/drivers/pinctrl/actions/pinctrl-owl.c
new file mode 100644
index ..1463a78efa96
--- /dev/null
+++ b/drivers/pinctrl/actions/pinctrl-owl.c
@@ -0,0 +1,571 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OWL SoC's Pinctrl driver
+ *
+ * Copyright (c) 2014 Actions Semi Inc.
+ * Author: David Liu 
+ *
+ * Copyright (c) 2018 Linaro Ltd.
+ * Author: Manivannan Sadhasivam 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "../core.h"
+#include "../pinctrl-utils.h"
+#include "pinctrl-owl.h"
+
+/**
+ * struct owl_pinctrl - pinctrl state of the device
+ * @dev: device handle
+ * @pctrldev: pinctrl handle
+ * @lock: spinlock to protect registers
+ * @soc: reference to soc_data
+ * @base: pinctrl register base address
+ */
+struct owl_pinctrl {
+   struct device *dev;
+   struct pinctrl_dev *pctrldev;
+   raw_spinlock_t lock;
+   struct clk *clk;
+   const struct owl_pinctrl_soc_data *soc;
+   void __iomem *base;
+};
+
+static int owl_get_groups_count(struct pinctrl_dev *pctrldev)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   return pctrl->soc->ngroups;
+}
+
+static const char *owl_get_group_name(struct pinctrl_dev *pctrldev,
+   unsigned int group)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   return pctrl->soc->groups[group].name;
+}
+
+static int owl_get_group_pins(struct pinctrl_dev *pctrldev,
+   unsigned int group,
+   const unsigned int **pins,
+   unsigned int *num_pins)
+{
+   struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev);
+
+   *pins = pctrl->soc->groups[group].pads;
+   *num_pins = pctrl->soc->groups[group].npads;
+
+   return 0;
+}
+
+static void owl_pin_dbg_show(struct pinctrl_dev *pctrldev,
+   struct seq_file *s,
+

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

Re: [PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

[PATCH v3 04/10] pinctrl: actions: Add Actions S900 pinctrl driver

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