Re: [PATCH v3 1/5] clk: mediatek: update missing clock data for MT7622 audsys

2018-02-13 Thread Matthias Brugger 


On 02/12/2018 12:28 PM, Ryder Lee wrote:
> Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
> 
> Signed-off-by: Ryder Lee 
> Reviewed-by: Rob Herring 
> ---
>  drivers/clk/mediatek/clk-mt7622-aud.c  | 1 +
>  include/dt-bindings/clock/mt7622-clk.h | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)>

Reviewed-by: Matthias Brugger 

> diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c 
> b/drivers/clk/mediatek/clk-mt7622-aud.c
> index fad7d9f..13f752d 100644
> --- a/drivers/clk/mediatek/clk-mt7622-aud.c
> +++ b/drivers/clk/mediatek/clk-mt7622-aud.c
> @@ -106,6 +106,7 @@
>   GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
>   GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
>   GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
> + GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
>   /* AUDIO2 */
>   GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
>   GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
> diff --git a/include/dt-bindings/clock/mt7622-clk.h 
> b/include/dt-bindings/clock/mt7622-clk.h
> index 3e514ed..e9d77f0 100644
> --- a/include/dt-bindings/clock/mt7622-clk.h
> +++ b/include/dt-bindings/clock/mt7622-clk.h
> @@ -235,7 +235,8 @@
>  #define CLK_AUDIO_MEM_ASRC3  43
>  #define CLK_AUDIO_MEM_ASRC4  44
>  #define CLK_AUDIO_MEM_ASRC5  45
> -#define CLK_AUDIO_NR_CLK 46
> +#define CLK_AUDIO_AFE_CONN   46
> +#define CLK_AUDIO_NR_CLK 47
>  
>  /* SSUSBSYS */
>  
>

Re: [PATCH v3 1/5] clk: mediatek: update missing clock data for MT7622 audsys

2018-02-13 Thread Matthias Brugger 


On 02/12/2018 12:28 PM, Ryder Lee wrote:
> Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
> 
> Signed-off-by: Ryder Lee 
> Reviewed-by: Rob Herring 
> ---
>  drivers/clk/mediatek/clk-mt7622-aud.c  | 1 +
>  include/dt-bindings/clock/mt7622-clk.h | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)>

Reviewed-by: Matthias Brugger 

> diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c 
> b/drivers/clk/mediatek/clk-mt7622-aud.c
> index fad7d9f..13f752d 100644
> --- a/drivers/clk/mediatek/clk-mt7622-aud.c
> +++ b/drivers/clk/mediatek/clk-mt7622-aud.c
> @@ -106,6 +106,7 @@
>   GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
>   GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
>   GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
> + GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
>   /* AUDIO2 */
>   GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
>   GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
> diff --git a/include/dt-bindings/clock/mt7622-clk.h 
> b/include/dt-bindings/clock/mt7622-clk.h
> index 3e514ed..e9d77f0 100644
> --- a/include/dt-bindings/clock/mt7622-clk.h
> +++ b/include/dt-bindings/clock/mt7622-clk.h
> @@ -235,7 +235,8 @@
>  #define CLK_AUDIO_MEM_ASRC3  43
>  #define CLK_AUDIO_MEM_ASRC4  44
>  #define CLK_AUDIO_MEM_ASRC5  45
> -#define CLK_AUDIO_NR_CLK 46
> +#define CLK_AUDIO_AFE_CONN   46
> +#define CLK_AUDIO_NR_CLK 47
>  
>  /* SSUSBSYS */
>  
>

[PATCH v3 1/5] clk: mediatek: update missing clock data for MT7622 audsys

2018-02-12 Thread Ryder Lee 
Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.

Signed-off-by: Ryder Lee 
Reviewed-by: Rob Herring 
---
 drivers/clk/mediatek/clk-mt7622-aud.c  | 1 +
 include/dt-bindings/clock/mt7622-clk.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c 
b/drivers/clk/mediatek/clk-mt7622-aud.c
index fad7d9f..13f752d 100644
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
@@ -106,6 +106,7 @@
GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
+   GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
/* AUDIO2 */
GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
diff --git a/include/dt-bindings/clock/mt7622-clk.h 
b/include/dt-bindings/clock/mt7622-clk.h
index 3e514ed..e9d77f0 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -235,7 +235,8 @@
 #define CLK_AUDIO_MEM_ASRC343
 #define CLK_AUDIO_MEM_ASRC444
 #define CLK_AUDIO_MEM_ASRC545
-#define CLK_AUDIO_NR_CLK   46
+#define CLK_AUDIO_AFE_CONN 46
+#define CLK_AUDIO_NR_CLK   47
 
 /* SSUSBSYS */
 
-- 
1.9.1

[PATCH v3 1/5] clk: mediatek: update missing clock data for MT7622 audsys

2018-02-12 Thread Ryder Lee 
Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.

Signed-off-by: Ryder Lee 
Reviewed-by: Rob Herring 
---
 drivers/clk/mediatek/clk-mt7622-aud.c  | 1 +
 include/dt-bindings/clock/mt7622-clk.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c 
b/drivers/clk/mediatek/clk-mt7622-aud.c
index fad7d9f..13f752d 100644
--- a/drivers/clk/mediatek/clk-mt7622-aud.c
+++ b/drivers/clk/mediatek/clk-mt7622-aud.c
@@ -106,6 +106,7 @@
GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
+   GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
/* AUDIO2 */
GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
diff --git a/include/dt-bindings/clock/mt7622-clk.h 
b/include/dt-bindings/clock/mt7622-clk.h
index 3e514ed..e9d77f0 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -235,7 +235,8 @@
 #define CLK_AUDIO_MEM_ASRC343
 #define CLK_AUDIO_MEM_ASRC444
 #define CLK_AUDIO_MEM_ASRC545
-#define CLK_AUDIO_NR_CLK   46
+#define CLK_AUDIO_AFE_CONN 46
+#define CLK_AUDIO_NR_CLK   47
 
 /* SSUSBSYS */
 
-- 
1.9.1