On 08/04/2021 06.09, Will Deacon wrote:
Couple of stale comment nits:
[...]
But with that:
Acked-by: Will Deacon
Fixed those for the PR, thanks!
--
Hector Martin (mar...@marcan.st)
Public Key: https://mrcn.st/pub
On Fri, Apr 02, 2021 at 06:05:39PM +0900, Hector Martin wrote:
> This is the root interrupt controller used on Apple ARM SoCs such as the
> M1. This irqchip driver performs multiple functions:
>
> * Handles both IRQs and FIQs
>
> * Drives the AIC peripheral itself (which handles IRQs)
>
> *
On 07/04/2021 03.16, Marc Zyngier wrote:
Hi Hector,
On Fri, 02 Apr 2021 10:05:39 +0100,
Hector Martin wrote:
+ /*
+* In EL1 the non-redirected registers are the guest's,
+* not EL2's, so remap the hwirqs to match.
+*/
+
Hi Hector,
On Fri, 02 Apr 2021 10:05:39 +0100,
Hector Martin wrote:
>
> This is the root interrupt controller used on Apple ARM SoCs such as the
> M1. This irqchip driver performs multiple functions:
>
> * Handles both IRQs and FIQs
>
> * Drives the AIC peripheral itself (which handles IRQs)
This is the root interrupt controller used on Apple ARM SoCs such as the
M1. This irqchip driver performs multiple functions:
* Handles both IRQs and FIQs
* Drives the AIC peripheral itself (which handles IRQs)
* Dispatches FIQs to downstream hard-wired clients (currently the ARM
timer).
*
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