Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Leeder, Neil]

On 10/28/2016 12:02 PM, Will Deacon wrote:

On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote:

Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.


Did the fuzzer explode, or do you have a new version you can post?

Will


Hi Will,
I was delayed by some logistical problems, but the fuzzer ran fine and I 
will post the updated patch shortly - sorry for the delay.


Neil
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm 
Technologies Inc.

Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Leeder, Neil]

On 10/28/2016 12:02 PM, Will Deacon wrote:

On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote:

Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.


Did the fuzzer explode, or do you have a new version you can post?

Will


Hi Will,
I was delayed by some logistical problems, but the fuzzer ran fine and I 
will post the updated patch shortly - sorry for the delay.


Neil
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm 
Technologies Inc.

Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Will Deacon]

On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote:
> Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.

Did the fuzzer explode, or do you have a new version you can post?

Will

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Will Deacon]

On Tue, Oct 04, 2016 at 12:25:54PM -0400, Neil Leeder wrote:
> Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.

Did the fuzzer explode, or do you have a new version you can post?

Will

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

On 10/4/2016 11:53 AM, Mark Rutland wrote:
> Hi Neil,
> 
> On Wed, Sep 21, 2016 at 05:12:54PM -0400, Neil Leeder wrote:
>> Adds perf events support for L2 cache PMU.
>>
>> The L2 cache PMU driver is named 'l2cache_0' and can be used
>> with perf events to profile L2 events such as cache hits
>> and misses.
>>
>> Signed-off-by: Neil Leeder 
>> ---
> 
>>  drivers/soc/qcom/Kconfig |   9 +
>>  drivers/soc/qcom/Makefile|   1 +
>>  drivers/soc/qcom/perf_event_l2.c | 948 
>> +++
>>  include/linux/cpuhotplug.h   |   1 +
>>  4 files changed, 959 insertions(+)
>>  create mode 100644 drivers/soc/qcom/perf_event_l2.c
> 
> Apologies for the delay; this has been on my todo list, but I've been a
> little distracted and haven't had the time necessary to devote to this.
> It's somewhat unusual given the constraint logic and the percpu uncore
> component, so there's more to consider than usual.
> 
> At a high level, this will need to be moved to drivers/perf/, per [1].
> 
> Can you move the driver there, and post the result atop of v4.8-rc1 at
> the end of the merge window? Until then, I can't guarantee that I'll
> have the time to look at this.
> 
> Can you also give Vince's perf fuzzer [2] a spin against the driver? I
> can't recall if we covered that previously, and in practice it's found a
> number of issues in drivers that have otherwise looked fine. If you've
> done so, it'd be worth noting in the cover.
> 
> Thanks,
> Mark.
> 
> [1] 
> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/457188.html
> [2] https://github.com/deater/perf_event_tests
> 

Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.

Neil
-- 
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies 
Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

On 10/4/2016 11:53 AM, Mark Rutland wrote:
> Hi Neil,
> 
> On Wed, Sep 21, 2016 at 05:12:54PM -0400, Neil Leeder wrote:
>> Adds perf events support for L2 cache PMU.
>>
>> The L2 cache PMU driver is named 'l2cache_0' and can be used
>> with perf events to profile L2 events such as cache hits
>> and misses.
>>
>> Signed-off-by: Neil Leeder 
>> ---
> 
>>  drivers/soc/qcom/Kconfig |   9 +
>>  drivers/soc/qcom/Makefile|   1 +
>>  drivers/soc/qcom/perf_event_l2.c | 948 
>> +++
>>  include/linux/cpuhotplug.h   |   1 +
>>  4 files changed, 959 insertions(+)
>>  create mode 100644 drivers/soc/qcom/perf_event_l2.c
> 
> Apologies for the delay; this has been on my todo list, but I've been a
> little distracted and haven't had the time necessary to devote to this.
> It's somewhat unusual given the constraint logic and the percpu uncore
> component, so there's more to consider than usual.
> 
> At a high level, this will need to be moved to drivers/perf/, per [1].
> 
> Can you move the driver there, and post the result atop of v4.8-rc1 at
> the end of the merge window? Until then, I can't guarantee that I'll
> have the time to look at this.
> 
> Can you also give Vince's perf fuzzer [2] a spin against the driver? I
> can't recall if we covered that previously, and in practice it's found a
> number of issues in drivers that have otherwise looked fine. If you've
> done so, it'd be worth noting in the cover.
> 
> Thanks,
> Mark.
> 
> [1] 
> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/457188.html
> [2] https://github.com/deater/perf_event_tests
> 

Thanks Mark. I'll move it, rebase on 4.9-rc1 and run perf fuzzer.

Neil
-- 
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies 
Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Mark Rutland]

Hi Neil,

On Wed, Sep 21, 2016 at 05:12:54PM -0400, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
> 
> The L2 cache PMU driver is named 'l2cache_0' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
> 
> Signed-off-by: Neil Leeder 
> ---

>  drivers/soc/qcom/Kconfig |   9 +
>  drivers/soc/qcom/Makefile|   1 +
>  drivers/soc/qcom/perf_event_l2.c | 948 
> +++
>  include/linux/cpuhotplug.h   |   1 +
>  4 files changed, 959 insertions(+)
>  create mode 100644 drivers/soc/qcom/perf_event_l2.c

Apologies for the delay; this has been on my todo list, but I've been a
little distracted and haven't had the time necessary to devote to this.
It's somewhat unusual given the constraint logic and the percpu uncore
component, so there's more to consider than usual.

At a high level, this will need to be moved to drivers/perf/, per [1].

Can you move the driver there, and post the result atop of v4.8-rc1 at
the end of the merge window? Until then, I can't guarantee that I'll
have the time to look at this.

Can you also give Vince's perf fuzzer [2] a spin against the driver? I
can't recall if we covered that previously, and in practice it's found a
number of issues in drivers that have otherwise looked fine. If you've
done so, it'd be worth noting in the cover.

Thanks,
Mark.

[1] 
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/457188.html
[2] https://github.com/deater/perf_event_tests

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Mark Rutland]

Hi Neil,

On Wed, Sep 21, 2016 at 05:12:54PM -0400, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
> 
> The L2 cache PMU driver is named 'l2cache_0' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
> 
> Signed-off-by: Neil Leeder 
> ---

>  drivers/soc/qcom/Kconfig |   9 +
>  drivers/soc/qcom/Makefile|   1 +
>  drivers/soc/qcom/perf_event_l2.c | 948 
> +++
>  include/linux/cpuhotplug.h   |   1 +
>  4 files changed, 959 insertions(+)
>  create mode 100644 drivers/soc/qcom/perf_event_l2.c

Apologies for the delay; this has been on my todo list, but I've been a
little distracted and haven't had the time necessary to devote to this.
It's somewhat unusual given the constraint logic and the percpu uncore
component, so there's more to consider than usual.

At a high level, this will need to be moved to drivers/perf/, per [1].

Can you move the driver there, and post the result atop of v4.8-rc1 at
the end of the merge window? Until then, I can't guarantee that I'll
have the time to look at this.

Can you also give Vince's perf fuzzer [2] a spin against the driver? I
can't recall if we covered that previously, and in practice it's found a
number of issues in drivers that have otherwise looked fine. If you've
done so, it'd be worth noting in the cover.

Thanks,
Mark.

[1] 
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/457188.html
[2] https://github.com/deater/perf_event_tests

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

On 9/21/2016 05:12 PM, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
> 
> The L2 cache PMU driver is named 'l2cache_0' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
> 
> Signed-off-by: Neil Leeder 
> ---
> v6: restore accidentally dropped Kconfig dependencies
> 
> v5:
> Fold the header and l2-accessors into .c file
> Use multi-instance framework for hotplug
> Change terminology from slice to cluster for clarity
> Remove unnecessary rmw sequence for enable registers
> Use prev_count in hwc rather than in slice
> Enforce all events in same group on same CPU
> Add comments, rename variables for clarity
> 
> v4:
> Replace notifier with hotplug statemachine
> Allocate PMU struct dynamically
> 
> v3:
> Remove exports from l2-accessors
> Change l2-accessors Kconfig to make it not user-selectable
> Reorder and remove unnecessary includes
> 
> v2:
> Add the l2-accessors patch to this patchset, previously posted separately.
> Remove sampling and per-task functionality for this uncore PMU.
> Use cpumask to replace code which filtered events to one cpu per slice.
> Replace manual event filtering with filter_match callback.
> Use a separate used_mask for event groups.
> Add hotplug notifier for CPU and irq migration.
> Remove extraneous synchronisation instructions.
> Other miscellaneous cleanup.
> 
>  drivers/soc/qcom/Kconfig |   9 +
>  drivers/soc/qcom/Makefile|   1 +
>  drivers/soc/qcom/perf_event_l2.c | 948 
> +++
>  include/linux/cpuhotplug.h   |   1 +
>  4 files changed, 959 insertions(+)
>  create mode 100644 drivers/soc/qcom/perf_event_l2.c
> 
> diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
> index 461b387..3fa27a8 100644
> --- a/drivers/soc/qcom/Kconfig
> +++ b/drivers/soc/qcom/Kconfig
> @@ -10,6 +10,15 @@ config QCOM_GSBI
>functions for connecting the underlying serial UART, SPI, and I2C
>devices to the output pins.
>  
> +config QCOM_PERF_EVENTS_L2
> + bool "Qualcomm Technologies L2-cache perf events"
> + depends on ARCH_QCOM && ARM64 && HW_PERF_EVENTS && ACPI
> +   help
> +   Provides support for the L2 cache performance monitor unit (PMU)
> +   in Qualcomm Technologies processors.
> +   Adds the L2 cache PMU into the perf events subsystem for
> +   monitoring L2 cache events.
> +
>  config QCOM_PM
>   bool "Qualcomm Power Management"
>   depends on ARCH_QCOM && !ARM64
> diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
> index fdd664e..4c9df3b 100644
> --- a/drivers/soc/qcom/Makefile
> +++ b/drivers/soc/qcom/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_QCOM_GSBI)  +=  qcom_gsbi.o
> +obj-$(CONFIG_QCOM_PERF_EVENTS_L2)+= perf_event_l2.o
>  obj-$(CONFIG_QCOM_PM)+=  spm.o
>  obj-$(CONFIG_QCOM_SMD) +=smd.o
>  obj-$(CONFIG_QCOM_SMD_RPM)   += smd-rpm.o
> diff --git a/drivers/soc/qcom/perf_event_l2.c 
> b/drivers/soc/qcom/perf_event_l2.c
> new file mode 100644
> index 000..bbf47c9
> --- /dev/null
> +++ b/drivers/soc/qcom/perf_event_l2.c
> @@ -0,0 +1,948 @@
> +/* Copyright (c) 2015,2016 The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define MAX_L2_CTRS 9
> +
> +#define L2PMCR_NUM_EV_SHIFT 11
> +#define L2PMCR_NUM_EV_MASK  0x1F
> +
> +#define L2PMCR  0x400
> +#define L2PMCNTENCLR0x403
> +#define L2PMCNTENSET0x404
> +#define L2PMINTENCLR0x405
> +#define L2PMINTENSET0x406
> +#define L2PMOVSCLR  0x407
> +#define L2PMOVSSET  0x408
> +#define L2PMCCNTCR  0x409
> +#define L2PMCCNTR   0x40A
> +#define L2PMCCNTSR  0x40C
> +#define L2PMRESR0x410
> +#define IA_L2PMXEVCNTCR_BASE0x420
> +#define IA_L2PMXEVCNTR_BASE 0x421
> +#define IA_L2PMXEVFILTER_BASE   0x423
> +#define IA_L2PMXEVTYPER_BASE0x424
> +
> +#define IA_L2_REG_OFFSET0x10
> +
> +#define L2PMXEVFILTER_SUFILTER_ALL  0x000E
> +#define L2PMXEVFILTER_ORGFILTER_IDINDEP 0x0004
> +#define L2PMXEVFILTER_ORGFILTER_ALL 0x0003
> +
> +#define L2PM_CC_ENABLE  0x8000
> +
> +#define L2EVTYPER_REG_SHIFT 3
> +
> +#define L2PMRESR_GROUP_BITS 8
> +#define L2PMRESR_GROUP_MASK GENMASK(7, 0)
> +
> +#define L2CYCLE_CTR_BIT 31
> +#define L2CYCLE_CTR_RAW_CODE

Re: [PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

On 9/21/2016 05:12 PM, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
> 
> The L2 cache PMU driver is named 'l2cache_0' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
> 
> Signed-off-by: Neil Leeder 
> ---
> v6: restore accidentally dropped Kconfig dependencies
> 
> v5:
> Fold the header and l2-accessors into .c file
> Use multi-instance framework for hotplug
> Change terminology from slice to cluster for clarity
> Remove unnecessary rmw sequence for enable registers
> Use prev_count in hwc rather than in slice
> Enforce all events in same group on same CPU
> Add comments, rename variables for clarity
> 
> v4:
> Replace notifier with hotplug statemachine
> Allocate PMU struct dynamically
> 
> v3:
> Remove exports from l2-accessors
> Change l2-accessors Kconfig to make it not user-selectable
> Reorder and remove unnecessary includes
> 
> v2:
> Add the l2-accessors patch to this patchset, previously posted separately.
> Remove sampling and per-task functionality for this uncore PMU.
> Use cpumask to replace code which filtered events to one cpu per slice.
> Replace manual event filtering with filter_match callback.
> Use a separate used_mask for event groups.
> Add hotplug notifier for CPU and irq migration.
> Remove extraneous synchronisation instructions.
> Other miscellaneous cleanup.
> 
>  drivers/soc/qcom/Kconfig |   9 +
>  drivers/soc/qcom/Makefile|   1 +
>  drivers/soc/qcom/perf_event_l2.c | 948 
> +++
>  include/linux/cpuhotplug.h   |   1 +
>  4 files changed, 959 insertions(+)
>  create mode 100644 drivers/soc/qcom/perf_event_l2.c
> 
> diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
> index 461b387..3fa27a8 100644
> --- a/drivers/soc/qcom/Kconfig
> +++ b/drivers/soc/qcom/Kconfig
> @@ -10,6 +10,15 @@ config QCOM_GSBI
>functions for connecting the underlying serial UART, SPI, and I2C
>devices to the output pins.
>  
> +config QCOM_PERF_EVENTS_L2
> + bool "Qualcomm Technologies L2-cache perf events"
> + depends on ARCH_QCOM && ARM64 && HW_PERF_EVENTS && ACPI
> +   help
> +   Provides support for the L2 cache performance monitor unit (PMU)
> +   in Qualcomm Technologies processors.
> +   Adds the L2 cache PMU into the perf events subsystem for
> +   monitoring L2 cache events.
> +
>  config QCOM_PM
>   bool "Qualcomm Power Management"
>   depends on ARCH_QCOM && !ARM64
> diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
> index fdd664e..4c9df3b 100644
> --- a/drivers/soc/qcom/Makefile
> +++ b/drivers/soc/qcom/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_QCOM_GSBI)  +=  qcom_gsbi.o
> +obj-$(CONFIG_QCOM_PERF_EVENTS_L2)+= perf_event_l2.o
>  obj-$(CONFIG_QCOM_PM)+=  spm.o
>  obj-$(CONFIG_QCOM_SMD) +=smd.o
>  obj-$(CONFIG_QCOM_SMD_RPM)   += smd-rpm.o
> diff --git a/drivers/soc/qcom/perf_event_l2.c 
> b/drivers/soc/qcom/perf_event_l2.c
> new file mode 100644
> index 000..bbf47c9
> --- /dev/null
> +++ b/drivers/soc/qcom/perf_event_l2.c
> @@ -0,0 +1,948 @@
> +/* Copyright (c) 2015,2016 The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define MAX_L2_CTRS 9
> +
> +#define L2PMCR_NUM_EV_SHIFT 11
> +#define L2PMCR_NUM_EV_MASK  0x1F
> +
> +#define L2PMCR  0x400
> +#define L2PMCNTENCLR0x403
> +#define L2PMCNTENSET0x404
> +#define L2PMINTENCLR0x405
> +#define L2PMINTENSET0x406
> +#define L2PMOVSCLR  0x407
> +#define L2PMOVSSET  0x408
> +#define L2PMCCNTCR  0x409
> +#define L2PMCCNTR   0x40A
> +#define L2PMCCNTSR  0x40C
> +#define L2PMRESR0x410
> +#define IA_L2PMXEVCNTCR_BASE0x420
> +#define IA_L2PMXEVCNTR_BASE 0x421
> +#define IA_L2PMXEVFILTER_BASE   0x423
> +#define IA_L2PMXEVTYPER_BASE0x424
> +
> +#define IA_L2_REG_OFFSET0x10
> +
> +#define L2PMXEVFILTER_SUFILTER_ALL  0x000E
> +#define L2PMXEVFILTER_ORGFILTER_IDINDEP 0x0004
> +#define L2PMXEVFILTER_ORGFILTER_ALL 0x0003
> +
> +#define L2PM_CC_ENABLE  0x8000
> +
> +#define L2EVTYPER_REG_SHIFT 3
> +
> +#define L2PMRESR_GROUP_BITS 8
> +#define L2PMRESR_GROUP_MASK GENMASK(7, 0)
> +
> +#define L2CYCLE_CTR_BIT 31
> +#define L2CYCLE_CTR_RAW_CODE0xFE
> +
> +#define 

[PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

Adds perf events support for L2 cache PMU.

The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.

Signed-off-by: Neil Leeder 
---
v6: restore accidentally dropped Kconfig dependencies

v5:
Fold the header and l2-accessors into .c file
Use multi-instance framework for hotplug
Change terminology from slice to cluster for clarity
Remove unnecessary rmw sequence for enable registers
Use prev_count in hwc rather than in slice
Enforce all events in same group on same CPU
Add comments, rename variables for clarity

v4:
Replace notifier with hotplug statemachine
Allocate PMU struct dynamically

v3:
Remove exports from l2-accessors
Change l2-accessors Kconfig to make it not user-selectable
Reorder and remove unnecessary includes

v2:
Add the l2-accessors patch to this patchset, previously posted separately.
Remove sampling and per-task functionality for this uncore PMU.
Use cpumask to replace code which filtered events to one cpu per slice.
Replace manual event filtering with filter_match callback.
Use a separate used_mask for event groups.
Add hotplug notifier for CPU and irq migration.
Remove extraneous synchronisation instructions.
Other miscellaneous cleanup.

 drivers/soc/qcom/Kconfig |   9 +
 drivers/soc/qcom/Makefile|   1 +
 drivers/soc/qcom/perf_event_l2.c | 948 +++
 include/linux/cpuhotplug.h   |   1 +
 4 files changed, 959 insertions(+)
 create mode 100644 drivers/soc/qcom/perf_event_l2.c

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 461b387..3fa27a8 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -10,6 +10,15 @@ config QCOM_GSBI
   functions for connecting the underlying serial UART, SPI, and I2C
   devices to the output pins.
 
+config QCOM_PERF_EVENTS_L2
+   bool "Qualcomm Technologies L2-cache perf events"
+   depends on ARCH_QCOM && ARM64 && HW_PERF_EVENTS && ACPI
+ help
+ Provides support for the L2 cache performance monitor unit (PMU)
+ in Qualcomm Technologies processors.
+ Adds the L2 cache PMU into the perf events subsystem for
+ monitoring L2 cache events.
+
 config QCOM_PM
bool "Qualcomm Power Management"
depends on ARCH_QCOM && !ARM64
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index fdd664e..4c9df3b 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_QCOM_GSBI)+=  qcom_gsbi.o
+obj-$(CONFIG_QCOM_PERF_EVENTS_L2)  += perf_event_l2.o
 obj-$(CONFIG_QCOM_PM)  +=  spm.o
 obj-$(CONFIG_QCOM_SMD) +=  smd.o
 obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
diff --git a/drivers/soc/qcom/perf_event_l2.c b/drivers/soc/qcom/perf_event_l2.c
new file mode 100644
index 000..bbf47c9
--- /dev/null
+++ b/drivers/soc/qcom/perf_event_l2.c
@@ -0,0 +1,948 @@
+/* Copyright (c) 2015,2016 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_L2_CTRS 9
+
+#define L2PMCR_NUM_EV_SHIFT 11
+#define L2PMCR_NUM_EV_MASK  0x1F
+
+#define L2PMCR  0x400
+#define L2PMCNTENCLR0x403
+#define L2PMCNTENSET0x404
+#define L2PMINTENCLR0x405
+#define L2PMINTENSET0x406
+#define L2PMOVSCLR  0x407
+#define L2PMOVSSET  0x408
+#define L2PMCCNTCR  0x409
+#define L2PMCCNTR   0x40A
+#define L2PMCCNTSR  0x40C
+#define L2PMRESR0x410
+#define IA_L2PMXEVCNTCR_BASE0x420
+#define IA_L2PMXEVCNTR_BASE 0x421
+#define IA_L2PMXEVFILTER_BASE   0x423
+#define IA_L2PMXEVTYPER_BASE0x424
+
+#define IA_L2_REG_OFFSET0x10
+
+#define L2PMXEVFILTER_SUFILTER_ALL  0x000E
+#define L2PMXEVFILTER_ORGFILTER_IDINDEP 0x0004
+#define L2PMXEVFILTER_ORGFILTER_ALL 0x0003
+
+#define L2PM_CC_ENABLE  0x8000
+
+#define L2EVTYPER_REG_SHIFT 3
+
+#define L2PMRESR_GROUP_BITS 8
+#define L2PMRESR_GROUP_MASK GENMASK(7, 0)
+
+#define L2CYCLE_CTR_BIT 31
+#define L2CYCLE_CTR_RAW_CODE0xFE
+
+#define L2PMCR_RESET_ALL0x6
+#define L2PMCR_COUNTERS_ENABLE  0x1
+#define L2PMCR_COUNTERS_DISABLE 0x0
+
+#define L2PMRESR_EN ((u64)1 << 63)
+
+#define L2_EVT_MASK 0x0FFF
+#define L2_EVT_CODE_MASK0x0FF0
+#define L2_EVT_GRP_MASK 

[PATCH v6] soc: qcom: add l2 cache perf events driver

[Neil Leeder]

Adds perf events support for L2 cache PMU.

The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.

Signed-off-by: Neil Leeder 
---
v6: restore accidentally dropped Kconfig dependencies

v5:
Fold the header and l2-accessors into .c file
Use multi-instance framework for hotplug
Change terminology from slice to cluster for clarity
Remove unnecessary rmw sequence for enable registers
Use prev_count in hwc rather than in slice
Enforce all events in same group on same CPU
Add comments, rename variables for clarity

v4:
Replace notifier with hotplug statemachine
Allocate PMU struct dynamically

v3:
Remove exports from l2-accessors
Change l2-accessors Kconfig to make it not user-selectable
Reorder and remove unnecessary includes

v2:
Add the l2-accessors patch to this patchset, previously posted separately.
Remove sampling and per-task functionality for this uncore PMU.
Use cpumask to replace code which filtered events to one cpu per slice.
Replace manual event filtering with filter_match callback.
Use a separate used_mask for event groups.
Add hotplug notifier for CPU and irq migration.
Remove extraneous synchronisation instructions.
Other miscellaneous cleanup.

 drivers/soc/qcom/Kconfig |   9 +
 drivers/soc/qcom/Makefile|   1 +
 drivers/soc/qcom/perf_event_l2.c | 948 +++
 include/linux/cpuhotplug.h   |   1 +
 4 files changed, 959 insertions(+)
 create mode 100644 drivers/soc/qcom/perf_event_l2.c

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 461b387..3fa27a8 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -10,6 +10,15 @@ config QCOM_GSBI
   functions for connecting the underlying serial UART, SPI, and I2C
   devices to the output pins.
 
+config QCOM_PERF_EVENTS_L2
+   bool "Qualcomm Technologies L2-cache perf events"
+   depends on ARCH_QCOM && ARM64 && HW_PERF_EVENTS && ACPI
+ help
+ Provides support for the L2 cache performance monitor unit (PMU)
+ in Qualcomm Technologies processors.
+ Adds the L2 cache PMU into the perf events subsystem for
+ monitoring L2 cache events.
+
 config QCOM_PM
bool "Qualcomm Power Management"
depends on ARCH_QCOM && !ARM64
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index fdd664e..4c9df3b 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_QCOM_GSBI)+=  qcom_gsbi.o
+obj-$(CONFIG_QCOM_PERF_EVENTS_L2)  += perf_event_l2.o
 obj-$(CONFIG_QCOM_PM)  +=  spm.o
 obj-$(CONFIG_QCOM_SMD) +=  smd.o
 obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
diff --git a/drivers/soc/qcom/perf_event_l2.c b/drivers/soc/qcom/perf_event_l2.c
new file mode 100644
index 000..bbf47c9
--- /dev/null
+++ b/drivers/soc/qcom/perf_event_l2.c
@@ -0,0 +1,948 @@
+/* Copyright (c) 2015,2016 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_L2_CTRS 9
+
+#define L2PMCR_NUM_EV_SHIFT 11
+#define L2PMCR_NUM_EV_MASK  0x1F
+
+#define L2PMCR  0x400
+#define L2PMCNTENCLR0x403
+#define L2PMCNTENSET0x404
+#define L2PMINTENCLR0x405
+#define L2PMINTENSET0x406
+#define L2PMOVSCLR  0x407
+#define L2PMOVSSET  0x408
+#define L2PMCCNTCR  0x409
+#define L2PMCCNTR   0x40A
+#define L2PMCCNTSR  0x40C
+#define L2PMRESR0x410
+#define IA_L2PMXEVCNTCR_BASE0x420
+#define IA_L2PMXEVCNTR_BASE 0x421
+#define IA_L2PMXEVFILTER_BASE   0x423
+#define IA_L2PMXEVTYPER_BASE0x424
+
+#define IA_L2_REG_OFFSET0x10
+
+#define L2PMXEVFILTER_SUFILTER_ALL  0x000E
+#define L2PMXEVFILTER_ORGFILTER_IDINDEP 0x0004
+#define L2PMXEVFILTER_ORGFILTER_ALL 0x0003
+
+#define L2PM_CC_ENABLE  0x8000
+
+#define L2EVTYPER_REG_SHIFT 3
+
+#define L2PMRESR_GROUP_BITS 8
+#define L2PMRESR_GROUP_MASK GENMASK(7, 0)
+
+#define L2CYCLE_CTR_BIT 31
+#define L2CYCLE_CTR_RAW_CODE0xFE
+
+#define L2PMCR_RESET_ALL0x6
+#define L2PMCR_COUNTERS_ENABLE  0x1
+#define L2PMCR_COUNTERS_DISABLE 0x0
+
+#define L2PMRESR_EN ((u64)1 << 63)
+
+#define L2_EVT_MASK 0x0FFF
+#define L2_EVT_CODE_MASK0x0FF0
+#define L2_EVT_GRP_MASK 0x000F
+#define