Re: [PATCH v7 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

2018-06-13 Thread Oleksij Rempel 
Hi Mark,

Rob ACKed DT bindings, Rafael ACKed export of pm_power_off_prepare. I
need your OK for regulator patch.

On 17.05.2018 07:50, Oleksij Rempel wrote:
> On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
> about state changes. In this case internal state of PMIC must be
> preconfigured for upcomming state change.
> It works fine with the current regulator framework, except with the
> power-off case.
> 
> This patch is providing an optional pm_power_off_prepare handler
> which will configure standby state of the PMIC to disable all power lines.
> 
> In my power consumption test on RIoTBoard, I got the following results:
> power off without this patch: 320 mA
> power off with this patch:2   mA
> suspend to ram:   40  mA
> 
> Signed-off-by: Oleksij Rempel 
> ---
>  drivers/regulator/pfuze100-regulator.c | 92 ++
>  1 file changed, 92 insertions(+)
> 
> diff --git a/drivers/regulator/pfuze100-regulator.c 
> b/drivers/regulator/pfuze100-regulator.c
> index 63922a2167e5..f6c276ed91d8 100644
> --- a/drivers/regulator/pfuze100-regulator.c
> +++ b/drivers/regulator/pfuze100-regulator.c
> @@ -28,6 +28,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #define PFUZE_NUMREGS128
> @@ -42,11 +43,17 @@
>  
>  #define PFUZE100_COINVOL 0x1a
>  #define PFUZE100_SW1ABVOL0x20
> +#define PFUZE100_SW1ABMODE   0x23
>  #define PFUZE100_SW1CVOL 0x2e
> +#define PFUZE100_SW1CMODE0x31
>  #define PFUZE100_SW2VOL  0x35
> +#define PFUZE100_SW2MODE 0x38
>  #define PFUZE100_SW3AVOL 0x3c
> +#define PFUZE100_SW3AMODE0x3f
>  #define PFUZE100_SW3BVOL 0x43
> +#define PFUZE100_SW3BMODE0x46
>  #define PFUZE100_SW4VOL  0x4a
> +#define PFUZE100_SW4MODE 0x4d
>  #define PFUZE100_SWBSTCON1   0x66
>  #define PFUZE100_VREFDDRCON  0x6a
>  #define PFUZE100_VSNVSVOL0x6b
> @@ -57,6 +64,13 @@
>  #define PFUZE100_VGEN5VOL0x70
>  #define PFUZE100_VGEN6VOL0x71
>  
> +#define PFUZE100_SWxMODE_MASK0xf
> +#define PFUZE100_SWxMODE_APS_APS 0x8
> +#define PFUZE100_SWxMODE_APS_OFF 0x4
> +
> +#define PFUZE100_VGENxLPWR   BIT(6)
> +#define PFUZE100_VGENxSTBY   BIT(5)
> +
>  enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
>  
>  struct pfuze_regulator {
> @@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int 
> index)
>  }
>  #endif
>  
> +static struct pfuze_chip *syspm_pfuze_chip;
> +
> +static void pfuze_power_off_prepare(void)
> +{
> + dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
> +
> + /* Switch from default mode: APS/APS to APS/Off */
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> +
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> +}
> +
> +static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
> +{
> + if (pfuze_chip->chip_id != PFUZE100) {
> + dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
> handler for not supported chip\n");
> + return -ENODEV;
> +

Re: [PATCH v7 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

2018-06-13 Thread Oleksij Rempel 
Hi Mark,

Rob ACKed DT bindings, Rafael ACKed export of pm_power_off_prepare. I
need your OK for regulator patch.

On 17.05.2018 07:50, Oleksij Rempel wrote:
> On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
> about state changes. In this case internal state of PMIC must be
> preconfigured for upcomming state change.
> It works fine with the current regulator framework, except with the
> power-off case.
> 
> This patch is providing an optional pm_power_off_prepare handler
> which will configure standby state of the PMIC to disable all power lines.
> 
> In my power consumption test on RIoTBoard, I got the following results:
> power off without this patch: 320 mA
> power off with this patch:2   mA
> suspend to ram:   40  mA
> 
> Signed-off-by: Oleksij Rempel 
> ---
>  drivers/regulator/pfuze100-regulator.c | 92 ++
>  1 file changed, 92 insertions(+)
> 
> diff --git a/drivers/regulator/pfuze100-regulator.c 
> b/drivers/regulator/pfuze100-regulator.c
> index 63922a2167e5..f6c276ed91d8 100644
> --- a/drivers/regulator/pfuze100-regulator.c
> +++ b/drivers/regulator/pfuze100-regulator.c
> @@ -28,6 +28,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #define PFUZE_NUMREGS128
> @@ -42,11 +43,17 @@
>  
>  #define PFUZE100_COINVOL 0x1a
>  #define PFUZE100_SW1ABVOL0x20
> +#define PFUZE100_SW1ABMODE   0x23
>  #define PFUZE100_SW1CVOL 0x2e
> +#define PFUZE100_SW1CMODE0x31
>  #define PFUZE100_SW2VOL  0x35
> +#define PFUZE100_SW2MODE 0x38
>  #define PFUZE100_SW3AVOL 0x3c
> +#define PFUZE100_SW3AMODE0x3f
>  #define PFUZE100_SW3BVOL 0x43
> +#define PFUZE100_SW3BMODE0x46
>  #define PFUZE100_SW4VOL  0x4a
> +#define PFUZE100_SW4MODE 0x4d
>  #define PFUZE100_SWBSTCON1   0x66
>  #define PFUZE100_VREFDDRCON  0x6a
>  #define PFUZE100_VSNVSVOL0x6b
> @@ -57,6 +64,13 @@
>  #define PFUZE100_VGEN5VOL0x70
>  #define PFUZE100_VGEN6VOL0x71
>  
> +#define PFUZE100_SWxMODE_MASK0xf
> +#define PFUZE100_SWxMODE_APS_APS 0x8
> +#define PFUZE100_SWxMODE_APS_OFF 0x4
> +
> +#define PFUZE100_VGENxLPWR   BIT(6)
> +#define PFUZE100_VGENxSTBY   BIT(5)
> +
>  enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
>  
>  struct pfuze_regulator {
> @@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int 
> index)
>  }
>  #endif
>  
> +static struct pfuze_chip *syspm_pfuze_chip;
> +
> +static void pfuze_power_off_prepare(void)
> +{
> + dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
> +
> + /* Switch from default mode: APS/APS to APS/Off */
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
> +PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
> +
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> + regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
> +PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
> +PFUZE100_VGENxSTBY);
> +}
> +
> +static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
> +{
> + if (pfuze_chip->chip_id != PFUZE100) {
> + dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
> handler for not supported chip\n");
> + return -ENODEV;
> +

[PATCH v7 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

2018-05-16 Thread Oleksij Rempel 
On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
about state changes. In this case internal state of PMIC must be
preconfigured for upcomming state change.
It works fine with the current regulator framework, except with the
power-off case.

This patch is providing an optional pm_power_off_prepare handler
which will configure standby state of the PMIC to disable all power lines.

In my power consumption test on RIoTBoard, I got the following results:
power off without this patch:   320 mA
power off with this patch:  2   mA
suspend to ram: 40  mA

Signed-off-by: Oleksij Rempel 
---
 drivers/regulator/pfuze100-regulator.c | 92 ++
 1 file changed, 92 insertions(+)

diff --git a/drivers/regulator/pfuze100-regulator.c 
b/drivers/regulator/pfuze100-regulator.c
index 63922a2167e5..f6c276ed91d8 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define PFUZE_NUMREGS  128
@@ -42,11 +43,17 @@
 
 #define PFUZE100_COINVOL   0x1a
 #define PFUZE100_SW1ABVOL  0x20
+#define PFUZE100_SW1ABMODE 0x23
 #define PFUZE100_SW1CVOL   0x2e
+#define PFUZE100_SW1CMODE  0x31
 #define PFUZE100_SW2VOL0x35
+#define PFUZE100_SW2MODE   0x38
 #define PFUZE100_SW3AVOL   0x3c
+#define PFUZE100_SW3AMODE  0x3f
 #define PFUZE100_SW3BVOL   0x43
+#define PFUZE100_SW3BMODE  0x46
 #define PFUZE100_SW4VOL0x4a
+#define PFUZE100_SW4MODE   0x4d
 #define PFUZE100_SWBSTCON1 0x66
 #define PFUZE100_VREFDDRCON0x6a
 #define PFUZE100_VSNVSVOL  0x6b
@@ -57,6 +64,13 @@
 #define PFUZE100_VGEN5VOL  0x70
 #define PFUZE100_VGEN6VOL  0x71
 
+#define PFUZE100_SWxMODE_MASK  0xf
+#define PFUZE100_SWxMODE_APS_APS   0x8
+#define PFUZE100_SWxMODE_APS_OFF   0x4
+
+#define PFUZE100_VGENxLPWR BIT(6)
+#define PFUZE100_VGENxSTBY BIT(5)
+
 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
 
 struct pfuze_regulator {
@@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int index)
 }
 #endif
 
+static struct pfuze_chip *syspm_pfuze_chip;
+
+static void pfuze_power_off_prepare(void)
+{
+   dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
+
+   /* Switch from default mode: APS/APS to APS/Off */
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+}
+
+static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
+{
+   if (pfuze_chip->chip_id != PFUZE100) {
+   dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
handler for not supported chip\n");
+   return -ENODEV;
+   }
+
+   if (pm_power_off_prepare) {
+   dev_warn(pfuze_chip->dev, "pm_power_off_prepare is already 
registered.\n");
+   return -EBUSY;
+   }
+
+   if (syspm_pfuze_chip) {
+   dev_warn(pfuze_chip->dev,

[PATCH v7 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

2018-05-16 Thread Oleksij Rempel 
On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
about state changes. In this case internal state of PMIC must be
preconfigured for upcomming state change.
It works fine with the current regulator framework, except with the
power-off case.

This patch is providing an optional pm_power_off_prepare handler
which will configure standby state of the PMIC to disable all power lines.

In my power consumption test on RIoTBoard, I got the following results:
power off without this patch:   320 mA
power off with this patch:  2   mA
suspend to ram: 40  mA

Signed-off-by: Oleksij Rempel 
---
 drivers/regulator/pfuze100-regulator.c | 92 ++
 1 file changed, 92 insertions(+)

diff --git a/drivers/regulator/pfuze100-regulator.c 
b/drivers/regulator/pfuze100-regulator.c
index 63922a2167e5..f6c276ed91d8 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define PFUZE_NUMREGS  128
@@ -42,11 +43,17 @@
 
 #define PFUZE100_COINVOL   0x1a
 #define PFUZE100_SW1ABVOL  0x20
+#define PFUZE100_SW1ABMODE 0x23
 #define PFUZE100_SW1CVOL   0x2e
+#define PFUZE100_SW1CMODE  0x31
 #define PFUZE100_SW2VOL0x35
+#define PFUZE100_SW2MODE   0x38
 #define PFUZE100_SW3AVOL   0x3c
+#define PFUZE100_SW3AMODE  0x3f
 #define PFUZE100_SW3BVOL   0x43
+#define PFUZE100_SW3BMODE  0x46
 #define PFUZE100_SW4VOL0x4a
+#define PFUZE100_SW4MODE   0x4d
 #define PFUZE100_SWBSTCON1 0x66
 #define PFUZE100_VREFDDRCON0x6a
 #define PFUZE100_VSNVSVOL  0x6b
@@ -57,6 +64,13 @@
 #define PFUZE100_VGEN5VOL  0x70
 #define PFUZE100_VGEN6VOL  0x71
 
+#define PFUZE100_SWxMODE_MASK  0xf
+#define PFUZE100_SWxMODE_APS_APS   0x8
+#define PFUZE100_SWxMODE_APS_OFF   0x4
+
+#define PFUZE100_VGENxLPWR BIT(6)
+#define PFUZE100_VGENxSTBY BIT(5)
+
 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
 
 struct pfuze_regulator {
@@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int index)
 }
 #endif
 
+static struct pfuze_chip *syspm_pfuze_chip;
+
+static void pfuze_power_off_prepare(void)
+{
+   dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
+
+   /* Switch from default mode: APS/APS to APS/Off */
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+}
+
+static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
+{
+   if (pfuze_chip->chip_id != PFUZE100) {
+   dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
handler for not supported chip\n");
+   return -ENODEV;
+   }
+
+   if (pm_power_off_prepare) {
+   dev_warn(pfuze_chip->dev, "pm_power_off_prepare is already 
registered.\n");
+   return -EBUSY;
+   }
+
+   if (syspm_pfuze_chip) {
+   dev_warn(pfuze_chip->dev, "syspm_pfuze_chip is already