On Monday 19 August 2013, Sebastian Hesselbarth wrote:
> On 08/17/2013 09:28 PM, Arnd Bergmann wrote:
> > On Friday 16 August 2013, Sebastian Hesselbarth wrote:
> > This seems like a strange combination. I would have expected either
> > PJ4+Aurora+apbtimer
> > or A9+pl310+localtimer, based on
On Monday 19 August 2013, Sebastian Hesselbarth wrote:
On 08/17/2013 09:28 PM, Arnd Bergmann wrote:
On Friday 16 August 2013, Sebastian Hesselbarth wrote:
This seems like a strange combination. I would have expected either
PJ4+Aurora+apbtimer
or A9+pl310+localtimer, based on what I
On 08/17/2013 09:28 PM, Arnd Bergmann wrote:
On Friday 16 August 2013, Sebastian Hesselbarth wrote:
+ cpu@0 {
+ compatible = "marvell,sheeva-v7";
+ device_type = "cpu";
+ next-level-cache = <>;
+
On 08/17/2013 09:28 PM, Arnd Bergmann wrote:
On Friday 16 August 2013, Sebastian Hesselbarth wrote:
+ cpu@0 {
+ compatible = marvell,sheeva-v7;
+ device_type = cpu;
+ next-level-cache = l2;
+
On Friday 16 August 2013, Sebastian Hesselbarth wrote:
> + cpu@0 {
> + compatible = "marvell,sheeva-v7";
> + device_type = "cpu";
> + next-level-cache = <>;
> + reg = <0>;
> + };
...
On Friday 16 August 2013, Sebastian Hesselbarth wrote:
+ cpu@0 {
+ compatible = marvell,sheeva-v7;
+ device_type = cpu;
+ next-level-cache = l2;
+ reg = 0;
+ };
...
+
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
> This adds very basic device tree files for the Marvell Armada 1500 SoC
> and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
> cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
> and
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
> This adds very basic device tree files for the Marvell Armada 1500 SoC
> and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
> cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
> and
On 08/16/2013 09:50 PM, Jason Cooper wrote:
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
and interrupt controllers.
The clocks are fixed-clock placeholders until a real DT
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
and interrupt controllers.
The clocks are fixed-clock placeholders until a real DT
On 08/16/2013 09:50 PM, Jason Cooper wrote:
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
and
On Fri, Aug 16, 2013 at 09:41:37PM +0200, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
and the Sony NSZ-GS7 GoogleTV board. Currently, SoC only has nodes for
cpus, some clocks, l2 cache controller, local timer, apb timers, uart,
and
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